Tunneling passivation contact structure and preparation method thereof, solar cell and photovoltaic module

Abstract

The embodiment of the invention discloses a tunneling passivation contact structure and a preparation method thereof, a solar cell and a photovoltaic module, and belongs to the technical field of crystalline silicon solar cells, the tunneling passivation contact structure comprises a crystalline silicon substrate, a tunneling contact layer and a passivation layer, the passivation layer is located on the back face of the tunneling contact layer, and the passivation layer is located on the back face of the crystalline silicon substrate. The tunneling oxide layer sequentially comprises a first lightly-doped carbon-doped layer, a second tunneling oxide layer, a first heavily-doped carbon-doped layer and a second lightly-doped carbon-doped layer. According to the tunneling passivation contact structure provided by the invention, the three layers of carbon-doped thin films show a low-high-low gradient distribution characteristic in the aspect of carbon concentration, and the open-circuit voltage is remarkably improved.

Description

Technical Field

[0001] The present invention relates to the technical field of crystalline silicon solar cells, and more particularly to a tunneling passivation contact structure and a preparation method thereof, a solar cell and a photovoltaic module. Background Art

[0002] In the manufacturing process of TOPCon (tunneling oxide passivation contact) solar cells, the preparation of the tunneling oxide layer (SiO2) and the polysilicon layer (poly-Si) is a key step in determining the cell conversion efficiency. The doping process of the polysilicon layer directly affects the selective transport of carriers and the surface passivation effect. Traditional carbon doping technology uses a single-layer silicon oxide process, in-situ doping with a mixture of phosphine (PH3) and methane (CH4) to form a lightly doped (low-doped) and heavily doped (high-doped) polysilicon structure. In this process, precise control of the gas flow rate has a significant impact on the passivation quality and carrier mobility.

[0003] CN 119486365 A discloses a passivation contact structure for solar cells. By inserting a first carbon-doped polysilicon layer with increasing carbon doping levels into the polysilicon layer, different regions of the polysilicon layer can have different H distribution states, effectively preventing H concentration in the tunneling oxide layer, ultimately reducing the film explosion rate and the occurrence of cell explosion.

[0004] However, the practical application of the aforementioned patented technology still faces the technical bottleneck of low opening voltage, which may be due to the fact that the coordinated optimization of carbon doping gradient and hydrogen element distribution has not yet reached the optimal balance point. This technical status also reflects that there is still room for further breakthroughs in the optimization of the passivation contact structure of current TOPCon cells. Summary of the Invention

[0005] The present invention aims to address one of the technical problems in the related art to a certain extent. To this end, the present invention proposes a tunnel passivation contact structure in which the three-layer carbon-doped film exhibits a "low-high-low" gradient distribution of carbon concentration, significantly improving the open circuit voltage.

[0006] The embodiment of the present invention further provides a method for preparing a tunneling passivation contact structure.

[0007] An embodiment of the present invention further provides a solar cell with a tunneling passivation contact structure.

[0008] An embodiment of the present invention further provides a photovoltaic module with a tunneling passivation contact structure.

[0009] The technical solution adopted by the present invention is: to provide a tunnel passivation contact structure, including a crystalline silicon substrate, a tunnel contact layer and a passivation layer, the passivation layer is located on the back side of the tunnel contact layer, and includes a first lightly doped carbon-doped layer, a second tunnel oxide layer, a first heavily doped carbon-doped layer and a second lightly doped carbon-doped layer in sequence.

[0010] After adopting the above structure, the setting of the second lightly doped carbon-doped layer is not only conducive to the effective combination with hydrogen elements, but also due to the low usage of phosphine gas and the trace doping of carbon elements, the concentration of free carriers is maintained at a low level. Therefore, the number of photons absorbed by free carriers under illumination conditions is significantly reduced, thereby reducing the optical loss caused by free carrier absorption (FCA) and further improving the surface passivation effect. In addition, the regulation of carbon concentration in the film layer also significantly enhances the overall passivation performance. As the outermost second lightly doped carbon-doped layer, it also has the function of inhibiting the vertical penetration of silver spikes, which helps silver crystals to grow preferentially in the lateral direction, thereby effectively improving the fill factor (FF). The design of this structure does not require the introduction of new equipment and is fully compatible with the existing manufacturing process. It will not increase equipment investment and is easy to promote and apply in the existing industrial chain. It has good practicality and feasibility.

[0011] According to one embodiment of the present invention, the activated phosphorus atom concentration of the first lightly doped carbon-doped layer is selected from 2E20 to 5E20 cm -3 The carbon atom concentration of the first lightly doped carbon layer is selected from 9E20 to 2E21 cm -3 and / or

[0012] The activated phosphorus atom concentration of the first heavily doped carbon layer is selected from 1E20 to 3E20 cm -3 The carbon atom concentration of the first heavily doped carbon layer is selected from 1E21 to 4E21 cm -3 and / or

[0013] The activated phosphorus atom concentration of the second lightly doped carbon layer is selected from 2E20 to 4E20 cm -3 The carbon atom concentration of the second lightly doped carbon layer is selected from 9E20 to 2E21 cm -3 .

[0014] According to one embodiment of the present invention, the tunneling contact layer is a first tunneling oxide layer or a first tunneling oxide layer / intermediate layer, and the intermediate layer is SiOx-Ar or i-poly. By constructing the intermediate layer, not only can the electrical performance of the tunneling interface be effectively improved, but the open-circuit voltage (Voc) of the battery device can also be further increased. In particular, when an argon-treated silicon oxide layer is used as the intermediate layer, dangling bonds at the interface can be effectively removed, the density of defect states can be reduced, and the binding capacity of hydrogen elements can be enhanced, which helps to achieve a stronger interfacial hydrogen locking effect and significantly improve the quality of interface passivation.

[0015] According to one embodiment of the present invention, the thickness of the first tunnel oxide layer is 1.4-2.2 nm; and / or

[0016] The thickness of the second tunnel oxide layer is 0.5-1.5 nm.

[0017] According to one embodiment of the present invention, the thickness of the first lightly doped carbon-doped layer is 5-30 nm, preferably 15-20 nm; and / or

[0018] The thickness of the first heavily doped carbon-doped layer is 50-80 nm, preferably 60-70 nm; and / or

[0019] The thickness of the second lightly doped carbon-doped layer is 5-20nm, preferably 10-15nm; the three-layer carbon-doped film shows a "low-high-low" gradient distribution feature in carbon concentration, starting from the low carbon in the first lightly doped layer, reaching a high carbon concentration peak through the heavily doped layer, and then falling back to a lower level in the second lightly doped layer. This gradient structure of carbon content not only helps to enhance the passivation performance of the film as a whole and effectively reduce the interface carrier recombination rate, but also can achieve optimized control of contact resistance and further reduce current loss. In addition, the outermost second lightly doped carbon-doped layer not only has good passivation ability, but also has the ability to suppress the vertical penetration of silver spikes, prompting silver crystals to grow preferentially in the horizontal direction, thereby improving the reliability and fill factor (FF) of the device and ensuring the stability of the device during long-term operation.

[0020] According to one embodiment of the present invention, a second heavily doped carbon-doped layer and a third tunneling oxide layer are provided between the second tunneling oxide layer and the first heavily doped carbon-doped layer; by constructing a triple tunneling structure, fine-tuning of carrier behavior is achieved. Specifically, the triple tunneling structure forms a multilayer composite structure by introducing the second heavily doped carbon-doped layer and the third tunneling oxide layer between the second tunneling oxide layer and the first heavily doped carbon-doped layer. This further enhances the complexity of the charge tunneling path, requiring the charge to overcome more potential barriers during the tunneling process, thereby effectively suppressing the generation of leakage current.

[0021] According to one embodiment of the present invention, the phosphorus atomic concentration of the second heavily doped carbon layer is selected from 1E20 to 3E20 cm -3 and / or

[0022] The thickness of the third tunnel oxide layer is 1.5-2.2 nm.

[0023] According to one embodiment of the present invention, the number of gate lines of the electrode exceeds 300, forming a high-density gate line structure, which helps to improve the open circuit voltage, short circuit current and fill factor, thereby further enhancing the photoelectric conversion efficiency.

[0024] A solar cell comprises any one of the above-mentioned tunneling passivation contact structures.

[0025] A method for preparing a tunneling passivation contact structure comprises the following steps:

[0026] S1. Providing a crystalline silicon substrate, wherein the crystalline silicon substrate has a front side and a back side relative to each other;

[0027] S2, preparing a tunnel contact layer on the back side of the crystalline silicon substrate;

[0028] S3. Prepare a passivation layer on the back side of the tunnel contact layer, wherein the passivation layer includes a first lightly doped carbon-doped layer, a second tunnel oxide layer, a first heavily doped carbon-doped layer and a second lightly doped carbon-doped layer.

[0029] According to one embodiment of the present invention, in step S3, the phosphine flow rate of the first lightly doped carbon-doped layer is 50-500 sccm; the methane flow rate is 50-500 sccm; and / or

[0030] The phosphine flow rate of the first heavily doped carbon-doped layer is 700-2000 sccm; the methane flow rate is 1500-3000 sccm; and / or

[0031] The phosphine flow rate of the second lightly doped carbon-doped layer is 20-400 sccm; the methane flow rate is 20-500 sccm.

[0032] According to one embodiment of the present invention, step S2 specifically includes:

[0033] S21, preparing a first tunnel oxide layer on the back side of the crystalline silicon substrate;

[0034] S22, preparing an intermediate layer on the back side of the first tunnel oxide layer;

[0035] Wherein, the intermediate layer is SiOx-Ar or i-poly.

[0036] According to one embodiment of the present invention, step S3 specifically includes:

[0037] S31. Prepare a first lightly doped carbon-doped layer / a second tunneling oxide layer / a first heavily doped carbon-doped layer / a second lightly doped carbon-doped layer in sequence on the back side of the tunneling contact layer, or prepare a first lightly doped carbon-doped layer / a second tunneling oxide layer / a second heavily doped carbon-doped layer / a third tunneling oxide layer / a first heavily doped carbon-doped layer / a second lightly doped carbon-doped layer in sequence.

[0038] A photovoltaic module comprises any of the above-mentioned tunneling passivation contact structures or the above-mentioned solar cell or a solar cell manufactured by any of the above-mentioned manufacturing methods. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0040] Figure 1 Schematic diagram of the tunnel passivation contact structure in Example 1 of the present invention.

[0041] Figure 2 Schematic diagram of the tunnel passivation contact structure in Example 3 of the present invention.

[0042] Figure 3 Schematic diagram of the tunnel passivation contact structure in Example 4 of the present invention.

[0043] Figure 4 Schematic diagram of the tunnel passivation contact structure in Example 5 of the present invention.

[0044] Description of the numbers in the figure:

[0045] 1. Crystalline silicon substrate; 2. First tunneling oxide layer; 3. First lightly doped carbon-doped layer; 4. Second tunneling oxide layer; 5. First heavily doped carbon-doped layer; 6. Second lightly doped carbon-doped layer; 7. Intermediate layer; 8. Second heavily doped carbon-doped layer; 9. Third tunneling oxide layer. DETAILED DESCRIPTION

[0046] The following describes embodiments of the present invention in detail. Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are intended only to explain the present invention and are not to be construed as limiting the present invention.

[0047] In this embodiment, the crystalline silicon substrate 1, also referred to as a silicon wafer, is classified as either an n-type silicon wafer or a p-type silicon wafer. The "doping" in the first lightly doped carbon-doped layer 3, the first heavily doped carbon-doped layer 5, the second lightly doped carbon-doped layer 6, and the second heavily doped carbon-doped layer 8 refers to the doping elements added to the silicon thin film. These doping elements are adaptively adjusted based on the type of silicon wafer selected.

[0048] Specifically, in this embodiment, the selected crystalline silicon substrate 1 is an n-type substrate. Therefore, the doping element in the first lightly doped carbon-doped layer 3, the first heavily doped carbon-doped layer 5, the second lightly doped carbon-doped layer 6, and the second heavily doped carbon-doped layer 8 is phosphorus. This phosphorus doping is selected to enhance the electronic conductivity of the n-type substrate, improve the interface passivation effect, and reduce charge recombination.

[0049] In other embodiments, if a p-type crystalline silicon substrate 1 is used, the doping element in the first lightly doped carbon-doped layer 3, the first heavily doped carbon-doped layer 5, the second lightly doped carbon-doped layer 6, and the second heavily doped carbon-doped layer 8 is adjusted to boron. Boron, as a p-type doping element, can better match the p-type silicon wafer, ensuring the flow and collection efficiency of charges while improving the overall passivation effect.

[0050] In this embodiment, the word "light" in the first lightly doped carbon-doped layer 3, the second lightly doped carbon-doped layer 6, and the second heavily doped carbon-doped layer 8 modifies the degree of doping and carbon doping. For example, the first lightly doped carbon-doped layer 3 can be understood as the first lightly phosphorus-doped lightly doped carbon-doped layer or the first lightly boron-doped carbon-doped layer; similarly, the second lightly doped carbon-doped layer 6 can be understood as the second lightly phosphorus-doped lightly doped carbon-doped layer or the second lightly boron-doped carbon-doped layer, and the second heavily doped carbon-doped layer 8 can also be understood as the third lightly phosphorus-doped lightly doped carbon-doped layer or the third lightly boron-doped carbon-doped layer. In this context, "light" means that the doping concentration is relatively low, and the carbon doping amount is also properly controlled, in order to enhance the passivation effect and charge transfer performance of the film. The first heavily doped carbon-doped layer 5 can be understood as a heavily phosphorus-doped heavily doped carbon-doped layer or a heavily boron-doped heavily doped carbon-doped layer, indicating that the doping concentration is higher and has a higher carbon content.

[0051] Furthermore, in this embodiment, the intermediate layer 7 is located between the first tunneling oxide layer 2 and the first lightly doped carbon-doped layer 3. When the intermediate layer 7 is SiOx-Ar, i.e., the intermediate layer 7 is a silicon oxide layer treated with argon, it can effectively remove surface dangling bonds and enhance hydrogen bonding, thereby improving the passivation performance of the interface. When the intermediate layer 7 is i-poly, i-poly is an intrinsic layer with good electrical properties, which can further optimize the electrical characteristics of the interlayer interface.

[0052] In one embodiment of the present application, a tunneling passivation contact structure is provided, including a crystalline silicon substrate 1, a tunneling contact layer and a passivation layer, wherein the passivation layer is located on the back side of the tunneling contact layer and includes a first lightly doped carbon-doped layer 3, a second tunneling oxide layer 4, a first heavily doped carbon-doped layer 5 and a second lightly doped carbon-doped layer 6 in sequence.

[0053] Specifically, in this embodiment, the activated phosphorus atom concentration of the first lightly doped carbon-doped layer 3 is selected from 2E20 to 5E20 cm -3 Preferably, the activated phosphorus atom concentration of the first lightly doped carbon-doped layer 3 is selected from 2E20 to 3E20 cm- 3 The activated phosphorus atomic concentration of the first lightly doped carbon-doped layer 3 may be, but is not limited to, 2E20 cm -3 、3E20cm -3 、4E20cm -3 、5E20cm -3 .

[0054] The carbon atom concentration of the first lightly doped carbon-doped layer 3 is selected from 9E20 to 2E21 cm -3 The activated phosphorus and carbon atomic concentration of the first lightly doped carbon-doped layer 3 is selected from 9E20 to 1E21 cm -3 The activated carbon atom concentration of the first lightly doped carbon-doped layer 3 may be, but is not limited to, 9E20cm -3 、1E21cm -3 、2E21cm -3 .

[0055] The activated phosphorus atomic concentration of the first heavily doped carbon-doped layer 5 is selected from 1E20 to 3E20 cm -3 Preferably, the activated phosphorus atom concentration of the first heavily doped carbon-doped layer 5 is selected from 2E20 to 3E20 cm -3 The activated phosphorus atom concentration of the first heavily doped carbon-doped layer 5 may be, but is not limited to, 1E20 cm -3 、2E20cm- 3 、3E20cm- 3 .

[0056] The carbon atom concentration of the first heavily doped carbon-doped layer 5 is selected from 1E21 to 4E21 cm -3 The activated phosphorus and carbon atomic concentration of the first heavily doped carbon-doped layer 5 is selected from 2E21 to 3E21 cm -3 The activated carbon atom concentration of the first heavily doped carbon-doped layer 5 may be, but is not limited to, 1E21 cm -3 、2E21cm -3 、3E21cm -3 、4E21cm -3 .

[0057] The activated phosphorus atom concentration of the second lightly doped carbon-doped layer 6 is selected from 2E20 to 4E20 cm -3 Preferably, the activated phosphorus atom concentration of the second lightly phosphorus-doped and carbon-doped layer 6 is selected from 2E20 to 3E20 cm- 3 The activated phosphorus atomic concentration of the second lightly phosphorus-doped and carbon-doped layer 6 may be, but is not limited to, 2E20 cm -3 、3E20cm -3 、4E20cm -3 .

[0058] The carbon atom concentration of the second lightly doped carbon-doped layer 6 is selected from 9E20 to 2E21 cm -3 The activated phosphorus and carbon atomic concentration of the second lightly phosphorus-doped and carbon-doped layer 6 is selected from 9E20 to 1E21 cm -3 The activated carbon atom concentration of the second lightly phosphorus-doped carbon-doped layer 6 may be, but is not limited to, 9E20cm -3 、1E21cm -3 、2E21cm -3 .

[0059] Specifically, the tunneling contact layer is a first tunneling oxide layer 2 or a first tunneling oxide layer 2 / intermediate layer 7, wherein the intermediate layer 7 is SiOX-Ar or i-poly. The thickness of the first tunneling oxide layer 2 is 1.4-2.2 nm; the thickness of the second tunneling oxide layer 4 is 0.5-1.5 nm. The thickness of the first tunneling oxide layer 2 may be, but is not limited to, 1.4 nm, 1.5 nm, 1.6 nm, 1.7 nm, 1.8 nm, 1.9 nm, 2.0 nm, 2.1 nm, or 2.2 nm. The thickness of the first lightly doped carbon-doped layer 3 is 5-30 nm, preferably 15-20 nm. The thickness of the first lightly doped carbon-doped layer 3 may be, but is not limited to, 5 nm, 6 nm, 7 nm, 8 nm, 9 nm, 10 nm, 11 nm, 12 nm, 13 nm, 14 nm, 15 nm, 16 nm, 17 nm, 18 nm, 19 nm, or 20 nm.

[0060] Similarly, the thickness of the first heavily doped carbon-doped layer 5 is 50-80nm, preferably 60-70nm, and the thickness of the first heavily doped carbon-doped layer 5 can be but is not limited to 50nm, 55nm, 60nm, 61nm, 62nm, 63nm, 64nm, 65nm, 66nm, 67nm, 68nm, 69nm, 70nm, 75nm or 80nm; the thickness of the second lightly doped carbon-doped layer 6 is 5-20nm, preferably 10-15nm, and the thickness of the second lightly doped carbon-doped layer 6 can be but is not limited to 5nm, 6nm, 7nm, 8nm, 9nm, 10nm, 11nm, 12nm, 13nm, 14nm, 15nm, 16nm, 17nm, 18nm, 19nm or 20nm.

[0061] In this embodiment, the phosphorus doping method employed is to introduce a phosphorus source material into a silicon wafer via a plasma-enhanced chemical vapor deposition (PECVD) or low-pressure chemical vapor deposition (LPCVD) process to achieve phosphorus doping of the silicon wafer. The phosphorus source may be in gaseous or liquid form, and specifically includes, but is not limited to, phosphine (PH3), phosphane (P3H4), phosphorus trichloride (PCl3), and phosphorus oxide (such as P2O5). These phosphorus sources release active phosphorus during the deposition process, thereby effectively achieving doping modification of the silicon material.

[0062] In this embodiment, the carbon source for carbon doping is introduced into the silicon wafer via plasma-enhanced chemical vapor deposition (PECVD) or low-pressure chemical vapor deposition (LPCVD). The carbon source may include carbon-containing gases such as methane (CH4), ethylene (C2H4), and acetylene (C2H2). Under specific temperature and pressure conditions, these gases decompose during the deposition process to produce carbon atoms, which are then doped into the silicon lattice.

[0063] Specifically, a second heavily doped carbon-doped layer 8 and a third tunneling oxide layer 9 are provided between the second tunneling oxide layer 4 and the first heavily doped carbon-doped layer 5 .

[0064] Specifically, the phosphorus atomic concentration of the second heavily doped carbon-doped layer 8 is selected from 1E20 to 3E20 cm -3 and / or

[0065] The thickness of the third tunnel oxide layer 9 is 1.5-2.2 nm.

[0066] In another embodiment, a solar cell is disclosed, including the tunneling passivation contact structure described in this embodiment.

[0067] In another embodiment, a method for preparing a tunnel passivation contact structure is disclosed, comprising the following steps:

[0068] S1. Providing a crystalline silicon substrate 1, wherein the crystalline silicon substrate 1 has a front side and a back side relative to each other;

[0069] S2, preparing a tunnel contact layer on the back side of the crystalline silicon substrate 1;

[0070] S3. Prepare a passivation layer on the back side of the tunnel contact layer, wherein the passivation layer includes a first lightly doped carbon-doped layer 3, a second tunnel oxide layer 4, a first heavily doped carbon-doped layer 5 and a second lightly doped carbon-doped layer 6.

[0071] Specifically, in the step S3, the phosphine flow rate of the first lightly doped carbon-doped layer 3 is 50-500 sccm; the methane flow rate is 50-500 sccm; and / or

[0072] The phosphine flow rate of the first heavily doped carbon-doped layer 5 is 700-2000 sccm; the methane flow rate is 1500-3000 sccm; and / or

[0073] The phosphine flow rate of the second lightly doped carbon-doped layer 6 is 20-400 sccm; the methane flow rate is 20-500 sccm.

[0074] Specifically, the step S2 includes:

[0075] S21, preparing a first tunnel oxide layer 2 on the back side of the crystalline silicon substrate 1;

[0076] S22, preparing an intermediate layer 7 on the back side of the first tunnel oxide layer 2;

[0077] Wherein, the intermediate layer 7 is SiOx-Ar or i-poly.

[0078] Specifically, the step S3 includes:

[0079] S31. Prepare a first lightly doped carbon-doped layer 3 / a second tunneling oxide layer 4 / a first heavily doped carbon-doped layer 5 / a second lightly doped carbon-doped layer 6 in sequence on the back side of the tunneling contact layer, or prepare a first lightly doped carbon-doped layer 3 / a second tunneling oxide layer 4 / a second heavily doped carbon-doped layer 8 / a third tunneling oxide layer 9 / a first heavily doped carbon-doped layer 5 / a second lightly doped carbon-doped layer 6 in sequence.

[0080] In another embodiment, a photovoltaic module is disclosed, including the tunneling passivation contact structure described in this embodiment or the solar cell described above or a solar cell manufactured by any of the above-described manufacturing methods.

[0081] Example 1

[0082] like Figure 1 As shown, this embodiment discloses a method for preparing a tunnel passivation contact structure based on an n-type silicon wafer. The selected n-type silicon wafer has a crystal orientation of (100), a thickness of 130 microns, and a resistivity range of 1 to 7 Ω·cm. The specific processing steps are as follows:

[0083] 1. Silicon wafer cleaning and pretreatment: First, the silicon wafer is cleaned with conventional RCA to remove organic pollutants and metal ion residues on the surface. After cleaning, the dried silicon wafer is placed in a graphite boat to prepare for the subsequent deposition process;

[0084] 2. Deposition of the First Tunneling Oxide Layer 2: The silicon wafer was heated to a substrate temperature of 400°C. Nitrous oxide (N2O) was used as the reaction gas at a flow rate of 15,000 seem and a system pressure of 1,900 mtorr. During the deposition process, a power of 10,000 W was applied, the RF on-off ratio was set to 2ms:150ms, and the deposition time was 95 seconds to form a uniform and dense first tunneling oxide layer 2 on the silicon wafer surface.

[0085] 3. Deposition of the first lightly phosphorus-doped and lightly carbon-doped amorphous silicon film: The first lightly doped layer is deposited on the formed silicon oxide layer. The reaction gases are silane (SiH4), hydrogen (H4), phosphine (PH3) and methane (CH4), with corresponding flow rates of 4500sccm, 10000sccm, 300sccm and 300sccm respectively. The deposition pressure is 3500mtorr, the power is set to 5000W, the RF on-off ratio is 3ms:45ms, and the deposition time is 200 seconds. This layer maintains a low carbon content while achieving preliminary doping, which is conducive to the subsequent construction of a carbon gradient structure;

[0086] 4. Deposition of the second tunnel oxide layer 4: Continue to deposit a second layer of tunnel oxide on the first lightly phosphorus-doped and lightly carbon-doped amorphous silicon. The process parameters are the same as the first layer. The deposition time is 20 seconds to form a double tunnel structure and enhance interface passivation.

[0087] 5. First heavily phosphorus-doped and heavily carbon-doped amorphous silicon film deposition: A heavily doped amorphous silicon layer is deposited on the surface of the second tunneling oxide layer 4, with gas flow rates of SiH4: 4500sccm, H2: 10000sccm, PH3: 1000sccm, and CH4: 3000sccm. The gas pressure is maintained at 3500mtorr, the power is 10000W, the RF on-off ratio is 3ms:45ms, and the deposition time is 400 seconds. This layer has high carbon and phosphorus doping concentrations and is a key part of achieving a "low-high-low" carbon concentration gradient structure, which helps improve charge selectivity and passivation effects.

[0088] 6. Deposition of a Second Lightly Phosphorus- and Carbon-Doped Amorphous Silicon Film: A second layer of lightly phosphorus- and carbon-doped amorphous silicon is deposited on the heavily phosphorus- and carbon-doped amorphous silicon. The gas flow rates are set to 4500 sccm of SiH4, 10000 sccm of H2, 200 sccm of PH3, and 200 sccm of CH4. The pressure is 3500 mtorr, the power is 5000 W, the RF on-off ratio is 3ms:45ms, and the deposition time is 100 seconds. This layer not only optimizes the carbon gradient structure but also effectively inhibits silver spike penetration, improving the quality of subsequent metal contacts and device stability.

[0089] 7. Mask layer deposition: A mask layer is deposited on the aforementioned thin film structure. The reactant gases are N2O and SiH4, with a flow rate ratio of 15,000 sccm:3,500 sccm. The gas pressure is 1,900 mtorr, the power is 10,000 W, the RF on-off ratio is 2 ms:200 ms, and the deposition time is 120 seconds. The mask layer is used for subsequent patterning and contact opening formation.

[0090] 8. Crystallization annealing: The sample is subjected to a thermal annealing treatment at 930°C for about 30 minutes to achieve partial crystallization of the amorphous silicon and promote hydrogen injection and passivation. The first lightly phosphorus-doped and lightly carbon-doped amorphous silicon, the first heavily phosphorus-doped and heavily carbon-doped amorphous silicon, and the second lightly phosphorus-doped and lightly carbon-doped amorphous silicon are converted into the first lightly doped carbon-doped layer 3, the first heavily doped carbon-doped layer 5, and the second lightly doped carbon-doped layer 6, respectively.

[0091] 9. RCA cleaning and aluminum oxide deposition: After annealing, the sample is cleaned again by RCA to remove excess coating and surface silicon oxide impurity layer. Then, a layer of Al2O3 film with a thickness of about 5nm is deposited on the front side to enhance interface passivation.

[0092] 10. Silicon nitride passivation layer deposition: Silicon nitride passivation layers are deposited on the front and back surfaces, with thicknesses of 70 nm on the front and 80 nm on the back, respectively, to further enhance optical gain and surface passivation performance.

[0093] 11. Sinton test analysis: The passivation effect of the sample was evaluated using the Sinton measurement system, and the apparent open circuit voltage (iVoc) was 745mV, indicating that the structure has good carrier lifetime and low interface recombination;

[0094] 12. Screen printing and sintering process: A 216-grid metal electrode pattern is formed on the back side using screen printing and sintered at 680°C to achieve good ohmic contact between the metal and the semiconductor.

[0095] 13. Cell efficiency test: The solar cell conversion efficiency of the final sample reached 25.80%, with a corresponding open circuit voltage (Voc) of 740 mV, a short circuit current (Isc) of 15.9 mA, and a fill factor (FF) of 83.8. This overall shows that the structure and process provided in this embodiment have excellent photoelectric conversion performance.

[0096] Example 2

[0097] This embodiment optimizes the metal electrode structure based on Example 1, further enhancing the fill factor and overall conversion efficiency of the device by increasing the density of the screen-printed back gate. Specifically, steps 1 to 11 are the same as those in Example 1 and will not be repeated here.

[0098] 12. Screen printing and sintering: A 306-grid metal pattern was screen-printed on the back of the sample and sintered at 680°C. Compared to the 216-grid design of Example 1, the increased number of grid lines helps reduce series resistance and improve current collection efficiency.

[0099] 13. Electrical performance test: Test results show that the solar cell efficiency of this sample reached 26.17%, with an open circuit voltage (Voc) of 742mV, a short circuit current (Isc) of 16.05mA, and a fill factor (FF) of 84. The overall performance was further improved, indicating that the optimized metal contact structure has significant benefits.

[0100] Example 3

[0101] Combine Figure 2 As shown, this embodiment introduces an argon plasma post-treatment process based on embodiment 1 to improve the interface quality between the first tunneling oxide layer 2 and the silicon wafer, and further enhance the interface passivation effect and carrier lifetime.

[0102] 1. Silicon wafer cleaning and loading: Place the cleaned n-type silicon wafer into the graphite boat for later use;

[0103] 2. Deposition of the first tunnel oxide layer 2: at 400°C, using N2O as the reaction gas (flow rate 15000 sccm, pressure 1900 mtorr), deposition power 10000 W, RF on-off ratio 2ms:150ms, and deposition time 95 seconds;

[0104] 3. Argon post-treatment process: Continue at 400°C with argon (Ar) as the reaction gas, flow rate 5000sccm, pressure 1700mtorr, power 5000W, RF on-off ratio 2ms:300ms, and treatment time 30 seconds. This treatment helps remove dangling bonds at the interface, improve hydrogen bonding capacity and interface passivation performance;

[0105] 4-11 is the same as step 3-10 of Example 1, including deposition of three carbon-doped silicon films, mask deposition, crystallization annealing, and double-sided silicon nitride passivation treatment;

[0106] 12. Sinton test: The iVoc value obtained from the sample test was 746mV, showing excellent carrier lifetime and interface passivation effect;

[0107] 13. Screen printing and sintering: The back is printed with a 216 grid pattern and the sintering temperature is 680°C;

[0108] 14. Efficiency test: The final battery conversion efficiency is 25.85%, the open circuit voltage (Voc) is 740.5mV, the short circuit current (Isc) is 15.92mA, and the fill factor (FF) is 83.8.

[0109] Example 4

[0110] This embodiment adopts a "triple tunneling + double heavily carbon-doped layer" structure, which improves structural stability and electron selectivity by introducing an additional tunneling silicon oxide layer between the two heavily carbon-doped layers, thereby further improving the overall passivation quality and device performance.

[0111] 1-4 is the same as Example 1, including silicon wafer cleaning, deposition of the first tunneling oxide layer 2, deposition of the first lightly phosphorus-doped and lightly carbon-doped amorphous silicon layer, and deposition of the second tunneling oxide layer 4;

[0112] 5. Second deposition of heavily phosphorus-doped and heavily carbon-doped amorphous silicon film: substrate temperature 400°C, SiH4:H2:PH3:CH4=4500sccm:10000sccm:1000sccm:3000sccm, gas pressure 3500mtorr, deposition power 10000W, RF on-off ratio 3ms:45ms, deposition time 100s;

[0113] 6. Deposition of the third tunnel oxide layer 9: Silicon oxide was deposited again on the deposited second heavily phosphorus-doped and heavily carbon-doped amorphous silicon. The parameters were: substrate temperature 400°C, N2O as the reaction gas, flow rate 15000 sccm, pressure 1900 mtorr, deposition power 10000 W, RF on-off ratio 2ms:50ms, and deposition time 20s.

[0114] 7. First heavily phosphorus- and carbon-doped amorphous silicon film deposition: substrate temperature 400°C, SiH4:H2:PH3:CH4 = 4500sccm:10000sccm:1000sccm:3000sccm, gas pressure 3500mtorr, deposition power 10000W, RF on / off ratio 3ms:45ms, deposition time 300s. This layer further improves overall carrier selectivity and doping depth.

[0115] 8. Deposition of a second lightly phosphorus-doped and lightly carbon-doped amorphous silicon film: substrate temperature 400°C, SiH4:H2:PH3:CH4=4500sccm:10000sccm:200sccm:200sccm, gas pressure 3500mtorr, deposition power 5000W, RF on-off ratio 3ms:45ms, deposition time 100s;

[0116] 9. Deposition mask: substrate temperature 400°C, N2O and silane as the reaction gases, N2O:SiH4=15000sccm:3500sccm, gas pressure 1900mtorr, deposition power 10000W, RF on-off ratio 2ms:200ms, deposition time 120s;

[0117] 10. Crystallization annealing: thermal annealing is performed at 930°C for about 30 minutes;

[0118] 11.RCA cleaning and aluminum oxide: remove the wrap-around plating and surface silicon oxide layer; deposit 5nmAl2O3 on the front side;

[0119] 12. Silicon nitride deposition on the front and back: 70nm on the front and 80nm on the back;

[0120] 13. Sinton test: The iVoc test value of the sample is 746mV, showing high electrical quality;

[0121] 14. Screen printing and sintering: Use a 216 grid pattern on the back and set the sintering temperature to 680°C;

[0122] 15. Efficiency Test: The final device achieved a cell conversion efficiency of 25.86%, an open-circuit voltage (Voc) of 741mV, a short-circuit current (Isc) of 15.9mA, and a fill factor (FF) of 83.9, demonstrating that the synergistic effect of the triple-tunneling structure and the dual heavily carbon-doped film layers can effectively enhance optoelectronic performance.

[0123] Example 5

[0124] Combine Figure 4 As shown, this embodiment introduces an argon plasma post-treatment process based on embodiment 1 to improve the interface quality between the first tunneling oxide layer 2 and the silicon wafer, and further enhance the interface passivation effect and carrier lifetime.

[0125] 1. Silicon wafer cleaning and loading: Place the cleaned n-type silicon wafer into the graphite boat for later use;

[0126] 2. First tunneling silicon oxide deposition: at 400°C, using N2O as the reaction gas (flow rate 15000sccm, gas pressure 1900mtorr), deposition power 10000W, RF on-off ratio 2ms:150ms, deposition time 95 seconds;

[0127] 3. Intrinsic layer preparation: An intrinsic layer was deposited on the preformed silicon oxide layer using silane (SiH4) and hydrogen (H4) at flow rates of 3500 sccm and 8000 sccm, respectively. The deposition pressure was 3500 mtorr, the power was set to 5000 W, the RF on / off ratio was 3ms:45ms, and the deposition time was 40 seconds.

[0128] 4-11 is the same as step 3-10 of Example 1, including deposition of three carbon-doped silicon films, mask deposition, crystallization annealing, and double-sided silicon nitride passivation treatment;

[0129] 12. Sinton test: The iVoc value obtained from the sample test was 746mV, showing excellent carrier lifetime and interface passivation effect;

[0130] 13. Screen printing and sintering: The back is printed with a 216 grid pattern and the sintering temperature is 680°C;

[0131] 14. Efficiency test: The final battery conversion efficiency is 25.85%, the open circuit voltage (Voc) is 740.5mV, the short circuit current (Isc) is 15.92mA, and the fill factor (FF) is 83.8.

[0132] Comparative Example 1:

[0133] 1-2 is the same as Example 1;

[0134] 3. Deposit a first lightly phosphorus-doped, non-carbon-doped amorphous silicon film on the silicon oxide layer: substrate temperature 400°C, SiH4:H2:PH3:CH4 = 4500sccm:10000sccm:300sccm:0sccm, gas pressure 3500mtorr, deposition power 5000W, RF on-off ratio 3ms:45ms, deposition time 200s;

[0135] 4-10 are the same as in Example 1;

[0136] 11. Sinton test: iVoc is 744mV;

[0137] 12. Screen printing and sintering: 216 grid on the back, sintering temperature 680℃;

[0138] 13. Efficiency test: The battery efficiency of the sample is 25.68%, the corresponding Voc is 738mV, Isc is 15.85mA, and FF is 83.9.

[0139] Comparative Example 2:

[0140] 1-4 are the same as in Example 1;

[0141] 5. Deposit a first heavily phosphorus-doped, non-carbon-doped amorphous silicon film on the silicon oxide layer: substrate temperature 400°C, SiH4:H2:PH3:CH4 = 4500 sccm:10000 sccm:1000 sccm:0 sccm, gas pressure 3500 mtorr, deposition power 10000 W, RF on-off ratio 3 ms:45 ms, deposition time 400 s;

[0142] 6-10 are the same as in Example 1;

[0143] 11. Sinton test: iVoc is 743.5mV;

[0144] 12. Screen printing and sintering: 216 grid on the back, sintering temperature 680℃;

[0145] 13. Efficiency test: The battery efficiency of the sample is 25.56%, the corresponding Voc is 738mV, Isc is 15.8mA, and FF is 83.75.

[0146] Comparative Example 3:

[0147] 1-5 are the same as in Example 1;

[0148] 6. Deposition of a second lightly phosphorus-doped, non-carbon-doped amorphous silicon film: substrate temperature 400°C, SiH4:H2:PH3:CH4 = 4500 sccm:10000 sccm:200 sccm:0 sccm, gas pressure 3500 mtorr, deposition power 5000 W, RF on / off ratio 3 ms:45 ms, deposition time 100 s;

[0149] 7-10 are the same as in Example 1;

[0150] 11. Sinton test: iVoc is 743mV;

[0151] 12. Screen printing and sintering: 216 grid on the back, sintering temperature 680℃;

[0152] 13. Efficiency test: The battery efficiency of the sample is 25.60%, the corresponding Voc is 739mV, Isc is 15.8mA, and FF is 83.8.

[0153] Blank control group:

[0154] 1-2 is the same as Example 1;

[0155] 3. Deposit a first lightly phosphorus-doped, non-carbon-doped amorphous silicon film on the silicon oxide layer: substrate temperature 400°C, SiH4:H2:PH3:CH4 = 4500sccm:10000sccm:300sccm:0sccm, gas pressure 3500mtorr, deposition power 5000W, RF on-off ratio 3ms:45ms, deposition time 200s;

[0156] 4. Deposition of the first heavily phosphorus-doped and heavily carbon-doped amorphous silicon film: substrate temperature 400°C, SiH4:H2:PH3:CH4=4500sccm:10000sccm:1000sccm:3000sccm, gas pressure 3500mtorr, deposition power 10000W, RF on-off ratio 3ms:45ms, deposition time 500s;

[0157] 5. Deposition mask: substrate temperature 400°C, N2O and silane as the reaction gas, N2O:SiH4=15000sccm:3500sccm, gas pressure 1900mtorr, deposition power 10000W, RF on-off ratio 2ms:200ms, deposition time 120s;

[0158] 6. Crystallization annealing: 930℃ annealing time is about 30 minutes;

[0159] 7.RCA cleaning and aluminum oxide: remove the wrap-around plating and surface silicon oxide layer; deposit 5nmAl2O3 on the front;

[0160] 8. Silicon nitride deposition on the front and back sides: 70nm deposition on the front side and 80nm deposition on the back side.

[0161] 9. Sinton test: iVoc is 740mV;

[0162] 10. Screen printing and sintering: 216 grid on the back, sintering temperature 680℃;

[0163] 11. Efficiency test: The battery efficiency of the sample is 25.25%, the corresponding Voc is 736mV, Isc is 15.7mA, and FF is 83.5.

[0164] The performance of the tunnel passivation contact structures of the above embodiments and comparative examples are summarized in the following table:

[0165] iVoc(mV) Voc(mV) Isc(mA) FF η(%) Example 1 745.0 740.0 15.90 83.80 25.80 Example 2 745.0 742.0 16.05 84.00 26.17 Example 3 746.0 740.5 15.92 83.80 25.85 Example 4 746.0 741.0 15.90 83.90 25.86 Comparative Example 1 735.0 738.0 15.85 83.90 25.68 Comparative Example 2 743.5 738.0 15.80 83.75 25.56 Comparative Example 3 743.0 739.0 15.80 83.80 25.60 Blank control group 740.0 736.0 15.70 83.50 25.25

[0166] In summary, by combining the analysis of Example 1 and Example 2, it can be concluded that the use of a dense grid line structure helps to significantly improve the open circuit voltage, short circuit current and fill factor of the battery, thereby optimizing the overall photoelectric performance. At the same time, the three-layer carbon-doped film used shows a "low-high-low" gradient distribution characteristic in terms of carbon element concentration. The three layers of film work together to further improve the separation and transmission efficiency of carriers while ensuring the quality of the interface. Compared with the traditional two-layer carbon-doped film structure, the three-layer structure performs better in improving the open circuit voltage and short circuit current. The combination of a double tunneling structure or a triple tunneling structure with a three-layer carbon-doped film can further enhance the passivation contact capability of the battery, effectively suppress carrier recombination, and thus improve the overall photoelectric conversion efficiency, compared to the solution of only using a single tunneling structure superimposed on three layers of carbon-doped film.

[0167] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc., indicating the orientation or position relationship, are based on the orientation or position relationship shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operate in a specific orientation, and therefore cannot be understood as limiting the present invention.

[0168] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be understood to indicate or imply relative importance or implicitly specify the number of technical features indicated. Thus, features defined as "first" or "second" may explicitly or implicitly include at least one of such features. In the description of the present invention, "plurality" means at least two, such as two, three, etc., unless otherwise specifically defined.

[0169] In the present invention, unless otherwise specified or limited, the terms "installed," "connected," "connected," "fixed," etc. should be understood in a broad sense. For example, they can refer to fixed connection, detachable connection, or integration; mechanical connection, electrical connection, or communication; direct connection or indirect connection through an intermediate medium; internal communication between two elements or interaction between two elements, unless otherwise specified. Those skilled in the art will understand the specific meanings of the above terms in the present invention based on specific circumstances.

[0170] In the present invention, unless otherwise expressly specified or limited, a first feature being "above" or "below" a second feature may mean that the first and second features are in direct contact, or that the first and second features are in indirect contact through an intermediate medium. Furthermore, a first feature being "above," "above," or "above" a second feature may mean that the first feature is directly above or diagonally above the second feature, or simply means that the first feature is at a higher level than the second feature. A first feature being "below," "below," or "below" a second feature may mean that the first feature is directly below or diagonally below the second feature, or simply means that the first feature is at a lower level than the second feature.

[0171] Although the embodiments of the present invention have been shown and described above, it will be understood that the above embodiments are illustrative and are not to be construed as limitations on the present invention. A person skilled in the art may change, modify, replace and modify the above embodiments within the scope of the present invention.

Claims

1. A tunneling passivation contact structure, characterized in that: It includes a crystalline silicon substrate, a tunneling contact layer and a passivation layer. The passivation layer is located on the back of the tunneling contact layer and sequentially includes a first lightly doped carbon-doped layer, a second tunneling oxide layer, a first heavily doped carbon-doped layer and a second lightly doped carbon-doped layer.

2. The tunneling passivation contact structure according to claim 1, characterized in that: The activated phosphorus atom concentration of the first lightly doped carbon layer is selected from 2E20 to 5E20 cm -3 The carbon atom concentration of the first lightly doped carbon layer is selected from 9E20 to 2E21 cm -3 and / or The activated phosphorus atom concentration of the first heavily doped carbon layer is selected from 1E20 to 3E20 cm -3 The carbon atom concentration of the first heavily doped carbon layer is selected from 1E21 to 4E21 cm -3 and / or The activated phosphorus atom concentration of the second lightly doped carbon layer is selected from 2E20 to 4E20 cm -3 The carbon atom concentration of the second lightly doped carbon layer is selected from 9E20 to 2E21 cm -3 .

3. The tunneling passivation contact structure according to claim 1, wherein: The tunneling contact layer is a first tunneling oxide layer or a first tunneling oxide layer / intermediate layer, and the intermediate layer is SiOx-Ar or i-poly; and / or The thickness of the first tunnel oxide layer is 1.4-2.2 nm; and / or The thickness of the second tunnel oxide layer is 0.5-1.5 nm.

4. The tunneling passivation contact structure according to claim 1, wherein: The thickness of the first lightly doped carbon-doped layer is 5-30 nm, preferably 15-20 nm; and / or The thickness of the first heavily doped carbon-doped layer is 50-80 nm, preferably 60-70 nm; and / or The thickness of the second lightly doped carbon-doped layer is 5-20 nm, preferably 10-15 nm.

5. The tunneling passivation contact structure according to claim 1, wherein: A second heavily doped carbon-doped layer and a third tunneling oxide layer are provided between the second tunneling oxide layer and the first heavily doped carbon-doped layer.

6. The tunneling passivation contact structure according to claim 5, characterized in that: The phosphorus atomic concentration of the second heavily doped carbon layer is selected from 1E20 to 3E20 cm -3 and / or The thickness of the third tunnel oxide layer is 1.5-2.2 nm.

7. A solar cell, characterized in that: The invention comprises the tunneling passivation contact structure according to any one of claims 1 to 6.

8. A method for preparing a tunnel passivation contact structure, characterized in that: The following steps are involved: S1. Providing a crystalline silicon substrate, wherein the crystalline silicon substrate has a front side and a back side relative to each other; S2, preparing a tunnel contact layer on the back side of the crystalline silicon substrate; S3. Prepare a passivation layer on the back side of the tunnel contact layer, wherein the passivation layer includes a first lightly doped carbon-doped layer, a second tunnel oxide layer, a first heavily doped carbon-doped layer and a second lightly doped carbon-doped layer.

9. The preparation method according to claim 8, characterized in that The step S2 specifically includes: S21, preparing a first tunnel oxide layer on the back side of the crystalline silicon substrate; S22. Prepare an intermediate layer on the back side of the first tunnel oxide layer, wherein the intermediate layer is SiOx-Ar or i-poly.

10. A photovoltaic module, characterized in that: The invention comprises a tunneling passivation contact structure according to any one of claims 1 to 6, or a solar cell according to claim 7, or a solar cell manufactured by the manufacturing method according to any one of claims 8 to 9.

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