MEMS infrared light source with 3D structure and preparation method thereof

Abstract

The invention discloses an MEMS infrared light source with a 3D structure and a preparation method thereof, and the preparation method comprises the steps: cleaning a silicon substrate, depositing supporting layers on the upper surface and the lower surface of the silicon substrate respectively, processing a heating electrode on the supporting layer on the upper surface, and processing to obtain an isolation layer covering the heating electrode and the supporting layer; an infrared radiation material layer is processed in the middle area of the isolation layer, and planar electrodes communicated with the heating electrode are processed on the two sides of the infrared radiation material layer; etching and windowing are carried out on the middle area of the supporting layer on the lower surface of the silicon substrate to form a substrate cavity, etching and windowing are carried out on the supporting layer on the peripheral area of the substrate cavity to form an etching window, substrate body silicon secondary etching is carried out on the lower surface of the silicon substrate to form a communicating cavity, and therefore the MEMS infrared light source with the 3D structure is obtained. According to the preparation method, the communication cavity beneficial to ventilation is formed by etching below the infrared light source through secondary etching, so that the reliability and the stability of high-temperature radiation of the infrared light source are improved.

Description

Technical Field

[0001] The present invention relates to the field of sensor technology, and in particular to a MEMS infrared light source with a 3D structure and a preparation method thereof. Background Art

[0002] In the field of NDIR (non-dispersive infrared) gas detection technology, infrared light sources are required. As core components of detection, their reliability and stability are crucial. The higher the reliability of the infrared light source, the longer the service life of the gas detection sensor it comprises. Traditional tungsten lamps, SiC ceramic rods, and metal foil (filament) infrared light sources have been gradually replaced by MEMS (micro-electro-mechanical system) devices due to drawbacks such as low thermal efficiency, large size, and low modulation speed.

[0003] Generally, a MEMS infrared light source consists of a semiconductor film support layer and a metal film heating layer. When electricity is applied, Joule heat is generated, which in turn stimulates infrared radiation energy. Since the maximum temperature of the membrane surface during operation is usually between 350 and 650°C, it will generate extremely high thermal stress. At the same time, when the light source is in a modulated working state, the gas under the film expands and contracts due to heat and cold, causing the film to be in a constant vibrating state of wrinkling, shrinking, stretching and spreading. This will cause the MEMS infrared light source to be extremely prone to film breakage and failure, greatly reducing the reliability and stability of the MEMS infrared light source; in addition, it will also seriously affect the actual service life of the gas detection sensor. Finally, MEMS infrared light source devices all work based on the principle of electrothermal heating, and generally suffer from large heat conduction energy loss and low thermal efficiency, which further limits their practical application in low-power scenarios. Therefore, the MEMS infrared light source in the existing technical methods has the problem of poor high-temperature radiation stability. Summary of the Invention

[0004] The embodiments of the present invention provide a MEMS infrared light source with a 3D structure and a method for manufacturing the same, aiming to solve the problem of poor high-temperature radiation stability of the MEMS infrared light source in the prior art.

[0005] In a first aspect, an embodiment of the present application provides a method for preparing a MEMS infrared light source, wherein the method is used to prepare a MEMS infrared light source having a 3D structure, and the method comprises: The silicon substrate is cleaned using a cleaning solution, and semiconductor thin films are deposited on the upper surface and the lower surface of the silicon substrate to obtain a support layer; A heating electrode is obtained by processing the support layer on the upper surface of the silicon substrate using a metal magnetron sputtering and lift-off process; A plasma enhanced chemical vapor deposition process is used to process the heater electrode on the upper surface of the silicon substrate to obtain an isolation layer covering the heater electrode and the support layer; Processing the isolation layer to obtain an infrared radiation material layer covering the middle area of ​​the isolation layer; Etching holes and performing film coating on the isolation layer to obtain planar electrodes connected to the heating electrodes below, wherein the planar electrodes are located on both sides of the infrared radiation material layer; Etching a window in a middle area of ​​the support layer on the lower surface of the silicon substrate and performing a primary etching of the substrate silicon to form a substrate cavity below the silicon substrate; Etching a support layer on the lower surface of the silicon substrate in a peripheral area of ​​the substrate cavity to form an etching window, so that the silicon substrate around the substrate cavity is exposed; The lower surface of the silicon substrate is subjected to secondary etching of the substrate body silicon to further etch the substrate cavity and the etching window of the silicon substrate and form a connecting cavity, thereby obtaining a MEMS infrared light source with a 3D structure.

[0006] In a second aspect, an embodiment of the present application further provides a MEMS infrared light source having a 3D structure, wherein the MEMS infrared light source is manufactured by the method for preparing a MEMS infrared light source as described in the first aspect above, wherein the MEMS infrared light source includes a silicon substrate, a support layer, a heating electrode, an isolation layer, a planar electrode, and an infrared radiation material layer; The support layer is laid flat on the upper surface of the silicon substrate, the heating electrode is provided on the support layer, the isolation layer covers the heating electrode and the support layer, the planar electrode penetrates the isolation layer and is connected to the heating electrode; the infrared radiation material layer is provided in the middle area of ​​the surface layer of the isolation layer, and the planar electrodes are provided on both sides of the infrared radiation material layer; The bottom of the silicon substrate is hollowed out to form a connecting cavity, the cross-section of the connecting cavity is a "cross" shape, and the connecting cavity extends toward the side of the silicon substrate and passes through the side wall of the silicon substrate; the top corner of the silicon substrate extends downward and the lower surface of the top corner is covered with the support layer.

[0007] An embodiment of the present invention provides a MEMS infrared light source with a 3D structure and a preparation method thereof. The preparation method includes cleaning a silicon substrate and depositing support layers on its upper and lower surfaces respectively, processing a heating electrode on the support layer on the upper surface and obtaining an isolation layer covering the heating electrode and the support layer; processing an infrared radiation material layer in the middle area of ​​the isolation layer and processing planar electrodes connected to the heating electrode on both sides of the infrared radiation material layer; etching a window in the middle area of ​​the support layer on the lower surface of the silicon substrate to form a substrate cavity and etching a window in the support layer in the peripheral area of ​​the substrate cavity to form an etching window; performing a secondary etching of the substrate body silicon on the lower surface of the silicon substrate to form a connecting cavity, thereby obtaining a MEMS infrared light source with a 3D structure. The above preparation method etches a connecting cavity that is conducive to ventilation under the infrared light source through secondary etching, thereby improving the reliability and stability of the high-temperature radiation of the infrared light source. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0009] Figure 1 A flowchart of a method for preparing a MEMS infrared light source provided by an embodiment of the present invention; Figure 2 A schematic diagram of the processing process of a method for preparing a MEMS infrared light source provided by an embodiment of the present invention; Figure 3 The overall structure diagram of the MEMS infrared light source with a 3D structure provided by an embodiment of the present invention; Figure 4 A cross-sectional structural diagram of a MEMS infrared light source with a 3D structure provided by an embodiment of the present invention; Reference numerals: 1, silicon substrate; 101, substrate cavity; 102, ventilation cavity; 2, support layer; 201, SiO2 film layer; 202, SiN x Membrane layer; 203, etching window; 3, heating electrode; 4, isolation layer; 5, planar electrode; 6, infrared radiation material layer. DETAILED DESCRIPTION

[0010] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of them. All other embodiments obtained by ordinary technicians in this field based on the embodiments of the present invention without making any creative efforts shall fall within the scope of protection of the present invention.

[0011] It will be understood that when used in this specification and the appended claims, the terms “comprises” and “comprising” indicate the presence of described features, integers, steps, operations, elements and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or groups thereof.

[0012] It should also be understood that the terminology used in this specification is for the purpose of describing specific embodiments only and is not intended to limit the present invention. As used in this specification and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms unless the context clearly indicates otherwise. It should further be understood that the term "and / or" as used in this specification and the appended claims refers to any and all possible combinations of one or more of the associated listed items, including and including these combinations.

[0013] The specific embodiment of the present application discloses a method for preparing a MEMS infrared light source, wherein the method is used to prepare a MEMS infrared light source with a 3D structure; Figure 1 As shown in the figure, an embodiment of the present application provides a method for preparing a MEMS infrared light source, which includes steps S1 to S8.

[0014] S1. Cleaning the silicon substrate with a cleaning solution, and depositing semiconductor thin films on the upper and lower surfaces of the silicon substrate to obtain a supporting layer.

[0015] Before coating a silicon substrate, it can be cleaned with a cleaning solution. The cleaning solution can be an ammonia / hydrogen peroxide mixture, a hydrochloric acid / hydrogen peroxide mixture, an acetone solution, or deionized water. After cleaning the silicon substrate, semiconductor thin films can be deposited on the upper and lower surfaces of the silicon substrate to form support layers.

[0016] Specifically, the support layer is a single layer of SiO2 film, a single layer of Si3N4 film or a single layer of SiN x The supporting layer can also be set as SiO2 film layer, Si3N4 film layer and SiN x The composite film layer is formed by combining at least two film layers in the film layer. The silicon substrate is a single crystal silicon substrate or a SOI (Silicon-On-Insulator) silicon wafer substrate. Specifically, the SiO2 film layer has the characteristics of tensile stress and low thermal conductivity, and the Si3N4 film layer and SiN x The film layers all have the characteristics of compressive stress and low thermal expansion coefficient.

[0017] In a more specific embodiment, the support layer is composed of SiO2 film layer 201 and SiN xThe film layer 202 is composed of two composite film layers. A specific embodiment of the present invention uses SiO2 film layer 201 and SiN x The film layers 202 are combined to form two composite film layers, which have the characteristics of stress adaptation, high thermal stability and low heat loss. The overall thickness of the two composite film layers is 1.1-3.6 μm.

[0018] Further, such as Figure 2 As shown in Figure (a), a semiconductor thin film is deposited on the upper and lower surfaces of the silicon substrate to obtain a support layer, including: using a thermal oxygen coating process to process the upper and lower surfaces of the silicon substrate to obtain a SiO2 film layer with a thickness of 600-2000nm; in the thermal oxygen coating process, the oxygen flow rate is 3-5L / min and the reaction temperature is 1020-1150℃; the preferred reaction temperature is 1070-1120℃, and the optimal reaction temperature is 1100℃. Using a low pressure chemical vapor deposition coating process (LPVCD, Low Pressure Chemical Vapor Deposition) to process the outer layer of the SiO2 film to obtain a SiN film with a thickness of 500-1600nm x The volume flow ratio of SiH2Cl2 and NH3 in the reaction gas of the low pressure chemical vapor deposition coating process is 1:3-1:4, the reaction temperature is 750-830 ° C, the chamber pressure is 300mTorr, SiN x The film formation rate is 3-6nm / min. That is, the reaction gas used in the low-pressure chemical vapor deposition coating process is composed of SiH2Cl2 and NH3, with a volume flow ratio of SiH2Cl2 to NH3 of 1:3-1:4. The reaction temperature is preferably 780-815°C, with the optimal reaction temperature being 800°C.

[0019] S2. A heating electrode is obtained by processing the support layer on the upper surface of the silicon substrate using a metal magnetron sputtering and lift-off process.

[0020] In a more specific embodiment, the heating electrode is one or more metal composite film layers selected from Pt, Au, W, Al, TiN, nickel-chromium alloy, and MoSi2, or the heating electrode is a polysilicon thin film.

[0021] In a specific embodiment of the present invention, the heating electrode is set as a Pt film. The Pt film can be prepared by processing the heating electrode on the support layer on the upper surface of the silicon substrate using metal magnetron sputtering and lift-off technology. The specific steps of preparing the Pt film include: cleaning the silicon substrate with the support layer and spraying a viscosity enhancer on the surface of the cleaned support layer to increase the adhesion to the photoresist; spin coating a negative photoresist with a thickness of 1-3μm on the surface of the support layer sprayed with the viscosity enhancer, and then performing pre-baking, exposure, development and post-baking processes; sputtering a layer of photoresist on the support layer after the photolithography process. A Ti, Cr or Ni metal film with a thickness of 10-50 nm is prepared; a Pt film with a thickness of 200-500 nm is obtained by sputtering the upper layer of the metal film; the power of the metal magnetron sputtering is 100-200 W, the chamber pressure is 2.6-3.5 mTorr, the Ar gas flow rate is 50-100 sccm, and the Pt film formation rate is 5-10 nm / min; acetone solution and alcohol are used for stripping and degumming and ultrasonic cleaning, and after cleaning, a rapid annealing heat treatment is performed at 400-600°C for 2-10 minutes.

[0022] First, a tackifier, such as hexamethyldisilazane (HDMS), is sprayed onto the support layer on the upper surface of the silicon substrate. This enhances the adhesion between the photoresist and the support layer (which is also a semiconductor film). A 1-3μm thick negative photoresist is then spin-coated onto the surface of the support layer, followed by photolithography. The Pt film is then fabricated. A 10-50nm thick Ti, Cr, or Ni metal film is sputtered onto the photolithographically treated support layer to enhance the bonding between the heater electrode and the support layer. The resulting 200-500nm Pt film can then be processed using metal magnetron sputtering, differing only in the sputtering metal source. The metal magnetron sputtering process parameters include a power of 100-200W, a chamber pressure of 2.6-3.5mTorr, an Ar gas flow rate of 50-100sccm, and a Pt film deposition rate of 5-10nm / min. In a preferred embodiment, the chamber pressure is 2.8-3.15Torr, with an optimal chamber pressure of 3.0Torr. The resulting metal and Pt films are then combined to form a heating electrode.

[0023] Acetone solution and alcohol can be used for stripping and degumming and ultrasonic cleaning. In order to improve the stability of the heating electrode under working conditions, the heating electrode can be annealed after cleaning. The specific annealing temperature is 400-600℃ and the annealing time is controlled at 2-10min. The specific processing process is as follows: Figure 2 As shown in Figure (b).

[0024] S3. A plasma enhanced chemical vapor deposition process is used to process the heating electrode on the upper surface of the silicon substrate to obtain an isolation layer covering the heating electrode and the support layer.

[0025] An isolation layer is provided on the heating electrode and the support layer around the heating electrode, wherein the isolation layer is a single layer of SiO2 film, a single layer of Si3N4 film or a single layer of SiN x film layer, or a SiO2 film layer, a Si3N4 film layer and a SiN x A composite film layer formed by combining at least two film layers in the film layer. In the specific embodiment of the present application, a plasma enhanced chemical vapor deposition process (PECVD, Plasma Enhanced Chemical Vapor Deposition) is used to form a SiO2 film layer with a thickness of 400-800nm ​​as an isolation layer. The reaction gases in the plasma enhanced chemical vapor deposition process include SiH4 and N2 mixed gas and N2O. The volume proportion of SiH4 in the SiH4 and N2 mixed gas is 5%, the flow rate of the SiH4 and N2 mixed gas is 100-200sccm, the flow rate of the N2O gas is 600-800sccm, the chamber pressure is 800-900mTorr, the reaction temperature is 250-350℃, the radio frequency (RF) power is 15-25W, and the deposition rate of the SiO2 film layer is 50-70nm / min. The specific processing process is as follows Figure 2 As shown in Figure (c).

[0026] S4. Processing the isolation layer to obtain an infrared radiation material layer covering the middle area of ​​the isolation layer.

[0027] The middle area of ​​the isolation layer is further processed to obtain an infrared radiation material layer, such as Figure 3 As shown, in a specific embodiment of the present application, a rectangular infrared radiation material layer is formed in the central region of the isolation layer. Specifically, the infrared radiation material layer is one of a nano-platinum black layer, a nano-black silicon layer, a carbon nanotube layer, a graphene layer, an amorphous carbon film doped with metal elements, an Au / Al2O3 / Au supersurface material layer, or a ZnNiP chemical plating layer.

[0028] In a specific embodiment of the present application, a plasma etching method is used to prepare a nano-black silicon layer as an infrared radiation material layer. The specific preparation process is as follows: first, a low-pressure chemical vapor deposition coating process is used to deposit a Poly-Si film layer. The chamber temperature is 510~710°C, SiH4 gas with a flow rate of 25~75sccm is introduced into the chamber, the chamber pressure is 150~450mTorr, and the film formation rate is 7~20nm / min. In the specific implementation process, the deposition reaction time of the Poly-Si film layer can be set to 60min. After the reaction is completed, a Poly-Si film layer with a thickness of 420~1200nm can be formed by coating. Further, a photoresist is used as a mask and plasma is used for etching; Cl2 and HBr are used as etching gases in the etching process. Specifically, 60~100ccm of Cl2 and 20~60ccm of HBr gas are introduced into the chamber, and the reaction time is controlled to be 180~240s. Then, use the photoresist as a mask to process the nano-black silicon. Specifically, Cl2 and SF6 can be used as etching gases. A small amount of SF6 gas is conducive to the formation of nano-black silicon micro-nanostructures. 150~210ccm of Cl2 and 20~60ccm of SF6 gas are introduced into the cavity, and the reaction time is controlled at 60~120s. Finally, the acetone degumming and ultrasonic cleaning processes are performed to finally obtain the nano-black silicon layer as the infrared radiation material layer. The specific processing process is as follows: Figure 2 As shown in Figure (d).

[0029] S5. Etching holes and performing coating processing on the isolation layer to obtain a planar electrode connected to the heating electrode below, wherein the planar electrode is located on both sides of the infrared radiation material layer.

[0030] Further, a hole is etched on the isolation layer, and a film is plated at the hole position to obtain a planar electrode. The planar electrode obtained by the process is located above the heating electrode. The planar electrode penetrates the isolation layer and is connected to the heating electrode below. Figure 3 As shown, planar electrodes can be arranged on both sides of the infrared radiation material layer. More specifically, the planar electrodes are Pt, Au or Al metal film layers.

[0031] The holes can be etched using plasma dry etching or wet etching using a mixed solution of HF and H2O2. Metal magnetron sputtering and lift-off processes are further employed to produce planar electrodes composed of Pt metal, Au metal, or Al metal. The present invention employs a plasma dry etching process to etch holes in the isolation layer, using a 1-5 μm photoresist as a dry etching mask. The etching gas has CF4 and CHF3 flow rates of 10-20 sccm and 30-40 sccm, respectively, an Ar flow rate of 200-300 sccm, a chamber pressure of 200-300 mTorr, and a radio frequency (RF) power of 400-500 W. The isolation layer (SiO2 film) etch rate is 400-800 nm / min. The intermediate product is then subjected to re-coating, photolithography, and development processes, and then a 400-800nm ​​thick Pt metal film is processed using a metal magnetron coating process to obtain a Pt metal film layer as the corresponding planar electrode. In order to increase the bonding force between the planar electrode and the underlying heating electrode, an ultra-thin 10-50nm thick Ti film, Cr film, or Ni film layer can be added between the planar electrode and the heating electrode as an intermediate film layer. The specific processing process is as follows: Figure 2 As shown in Figure (e).

[0032] S6. Etching a window in the middle area of ​​the support layer on the lower surface of the silicon substrate and performing a primary etching of the substrate silicon to form a substrate cavity under the silicon substrate.

[0033] The lower surface of the silicon substrate is also deposited to obtain a support layer. A window can be etched in the middle area of ​​the support layer on the lower surface, and the formed window is used to etch the substrate silicon once, thereby forming a substrate cavity. A 5-10 μm thick photoresist is used as a mask on the support layer on the lower surface of the silicon substrate, and a window is etched using a plasma etching process. Then, the central area of ​​the silicon substrate is etched using a DRIE (Deep Reactive Ion Etching) process. Specifically, first, the SiN x The film layer is also etched by plasma dry etching. The flow rates of SF6 and CHF3 in the etching gas are 20~40sccm and 5~10sccm respectively, the flow rate of He gas is 50~200sccm, the chamber pressure is 300~500mTorr, the RF power is 300~500W, and the SiN xThe etching rate of the film layer is 100~200nm / min. Furthermore, the etching process for the SiO2 film layer in the support layer is consistent with the etching process of the above-mentioned isolation layer, and the etching time is different, which is determined according to the actual situation. Then the DRIE etching process is used to perform a single etching of the substrate body silicon on the silicon substrate. The reaction chamber pressure is 50~100mTorr, the flow rates of C4F8 and SF6 in the reaction gas are set to 150~250sccm, the Src RF power is 1600~2500W, the Bias RF power is 15~50W, and the etching rate of the central area of ​​the substrate is 0.5~1.5μm / min. The thickness of the entire silicon substrate is usually 300~500μm. The etching depth during the single etching of the substrate body silicon is controlled at 20~30μm. The specific processing process is as follows Figure 2 As shown in Figure (f).

[0034] S7. Etching a support layer on the lower surface of the silicon substrate in a peripheral area of ​​the substrate cavity to open a window, so as to expose the silicon substrate around the substrate cavity to form an etching window.

[0035] Furthermore, the support layer on the lower surface of the substrate located in the peripheral area of ​​the substrate cavity is etched to open a window, exposing the area where the ventilation cavity 102 is to be etched, that is, forming an etching window 203 corresponding to the ventilation cavity 102. First, a 5-10 μm thick photoresist is used as a mask on the back of the silicon substrate, and etching is performed using a plasma etching process. x The plasma dry etching is also used for the SiO2 film layer. The etching conditions are the same as the above steps and will not be repeated here. The specific processing process is as follows: Figure 2 As shown in Figure (g).

[0036] S8. Performing secondary etching of the substrate body silicon on the lower surface of the silicon substrate to further etch the substrate cavity and etching window of the silicon substrate and form a connecting cavity, thereby obtaining a MEMS infrared light source with a 3D structure.

[0037] The lower surface of the silicon substrate is further etched for the bulk silicon secondary, also using the DRIE etching process, with an etching rate of 0.5~1.5μm / min. Since the substrate cavity and the etching window are not protected by the support layer hard mask, the two areas can be etched for bulk silicon at the same time until the bulk silicon in the central area of ​​the support film on the upper surface of the silicon substrate (the area corresponding to the infrared radiation material layer 6) is completely etched. The opening formed by etching the side wall of the silicon substrate is connected to the substrate cavity 101 and forms a connecting cavity with a "cross" structure; the opening formed by etching at the side wall of the silicon substrate is also the ventilation cavity 102, and the ventilation cavity 102 is connected to the substrate cavity 101; the specific processing process is as follows Figure 2As shown in Figure (h). At this time, the thickness of the bulk silicon above the ventilation cavity is 20~30μm, and a MEMS infrared light source with a 3D structure is obtained. The overall structure of the MEMS infrared light source is as follows Figure 3 As shown, its cross-sectional structure is as follows Figure 4 shown.

[0038] The embodiment of the present invention further provides a MEMS infrared light source with a 3D structure, wherein the MEMS infrared light source is manufactured by the method for manufacturing the MEMS infrared light source as described in the above embodiment. Figure 3 and Figure 4 As shown, the MEMS infrared light source includes a silicon substrate 1, a support layer 2, a heating electrode 3, an isolation layer 4, a planar electrode 5 and an infrared radiation material layer 6; the support layer 2 is laid flat on the upper surface of the silicon substrate 1, the heating electrode 3 is provided on the support layer 2, the isolation layer 4 covers the heating electrode 3 and the support layer 2, the planar electrode 5 passes through the isolation layer 4 and is connected to the heating electrode 3; the infrared radiation material layer 6 is arranged in the middle area of ​​the surface layer of the isolation layer 4, and the planar electrode 5 is arranged on both sides of the infrared radiation material layer 6; the bottom of the silicon substrate 1 is hollowed out to form a connecting cavity, the cross-section of the connecting cavity is a "cross", and the connecting cavity extends to the side of the silicon substrate 1 and passes through the side wall of the silicon substrate 1; the top corner of the silicon substrate 1 extends downward and the lower surface of the top corner is covered with the support layer 2. The opening formed through the side wall of the silicon substrate 1 is the ventilation cavity 102. The thickness of the bulk silicon above the ventilation cavity 102 is 20~30μm. The central area of ​​the connected cavity is the substrate cavity 101. The bulk silicon above the substrate cavity 101 is completely etched, and the support layer 2 on the upper surface forms a suspended membrane structure.

[0039] While the present embodiment employs a four-walled, "cross"-shaped connecting cavity, other embodiments may employ single-walled or multi-walled connecting cavity structures, such as a three-walled, "T"-shaped connecting cavity or a double-walled, "L"-shaped connecting cavity. The width, height, and specific shape of the connecting cavity can be designed and processed according to actual needs.

[0040] In a specific embodiment of the present application, a substrate cavity 101 is provided at the bottom of a silicon substrate 1 and the substrate cavity 101 is connected to the surrounding outer walls to form a connected cavity, thereby obtaining a 3D structure MEMS infrared light source device; the MEMS infrared light source device reduces the amplitude of film wrinkles and vibrations caused by thermal expansion and contraction of the gas in the cavity during modulation operation of the light source, greatly increases reliability and stability, and extends the working life; at the same time, it reduces the heat conduction path and reduces the working power consumption.

[0041] The present invention adopts a MEMS closed membrane structure, and the appearance of the chip and the size ratio of the suspended membrane can be designed and processed according to actual needs, and are not specifically limited in the present invention. Generally speaking, the larger the area of ​​the suspended membrane (the multilayer membrane structure corresponding to the infrared radiation material layer 6 suspended above the communicating cavity), the smaller the heat capacity, the lower the power consumption of the device, the shorter the response time, and the greater the modulation frequency and depth. However, it brings certain challenges during manufacturing and processing, and also affects the stability and reliability of the light source device. Generally speaking, the chip as a whole can be set to a rectangle of 1.5×1.5mm~3.6×3.6mm, and the heating film (the multilayer membrane structure corresponding to the infrared radiation material layer 6) can be set to a rectangle of 0.7×0.7~2.1×2.1mm.

[0042] The above-mentioned MEMS infrared light source with a 3D structure is prepared by the preparation method in the present application, and its beneficial effects include: a connecting cavity structure formed by connecting the substrate cavity 101 and the ventilation cavity 102 is set on the lower surface of the silicon substrate 1, which greatly improves the reliability and stability of the infrared light source; the connecting cavity structure is set on the lower surface of the silicon substrate 1, which reduces the amplitude of film wrinkles and vibrations during modulation operation of the light source and extends the service life; the connecting cavity structure is set on the lower surface of the silicon substrate 1, which reduces the energy heat conduction path and heat capacity, improves the heat conversion efficiency and response rate, and reduces power consumption.

[0043] An embodiment of the present invention provides a MEMS infrared light source with a 3D structure and a preparation method thereof. The preparation method includes cleaning a silicon substrate and depositing support layers on its upper and lower surfaces respectively, processing a heating electrode on the support layer on the upper surface and obtaining an isolation layer covering the heating electrode and the support layer; processing an infrared radiation material layer in the middle area of ​​the isolation layer and processing planar electrodes connected to the heating electrode on both sides of the infrared radiation material layer; etching a window in the middle area of ​​the support layer on the lower surface of the silicon substrate to form a substrate cavity and etching a window in the support layer in the peripheral area of ​​the substrate cavity to form an etching window; performing a secondary etching of the substrate body silicon on the lower surface of the silicon substrate to form a connecting cavity, thereby obtaining a MEMS infrared light source with a 3D structure. The above preparation method etches a connecting cavity that is conducive to ventilation under the infrared light source through secondary etching, thereby improving the reliability and stability of the high-temperature radiation of the infrared light source.

[0044] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in the present invention, and such modifications or substitutions are intended to be within the scope of protection of the present invention. Therefore, the scope of protection of the present invention shall be subject to the scope of protection of the claims.

Claims

1. A method for preparing a MEMS infrared light source with a 3D structure, characterized in that: The preparation method is used to prepare a MEMS infrared light source with a 3D structure, and the preparation method comprises: The silicon substrate is cleaned using a cleaning solution, and semiconductor thin films are deposited on the upper surface and the lower surface of the silicon substrate to obtain a support layer; A heating electrode is obtained by processing the support layer on the upper surface of the silicon substrate using a metal magnetron sputtering and lift-off process; A plasma enhanced chemical vapor deposition process is used to process the heater electrode on the upper surface of the silicon substrate to obtain an isolation layer covering the heater electrode and the support layer; Processing the isolation layer to obtain an infrared radiation material layer covering the middle area of ​​the isolation layer; Etching holes and performing film coating on the isolation layer to obtain planar electrodes connected to the heating electrodes below, wherein the planar electrodes are located on both sides of the infrared radiation material layer; Etching a window in a middle area of ​​the support layer on the lower surface of the silicon substrate and performing a primary etching of the substrate silicon to form a substrate cavity below the silicon substrate; Etching a support layer on the lower surface of the silicon substrate in a peripheral area of ​​the substrate cavity to form an etching window, so that the silicon substrate around the substrate cavity is exposed; The lower surface of the silicon substrate is subjected to secondary etching of the substrate body silicon to further etch the substrate cavity and the etching window of the silicon substrate and form a connecting cavity, thereby obtaining a MEMS infrared light source with a 3D structure.

2. The method for preparing a MEMS infrared light source with a 3D structure according to claim 1, characterized in that: The supporting layer is a single layer SiO2 film, a single layer Si3N4 film or a single layer SiN x film layer, or a SiO2 film layer, a Si3N4 film layer and a SiN x A composite membrane layer is formed by combining at least two membrane layers.

3. The method for preparing a MEMS infrared light source with a 3D structure according to claim 2, wherein: The support layer is composed of SiO2 film and SiN x The membrane layer is composed of two composite membrane layers; Depositing semiconductor films on the upper surface and the lower surface of the silicon substrate to obtain a support layer, comprising: A SiO2 film layer with a thickness of 600-2000 nm is formed on the upper and lower surfaces of the silicon substrate using a thermal oxygen coating process; the oxygen flow rate in the thermal oxygen coating process is 3-5 L / min and the reaction temperature is 1020-1150° C.; The outer layer of the SiO2 film layer is processed by low pressure chemical vapor deposition coating process to obtain SiN with a thickness of 500-1600nm. x The volume flow ratio of SiH2Cl2 and NH3 in the reaction gas of the low pressure chemical vapor deposition coating process is 1:3-1:4, the reaction temperature is 750-830 ° C, the chamber pressure is 300mTorr, SiN x The film formation rate is 3~6nm / min.

4. The method for preparing a MEMS infrared light source with a 3D structure according to claim 1, wherein: The heating electrode is one or more metal composite film layers selected from Pt, Au, W, Al, TiN, nickel-chromium alloy, and MoSi2, or the heating electrode is a polycrystalline silicon film.

5. The method for preparing a MEMS infrared light source with a 3D structure according to claim 4, characterized in that: The heating electrode is a Pt thin film; the heating electrode is obtained by processing the support layer on the upper surface of the silicon substrate using a metal magnetron sputtering and lift-off process, including: Cleaning the silicon substrate with the support layer and spraying an adhesion promoter on the surface of the cleaned support layer to increase the adhesion to the photoresist; Spin-coat a negative photoresist with a thickness of 1-3 μm on the surface of the support layer sprayed with the adhesion promoter, and then perform pre-baking, exposure, development and post-baking processes; sputtering a Ti, Cr or Ni metal film with a thickness of 10-50 nm on the support layer after the photolithography process; A Pt film with a thickness of 200-500 nm is obtained by sputtering on the upper layer of the metal film; the power of the metal magnetron sputtering is 100-200 W, the chamber pressure is 2.6-3.5 mTorr, the Ar gas flow rate is 50-100 sccm, and the Pt film formation rate is 5-10 nm / min; Acetone solution and alcohol are used for stripping and degumming and ultrasonic cleaning, and after cleaning, a rapid annealing heat treatment at 400-600°C is performed for 2-10 minutes.

6. The method for preparing a MEMS infrared light source with a 3D structure according to any one of claims 1 to 5, characterized in that: The infrared radiation material layer is one of a nano-platinum black layer, a nano-black silicon layer, a carbon nanotube layer, a graphene layer, an amorphous carbon film doped with metal elements, or an Au / Al2O3 / Au super surface material layer, or a ZnNiP chemical plating layer.

7. The method for preparing a MEMS infrared light source with a 3D structure according to claim 6, characterized in that: The isolation layer is a single layer of SiO2 film, a single layer of Si3N4 film or a single layer of SiN x film layer, or a SiO2 film layer, a Si3N4 film layer and a SiN x A composite membrane layer is formed by combining at least two membrane layers.

8. The method for preparing a MEMS infrared light source with a 3D structure according to claim 6, wherein: The planar electrode is a Pt, Au or Al metal film layer.

9. The method for preparing a MEMS infrared light source with a 3D structure according to claim 6, wherein: The silicon substrate is a single crystal silicon substrate or an SOI silicon wafer substrate.

10. A MEMS infrared light source with a 3D structure, wherein the MEMS infrared light source is manufactured by the method for preparing a MEMS infrared light source according to any one of claims 1 to 9, wherein: The MEMS infrared light source includes a silicon substrate, a support layer, a heating electrode, an isolation layer, a planar electrode and an infrared radiation material layer; The support layer is laid flat on the upper surface of the silicon substrate, the heating electrode is provided on the support layer, the isolation layer covers the heating electrode and the support layer, the planar electrode penetrates the isolation layer and is connected to the heating electrode; the infrared radiation material layer is provided in the middle area of ​​the surface layer of the isolation layer, and the planar electrodes are provided on both sides of the infrared radiation material layer; The bottom of the silicon substrate is hollowed out to form a connecting cavity, the cross-section of the connecting cavity is a "cross" shape, and the connecting cavity extends toward the side of the silicon substrate and penetrates the side wall of the silicon substrate; the top corner of the silicon substrate extends downward and the lower surface of the top corner is covered with the support layer.

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