An electronic component testing system, method, apparatus, and medium

Abstract

The application provides an electronic component testing system, method, device and medium. A pulse excitation signal is applied to an input end of a to-be-tested electronic component, and a set of equivalent parasitic parameters of the to-be-tested electronic component is determined. A signal path simulation network for testing the to-be-tested electronic component is constructed based on the set of equivalent parasitic parameters and a test path of the to-be-tested electronic component. An initial test signal is analyzed for a test response through the signal path simulation network, and a signal pre-compensation coefficient of the initial test signal in a transmission process is obtained. A frequency spectrum shaping test signal determined based on the signal pre-compensation coefficient is applied to the to-be-tested electronic component, and waveform fidelity of an actual response and an expected response of the frequency spectrum shaping test signal under the to-be-tested electronic component is determined. Whether the to-be-tested electronic component passes the test is determined based on the waveform fidelity. The technical solution provided by the application can effectively test the to-be-tested electronic component under distortion deviation of a test signal.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of electrical component testing, and more particularly, to an electronic component testing system, method, device and medium. BACKGROUND

[0002] Electronic components, as the basic unit of electronic systems, directly affect the reliability and stability of the equipment. With the rapid development of 5G, artificial intelligence, Internet of Things and other technologies, components are evolving towards high frequency, miniaturization and integration, and the working environment is more complex, which puts higher requirements on their functional consistency and weather resistance. Testing technology needs to cover electrical performance, environmental adaptability, reliability and other dimensions. Through the combination of automated testing equipment and intelligent algorithms, it can accurately capture component parameter drift, hidden defects and other problems, ensuring safe operation in key areas such as aerospace, automotive electronics and medical devices, and is the core link to ensure the quality of the electronic industry chain.

[0003] In existing electronic component testing, a specified electrical signal is usually applied to the component by a test device based on the principle of electrical signal excitation and response analysis, simulating the actual working scenario, and then the output signal is collected to compare with the standard parameters to judge the performance, and then realize the whole process detection from performance verification to defect positioning. However, in electronic component testing, the coupling effect of distributed parasitic parameters (such as spatial distribution of parasitic inductance and parasitic capacitance) and transmission line effects (such as reflection and time delay caused by impedance discontinuity points) in the internal and signal transmission path of the electronic component will cause signal distortion deviation (i.e. voltage overshoot and oscillation decay) in the transmission process, and thus the electronic component under test cannot be effectively tested. Therefore, how to effectively test the electronic component under test when the test signal produces distortion deviation has become a difficult problem in the industry. SUMMARY

[0004] The present application provides an electronic component testing system, method, device and medium, which can effectively test the electronic component under test when the test signal produces distortion deviation.

[0005] In a first aspect, the present application provides an electronic component testing method, comprising the following steps:

[0006] Applying a pulse excitation signal to the input end of the electronic component under test, and collecting the transient response waveform of the output end;

[0007] Extracting the voltage overshoot amplitude and oscillation decay time constant of the key time point from the transient response waveform, and then determining the equivalent parasitic parameter set of the electronic component under test based on the voltage overshoot amplitude and oscillation decay time constant;

[0008] construct a signal path simulation network for testing the electronic component under test based on the equivalent parasitic parameter set and a test path of the electronic component under test, analyze a test response of an initial test signal through the signal path simulation network, and obtain a signal pre-compensation coefficient of the initial test signal in a transmission process;

[0009] perform spectrum shaping processing on the initial test signal according to the signal pre-compensation coefficient to obtain a spectrum-shaped test signal of the electronic component under test, apply the spectrum-shaped test signal to the electronic component under test, and determine waveform fidelity of an actual response and an expected response of the spectrum-shaped test signal under the electronic component under test;

[0010] when the waveform fidelity exceeds a preset fidelity threshold, determine that the electronic component under test passes the test.

[0011] In some embodiments, determining the equivalent parasitic parameter set of the electronic component under test specifically includes:

[0012] obtaining a transient response waveform of an output end of the electronic component under test;

[0013] extracting a voltage overshoot amplitude and an oscillation decay time constant of a key time point from the transient response waveform;

[0014] determining the equivalent parasitic parameter set of the electronic component under test based on the voltage overshoot amplitude and the oscillation decay time constant.

[0015] In some embodiments, extracting the voltage overshoot amplitude and the oscillation decay time constant of the key time point from the transient response waveform specifically includes:

[0016] performing noise reduction filtering processing on the transient response waveform to obtain a preprocessed response waveform;

[0017] determining a first peak point of a waveform rising edge as the key time point based on the preprocessed response waveform, and taking a difference between a voltage value corresponding to the key time point and a steady-state voltage value as the voltage overshoot amplitude;

[0018] extracting all maximum value points in a decay oscillation segment waveform data after the key time point to form an envelope sample sequence;

[0019] performing exponential function fitting on the envelope sample sequence, and extracting a time constant of an exponential decay term after the exponential function fitting as the oscillation decay time constant.

[0020] In some embodiments, constructing the signal path simulation network for testing the electronic component under test based on the equivalent parasitic parameter set and the test path of the electronic component under test specifically includes:

[0021] convert the parasitic resistance, parasitic inductance and parasitic capacitance parameters in the equivalent parasitic parameter set into corresponding simulation model elements;

[0022] divide the transmission line segment of the test path into a plurality of transmission sub-line segments;

[0023] establish a frequency domain transmission matrix for each transmission sub-line segment using the telegraph equation in the transmission line theory;

[0024] cascade the simulation model elements and the frequency domain transmission matrix of each transmission sub-line segment, and simultaneously connect the test source impedance and the load impedance, to construct a signal path simulation network for the electronic component under test.

[0025] In some embodiments, the signal pre-compensation coefficient of the initial test signal in the transmission process is obtained by performing test response analysis on the initial test signal through the signal path simulation network, and specifically includes:

[0026] input the initial test signal as an excitation into the signal path simulation network, and extract the corresponding simulation response waveform at the network output end;

[0027] construct a system response function of the signal in the transmission path based on the amplitude and phase difference between the simulation response waveform and the initial test signal;

[0028] perform frequency domain inversion operation on the system response function to obtain the signal pre-compensation coefficient of the initial test signal in the transmission process.

[0029] In some embodiments, the initial test signal is subjected to frequency spectrum shaping processing according to the signal pre-compensation coefficient to obtain a frequency spectrum shaping test signal of the electronic component under test, and specifically includes:

[0030] perform Fourier transform on the initial test signal to obtain a frequency domain signal;

[0031] multiply the frequency domain signal and the signal pre-compensation coefficient point by point to obtain a compensated frequency domain signal;

[0032] perform inverse Fourier transform on the compensated frequency domain signal to obtain the frequency spectrum shaping test signal of the electronic component under test.

[0033] In some embodiments, a pulse excitation signal is applied to the input end of the electronic component under test through a signal generator.

[0034] In a second aspect, the present application provides an electronic component test system, comprising:

[0035] The excitation module is configured to apply a pulse excitation signal to an input terminal of the electronic component under test and determine a set of equivalent parasitic parameters of the electronic component under test.

[0036] The processing module is further configured to construct a signal path simulation network for the electronic component under test based on the set of equivalent parasitic parameters and a test path of the electronic component under test, analyze a test response of an initial test signal through the signal path simulation network, and obtain a signal pre-compensation coefficient of the initial test signal in a transmission process.

[0037] The processing module is further configured to perform a spectrum shaping process on the initial test signal according to the signal pre-compensation coefficient to obtain a spectrum shaping test signal of the electronic component under test, apply the spectrum shaping test signal to the electronic component under test, and determine a waveform fidelity of an actual response and an expected response of the spectrum shaping test signal under the electronic component under test.

[0038] The execution module is configured to determine that the electronic component under test passes the test when the waveform fidelity exceeds a preset fidelity threshold.

[0039] In a third aspect, a computer device is provided, which includes a memory and a processor. The memory stores a code. The processor is configured to acquire the code and execute the electronic component test method described above.

[0040] In a fourth aspect, a computer readable storage medium is provided, which stores a computer program. The computer program is executed by a processor to implement the electronic component test method described above.

[0041] The technical scheme provided by the embodiments of the present application has the following beneficial effects:

[0042] The electronic component testing system, method, device and medium provided by the application first apply a pulse excitation signal to the input end of the electronic component to be tested, and determine the equivalent parasitic parameter set of the electronic component to be tested; further, based on the equivalent parasitic parameter set, a signal path simulation network for testing the electronic component to be tested is constructed in combination with the test path of the electronic component to be tested, and then the initial test signal is analyzed for test response through the signal path simulation network, and the signal pre-compensation coefficient of the initial test signal in the transmission process is obtained; then, the initial test signal is processed for spectrum shaping according to the signal pre-compensation coefficient, and the spectrum shaping test signal of the electronic component to be tested is obtained, the spectrum shaping test signal is applied to the electronic component to be tested, and the waveform fidelity of the actual response and the expected response of the spectrum shaping test signal under the electronic component to be tested is determined; finally, when the waveform fidelity exceeds the preset fidelity threshold, it is determined that the electronic component to be tested passes the test.

[0043] It can be seen that the application can effectively test the electronic component to be tested under the distortion deviation of the test signal. First, the test signal is applied to the input end of the electronic component to be tested, and the transient response waveform of the output end is collected to reflect the transient characteristics of the electronic component to be tested in the process of transitioning from one stable state to another stable state, thereby providing effective data support for analyzing the performance parameters of the electronic component to be tested. Second, the equivalent parasitic parameter set of the electronic component to be tested is determined to quantify the parasitic effect strength and dynamic response characteristics of the electronic component to be tested in the test process, thereby providing basic data support for signal integrity analysis and high-frequency performance evaluation. Further, based on the equivalent parasitic parameter set in combination with the transmission line segment of the test path, a signal path simulation network for testing the electronic component to be tested is constructed to identify the coupling effect of the distributed parasitic parameters and the transmission line effect in the electronic component and the signal transmission path, and the original test signal is analyzed for test response through the signal path simulation network, thereby obtaining the signal pre-compensation coefficient of the original test signal in the transmission process, which can better restore the original target waveform of the test signal after propagating through the real test path, thereby compensating for the distortion phenomenon of the test signal in the transmission process, thereby improving the fidelity and effectiveness of the test signal. Then, the initial test signal is processed for spectrum shaping according to the signal pre-compensation coefficient, and the spectrum shaping test signal of the electronic component to be tested is obtained, the spectrum shaping test signal is applied to the electronic component to be tested, and the waveform fidelity of the actual response and the expected response of the spectrum shaping test signal under the electronic component to be tested is determined to represent the ability of the signal to maintain the original waveform characteristics after being transmitted or processed by the component, thereby effectively testing the electronic component to be tested. In summary, the technical solution provided by the application can effectively test the electronic component to be tested under the distortion deviation of the test signal. BRIEF DESCRIPTION OF DRAWINGS

[0044] Figure 1 is an example flowchart of an electronic component testing method according to some embodiments of the present application;

[0045] Figure 2 is an example flowchart of determining an equivalent set of parasitic parameters according to some embodiments of the present application;

[0046] Figure 3 is an example flowchart of determining a signal path simulation network according to some embodiments of the present application;

[0047] Figure 4 is a structural schematic diagram of an electronic component testing system according to some embodiments of the present application;

[0048] Figure 5 is a structural schematic diagram of a computer device for implementing an electronic component testing method according to some embodiments of the present application. DETAILED DESCRIPTION

[0049] In order to better understand the technical solutions of the present application, the technical solutions of the present application will be described in detail below in combination with the drawings of the specification and specific embodiments.

[0050] Referring to Figure 1 , the figure is an example flowchart of an electronic component testing method according to some embodiments of the present application, which mainly includes the following steps:

[0051] In step 101, a pulse excitation signal is applied to the input end of the electronic component to be tested, and an equivalent set of parasitic parameters of the electronic component to be tested is determined.

[0052] In specific implementation, the pulse excitation signal is applied to the input end of the electronic component to be tested by a signal generator. Specifically, first, the signal generator generates a pulse excitation signal, which can effectively excite the electronic component to be tested and make it present observable characteristic changes. Then, the pulse excitation signal is transmitted to the input end of the electronic component to be tested through a signal transmission cable. After the test signal is input, the oscilloscope collects the transient response waveform of the output end at the output end of the electronic component to be tested.

[0053] It should be noted that the transient response waveform in the present application represents the dynamic waveform of the voltage of the electronic component to be tested changing with time after inputting the test signal, the transient response waveform reflects the transient characteristics of the electronic component to be tested in the process of transitioning from one stable state to another stable state, and contains detailed characteristics such as rising edge, falling edge, overshoot, oscillation, and attenuation, which can directly show the dynamic response capability of the electronic component to the input signal, and provide effective data support for analyzing the performance parameters of the electronic component to be tested; the pulse excitation signal in the present application represents a signal for pre-excitation and trial of the electronic component to be tested. Generally, different electronic components have different electrical properties when tested, and therefore, the electrical properties of the target electronic component can be pre-identified through the pulse excitation signal.

[0054] In some embodiments, with reference to Figure 2 The figure is an exemplary flow chart for determining the equivalent parasitic parameter set according to some embodiments of the present application, and the equivalent parasitic parameter set of the electronic component to be tested in the present embodiment can be realized by the following steps:

[0055] First, in step 1011, the transient response waveform of the output end of the electronic component to be tested is obtained;

[0056] Then, in step 1012, the voltage overshoot amplitude and oscillation decay time constant of the key time point are extracted from the transient response waveform;

[0057] Finally, in step 1013, the equivalent parasitic parameter set of the electronic component to be tested is determined based on the voltage overshoot amplitude and oscillation decay time constant.

[0058] In some embodiments, the voltage overshoot amplitude and oscillation decay time constant of the key time point can be extracted from the transient response waveform by the following steps, that is:

[0059] The transient response waveform is subjected to noise reduction filtering to obtain a preprocessed response waveform;

[0060] The first peak point of the waveform rising edge is determined as the key time point based on the preprocessed response waveform, and the difference between the voltage value corresponding to the key time point and the steady-state voltage value is taken as the voltage overshoot amplitude;

[0061] The decay oscillation segment waveform data after the key time point is intercepted, and all maximum value points in the decay oscillation segment waveform data are extracted to form an envelope sample sequence;

[0062] The envelope sample sequence is subjected to exponential function fitting, and the time constant of the exponential decay term after the exponential function fitting is extracted as the oscillation decay time constant.

[0063] In a specific implementation, first, the transient response waveform is filtered by a moving average filter in the prior art to obtain a preprocessed response waveform; second, a first derivative of the preprocessed response waveform is calculated, when the derivative changes from positive to negative, the first peak point of the rising edge of the corresponding waveform at this time is determined as a key time point, the arithmetic mean of the voltage amplitude in the preprocessed response waveform is taken as a steady-state voltage value, and the difference between the voltage value corresponding to the key time point and the steady-state voltage value is taken as a voltage overshoot amplitude; then, waveform data of an oscillation decay segment after the key time point is intercepted, and all maximum points in the waveform data of the oscillation decay segment are extracted to form an envelope sample sequence, that is, the waveform after the key time point is intercepted as the waveform data of the oscillation decay segment according to a conventional threshold time standard of 3-5 times the rising edge time, all maximum points in the waveform data of the oscillation decay segment are extracted by using a local maximum value detection algorithm, and all the maximum points are combined into the envelope sample sequence; finally, the envelope sample sequence is converted by natural logarithm, and an exponential function is fitted by using a least square method, and a time constant of an exponential decay term after the exponential function fitting is taken as an oscillation decay time constant.

[0064] It should be noted that the envelope sample sequence in the embodiment represents a voltage sequence composed of all maximum points of the oscillation decay segment extracted from the transient response waveform in time sequence, and the envelope sample sequence reflects the envelope trend of the oscillation waveform decaying with time. Specifically, the waveform segment after the overshoot peak value usually presents a high-frequency oscillation decay characteristic, and the envelope line thereof presents a monotonically decreasing state. Therefore, by identifying and extracting all local maximum points in the segment, a peak value sequence gradually decaying can be constructed, which can be regarded as an envelope approximation of the actual oscillation signal in mathematical processing, and can be used to fit an exponential decay model, and then accurately extract the oscillation decay time constant. The waveform data of the oscillation decay segment in the embodiment represents a waveform part gradually tending to be stable in the form of oscillation after the voltage overshoot peak value in the transient response waveform.

[0065] It should be further noted that the voltage overshoot amplitude in the application represents a voltage offset reached when the waveform first rises and exceeds the steady-state level in the transient response waveform, the voltage overshoot amplitude reflects the transient energy accumulation ability of the circuit under excitation and the intensity of the transient fluctuation caused by the parasitic parameters, and is an important basis for constructing a parasitic parameter model and optimizing a test signal waveform. The oscillation decay time constant in the application represents a rate parameter of the exponential decay of the voltage amplitude with time in the oscillation waveform after the overshoot, and the oscillation decay time constant is used to measure the influence degree of the internal equivalent parasitic inductance, capacitance and damping characteristics of the electronic component on the transient response. The voltage overshoot amplitude and the oscillation decay time constant jointly characterize the transient dynamic behavior of the electronic component under the excitation, and are important bases for constructing a parasitic parameter model and optimizing a test signal waveform.

[0066] wherein, in some embodiments, determining the set of equivalent parasitic parameters of the electronic component under test based on the voltage overshoot amplitude and the oscillation decay time constant can be achieved by the following steps, namely:

[0067] establishing an equivalent circuit model of the electronic component under test containing parasitic resistance, parasitic inductance and parasitic capacitance;

[0068] substituting the voltage overshoot amplitude and the oscillation decay time constant into a time-domain response equation of the equivalent circuit model;

[0069] optimizing and adjusting the parasitic resistance, parasitic inductance and parasitic capacitance parameters in the equivalent circuit model by a numerical iterative algorithm with the objective of minimizing the error between the calculated value of the time-domain response equation and the measured voltage overshoot amplitude and oscillation decay time constant;

[0070] when the error between the calculated value of the time-domain response equation and the measured voltage overshoot amplitude and oscillation decay time constant meets the preset accuracy requirement, the set of equivalent parasitic parameters of the electronic component under test is composed of the optimized parasitic resistance, parasitic inductance and parasitic capacitance parameters.

[0071] In specific implementation, first, according to the parasitic parameter characteristics of the electronic component under test, a resistance, inductance and capacitance (RLC) series model is used as the equivalent circuit model of the electronic component under test, and the topology structure and parameter type of the equivalent circuit model have formed a standard paradigm in the field of circuit analysis; second, the voltage overshoot amplitude and the oscillation decay time constant are then substituted into the time-domain response equation of the equivalent circuit, and the time-domain response equation is established based on the Kirchhoff voltage law and the element voltage-current characteristics, for example, the second-order differential equation of the RLC series circuit, thereby establishing the correlation between the theoretical calculation and the measured data; third, a well-known numerical iterative algorithm (such as the steepest descent method) is used to minimize the error between the calculated value of the time-domain response equation and the measured voltage overshoot amplitude and oscillation decay time constant as the optimization objective, and the parasitic resistance, parasitic inductance and parasitic capacitance parameters in the equivalent circuit model are iteratively updated, and the parasitic resistance, parasitic inductance and parasitic capacitance parameters in the equivalent circuit model are adjusted according to the Jacobian matrix in each iteration; finally, an error threshold is set as the convergence condition, and when the error between the calculated value of the time-domain response equation and the measured voltage overshoot amplitude and oscillation decay time constant meets the preset accuracy (such as the error being less than 0.5%, and the preset accuracy can be set according to actual needs), the optimized parasitic resistance, parasitic inductance and parasitic capacitance parameters are combined as the set of equivalent parasitic parameters of the electronic component under test.

[0072] It should be noted that the equivalent circuit model in the embodiment represents a simplified circuit structure constructed based on parasitic resistance, parasitic inductance and parasitic capacitance, and is used to simulate the non-ideal electrical characteristics of the electronic component under test caused by the internal structure and packaging under high frequency or transient conditions; the time domain response equation in the embodiment represents a mathematical expression of the voltage change with time of the equivalent circuit model under pulse excitation, and is usually a second-order linear ordinary differential equation, which can be used to describe the dynamic behavior of the waveform in the transient process; the equivalent parasitic parameter set in the application represents the concentrated equivalent parameters that affect the circuit performance during the signal transmission process of the electronic component under test, and is used to quantify the parasitic effect strength and dynamic response characteristics of the electronic component under test during the test process, and can provide basic data support for signal integrity analysis and high frequency performance evaluation.

[0073] In step 102, a signal path simulation network for testing the electronic component under test is constructed based on the equivalent parasitic parameter set in combination with the test path of the electronic component under test, and then the initial test signal is analyzed for test response through the signal path simulation network, and then the signal pre-compensation coefficient of the initial test signal in the transmission process is obtained.

[0074] It should be noted that the signal path simulation network in the application represents an equivalent simulation model that simulates various electrical characteristics during the excitation process of the test signal in the test process of the electronic component under test. The signal path simulation network is composed of the transmission line parameters in the test path and the equivalent parasitic parameter set of the electronic component under test, and describes the behavior change of the signal at different media and structure transition points through a multi-segment cascade manner. The signal path simulation network can restore the phenomena of reflection, attenuation, distortion and delay in the signal transmission process in the time domain or frequency domain, and is an important modeling basis for test signal optimization, signal pre-compensation coefficient design and waveform fidelity analysis.

[0075] In some embodiments, referring to Figure 3 The figure is an exemplary flow chart for determining a signal path simulation network according to some embodiments of the application. In the embodiment, the signal path simulation network for testing the electronic component under test is constructed based on the equivalent parasitic parameter set in combination with the test path of the electronic component under test, which can be implemented by the following steps:

[0076] First, in step 1021, the parasitic resistance, parasitic inductance and parasitic capacitance parameters in the equivalent parasitic parameter set are converted into corresponding simulation model elements;

[0077] Secondly, in step 1022, the transmission line segment of the test path is divided into a plurality of transmission sub-line segments;

[0078] Then, in step 1023, a telegraph equation in the transmission line theory is used to establish a frequency domain transmission matrix for each transmission sub-line segment;

[0079] Finally, in step 1024, the simulation model elements and the frequency domain transmission matrices of each transmission sub-line segment are cascaded, while the test source impedance and the load impedance are connected, to construct a signal path simulation network for the electronic component under test during testing.

[0080] In a specific implementation, first, according to the general rules in the circuit simulation field, the parasitic resistance, the parasitic inductance and the parasitic capacitance parameters in the equivalent parasitic parameter set are directly converted into corresponding simulation model elements recognizable by the simulation software, wherein the parasitic resistance corresponds to a resistance element model, the parasitic inductance corresponds to an inductance element model, and the parasitic capacitance corresponds to a capacitance element model, and the electrical characteristic equations of these element models have been standardized in the circuit simulation technology; second, the transmission line segment of the test path is divided into multiple transmission sub-line segments, that is, the transmission line segment of the test path is segmented into multiple transmission sub-line segments through a discretization method (such as the finite difference method), which will not be described here, and each transmission sub-line segment is regarded as a lumped parameter circuit; then, a telegraph equation in the transmission line theory is used to perform frequency domain analysis on each transmission sub-line segment, the telegraph equation is converted into the frequency domain through Fourier transform, and a frequency domain transmission matrix of each transmission sub-line segment is solved, which describes the voltage and current relationship of the test signal at both ends of the transmission line segment; finally, according to the transmission sequence of the test signal from the source to the load, the test source impedance is connected to the input end of the frequency domain transmission matrix of the first transmission sub-line segment, the output end of the frequency domain transmission matrix is connected to the corresponding simulation model element, the frequency domain transmission matrices of multiple transmission sub-line segments are connected in sequence and interspersed with the corresponding simulation model elements, and the simulation model element representing the output end of the electronic component under test is connected to the input end of the frequency domain transmission matrix of the last transmission sub-line segment, and the output end of the frequency domain transmission matrix is connected to the load impedance, thereby constructing a signal path simulation network for the electronic component under test during testing.

[0081] It should be noted that the simulation model elements in this embodiment represent parasitic resistance, parasitic inductance and parasitic capacitance elements that can be called in the circuit simulation environment, to simulate the internal structure, electrode connection and packaging layout in the transient state; the transmission line sub-segments in this embodiment represent transmission path units composed of the same physical structure in the test path, each sub-segment has a definite length, characteristic impedance and propagation constant, and can be regarded as a basic physical unit in the signal transmission process; and the frequency domain transmission matrix in this embodiment represents a complex matrix obtained by modeling each transmission line sub-segment according to the telegraph equation, which is usually in the form of ABCD matrix or S parameter matrix, and its function is to characterize the propagation delay, reflection loss and phase change characteristics of the input signal in the segment, and it is the mathematical basis for connecting and performing frequency domain cascading analysis on the simulation model elements and the transmission line segment.

[0082] In some embodiments, the signal pre-compensation coefficient of the initial test signal in the transmission process can be obtained by performing test response analysis on the initial test signal through the signal path simulation network, and the following steps can be used to achieve the above purpose, i.e.:

[0083] The initial test signal is input as an excitation into the signal path simulation network, and the corresponding simulation response waveform is extracted at the network output end;

[0084] Based on the amplitude and phase difference between the simulation response waveform and the initial test signal, a system response function of the signal in the transmission path is constructed;

[0085] The system response function is subjected to frequency domain inversion operation to obtain the signal pre-compensation coefficient of the initial test signal in the transmission process.

[0086] In the specific implementation, first, the initial test signal is input as an excitation into the signal path simulation network, and the time domain simulation function of the circuit simulation software (such as SPICE) is used to extract the corresponding simulation response waveform at the output end of the signal path simulation network; second, the simulation response waveform and the initial test signal are converted to the frequency domain by using Fourier transform, and based on the amplitude spectrum and phase spectrum difference of the frequency domain signal, the system response function of the signal in the transmission path is constructed according to the system function definition (the ratio of the output signal spectrum to the input signal spectrum), which represents the change characteristics of the test path to the signal amplitude and phase; third, the frequency domain inversion operation is performed on the system response function (i.e. the inverse of the system response function) by using the frequency domain inversion operation, and the inverse of the system response function is used as the signal pre-compensation coefficient of the initial test signal in the transmission process; finally, the distortion compensation factor is applied to the initial test signal to generate the signal pre-compensation coefficient of the initial test signal in the transmission process, i.e. the distortion compensation factor is multiplied by the initial test signal in the frequency domain, and then converted back to the time domain through inverse Fourier transform to generate the signal pre-compensation coefficient of the initial test signal in the transmission process.

[0087] It should be noted that the simulation response waveform in the embodiment represents the simulation response result obtained at the output end after the initial test signal is input into the signal path simulation network; the system response function in the embodiment represents a transfer function constructed by the ratio of the corresponding frequency components of the simulation response waveform and the initial test signal in the frequency domain, and is used to describe the amplitude attenuation and phase change characteristics of the entire signal path for different frequency components; the distortion compensation factor in the embodiment represents a parameter for distortion compensation of the initial test signal, so as to offset the distortion effect caused by the path; and the signal pre-compensation coefficient in the application represents a parameter for distortion compensation of the initial test signal. Through determination of the signal pre-compensation coefficient, the original target waveform can be better recovered after the test signal propagates through the real test path, and then the distortion phenomenon of the test signal in the transmission process is compensated, so that the fidelity and effectiveness of the test signal are improved.

[0088] In step 103, the initial test signal is subjected to spectrum shaping processing according to the signal pre-compensation coefficient, to obtain a spectrum shaping test signal of the electronic component under test. The spectrum shaping test signal is applied to the electronic component under test, and the waveform fidelity of the actual response and the expected response of the spectrum shaping test signal under the electronic component under test is determined.

[0089] In some embodiments, the spectrum shaping test signal of the electronic component under test can be obtained by the following steps, i.e.:

[0090] The initial test signal is subjected to Fourier transform to obtain a frequency domain signal;

[0091] The frequency domain signal is multiplied point by point with the signal pre-compensation coefficient to obtain a compensated frequency domain signal;

[0092] The compensated frequency domain signal is subjected to inverse Fourier transform to obtain the spectrum shaping test signal of the electronic component under test.

[0093] In specific implementation, first, the initial test signal is subjected to Fourier transform by using discrete Fourier transform to obtain a frequency domain signal; second, the frequency domain signal is multiplied point by point with the signal pre-compensation coefficient to obtain a compensated frequency domain signal; and third, the compensated frequency domain signal is converted back to the time domain by inverse Fourier transform to obtain the spectrum shaping test signal of the electronic component under test.

[0094] It should be noted that the spectrum shaping test signal in the application represents an optimal detection signal after spectrum shaping. The signal is subjected to signal distortion compensation by the signal pre-compensation coefficient, so that the test signal can output a more real signal, compensates the signal distortion caused by the test path, optimizes the spectrum characteristics according to the test requirements, and is a target test signal for accurately exciting the electronic component under test.

[0095] In some embodiments, the step of applying the spectrum-shaped test signal to the electronic component under test and determining the waveform fidelity of the actual response of the spectrum-shaped test signal under the electronic component under test to the expected response can be implemented by:

[0096] loading the spectrum-shaped test signal to an input port of the electronic component under test by a test instrument;

[0097] synchronously collecting the actual output response waveform of the electronic component under test and the preset expected response waveform by a high-precision data acquisition device;

[0098] aligning the actual output response waveform and the expected response waveform in time domain, calculating the similarity value between the actual output response waveform and the expected response waveform by using normalized mean square error, and taking the similarity value as the waveform fidelity of the actual response of the spectrum-shaped test signal under the electronic component under test to the expected response.

[0099] In a specific implementation, first, a radio frequency signal generator is used to load the spectrum-shaped test signal to an input port of the electronic component under test; then, a high-precision data acquisition device (such as a high sampling rate oscilloscope) is used to synchronously collect the actual output response waveform of the electronic component under test and the preset expected response waveform; finally, the actual output response waveform and the expected response waveform are aligned in time domain, and the similarity value between the actual output response waveform and the expected response waveform is calculated by using normalized mean square error, and the similarity value is taken as the waveform fidelity of the actual response of the spectrum-shaped test signal under the electronic component under test to the expected response.

[0100] It should be noted that the waveform fidelity in this embodiment represents the similarity between the actual output response waveform of the electronic component under test under the excitation of the test signal (such as the spectrum-shaped test signal) and the preset expected response waveform, to represent the ability of the signal to maintain the original waveform characteristics after being transmitted or processed by the component.

[0101] In step 104, when the waveform fidelity exceeds the preset fidelity threshold, it is determined that the electronic component under test passes the test.

[0102] In a specific implementation, the waveform fidelity is compared with a preset fidelity threshold, if the waveform fidelity is greater than or equal to the preset fidelity threshold, it indicates that the actual response of the electronic component under test under the frequency spectrum shaping test signal is similar to the expected response, the signal distortion is within the allowable range, and then it is determined that the component passes the test, otherwise it is determined that it does not pass the test, thereby realizing the automatic discrimination of whether the performance of the component meets the standard. The fidelity threshold can be set according to actual needs or set according to expert knowledge, which is not limited here.

[0103] In addition, another aspect of the present application, in some embodiments, the present application provides an electronic component test system, referring to Figure 4 The figure is a structural schematic diagram of an electronic component test system according to some embodiments of the present application, which includes an excitation module 201, a processing module 202 and an execution module 203, which are described as follows:

[0104] The excitation module 201 is mainly used for applying a pulse excitation signal to the input end of the electronic component under test, and determining a set of equivalent parasitic parameters of the electronic component under test in the present application;

[0105] The processing module 202 is mainly used for constructing a signal path simulation network for testing the electronic component under test based on the set of equivalent parasitic parameters combined with the test path of the electronic component under test, and then analyzing the test response of the initial test signal through the signal path simulation network, and then obtaining the signal pre-compensation coefficient of the initial test signal in the transmission process in the present application;

[0106] The processing module 202 is also used for performing frequency spectrum shaping processing on the initial test signal according to the signal pre-compensation coefficient, obtaining a frequency spectrum shaping test signal of the electronic component under test, applying the frequency spectrum shaping test signal to the electronic component under test, and determining the waveform fidelity of the actual response and the expected response of the frequency spectrum shaping test signal under the electronic component under test.

[0107] The execution module 203 is mainly used for determining that the electronic component under test passes the test when the waveform fidelity exceeds the preset fidelity threshold in the present application.

[0108] In addition, the present application also provides a computer device, which includes a memory and a processor, the memory stores a code, and the processor is configured to acquire the code and execute the above-mentioned electronic component test method.

[0109] In some embodiments, referring to Figure 5FIG. 1 is a structural schematic diagram of a computer device for implementing an electronic component testing method according to some embodiments of the present application. The electronic component testing method in the above embodiments can be implemented by the computer device shown in FIG. 1, which includes at least one processor 301, a communication bus 302, a memory 303, and at least one communication interface 304. Figure 5 The computer device shown in FIG. 1 includes at least one processor 301, a communication bus 302, a memory 303, and at least one communication interface 304.

[0110] The processor 301 can be a general central processing unit (CPU), an application-specific integrated circuit (ASIC), or one or more circuits for controlling the execution of the electronic component testing method in the present application.

[0111] The communication bus 302 can be used to transmit information between the above components.

[0112] The memory 303 can be a read-only memory (ROM) or other type of static storage device that can store static information and instructions, a random access memory (RAM) or other type of dynamic storage device that can store information and instructions, an electrically erasable programmable read-only memory (EEPROM), a compact disc read-only memory (CD-ROM) or other optical disk storage, a magnetic disk or other magnetic storage device, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a computer, but is not limited to this. The memory 303 can exist independently and be connected to the processor 301 through the communication bus 302. The memory 303 can also be integrated with the processor 301.

[0113] The memory 303 is used to store program code for executing the scheme of the present application and is controlled by the processor 301 for execution. The processor 301 is used to execute the program code stored in the memory 303. The program code can include one or more software modules. The determination of the electronic component testing method in the above embodiments can be implemented by the processor 301 and one or more software modules in the program code in the memory 303.

[0114] The communication interface 304, using any transceiver-type device, is used to communicate with other devices or communication networks, such as Ethernet, radio access network (RAN), wireless local area networks (WLAN), etc.

[0115] In a particular implementation, as one embodiment, the computer device can include multiple processors, each of which can be a single-CPU processor or a multi-CPU processor. A processor herein can refer to one or more devices, circuits, and / or processing cores for processing data (e.g., computer program instructions).

[0116] The computer device described above can be a general-purpose computer device or a special-purpose computer device. In a particular implementation, the computer device can be a desktop computer, a laptop computer, a network server, a personal digital assistant (PDA), a mobile phone, a tablet computer, a wireless terminal device, a communication device, or an embedded device. The embodiments of the present application do not limit the type of the computer device.

[0117] In addition, the present application also provides a computer readable storage medium, which stores a computer program. The computer program is executed by a processor to implement the electronic component testing method described above.

[0118] Although the preferred embodiments of the present application have been described, those skilled in the art can make additional changes and modifications to the embodiments once they know the basic inventive concept. Therefore, the appended claims are intended to cover all changes and modifications falling within the scope of the present application.

[0119] Obviously, those skilled in the art can make various modifications and variations to the present application without departing from the spirit and scope of the present application. Thus, if these modifications and variations of the present application fall within the scope of the claims of the present application and their equivalent technologies, the present application is also intended to include these modifications and variations.

Claims

1. A method for testing electronic components, characterized in that: The steps include: Applying a pulse excitation signal to an input terminal of the electronic component to be tested, and determining a set of equivalent parasitic parameters of the electronic component to be tested; Constructing a signal path simulation network for testing the electronic component to be tested based on the equivalent parasitic parameter set and in combination with a test path of the electronic component to be tested, and then performing a test response analysis on an initial test signal through the signal path simulation network to obtain a signal pre-compensation coefficient of the initial test signal during transmission; performing spectrum shaping processing on the initial test signal according to the signal pre-compensation coefficient to obtain a spectrum-shaped test signal for the electronic component under test, applying the spectrum-shaped test signal to the electronic component under test, and determining the waveform fidelity between an actual response of the spectrum-shaped test signal under the electronic component under test and an expected response; When the waveform fidelity exceeds a preset fidelity threshold, determining that the electronic component to be tested has passed the test; Wherein, determining the equivalent parasitic parameter set of the electronic component to be tested specifically includes: Obtain the transient response waveform of the output terminal of the electronic component under test; extracting the voltage overshoot amplitude and oscillation decay time constant at key time points from the transient response waveform; Determining an equivalent parasitic parameter set of the electronic component to be tested based on the voltage overshoot amplitude and the oscillation decay time constant; The step of extracting the voltage overshoot amplitude and the oscillation decay time constant at key time points from the transient response waveform specifically includes: Performing noise reduction and filtering processing on the transient response waveform to obtain a preprocessed response waveform; determining the first peak point of the rising edge of the waveform as a key time point based on the preprocessed response waveform, and taking the difference between the voltage value corresponding to the key time point and the steady-state voltage value as the voltage overshoot amplitude; intercepting the decay oscillation segment waveform data after the key time point, and extracting all the maximum value points in the decay oscillation segment waveform data to form an envelope sample sequence; Performing exponential function fitting on the envelope sample sequence, and extracting the time constant of the exponential decay term after the exponential function fitting as the oscillation decay time constant; The equivalent parasitic parameter set of the electronic component to be tested is determined based on the voltage overshoot amplitude and the oscillation decay time constant by the following steps: Establishing an equivalent circuit model of the electronic component to be tested including parasitic resistance, parasitic inductance and parasitic capacitance; Substituting the voltage overshoot amplitude and the oscillation decay time constant into the time domain response equation of the equivalent circuit model; By using a numerical iterative algorithm, the parasitic resistance, parasitic inductance and parasitic capacitance parameters in the equivalent circuit model are optimized and adjusted with the goal of minimizing the error between the calculated value of the time domain response equation and the measured voltage overshoot amplitude and oscillation decay time constant; When the error between the calculated value of the time-domain response equation and the measured voltage overshoot amplitude and oscillation decay time constant meets the preset accuracy requirement, the optimized parasitic resistance, parasitic inductance and parasitic capacitance parameters constitute an equivalent parasitic parameter set of the electronic component to be tested; The construction of a signal path simulation network for testing the electronic component to be tested based on the equivalent parasitic parameter set and the test path of the electronic component to be tested specifically includes: Converting the parasitic resistance, parasitic inductance and parasitic capacitance parameters in the equivalent parasitic parameter set into corresponding simulation model elements; Dividing the transmission line segment of the test path into a plurality of transmission sub-line segments; The frequency domain transmission matrix of each transmission sub-line segment is established using the telegraph equation in transmission line theory; The simulation model elements and the frequency domain transmission matrix of each transmission sub-segment are cascaded, and the test source impedance and load impedance are connected at the same time to construct a signal path simulation network when the electronic component to be tested is tested.

2. The method according to claim 1, wherein Performing a test response analysis on the initial test signal through the signal path simulation network, and then obtaining a signal pre-compensation coefficient of the initial test signal during the transmission process specifically includes: Inputting the initial test signal as stimulus into the signal path simulation network, and extracting the corresponding simulation response waveform at the network output end; constructing a system response function of the signal in the transmission path based on the amplitude and phase differences between the simulated response waveform and the initial test signal; A frequency domain inversion operation is performed on the system response function to obtain a signal pre-compensation coefficient of the initial test signal during the transmission process.

3. The method according to claim 1, wherein Performing spectrum shaping processing on the initial test signal according to the signal pre-compensation coefficient to obtain a spectrum-shaped test signal of the electronic component to be tested specifically includes: Perform Fourier transform on the initial test signal to obtain a frequency domain signal; Multiplying the frequency domain signal by the signal pre-compensation coefficient point by point to obtain a compensated frequency domain signal; Perform inverse Fourier transform on the compensated frequency domain signal to obtain the spectrum shaping test signal of the electronic component to be tested.

4. The method according to claim 1, wherein A pulse excitation signal is applied to the input end of the electronic component to be tested through a signal generator.

5. An electronic component testing system, which uses the method according to any one of claims 1 to 4 to test electronic components, characterized in that: The system includes: An excitation module, configured to apply a pulse excitation signal to an input terminal of the electronic component to be tested, and determine a set of equivalent parasitic parameters of the electronic component to be tested; The processing module is further configured to construct a signal path simulation network for testing the electronic component to be tested based on the equivalent parasitic parameter set and the test path of the electronic component to be tested, and then perform a test response analysis on the initial test signal through the signal path simulation network to obtain a signal pre-compensation coefficient of the initial test signal during transmission; The processing module is further configured to perform spectrum shaping processing on the initial test signal according to the signal pre-compensation coefficient to obtain a spectrum shaped test signal for the electronic component under test, apply the spectrum shaped test signal to the electronic component under test, and determine the waveform fidelity between an actual response of the spectrum shaped test signal under the electronic component under test and an expected response; The execution module is used to determine that the electronic component to be tested has passed the test when the waveform fidelity exceeds a preset fidelity threshold.

6. A computer device, characterized in that: The computer device includes a memory and a processor, the memory stores codes, and the processor is configured to obtain the codes and execute the electronic component testing method according to any one of claims 1 to 4.

7. A computer-readable storage medium storing a computer program, characterized in that: When the computer program is executed by a processor, the electronic component testing method according to any one of claims 1 to 4 is implemented.

Images