Display panel and display device

Abstract

The invention provides a display panel and a display device.The display panel comprises a first conductive layer and a first electrode layer, the first conductive layer comprises a plurality of grid electrodes and connecting parts connected between the adjacent grid electrodes, the first electrode layer is arranged on the first conductive layer, the first electrode layer comprises a common electrode, and the common electrode is arranged on the first conductive layer; the common electrode and the connecting part are overlapped in the thickness direction of the display panel, the opening is formed in the common electrode, and the opening and the connecting part are overlapped in the thickness direction of the display panel, so that the overlapping area of the common electrode and the connecting part can be reduced, and stray capacitance between the common electrode and the connecting part is reduced; therefore, the influence of the voltage fluctuation of the connecting part on the voltage of the common electrode can be reduced, and the condition of residual images can be improved.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display panel and a display device. Background Art

[0002] With the development of display technology, LCD technology has been widely used in various consumer electronic products such as mobile phones, televisions, personal digital assistants, digital cameras, laptops, desktop computers, etc. due to its advantages of high image quality, power saving, thin body and wide application range, becoming the mainstream of display technology.

[0003] Currently, the array substrate of a liquid crystal display panel typically has multiple scan lines and data lines that intersect vertically to form multiple pixel units. Each pixel unit is equipped with a thin-film transistor (TFT), whose gate is connected to the scan line, source is connected to the data line, and drain is connected to the pixel electrode. However, due to parasitic capacitance generated by the overlap between the common electrode and the scan line, fluctuations in the scan line voltage can cause changes in the common electrode voltage, resulting in image retention on the display.

[0004] Therefore, it is necessary to provide a display panel and a display device to improve this defect. Summary of the Invention

[0005] Embodiments of the present application provide a display panel and a display device that can improve the problem of afterimage.

[0006] In order to achieve the above-mentioned objective, according to a first aspect of the present application, a display panel is provided, comprising:

[0007] A first conductive layer comprising a plurality of gates and connecting portions connecting adjacent gates;

[0008] a first electrode layer disposed on the first conductive layer, the first electrode layer including a common electrode, wherein the common electrode overlaps with the connecting portion in a thickness direction of the display panel;

[0009] The common electrode is provided with an opening, and the opening overlaps with the connecting portion in a thickness direction of the display panel.

[0010] Optionally, an orthographic projection of the opening on the connecting portion is located inside the connecting portion.

[0011] Optionally, a dimension of the opening in a width direction of the connecting portion is smaller than a width of the connecting portion.

[0012] Optionally, a minimum distance between an edge of an orthographic projection of the opening on the connecting portion and an edge of the connecting portion is greater than or equal to 0.5 micrometers and less than or equal to 4 micrometers.

[0013] Optionally, a diameter of a minimum circumscribed circle of the opening is greater than or equal to 2 micrometers and less than or equal to 5 micrometers.

[0014] Optionally, the shape of the opening includes at least one of a circle, an ellipse, a rectangle and a diamond.

[0015] Optionally, the common electrode is provided with a plurality of the openings, and orthographic projections of at least two of the openings on the first conductive layer are located in the same connecting portion.

[0016] Optionally, at least two of the openings are arranged on the same connecting portion at intervals along the extending direction of the connecting portion.

[0017] Optionally, the display panel further comprises a plurality of data lines, the plurality of data lines are arranged to intersect with the plurality of first conductive layers to define a plurality of pixel areas, the common electrode comprises a plurality of hollow portions located in the pixel areas, and comprises a common sub-electrode located between adjacent hollow portions;

[0018] Wherein, an angle between an extension direction of a line connecting the centers of any two adjacent openings on the same connecting portion and an extension direction of the common sub-electrode is less than or equal to 15 degrees.

[0019] Optionally, an extension direction of a line connecting centers of any two adjacent openings on the same connecting portion is parallel to an extension direction of the common sub-electrode.

[0020] Optionally, the display panel includes a second electrode layer provided at a different layer from the first electrode layer, and the second electrode layer includes a pixel electrode located in the pixel area;

[0021] Wherein, the direction of the line connecting the centers of any two adjacent openings on the same connecting portion is perpendicular to the direction of the electric field formed by the common electrode and the pixel electrode.

[0022] Optionally, an orthographic projection of the opening on a reference plane is separated from an orthographic projection of the pixel electrode on the reference plane, and the reference plane is parallel to a light emitting surface of the display panel;

[0023] Wherein, an extension direction of a line connecting the centers of any two adjacent openings on the same connecting portion is parallel to an extension direction of a side of the pixel electrode close to the opening.

[0024] Optionally, the minimum distance between any two adjacent openings on the same connecting portion is greater than or equal to 2 micrometers and less than or equal to 5 micrometers.

[0025] According to a second aspect of the present application, a display device is provided, comprising the display panel as described above.

[0026] In the display panel of the embodiment of the present application, by providing an opening in the common electrode and making the opening overlap with the connecting portion in the thickness direction of the display panel, the overlapping area of ​​the common electrode and the connecting portion can be reduced, thereby reducing the parasitic capacitance between the common electrode and the connecting portion. In this way, the influence of the voltage fluctuation of the connecting portion on the voltage of the common electrode can be reduced, thereby improving the afterimage situation.

[0027] Other features and advantages of the present application will be described in detail in the subsequent detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] To more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for describing the embodiments. Obviously, the drawings described below are only some embodiments of the present application. Those skilled in the art can also derive other drawings based on these drawings without inventive effort.

[0029] In order to more completely understand the present application and its beneficial effects, the following description will be given in conjunction with the accompanying drawings, wherein the same drawing numbers represent the same parts in the following description.

[0030] Figure 1 A top view of a display panel provided in an embodiment of the present application;

[0031] Figure 2 A schematic diagram of a sub-pixel of a display panel provided in an embodiment of the present application;

[0032] Figure 3 The display panel provided in the embodiment of the present application is Figure 2 The cross-sectional view along the A-A' direction is shown;

[0033] Figure 4 The display panel provided in the embodiment of the present application is Figure 2 The cross-sectional view along the BB' direction is shown;

[0034] Figure 5 A film layer diagram of a first electrode layer in a display panel provided in an embodiment of the present application;

[0035] Figure 6 A film layer diagram of the second electrode layer in the display panel provided in an embodiment of the present application;

[0036] Figure 7 A schematic diagram of a display device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0037] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the embodiments described are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present application.

[0038] Embodiments of the present application provide a display panel comprising a first conductive layer and a first electrode layer, wherein the first conductive layer comprises a plurality of gates and a connecting portion connecting adjacent gates, the first electrode layer being disposed on the first conductive layer, the first electrode layer comprising a common electrode, the common electrode and the connecting portion overlapping in the thickness direction of the display panel, the common electrode having an opening, the opening and the connecting portion overlapping in the thickness direction of the display panel.

[0039] In an embodiment of the present application, an opening is provided in the common electrode, and the opening is overlapped with the connecting portion in the thickness direction of the display panel, so that the overlapping area of ​​the common electrode and the connecting portion can be reduced, thereby reducing the parasitic capacitance between the common electrode and the connecting portion. In this way, the influence of the voltage fluctuation of the connecting portion on the voltage of the common electrode can be reduced, thereby improving the afterimage situation.

[0040] See also Figure 1 , Figure 1 This is a top view of a display panel provided in an embodiment of the present application. The display panel 100 includes a display area AA and a non-display area NA, with the non-display area NA being disposed peripherally to the display area AA. The display panel 100 may include multiple data lines and multiple scan lines (not shown). The multiple data lines and multiple scan lines intersect to define a plurality of pixel areas arranged in an array in the display area AA. Each pixel area can be considered a sub-pixel.

[0041] See also Figure 2 and Figure 3 , Figure 2 A schematic diagram of a sub-pixel of a display panel provided in an embodiment of the present application, Figure 3 The display panel provided in the embodiment of the present application is Figure 2 As shown in the cross-sectional view in the A-A' direction, the display panel 100 includes a first conductive layer 1 and a first electrode layer 2. The first conductive layer 1 includes a plurality of gates 11 and connecting portions 12 connected between adjacent gates 11. The gates 11 are block-shaped structures, and the connecting portions 12 are long strip-shaped structures extending in the horizontal direction. Both the gates 11 and the connecting portions 12 can be regarded as part of the scanning line.

[0042] See also Figure 2 and Figure 4 , Figure 4 The display panel provided in the embodiment of the present application is Figure 2In the cross-sectional view taken along the BB' direction, the common electrode 21 overlaps with the connecting portion 12 in the thickness direction of the display panel. The common electrode 21 is provided with an opening 211 which passes through the common electrode 21 in the thickness direction of the display panel. The opening 211 overlaps with the connecting portion 12 in the thickness direction of the display panel.

[0043] In this embodiment, by providing an opening 211 on the common electrode 21 and making the opening 211 overlap with the connecting portion 12 in the thickness direction of the display panel, the overlapping area of ​​the common electrode 21 and the connecting portion 12 can be reduced, thereby reducing the parasitic capacitance between the common electrode 21 and the connecting portion 12. In this way, the influence of the voltage fluctuation of the connecting portion on the voltage of the common electrode can be reduced, and the difference in the voltage of the common electrode 21 in different areas can be reduced, thereby improving the afterimage situation and improving the uniformity of the brightness of the display panel.

[0044] In some embodiments, an orthographic projection of the opening 211 on the connecting portion 12 is located inside the connecting portion 12 .

[0045] Combine Figure 2 and Figure 4 As shown, the common electrode 21 is entirely disposed on the first conductive layer 1, and the orthographic projection of the common electrode 21 on the first conductive layer 1 covers the connecting portion 12. The common electrode 21 can not only form an electric field with the pixel electrode to drive the deflection of the liquid crystal molecules, but also serve as a shielding electrode to shield the electric field between the gate 11 or the connecting portion 12 of the first conductive layer 1 and other conductive structures (for example, the source or drain, etc.), thereby preventing the electric field of the gate 11 or the connecting portion 12 from affecting the deflection of the liquid crystal molecules and causing light leakage. In this embodiment, by arranging the orthographic projection of the opening 211 on the connecting portion 12 within the connecting portion 12, on the one hand, it can ensure that the common electrode 21 can cover the edge portion of the connecting portion 12 to prevent the electric field of the connecting portion 12 from affecting the deflection of the liquid crystal molecules and causing light leakage; on the other hand, it can prevent the opening 211 from extending to the opening area of ​​the sub-pixel and affecting the electric field of the opening area, thereby causing light leakage.

[0046] In some embodiments, as Figure 2 As shown, the size of the opening 211 in the width direction of the connecting portion 12 is smaller than the width of the connecting portion 12, so as to ensure that the common electrode 21 can completely cover the edge portion of the connecting portion 12 to prevent the electric field of the connecting portion 12 from affecting the deflection of the liquid crystal molecules and causing light leakage.

[0047] In some embodiments, a minimum distance between an edge of an orthographic projection of the opening 211 on the connecting portion 12 and an edge of the connecting portion 12 is greater than or equal to 0.5 micrometers and less than or equal to 4 micrometers.

[0048] like Figure 2 As shown, the minimum distance between the edge of the orthographic projection of the opening 211 on the connecting portion 12 and the edge of the connecting portion 12 is a first distance d1. The first distance d1 can be any one of 0.5 microns, 0.7 microns, 1 micron, 1.5 microns, 2 microns, 2.5 microns, 3 microns, 3.5 microns or 4 microns, etc., and only needs to be between 0.5 and 4 microns.

[0049] It should be noted that if the distance between the edge of the orthographic projection of the opening 211 on the connection portion 12 and the edge of the connection portion 12 is too small, the edge of the connection portion 12 will not be able to adequately cover the common electrode 21, and the electric field of the connection portion 12 will affect the deflection of the liquid crystal molecules and cause light leakage. If the distance between the edge of the orthographic projection of the opening 211 on the connection portion 12 and the edge of the connection portion 12 is too large, the size of the opening 211 will be compressed, resulting in an inability to effectively reduce the parasitic capacitance between the common electrode 21 and the connection portion 12. This embodiment limits the minimum distance between the edge of the orthographic projection of the opening 211 on the connection portion 12 and the edge of the connection portion 12 to between 0.5 microns and 4 microns. This not only prevents the electric field of the connection portion 12 from affecting the deflection of the liquid crystal molecules and causing light leakage, but also reduces the parasitic capacitance between the common electrode 21 and the connection portion 12, thereby reducing the impact of voltage fluctuations in the connection portion 12 on the voltage of the common electrode 21, thereby improving the afterimage problem.

[0050] In some embodiments, as Figure 2 As shown, the diameter of the minimum circumscribed circle of the opening 211 is greater than or equal to 2 microns and less than or equal to 5 microns. For example, the diameter of the minimum circumscribed circle of the opening 211 can be 2 microns, 0.5 microns, 3 microns, 3.5 microns, 4 microns, 4.5 microns or 5 microns.

[0051] It should be noted that if the diameter of the minimum circumscribed circle of the opening 211 is too large, the distance between the edge of the opening 211 and the edge of the connecting portion 12 will be too small, which will cause light leakage. If the diameter of the minimum circumscribed circle of the opening 211 is too small, it means that the size of the opening 211 is too small, and the parasitic capacitance between the common electrode 21 and the connecting portion 12 cannot be effectively reduced. In the embodiment of the present application, by limiting the diameter of the minimum circumscribed circle of the opening 211 to between 2 and 5 microns, it is not only possible to prevent the electric field of the connecting portion 12 from affecting the deflection of the liquid crystal molecules and causing light leakage, but also to reduce the parasitic capacitance between the common electrode 21 and the connecting portion 12, thereby reducing the impact of the voltage fluctuation of the connecting portion 12 on the voltage of the common electrode 21, thereby improving the afterimage problem.

[0052] In some embodiments, the shape of the opening 211 includes at least one of a circle, an ellipse, a rectangle, and a diamond.

[0053] In some embodiments, as Figure 2 As shown, the common electrode 21 is provided with a plurality of openings 211 , and the plurality of openings 211 have the same shape, namely, a diamond shape.

[0054] In some other embodiments, the plurality of openings 211 may also have at least two shapes. For example, the shape of some of the openings is one of a circle, an ellipse, a rectangle and a diamond, and the shape of other openings is another of a circle, an ellipse, a rectangle and a diamond. In this way, the overlapping area between the common electrode and the connecting portion can be reduced, thereby reducing the parasitic capacitance between the common electrode and the connecting portion.

[0055] In some embodiments, the common electrode 21 is provided with a plurality of openings 211, and the orthographic projections of at least two openings 211 on the first conductive layer 1 are located within the same connecting portion 12. By providing at least two openings 211 on the common electrode 21 above the connecting portion 12, the overlapping area between the common electrode 21 and the connecting portion 12 can be further reduced, thereby further reducing the parasitic capacitance between the common electrode 21 and the connecting portion 12, thereby further reducing the impact of voltage fluctuations of the connecting portion 12 on the voltage of the common electrode 21, thereby improving the problem of afterimage.

[0056] In some embodiments, at least two openings 211 are arranged at intervals on the same connecting portion 12 along the extension direction of the connecting portion 12. By arranging at least two openings 211 at intervals on the same connecting portion 12 along the extension direction of the connecting portion 12, on the one hand, the overlapping area between the common electrode 21 and the connecting portion 12 can be reduced, thereby reducing the parasitic capacitance between the common electrode 21 and the connecting portion 12. On the other hand, it can prevent the electric field of the connecting portion 12 from affecting the deflection of liquid crystal molecules and causing light leakage.

[0057] In some embodiments, as Figure 2 As shown, 13 openings 211 are spaced apart and arranged on the same connecting portion 12 along the extending direction of the connecting portion 12. In other embodiments, the number of openings 211 provided on the same connecting portion 12 can be set according to actual needs and is not limited to the number in the above embodiment.

[0058] In some embodiments, combined Figure 2 and Figure 5 As shown, Figure 5This is a film layer diagram of the first electrode layer in the display panel provided in an embodiment of the present application. The display panel also includes multiple data lines 31, which are intersected with multiple connecting portions 12 to define multiple pixel areas PA. The common electrode 21 has multiple hollow portions 212 located in the pixel areas PA and common sub-electrodes 213 located between adjacent hollow portions 212. The angle between the extension direction of the center line connecting any two adjacent openings 211 located on the same connecting portion 12 and the extension direction of the common sub-electrode 213 is less than or equal to 15 degrees. For example, the angle between the extension direction of the center line connecting any two adjacent openings 211 located on the same connecting portion 12 and the extension direction of the common sub-electrode 213 can be 0 degrees, 3 degrees, 5 degrees, 8 degrees, 10 degrees, 12 degrees, or 15 degrees.

[0059] It should be noted that the center of the opening 211 refers to the geometric center of the orthographic projection of the opening 211 on the reference plane. If the angle between the extension direction of the line connecting the centers of any two adjacent openings 211 on the same connecting portion 12 and the extension direction of the common sub-electrode 213 is too large, the electric field at the edge of the opening 211 will diverge, forming a transverse electric field component, causing the liquid crystal molecules at the edge of the opening 211 to rotate in disorder, resulting in light leakage. This embodiment limits the angle between the extension direction of the line connecting the centers of any two adjacent openings 211 on the same connecting portion 12 and the extension direction of the common sub-electrode 213 to within 15 degrees. This prevents the transverse electric field component formed by the electric field divergence at the edge of the opening 211 from coupling with the long axis of the liquid crystal molecules, reduces the influence of the transverse electric field on the liquid crystal molecules, maintains normal liquid crystal molecule deflection control at the edge of the opening 211, and thus avoids light leakage.

[0060] In some embodiments, as Figure 2 As shown, the extension direction of the center line connecting any two adjacent openings 211 located on the same connecting portion 12 is parallel to the extension direction of the common sub-electrode 213, that is, the angle between the extension direction of the center line connecting any two adjacent openings 211 located on the same connecting portion 12 and the extension direction of the common sub-electrode 213 is 0. In this way, the multiple openings 211 on the same connecting portion 12 can be arranged at intervals along the extension direction of the common sub-electrode 213, so as to further reduce the probability of the lateral electric field component formed by the electric field divergence at the edge of the opening 211 coupling with the long axis of the liquid crystal molecules, reduce the influence of the lateral electric field on the liquid crystal molecules, maintain normal liquid crystal molecule deflection control at the edge of the opening 211, and thus further reduce the risk of light leakage.

[0061] In some embodiments, combined Figures 2 to 6 As shown, Figure 6A film layer diagram of the second electrode layer in the display panel provided in an embodiment of the present application, the display panel also includes a second electrode layer 5 arranged in a different layer from the first electrode layer 2, the second electrode layer 5 includes a plurality of block-shaped pixel electrodes 51, each pixel electrode 51 is arranged in a corresponding pixel area PA, the pixel electrode 51 overlaps with the common sub-electrode 213 of the common electrode 21 in the thickness direction of the display panel, and an electric field for controlling the deflection of liquid crystal molecules can be formed between the common electrode 21 and the pixel electrode 51.

[0062] In some embodiments, combined Figure 4 As shown, the second electrode layer 5 is disposed on the first substrate 4 , and the second electrode layer 5 is disposed on the first electrode layer 2 .

[0063] In some embodiments, combined Figures 2 to 6 As shown, the extension direction of the center line connecting any two adjacent openings 211 located on the same connecting portion 12 is perpendicular to the direction of the electric field formed by the common electrode 21 and the pixel electrode 51. In this way, the electric field divergence direction of the edge of the opening 211 can be orthogonal to the arrangement direction of the liquid crystal molecules, further reducing the influence of the lateral electric field on the liquid crystal molecules, thereby further reducing the risk of light leakage, thereby preventing the electric field of the connecting portion 12 from affecting the deflection of the liquid crystal molecules and causing light leakage.

[0064] In some embodiments, the orthographic projection of the opening 211 on the reference plane is separated from the orthographic projection of the pixel electrode 51 on the reference plane, the reference plane is parallel to the light-emitting surface of the display panel, and the direction of the center line connecting any two adjacent openings 211 located on the same connection part 12 is parallel to the extension direction of the side of the pixel electrode 51 close to the opening 211. In this way, it can be further ensured that the extension direction of the center line connecting any two adjacent openings 211 located on the same connection part 12 is perpendicular to the direction of the electric field formed by the common electrode 21 and the pixel electrode 51, so as to ensure that the electric field divergence direction at the edge of the opening 211 is orthogonal to the arrangement direction of the liquid crystal molecules, thereby further reducing the risk of light leakage.

[0065] In some embodiments, the orthographic projection of the common sub-electrode 213 on the reference plane is parallel to the orthographic projection of the pixel electrode 51 on the reference plane.

[0066] In some embodiments, as Figure 2 As shown, the minimum distance between any two adjacent openings 211 on the same connecting portion 12 is greater than or equal to 2 micrometers and less than or equal to 5 micrometers.

[0067] like Figure 2 As shown, the minimum distance between any two adjacent openings 211 on the same connecting portion 12 is the second distance d2. For example, the second distance d2 may be 2 micrometers, 3 micrometers, 4 micrometers, or 5 micrometers.

[0068] It should be noted that if the distance between any two adjacent openings 211 located on the same connecting portion 12 is too small, the process accuracy cannot be achieved, and the adjacent openings 211 will be connected, resulting in the common electrode 21 being unable to effectively shield the electric field of the connecting portion 12, which may easily cause light leakage problems; if the distance between any two adjacent openings 211 located on the same connecting portion 12 is too large, it is impossible to effectively reduce the parasitic capacitance between the common electrode 21 and the connecting portion 12. The embodiments of the present application limit the minimum distance between any two adjacent openings 211 located on the same connecting portion 12 to between 2 microns and 5 microns, which not only prevents light leakage from occurring, but also reduces the parasitic capacitance between the common electrode 21 and the connecting portion 12, thereby reducing the impact of voltage fluctuations in the connecting portion on the voltage of the common electrode, thereby improving the afterimage problem.

[0069] In some embodiments, combined Figure 2 and Figure 3 As shown, the display panel further includes a second conductive layer 3 , which is disposed on the first conductive layer 1 . The second conductive layer 3 includes a data line 31 , a source electrode 32 and a drain electrode 33 . The drain electrode 33 is connected to the data line 31 , and the source electrode 32 is connected to the pixel electrode 51 .

[0070] In some embodiments, as Figure 3 As shown, the display panel 100 also includes a first substrate 4, a second electrode layer 5, a gate insulating layer 6, an active layer 7 and a passivation layer 8. The second electrode layer 5 is arranged on the first substrate 4, the first conductive layer 1 is arranged on the surface of the second electrode layer 5, the gate insulating layer 6 is arranged on the first substrate 4, the first conductive layer 1 and the second electrode layer 5, the active layer 7 is arranged on the gate insulating layer 6, the second conductive layer 3 is arranged on the active layer 7 and the gate insulating layer 6, the passivation layer 8 is arranged on the second conductive layer 3, and the first electrode layer 2 is arranged on the passivation layer 8.

[0071] In some embodiments, as Figure 2 and Figure 3 As shown, the first electrode layer 2 further includes a first conductive electrode 22 , and the source electrode 32 is electrically connected to the pixel electrode 51 through the first conductive electrode 22 .

[0072] In some embodiments, combined Figure 2 and Figure 3 As shown, the active layer 7 includes a plurality of patterned active portions 71 , and the source electrode 32 and the drain electrode 33 are disposed on the active portions 71 .

[0073] In some embodiments, combined Figure 2As shown, the display panel further includes a plurality of pixel driving circuits, each of which includes a transistor T1. The transistor T1 includes a gate 11, which is used to control whether the pixel electrode 51 is connected to or disconnected from the data line 31 via the transistor T1. The common electrode 21 further includes a plurality of openings 214, which extend through the first electrode layer 2 in the thickness direction of the display panel. The openings 214 are arranged between adjacent pixel areas PA. The orthographic projection of the transistor T1 on the reference plane is located within the orthographic projection of the openings 214 on the reference plane. This reduces the overlapping area between the common electrode 21 and the gate 11, thereby reducing the impact of voltage fluctuations of the gate 11 on the voltage of the common electrode 21, thereby further improving the afterimage problem.

[0074] According to the display panel provided in the above embodiment of the present application, the embodiment of the present application further provides a display device, see Figure 7 , Figure 7 This is a schematic diagram of a display device provided in an embodiment of the present application. The display device 1000 includes a display panel 100 and a housing 200. The display panel 100 is disposed on the housing 200. The display panel 100 can be the display panel provided in any of the above embodiments. The display device provided in an embodiment of the present application can achieve the same technical effects as the display panel provided in any of the above embodiments, and will not be described in detail here.

[0075] Beneficial effects of the embodiments of the present application: The embodiments of the present application provide a display panel and a display device, wherein the display panel includes a first conductive layer and a first electrode layer, the first conductive layer includes a plurality of gates and connecting portions connected between adjacent gates, the first electrode layer is arranged on the first conductive layer, the first electrode layer includes a common electrode, the common electrode and the connecting portion overlap in the thickness direction of the display panel, and by providing an opening in the common electrode and making the opening overlap with the connecting portion in the thickness direction of the display panel, the overlapping area of ​​the common electrode and the connecting portion can be reduced, thereby reducing the parasitic capacitance between the common electrode and the connecting portion, thereby reducing the influence of the voltage fluctuation of the connecting portion on the voltage of the common electrode, thereby improving the afterimage situation.

[0076] In the description of this application, the terms "first" and "second" are used for descriptive purposes only and should not be understood to indicate or imply relative importance or implicitly specify the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more features. In the description of this application, "plurality" means two or more, unless otherwise specifically defined.

[0077] In the above embodiments, the description of each embodiment has its own focus. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0078] The embodiments, implementation methods and related technical features of the present application can be combined and replaced with each other without conflict.

[0079] The above are merely preferred embodiments of the present application and do not constitute any form of limitation to the present application. However, any simple modifications, equivalent changes, and modifications made to the above embodiments based on the technical essence of the present application without departing from the content of the technical solution of the present application are still within the scope of the technical solution of the present application.

Claims

1. A display panel, characterized in that: include: A first conductive layer comprising a plurality of gates and connecting portions connecting adjacent gates; a first electrode layer disposed on the first conductive layer, the first electrode layer including a common electrode, wherein the common electrode overlaps with the connecting portion in a thickness direction of the display panel; The common electrode is provided with an opening, and the opening overlaps with the connecting portion in a thickness direction of the display panel.

2. The display panel according to claim 1, wherein An orthographic projection of the opening on the connecting portion is located inside the connecting portion.

3. The display panel according to claim 1, wherein A dimension of the opening in a width direction of the connecting portion is smaller than a width of the connecting portion.

4. The display panel according to claim 3, wherein: A minimum distance between an edge of an orthographic projection of the opening on the connecting portion and an edge of the connecting portion is greater than or equal to 0.5 micrometers and less than or equal to 4 micrometers.

5. The display panel according to claim 1, wherein The diameter of the minimum circumscribed circle of the opening is greater than or equal to 2 micrometers and less than or equal to 5 micrometers.

6. The display panel according to claim 1, wherein: The shape of the opening includes at least one of a circle, an ellipse, a rectangle and a diamond.

7. The display panel according to any one of claims 1 to 6, wherein: The common electrode is provided with a plurality of openings, and orthographic projections of at least two of the openings on the first conductive layer are located in the same connecting portion.

8. The display panel according to claim 7, wherein: At least two of the openings are spaced apart and arranged on the same connecting portion along an extending direction of the connecting portion.

9. The display panel according to claim 8, wherein: The display panel further includes a plurality of data lines, the plurality of data lines are arranged to intersect with the plurality of first conductive layers to define a plurality of pixel areas, the common electrode is provided with a plurality of hollow portions located in the pixel areas, and includes a common sub-electrode located between adjacent hollow portions; Wherein, an angle between an extension direction of a line connecting the centers of any two adjacent openings on the same connecting portion and an extension direction of the common sub-electrode is less than or equal to 15 degrees.

10. The display panel according to claim 9, wherein: An extending direction of a line connecting the centers of any two adjacent openings on the same connecting portion is parallel to an extending direction of the common sub-electrode.

11. The display panel according to claim 9, wherein: The display panel includes a second electrode layer provided in a different layer from the first electrode layer, and the second electrode layer includes a pixel electrode located in the pixel area; Wherein, an extending direction of a line connecting the centers of any two adjacent openings on the same connecting portion is perpendicular to a direction of an electric field formed by the common electrode and the pixel electrode.

12. The display panel according to claim 11, wherein: An orthographic projection of the opening on a reference plane is separated from an orthographic projection of the pixel electrode on the reference plane, and the reference plane is parallel to a light emitting surface of the display panel; The direction of the line connecting the centers of any two adjacent openings on the same connecting portion is parallel to the extending direction of the side of the pixel electrode close to the opening.

13. The display panel according to claim 8, wherein The minimum distance between any two adjacent openings on the same connecting portion is greater than or equal to 2 micrometers and less than or equal to 5 micrometers.

14. A display device, characterized in that: The display panel comprises the display panel according to any one of claims 1 to 13.

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