Photomask data detection method, system, equipment and medium

Abstract

The invention discloses a photomask data detection method, a photomask data detection system, photomask data detection equipment and a medium, which are used for detecting photomask data more meticulously, so that errors in the photomask data can be found more accurately and comprehensively, layout structure errors caused by the errors of the photomask data are avoided, and the correctness of chip functions is ensured. The photomask data detection method provided by the invention comprises the following steps: determining original photomask data of a chip, and determining a first netlist file based on the original photomask data; determining a second netlist file corresponding to original layout data of the chip, wherein the second netlist file is determined based on an original netlist file corresponding to the original layout data; and comparing the first netlist file with the second netlist file, and determining a detection result about whether the original photomask data is correct or not according to a comparison result.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a mask data detection method, system, device and medium. Background Art

[0002] When a design house completes a chip design, it provides a layout file to a wafer fab. The layout file is usually provided to the wafer fab (i.e., an integrated circuit manufacturing plant) by the design house in a specific file format (e.g., a GDS file).

[0003] The wafer fab will convert the layout file sent by the design house into a corresponding mask file (for example, an OAS format file), so that the mask shop can form the layout structure and manufacture the mask.

[0004] However, the graphics on the converted mask file may be different from the graphics on the original layout file. Therefore, the mask data needs to be tested to ensure the accuracy and integrity of the layout structure and avoid chip function failure. Summary of the Invention

[0005] The embodiments of the present application provide a mask data detection method, system, device and medium for achieving more detailed detection of mask data, thereby more accurately and comprehensively discovering errors in the mask data, avoiding mask data errors leading to layout structure errors, and thus ensuring the correctness of chip functions.

[0006] An embodiment of the present application provides a method for detecting mask data, comprising:

[0007] Determining original mask data of the chip, and determining a first netlist file based on the original mask data;

[0008] Determining a second netlist file corresponding to the original layout data of the chip, where the second netlist file is determined based on the original netlist file corresponding to the original layout data;

[0009] The first netlist file is compared with the second netlist file, and a detection result as to whether the original mask data is correct is determined based on the comparison result.

[0010] The embodiment of the present application determines the original mask data of the chip through this method, and determines a first netlist file based on the original mask data; determines a second netlist file corresponding to the original layout data of the chip, and the second netlist file is determined based on the original netlist file corresponding to the original layout data; compares the first netlist file with the second netlist file to obtain a more accurate and detailed comparison result, and determines the detection result of whether the original mask data is correct based on the comparison result, so as to more accurately detect errors in the original mask data, so that when errors exist, the original layout can be adjusted or the mask data can be modified in time to ensure that the mask is correct and ultimately ensure the correct function of the chip.

[0011] In some implementations, determining a first netlist file based on the original mask data includes:

[0012] Converting the original mask data into layout data, and adding a device identification layer to the converted layout data;

[0013] Obtain LVS file for consistency check of layout and circuit diagram;

[0014] The LVS file is used to process the layout data with the device identification layer added thereto, so as to obtain a first netlist file including device information and connection relationship information between devices.

[0015] In some implementations, any of the netlist files includes device information of the chip, and the device information includes device type information;

[0016] The second netlist file is an original netlist file corresponding to the original layout data, and is processed in the following manner:

[0017] Modifying, according to the first netlist file, type information of the same device described in the second netlist file as in the first netlist file, so that the description of the type information of the same device in the second netlist file is the same as that in the first netlist file;

[0018] Alternatively, the second netlist file is the original netlist file corresponding to the original layout data.

[0019] In some embodiments, any of the netlist files includes device information of the chip and connection relationship information between the devices;

[0020] Comparing the first netlist file with the second netlist file includes:

[0021] Through the circuit comparison SVS between the first netlist file and the second netlist file, it is determined whether the device information and the connection relationship information between the devices in the first netlist file and the second netlist file are consistent.

[0022] In some embodiments, determining a detection result for the original mask data according to the comparison result includes:

[0023] If the device information and the connection relationship information between the devices in the first netlist file and the second netlist file are consistent, determining that the original mask data is correct and outputting a prompt message indicating that the original mask data is correct;

[0024] Otherwise, it is determined that an erroneous device connection relationship exists in the original mask data, and prompt information indicating that the original mask data is erroneous is output.

[0025] An embodiment of the present application provides a mask data detection system, comprising:

[0026] A first netlist determining unit, configured to determine original mask data of a chip and determine a first netlist file based on the original mask data;

[0027] a second netlist determining unit, configured to determine a second netlist file corresponding to the original layout data of the chip, wherein the second netlist file is determined based on the original netlist file corresponding to the original layout data;

[0028] The comparison unit is configured to compare the first netlist file with the second netlist file, and determine a detection result on whether the original mask data is correct based on the comparison result.

[0029] In some embodiments, the first netlist determining unit determines a first netlist file based on the original mask data, including:

[0030] Converting the original mask data into layout data, and adding a device identification layer to the converted layout data;

[0031] Obtain LVS file for consistency check of layout and circuit diagram;

[0032] The LVS file is used to process the layout data with the device identification layer added thereto, so as to obtain a first netlist file including device information and connection relationship information between devices.

[0033] In some implementations, any of the netlist files includes device information of the chip, and the device information includes device type information;

[0034] The second netlist file is a netlist file obtained by the second netlist determination unit by processing the original netlist file corresponding to the original layout data in the following manner:

[0035] Modifying, according to the first netlist file, type information of the same device described in the second netlist file as in the first netlist file, so that the description of the type information of the same device in the second netlist file is the same as that in the first netlist file;

[0036] Alternatively, the second netlist determining unit directly uses the original netlist file corresponding to the original layout data as the second netlist file for comparison with the first netlist file.

[0037] In some embodiments, any of the netlist files includes device information of the chip and connection relationship information between the devices;

[0038] The comparing unit compares the first netlist file with the second netlist file, including:

[0039] Through the circuit comparison SVS between the first netlist file and the second netlist file, it is determined whether the device information and the connection relationship information between the devices in the first netlist file and the second netlist file are consistent.

[0040] In some embodiments, the comparing unit determines the detection result for the original mask data according to the comparison result, including:

[0041] If the device information and the connection relationship information between the devices in the first netlist file and the second netlist file are consistent, determining that the original mask data is correct and outputting a prompt message indicating that the original mask data is correct;

[0042] Otherwise, it is determined that an erroneous device connection relationship exists in the original mask data, and prompt information indicating that the original mask data is erroneous is output.

[0043] Another embodiment of the present application provides an electronic device, which includes a memory and a processor, wherein the memory is used to store program instructions, and the processor is used to call the program instructions stored in the memory and execute any of the above methods according to the obtained program.

[0044] Another embodiment of the present application provides a computer-readable storage medium, wherein the computer-readable storage medium stores computer-executable instructions, and the computer-executable instructions are used to enable the computer to execute any of the above methods. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following is a brief introduction to the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0046] Figure 1a A schematic diagram of a graphic in a mask file generated based on a layout file provided in an embodiment of the present application;

[0047] Figure 1b A schematic diagram of an erroneous metal pattern in a mask file provided in an embodiment of the present application;

[0048] Figure 2a A schematic diagram of a graphic in the original layout file provided in the embodiment of this application;

[0049] Figure 2b The embodiments of this application provide Figure 1b A schematic diagram of an actual metal pattern in the original layout file corresponding to the metal pattern with errors in the mask file;

[0050] Figure 3 A schematic diagram of the overall process of a mask data detection method provided in an embodiment of the present application;

[0051] Figure 4a A schematic diagram of a specific process of a mask data detection method provided in an embodiment of the present application;

[0052] Figure 4b A schematic diagram of a specific process of another mask data detection method provided in an embodiment of the present application;

[0053] Figure 5 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application;

[0054] Figure 6 A structural diagram of a mask data detection system provided in an embodiment of the present application. DETAILED DESCRIPTION

[0055] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0056] The embodiments of the present application provide a mask data detection method, system, device and medium for achieving more detailed detection of mask data, thereby more accurately and comprehensively discovering errors in the mask data, avoiding mask data errors leading to layout structure errors, and thus ensuring the correctness of chip functions.

[0057] Among them, the method and system, device, and medium are based on the same application concept. Since the principles of solving problems by the method and system, device, and medium are similar, the implementation of the system, device, medium, and method can refer to each other, and the repeated parts will not be repeated.

[0058] The terms "first", "second", etc. (if any) in the specification and claims of the embodiments of the present application and the above-mentioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequential order. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments described herein can be implemented in a sequence other than that illustrated or described herein. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device comprising a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0059] The following examples and embodiments are to be understood as illustrative examples only. Although this specification may refer to "one," "an," or "some" examples or embodiments at several places, this does not mean that each such reference relates to the same example or embodiment, nor does it mean that the feature applies only to a single example or embodiment. Individual features of different embodiments may also be combined to provide further embodiments. Furthermore, terms such as "comprises" and "comprising" should be understood as not limiting the described embodiments to consisting only of those features already mentioned; such examples and embodiments may also include features, structures, units, modules, etc. that are not specifically mentioned.

[0060] The following describes in detail the various embodiments of the present application in conjunction with the accompanying drawings. It should be noted that the order in which the embodiments of the present application are presented only represents the order of the embodiments, and does not represent the advantages or disadvantages of the technical solutions provided by the embodiments.

[0061] When the chip design is complete, the fab will convert the layout file (GDS format) sent by the design company into a corresponding mask file (for example, an OAS format file) using a free mask calculation formula. Each fab will perform various logical operations (such as size-up, size-down, and, or, etc.) on the graphics in the mask file according to its own process requirements to obtain a new graphic. Therefore, the new graphic will be slightly different from the graphics on the original layout. Therefore, it is necessary to consider how to ensure that the generated mask file improves production yield while ensuring the correct functionality of the original chip.

[0062] Graphics-based comparison can be used to minimize the differences between the mask file and the layout file. However, this type of graphics-based comparison has large errors and cannot intuitively reflect fatal errors such as device connection errors, making it difficult to find errors and requiring manual inspection. The accuracy and efficiency are relatively low.

[0063] Taking the mask production of Read-Only Memory (ROM) as an example, suppose that in JDV (Job DeckView, mask data view), the mask production of the first metal layer (METAL1, referred to as M1) is wrong, such as Figure 1a 、 Figure 1b 、 Figure 2a 、 Figure 2b As shown, the first metal layer in the mask file has a pattern (in Figure 1a ), compared to the graphics at the same coordinate position in the layout file (circled in Figure 2a (circled in the figure), bulges upward, while in the actual layout, Figure 2b As shown, the design of the first metal layer at this coordinate position is rectangular and has no upward protrusion. Figure 1b The erroneous pattern data at the coordinate position in the mask file shown will cause a short circuit between the metal layer at the coordinate position and the contact hole (CONTACT) above the coordinate position, causing ROM function abnormality (failure).

[0064] That is to say, if you follow Figure 1a The chips produced using the mask file obtained from the JDV shown will fail functionally.

[0065] Therefore, the embodiment of the present application generates a netlist file (including chip device information and connection relationship information between devices) based on the original mask data of the chip, and compares the netlist file with the netlist file of the original layout of the chip, so as to obtain a more accurate comparison result. That is to say, the embodiment of the present application prevents mask production errors based on the comparison between the mask file and the original circuit, and logically ensures the correctness of the chip function.

[0066] Example 1:

[0067] See also Figure 3 , an embodiment of the present application provides a mask data detection method, comprising:

[0068] S301, determining original mask data of a chip, and determining a first netlist file based on the original mask data;

[0069] Regarding how to determine the original mask data of the chip, for example, the original mask file in oas format can be obtained directly from the chip design company or wafer fab, etc.; or, the mask image can be obtained from the chip design company or wafer fab, that is, the image format file is obtained, and the mask data therein can be identified through image recognition and other technologies as the original mask data of the chip.

[0070] That is to say, in the embodiment of the present application, the original mask data of the chip can be obtained directly from a third-party system; or relevant files can be obtained from a third-party system, and the relevant files can be processed to obtain the original mask data of the chip. How to determine the original mask data of the chip can be determined according to actual conditions, and the embodiment of the present application does not limit it.

[0071] In some implementations, the first netlist file may be, for example, a text file, including device information of the chip (specifically, including device name, type, etc.), and connection relationship information between devices.

[0072] In some embodiments, the netlist file described in any of the embodiments of the present application can be a text file in the spice format or the spectre format. For example, the spice format text file describes device information and connection relationship information between devices: M1 DGSB nch Width = 1u length = 0.2u. This description information defines a device named M1, a device type of nch metal-oxide field-effect transistor (MOS), whose drain, gate, source, and bulk (i.e., substrate) are respectively connected to the four pins D, G, S, and B. The width of the MOS is 1um and the length is 0.2um.

[0073] In some implementations, determining a first netlist file based on the original mask data includes:

[0074] Converting the original mask data into layout data, and adding a device identification layer to the converted layout data;

[0075] Obtain the Layout Versus Schematic (LVS) file;

[0076] The LVS file is used to process the layout data with the device identification layer added thereto, so as to obtain a first netlist file including device information and connection relationship information between devices.

[0077] In some embodiments, the LVS file may be obtained from a wafer fab;

[0078] In IC design, LVS is a process to ensure that the designed layout is consistent with the original netlist. LVS is divided into two steps:

[0079] The first step is to convert the layout file into a netlist;

[0080] The second step is to compare this netlist with the original netlist to find out the differences so that the layout designer can modify the layout.

[0081] Then, the above-mentioned use of the LVS file to process the layout data with the device identification layer added is to use the first step of the above-mentioned LVS process to obtain a netlist for the layout with the device identification layer added.

[0082] S302: Determine a second netlist file corresponding to the original layout data of the chip, where the second netlist file is determined based on the original netlist file corresponding to the original layout data;

[0083] In some implementations, any of the netlist files includes device information of the chip, and the device information includes device type information;

[0084] For example, in the layout data after adding the device identification layer, the MOS transistor named M1 is identified as a high-voltage 2.5V MOS transistor in the first step of the LVS process. However, in the original layout and netlist, the MOS transistor named M1 is actually a high-voltage 2.5V overdrive 3.3V MOS transistor. The two device types use the same mask in actual production.

[0085] Therefore, the second netlist file is a netlist file obtained by processing the original netlist file corresponding to the original layout data in the following manner:

[0086] Based on the first netlist file, the type information of the same device described in the second netlist file as in the first netlist file is modified so that the type information of the same device in the second netlist file is the same as that in the first netlist file. This ensures that the type of the same device described in the first netlist file and the second netlist file is the same, thus avoiding inconsistent comparison results between the first netlist file and the second netlist file due to different device type information for the same device. For example, the type information of the MOS transistor named M1 in the second netlist file is changed to a high-voltage 2.5V MOS transistor, which is consistent with the type information of the MOS transistor named M1 in the first netlist file.

[0087] Alternatively, the second netlist file is the original netlist file corresponding to the original layout data (ie, the device type information may not be replaced).

[0088] S303: Compare the first netlist file with the second netlist file, and determine, based on the comparison result, whether the original mask data is correct.

[0089] In some embodiments, any of the netlist files includes device information of the chip and connection relationship information between the devices;

[0090] Comparing the first netlist file with the second netlist file includes:

[0091] By performing a circuit comparison (Schematic vs. Schematic, SVS) between the first netlist file and the second netlist file, it is determined whether the device information and the connection relationship information between the devices in the first netlist file and the second netlist file are consistent.

[0092] The SVS process described here is equivalent to the second step of the above-mentioned LVS process, which is to confirm whether the first netlist file and the second netlist file are consistent, thereby confirming whether there is any inconsistency in the connection relationship information between the components and / or the inconsistency in the component type information between the first netlist file and the second netlist file. Specifically:

[0093] For example, the inconsistency of the connection relationship information between devices means: if the gate terminal of a MOS in the first netlist file is in a floating state (i.e., not connected to any electrode), while the gate terminal of the MOS is connected to a certain net in the second netlist file, the SVS process will detect the inconsistent information at this location. Based on this inconsistent information, the mask of all connection layers of the gate terminal of the MOS can be checked later, such as the various polysilicon (POLY) layers, connection wire (CONTACT) layers, metal wire (Metal) layers connected to the gate terminal of the MOS, to determine whether the inconsistency of the device connection relationship is caused by a manufacturing error.

[0094] Inconsistency in device type information refers to the inconsistency between the type of a particular device identified in the first netlist file and the modified second netlist file. This inconsistency is due to the different photomasks used in the actual generation of the two device types, and cannot be unified through modification in step S302. For example, if the first netlist file identifies a low-voltage MOS transistor with the device name M1, but the original layout and netlist show that the MOS transistor with the device name M1 is actually a high-voltage MOS transistor, this indicates an error in the high-voltage photomask production.

[0095] In some embodiments, determining a detection result for the original mask data according to the comparison result includes:

[0096] If the device information and the connection relationship information between the devices in the first netlist file and the second netlist file are consistent, that is, the first netlist file and the second netlist file are consistent, then determining that the original mask data is correct and outputting a prompt message that the original mask data is correct;

[0097] Otherwise, it is determined that an erroneous device connection relationship exists in the original mask data, and prompt information indicating that the original mask data is erroneous is output.

[0098] In some embodiments, the prompt information of the error in the original mask data includes, for example, marking information at the error position on the original mask data and / or the original layout data, and the marking information includes, for example, the position coordinates of the error graphic, the corresponding device, the connection relationship between the device and other devices, and other information.

[0099] In some embodiments, a prompt message indicating whether the original mask data is correct can be output to the wafer fab so that the wafer fab can make corresponding processing. When there is an error, the original layout can be adjusted in time, or the mask data can be modified to ensure the consistency of the mask and layout, and ultimately ensure the correct function of the chip.

[0100] The following provides some more specific examples of the mask data detection method process with reference to the accompanying drawings.

[0101] Example 2:

[0102] See also Figure 4a , a mask data detection method provided by an embodiment of the present application includes:

[0103] S401, obtaining original mask data of the chip;

[0104] The original mask data of the chip is, for example, a mask file in oas format, or a picture file in jpg / png format.

[0105] S402, converting the original mask data into corresponding layout data;

[0106] For example, the original mask data is imported into chip design software through format conversion to form layout data in cdb or OA format.

[0107] S403, adding a device identification layer to the layout data;

[0108] Specifically, the process design files provided by the wafer fab describe the definition and identification of different device types in the layout. These layout layers that are used to identify devices in the layout but do not have actual masks are called device identification layers. For example, multiple layers of metal stacking in the process will form a metal capacitor (MOM), and if there is no corresponding identification layer, the LVS file cannot be directly used to identify it as the MOM capacitor defined in the netlist file, so it cannot match the MOM capacitor defined in the original netlist. Therefore, we need to add a (MOM dummy) device identification layer to assist LVS in identifying this MOM capacitor. In the original layout, there is a layer called (MOM dummy), but this layer is not related to mask production, so this layer will be discarded in the JDV file.

[0109] S404: Using the LVS file, process the layout data with the device identification layer added thereto to generate a first netlist file including the devices of the chip and the connection relationships between the devices;

[0110] Specifically, for example, in the layout data generated in step S402, by adding a device identification layer corresponding to the process, it can pass the back-end signoff software and use the layout and logic diagram consistency check file (Layout Versus Schematic, LVS) provided by the wafer factory to generate a corresponding netlist file (i.e., the first netlist file) with the chip device information and the direct connection information of the device.

[0111] S405, obtaining the original layout file of the chip;

[0112] S406, generating an original netlist file of the chip using the original layout file of the chip;

[0113] S407a, modifying the original netlist file of the chip according to the first netlist file, replacing the type information of the same device, and obtaining a second netlist file;

[0114] S408 , determining whether the first netlist file is consistent with the second netlist file; if so, executing step S409 ; otherwise, executing step S410 .

[0115] By comparing the first and second netlist files (Schematic vs. Schematic, SVS), i.e., circuit comparison, it is determined whether the device information and the connection relationship information between the two are consistent. If the two are consistent, it means that the original mask data is correct.

[0116] S409, outputting a prompt message that the original mask data is correct;

[0117] S410, determining whether there is an erroneous device connection relationship in the original mask data;

[0118] That is, this step determines the devices, connection relationships and other information that are inconsistent between the first netlist file and the second netlist file;

[0119] S411, determining coordinate information corresponding to the original layout data according to the location of the incorrect device connection relationship in the original mask data, and generating error prompt information;

[0120] S412: Outputting prompt information indicating that the original mask data is wrong.

[0121] The error information ultimately fed back to the foundry includes the coordinates of a specific mask layer in the mask file, located by device and connection relationships. For example, if the connection relationship error is caused by the metal 1 mask, the coordinate information of the metal 1 mask error will be fed back to the foundry.

[0122] That is to say, if the first netlist file and the second netlist file are inconsistent, the device involved in the inconsistent connection relationship is found, the position of the device is marked in the original layout file, and then the coordinates of the device position are used to find the incorrect pattern of the device's mask production, and feedback is given to the wafer factory to avoid chip failure.

[0123] Example 3:

[0124] See also Figure 4b , a mask data detection method provided by an embodiment of the present application includes:

[0125] S401, obtaining original mask data of the chip;

[0126] S402, converting the original mask data into corresponding layout data;

[0127] S403, adding a device identification layer to the layout data;

[0128] S404: Using the LVS file, process the layout data with the device identification layer added thereto to generate a first netlist file including the devices of the chip and the connection relationships between the devices;

[0129] S405, obtaining the original layout file of the chip;

[0130] S406, generating an original netlist file of the chip using the original layout file of the chip;

[0131] S407b, using the original netlist file of the chip as a second netlist file for comparison with the first netlist file;

[0132] In this embodiment, steps S401 to S404 and steps S405 to S407b can be executed in parallel. Figure 4b As shown, the steps may also be performed sequentially, that is, after step S404 is completed, step S405 is started.

[0133] S408 , determining whether the first netlist file is consistent with the second netlist file; if so, executing step S409 ; otherwise, executing step S410 .

[0134] S409, outputting a prompt message that the original mask data is correct;

[0135] S410, determining whether there is an erroneous device connection relationship in the original mask data;

[0136] S411, determining coordinate information corresponding to the original layout data according to the location of the incorrect device connection relationship in the original mask data, and generating error prompt information;

[0137] S412: Outputting prompt information indicating that the original mask data is wrong.

[0138] The difference between this third embodiment and the second embodiment lies in that step S407b is different from step S407a. That is, in this embodiment, the original netlist file corresponding to the original layout data is directly used as the second netlist file for comparison with the first netlist file. The other steps are the same and will not be further explained or illustrated.

[0139] To sum up, the embodiment of the present application generates a netlist file based on the original mask data and compares the netlist file with the netlist file of the original layout to obtain a more accurate comparison result. Based on the result, it is judged whether the original mask data is correct, and errors can be found more accurately. When errors exist, the original layout can be adjusted in time to ensure the correctness of the JDV mask and thus ensure the normal function of the chip.

[0140] The following is an introduction to the device or system provided in the embodiments of the present application, in which the explanations or examples of technical features that are the same as or corresponding to those described in the above method are not repeated hereafter.

[0141] An electronic device provided in an embodiment of the present application, see Figure 5 , for example:

[0142] The processor 500 is configured to read the program in the memory 520 and execute the following process:

[0143] Determining original mask data of the chip, and determining a first netlist file based on the original mask data;

[0144] Determining a second netlist file corresponding to the original layout data of the chip, where the second netlist file is determined based on the original netlist file corresponding to the original layout data;

[0145] The first netlist file is compared with the second netlist file, and a detection result as to whether the original mask data is correct is determined based on the comparison result.

[0146] In some embodiments, the processor 500 reads a program in the memory 520 and executes a process of determining a first netlist file based on the original mask data, including:

[0147] Converting the original mask data into layout data, and adding a device identification layer to the converted layout data;

[0148] Obtain LVS file for consistency check of layout and circuit diagram;

[0149] The LVS file is used to process the layout data with the device identification layer added thereto, so as to obtain a first netlist file including device information and connection relationship information between devices.

[0150] In some implementations, any of the netlist files includes device information of the chip, and the device information includes device type information;

[0151] The second netlist file is an original netlist file corresponding to the original layout data, and is processed in the following manner:

[0152] Modifying, according to the first netlist file, type information of the same device described in the second netlist file as in the first netlist file, so that the description of the type information of the same device in the second netlist file is the same as that in the first netlist file;

[0153] Alternatively, the second netlist file is the original netlist file corresponding to the original layout data.

[0154] In some embodiments, any of the netlist files includes device information of the chip and connection relationship information between the devices;

[0155] The processor 500 reads the program in the memory 520 and executes the comparison of the first netlist file with the second netlist file, including:

[0156] Through the circuit comparison SVS between the first netlist file and the second netlist file, it is determined whether the device information and the connection relationship information between the devices in the first netlist file and the second netlist file are consistent.

[0157] In some embodiments, the processor 500 reads a program in the memory 520 and determines a detection result for the original mask data based on the comparison result, including:

[0158] If the device information and the connection relationship information between the devices in the first netlist file and the second netlist file are consistent, determining that the original mask data is correct and outputting a prompt message indicating that the original mask data is correct;

[0159] Otherwise, it is determined that an erroneous device connection relationship exists in the original mask data, and prompt information indicating that the original mask data is erroneous is output.

[0160] The transceiver 510 is configured to receive and send data under the control of the processor 500 .

[0161] Among them, Figure 5In the embodiment, the bus architecture may include any number of interconnected buses and bridges, specifically linking together various circuits of one or more processors represented by processor 500 and memory represented by memory 520. The bus architecture may also link together various other circuits such as peripheral devices, voltage regulators, and power management circuits, which are all well known in the art and, therefore, will not be described further herein. The bus interface provides an interface. The transceiver 510 may be a plurality of components, namely, a transmitter and a receiver, providing a unit for communicating with various other systems on a transmission medium, such as a wireless channel, a wired channel, an optical cable, and the like. For different user devices, the user interface 530 may also be an interface capable of connecting external or internal devices as required, and the connected devices include but are not limited to a keypad, a display, a speaker, a microphone, a joystick, and the like.

[0162] The processor 500 is responsible for managing the bus architecture and general processing, and the memory 520 can store data used by the processor 500 when performing operations.

[0163] In some embodiments, the processor 500 may be a CPU (central processing unit), an ASIC (Application Specific Integrated Circuit), an FPGA (Field-Programmable Gate Array), or a CPLD (Complex Programmable Logic Device), and the processor may also adopt a multi-core architecture.

[0164] The processor calls the computer program stored in the memory to execute any of the methods provided in the embodiments of the present application according to the obtained executable instructions. The processor and the memory can also be arranged physically separately.

[0165] It should be noted here that the above-mentioned system provided in the embodiment of the present application can implement all the method steps implemented in the above-mentioned method embodiment and can achieve the same technical effect. The parts and beneficial effects of this embodiment that are the same as those in the method embodiment will not be described in detail here.

[0166] See also Figure 6 , an embodiment of the present application provides a mask data detection system, comprising:

[0167] A first netlist determining unit 601 is configured to determine original mask data of a chip and determine a first netlist file based on the original mask data;

[0168] A second netlist determining unit 602 is configured to determine a second netlist file corresponding to the original layout data of the chip, wherein the second netlist file is determined based on the original netlist file corresponding to the original layout data;

[0169] The comparison unit 603 is configured to compare the first netlist file with the second netlist file, and determine a detection result on whether the original mask data is correct based on the comparison result.

[0170] In some implementations, the first netlist determining unit 601 determines the first netlist file based on the original mask data, including:

[0171] The first netlist determination unit 601 converts the original mask data into layout data, and adds a device identification layer to the converted layout data;

[0172] The first netlist determination unit 601 obtains the layout and circuit diagram consistency check LVS file;

[0173] The first netlist determining unit 601 uses the LVS file to process the layout data with the device identification layer added thereto, and obtains a first netlist file including device information and connection relationship information between devices.

[0174] In some implementations, any of the netlist files includes device information of the chip, and the device information includes device type information;

[0175] The second netlist file is a netlist file obtained by the second netlist determining unit 602 by processing the original netlist file corresponding to the original layout data in the following manner:

[0176] The second netlist determining unit 602 modifies, based on the first netlist file, type information of the same device described in the second netlist file as in the first netlist file, so that the type information of the same device described in the second netlist file is the same as that described in the first netlist file;

[0177] Alternatively, the second netlist determining unit 602 directly uses the original netlist file corresponding to the original layout data as the second netlist file for comparison with the first netlist file.

[0178] In some embodiments, any of the netlist files includes device information of the chip and connection relationship information between the devices;

[0179] The comparing unit 603 compares the first netlist file with the second netlist file, including:

[0180] The comparison unit 603 determines whether the device information and the connection relationship information between the devices in the first netlist file and the second netlist file are consistent through the circuit comparison SVS between the first netlist file and the second netlist file.

[0181] In some embodiments, the comparison unit 603 determines the detection result for the original mask data according to the comparison result, including:

[0182] If the device information and the connection relationship information between the devices in the first netlist file and the second netlist file are consistent, the comparison unit 603 determines that the original mask data is correct and outputs a prompt message indicating that the original mask data is correct;

[0183] Otherwise, the comparison unit 603 determines that there is an erroneous device connection relationship in the original mask data, and outputs prompt information indicating that the original mask data is erroneous.

[0184] It should be noted that the division of units in the embodiments of the present application is schematic and is merely a logical functional division. In actual implementation, other division methods may be used. Furthermore, the functional units in the various embodiments of the present application may be integrated into a single processing unit, or each unit may exist physically separately, or two or more units may be integrated into a single unit. The aforementioned integrated units may be implemented in the form of hardware or software functional units.

[0185] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application is essentially or the part that contributes to the prior art or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a number of instructions for enabling a computer device (which can be a personal computer, a server, or a network device, etc.) or a processor to execute all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes: various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.

[0186] Any of the devices or systems provided in the embodiments of the present application may specifically be a desktop computer, a portable computer, a smart phone, a tablet computer, a personal digital assistant (PDA), etc. The device or system may include a central processing unit (CPU), a memory, input / output devices, etc. Input devices may include a keyboard, a mouse, a touch screen, etc. Output devices may include a display device, such as a liquid crystal display (LCD) or a cathode ray tube (CRT).

[0187] The memory may include a read-only memory (ROM) and a random access memory (RAM), and provides program instructions and data stored in the memory to the processor. In an embodiment of the present application, the memory may be used to store the program of any of the methods provided in the embodiments of the present application.

[0188] The processor calls the program instructions stored in the memory, and the processor is used to execute any of the methods provided in the embodiments of the present application according to the obtained program instructions.

[0189] The present application embodiment also provides a computer program product or computer program, which includes computer instructions, which are stored in a computer-readable storage medium. The processor of the computer device reads the computer instructions from the computer-readable storage medium, and the processor executes the computer instructions so that the computer device performs any of the methods described in the above embodiments. The program product can adopt any combination of one or more readable media. The readable medium can be a readable signal medium or a readable storage medium. The readable storage medium can be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, system or device, or any combination of the above. More specific examples of readable storage media (non-exhaustive list) include: an electrical connection with one or more wires, a portable disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above.

[0190] The present invention provides a computer-readable storage medium for storing computer program instructions used by the system provided in the above-mentioned embodiments of the present invention, which includes a program for executing any of the methods provided in the above-mentioned embodiments of the present invention. The computer-readable storage medium may be a non-transitory computer-readable medium.

[0191] The computer-readable storage medium can be any available medium or data storage device that can be accessed by a computer, including but not limited to magnetic storage (such as floppy disks, hard disks, magnetic tapes, magneto-optical disks (MO), etc.), optical storage (such as CDs, DVDs, BDs, HVDs, etc.), and semiconductor storage (such as ROMs, EPROMs, EEPROMs, non-volatile memories (NANDFLASH), solid-state drives (SSDs)), etc.

[0192] Those skilled in the art will appreciate that the embodiments of the present application can be provided as methods, systems, or computer program products. Therefore, the present application can adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment in combination with software and hardware. Moreover, the present application can adopt the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to magnetic disk storage and optical storage, etc.) that contain computer-usable program code.

[0193] The present application is described with reference to the flow chart and / or block diagram of the method, device (system) and computer program product according to the embodiment of the present application. It should be understood that each flow process and / or box in the flow chart and / or block diagram and the combination of the flow process and / or box in the flow chart and / or block diagram can be realized by computer program instructions. These computer program instructions can be provided to the processor of a general-purpose computer, a special-purpose computer, an embedded processing machine or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device produce a system for realizing the function specified in one flow chart flow or multiple flows and / or one box or multiple boxes of the block diagram.

[0194] These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce a manufactured product including an instruction system that implements the functions specified in one or more processes in the flowchart and / or one or more boxes in the block diagram.

[0195] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, so that the instructions executed on the computer or other programmable device provide steps for implementing the functions specified in one or more processes in the flowchart and / or one or more boxes in the block diagram.

[0196] Obviously, those skilled in the art may make various changes and modifications to this application without departing from the spirit and scope of this application. Thus, if these modifications and variations of this application fall within the scope of the claims of this application and their equivalents, this application is intended to include these modifications and variations.

Claims

1. A mask data detection method, characterized in that: The method comprises: Determining original mask data of the chip, and determining a first netlist file based on the original mask data; Determining a second netlist file corresponding to the original layout data of the chip, where the second netlist file is determined based on the original netlist file corresponding to the original layout data; The first netlist file is compared with the second netlist file, and a detection result as to whether the original mask data is correct is determined based on the comparison result.

2. The method according to claim 1, characterized in that Determining a first netlist file based on the original mask data includes: Converting the original mask data into layout data, and adding a device identification layer to the converted layout data; Obtain LVS file for consistency check of layout and circuit diagram; The LVS file is used to process the layout data with the device identification layer added thereto, so as to obtain a first netlist file including device information and connection relationship information between devices.

3. The method according to claim 1, characterized in that Any of the netlist files includes device information of the chip, wherein the device information includes device type information; The second netlist file is an original netlist file corresponding to the original layout data, and is processed in the following manner: Modifying, according to the first netlist file, type information of the same device described in the second netlist file as in the first netlist file, so that the description of the type information of the same device in the second netlist file is the same as that in the first netlist file; Alternatively, the second netlist file is the original netlist file corresponding to the original layout data.

4. The method according to claim 1, wherein Any of the netlist files includes device information of the chip and connection relationship information between the devices; Comparing the first netlist file with the second netlist file includes: Through the circuit comparison SVS between the first netlist file and the second netlist file, it is determined whether the device information and the connection relationship information between the devices in the first netlist file and the second netlist file are consistent.

5. The method according to claim 4, characterized in that Determining a detection result for the original mask data according to the comparison result includes: If the device information and the connection relationship information between the devices in the first netlist file and the second netlist file are consistent, determining that the original mask data is correct and outputting a prompt message indicating that the original mask data is correct; Otherwise, it is determined that an erroneous device connection relationship exists in the original mask data, and prompt information indicating that the original mask data is erroneous is output.

6. A mask data detection system, characterized in that: The system comprises: A first netlist determining unit, configured to determine original mask data of a chip and determine a first netlist file based on the original mask data; a second netlist determining unit, configured to determine a second netlist file corresponding to the original layout data of the chip, wherein the second netlist file is determined based on the original netlist file corresponding to the original layout data; The comparison unit is configured to compare the first netlist file with the second netlist file, and determine a detection result on whether the original mask data is correct based on the comparison result.

7. The system according to claim 6, characterized in that The first netlist determining unit determines a first netlist file based on the original mask data, including: Converting the original mask data into layout data, and adding a device identification layer to the converted layout data; Obtain LVS file for consistency check of layout and circuit diagram; The LVS file is used to process the layout data with the device identification layer added thereto, so as to obtain a first netlist file including device information and connection relationship information between devices.

8. The system according to claim 6, wherein: Any of the netlist files includes device information of the chip, wherein the device information includes device type information; The second netlist file is a netlist file obtained by the second netlist determination unit by processing the original netlist file corresponding to the original layout data in the following manner: Modifying, according to the first netlist file, type information of the same device described in the second netlist file as in the first netlist file, so that the description of the type information of the same device in the second netlist file is the same as that in the first netlist file; Alternatively, the second netlist determining unit directly uses the original netlist file corresponding to the original layout data as the second netlist file for comparison with the first netlist file.

9. An electronic device, characterized in that: include: a memory for storing program instructions; A processor is configured to call the program instructions stored in the memory and execute the method according to any one of claims 1 to 5 according to the obtained program.

10. A computer-readable storage medium, characterized in that The computer-readable storage medium stores computer-executable instructions, and the computer-executable instructions are used to enable the computer to execute the method according to any one of claims 1 to 5.

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