Millimeter wave radar data parallel pipeline filtering method, device and equipment based on FPGA and storage medium

Abstract

The invention provides an FPGA-based millimeter-wave radar data parallel pipeline filtering method, device and equipment and a storage medium, and the method comprises the steps: receiving echo data of a millimeter-wave radar in real time, and alternately writing the continuous echo data into a first buffer region and a second buffer region through a double-buffer structure; the method comprises the following steps: receiving full frame data through a three-line queue, and dividing a currently processed scanning line in the three-line queue into n blocks; performing parallel filtering on the jth sampling point in any block and the front scanning line and the rear scanning line at the corresponding position, and generating filtered data; and calculating a self-adaptive threshold based on the statistical characteristics of each block, comparing the self-adaptive threshold with the filtered data, suppressing noise signals lower than the self-adaptive threshold according to a comparison result, and selecting a result with the highest energy as final output by comparing signal energy of corresponding positions of the three lines. The problem that resource occupation is too high when echo signals of the millimeter wave radar are processed on an existing FPGA is solved.

Description

Technical Field

[0001] The present invention relates to the field of radar, and in particular to a method, device, equipment and storage medium for parallel pipeline filtering of millimeter-wave radar data based on FPGA. Background Art

[0002] Millimeter-wave radar is widely used in various fields, attracting considerable attention for its high resolution and anti-interference capabilities. However, the raw echo signals collected by millimeter-wave radar often contain a large amount of noise, clutter, and multipath interference, requiring real-time filtering to improve the signal-to-noise ratio and target detection accuracy.

[0003] Traditional software filtering methods rely on general-purpose processors (CPUs / GPUs) to execute complex algorithms. While these algorithms are flexible and diverse, they struggle to meet real-time requirements in high-throughput and low-latency scenarios. Existing FPGA implementations often use dedicated IP cores or highly complex filtering algorithms, resulting in excessive resource utilization and increased power consumption. Furthermore, they present significant challenges in portability and secondary development, hindering deployment on resource-constrained radar front-ends or embedded platforms.

[0004] In view of this, this application is filed. Summary of the Invention

[0005] The present invention discloses a method, device, equipment and storage medium for parallel pipeline filtering of millimeter-wave radar data based on FPGA, aiming to solve the problem of excessive resource occupation when processing echo signals of millimeter-wave radar on existing FPGA.

[0006] The first embodiment of the present invention provides a millimeter-wave radar data parallel pipeline filtering method based on FPGA, comprising:

[0007] Receive the echo data of the millimeter-wave radar in real time, and write the continuous echo data alternately into the first buffer and the second buffer using a double buffer structure;

[0008] receiving full frame data from a first buffer or a second buffer through a three-line queue, and dividing a scan line currently being processed in the three-line queue into n blocks; wherein the first buffer and the second buffer are pushed to the three-line queue when a write counter reaches a preset value;

[0009] Parallel filtering is performed on the j-th sampling point and the preceding and following scan lines of the corresponding position in any block, and filtered data is generated; wherein the filtering includes weighted average filtering, median filtering and differential enhancement;

[0010] An adaptive threshold is calculated based on the statistical characteristics of each block, and the adaptive threshold is compared with the filtered data. Noise signals below the adaptive threshold are suppressed according to the comparison result. By comparing the signal energies of the corresponding positions of the three lines, the result with the highest energy is selected as the final output, while the original signal characteristics of the detected edge points are retained.

[0011] Preferably, the double buffer structure is used to alternately write the continuous echo data into the first buffer and the second buffer, specifically:

[0012] Create a first buffer Buffer_A and a second buffer Buffer_B with a capacity of 1024×8 bits, and use the buffer selection signal buffer_select to control the data flow, where:

[0013] When buffer_select=0, the newly received scan line data is written to Buffer_A, and the stored scan line data is read from Buffer_B for processing;

[0014] When buffer_select=1, the newly received scan line data is written to Buffer_B, and the stored scan line data is read from Buffer_A for processing;

[0015] When a buffer is filled with 1024 sampling points, the value of the buffer_select signal is automatically switched.

[0016] Preferably, the three-line queue is three data buffers line_prev, line_curr and line_next, each buffer has a capacity of 1024×8 bits;

[0017] When the first scan line is received, it is stored in line_curr and the status is marked as "a line";

[0018] When the second scan line is received, the first scan line is moved from line_curr to line_prev, the second scan line is stored in line_curr, and the state is marked as two lines;

[0019] Starting from the third scan line, each time a new scan line is received, the new data enters line_next, line_next moves to line_curr, line_curr moves to line_prev, and the status is marked as three lines.

[0020] Preferably, the weighted average filtering is specifically as follows: for each sampling point position j, a weighted average value of the positions corresponding to the three scan lines is calculated:

[0021] avg_result(j)=(line_prev(j)+2×line_curr(j)+line_next(j))÷4, where the multiplication by 2 is achieved by shifting the data left by 1 bit, and the division by 4 is achieved by shifting the data right by 2 bits;

[0022] The median filter is specifically as follows: for three consecutive sampling points a, b, and c, the maximum value max_val and the minimum value min_val are found through comparison operation, and the median is calculated:

[0023] med_val=a+b+c-max_val-min_val;

[0024] The difference enhancement is specifically as follows: calculating the forward difference of each sampling point:

[0025] diff_forward(j)=data_curr(j)-data_curr(j-1);

[0026] Compute the backward difference at each sample point:

[0027] diff_backward(j)=data_curr(j)-data_curr(j+1);

[0028] The maximum of the two difference absolute values ​​is taken as the difference enhancement factor:

[0029] diff_enhance=max(|diff_forward|,|diff_backward|);

[0030] The differential enhancement factor is superimposed on the filtering result to highlight edge features.

[0031] Preferably, the adaptive threshold is calculated based on the statistical characteristics of each block, the adaptive threshold is compared with the filtered data, and noise signals below the adaptive threshold are suppressed according to the comparison result, specifically:

[0032] Calculate statistical parameters for each 32-point block: block_sum, maximum value block_max, minimum value block_min;

[0033] Calculate the block average: block_avg = block_sum ÷ 32;

[0034] Calculate the block dynamic range: block_range = block_max - block_min;

[0035] Generate adaptive threshold: T = block_avg + (block_range ÷ 4);

[0036] The filtering result of each sampling point in the block is compared with the threshold T, the signal greater than the threshold is retained, and the noise less than or equal to the threshold is suppressed.

[0037] A second embodiment of the present invention provides a millimeter-wave radar data parallel pipeline filtering device based on FPGA, comprising:

[0038] A double-buffer processing unit, configured to receive echo data from the millimeter-wave radar in real time and alternately write the continuous echo data into a first buffer and a second buffer using a double-buffer structure;

[0039] A three-line processing unit is configured to receive full frame data from a first buffer or a second buffer through a three-line queue, and divide a scan line currently being processed in the three-line queue into n blocks; wherein the first buffer and the second buffer are pushed to the three-line queue when a write counter reaches a preset value;

[0040] A filtering unit, configured to perform parallel filtering on the j-th sampling point and the preceding and following scan lines of the corresponding position in any block, and generate filtered data; wherein the filtering includes weighted average filtering, median filtering, and differential enhancement;

[0041] The adaptive threshold processing unit is used to calculate the adaptive threshold based on the statistical characteristics of each block, compare the adaptive threshold with the filtered data, and suppress the noise signal below the adaptive threshold according to the comparison result. By comparing the signal energy of the corresponding positions of the three lines, the result with the highest energy is selected as the final output, and the original signal characteristics of the detected edge points are retained.

[0042] A third embodiment of the present invention provides an FPGA-based millimeter-wave radar data parallel pipeline filtering device, characterized in that it includes a memory and a processor, the memory storing a computer program, and the computer program can be executed by the processor to implement an FPGA-based millimeter-wave radar data parallel pipeline filtering method as described in any one of the above.

[0043] A fourth embodiment of the present invention provides a computer-readable storage medium, characterized in that it stores a computer program, and the computer program can be executed by a processor of the device where the computer-readable storage medium is located to implement an FPGA-based millimeter-wave radar data parallel pipeline filtering method as described in any one of the above items.

[0044] The present invention provides an FPGA-based millimeter-wave radar data parallel pipeline filtering method, device, equipment, and storage medium. The method receives millimeter-wave radar echo data in real time and alternately writes continuous echo data into a first buffer and a second buffer using a double-buffered structure. A full frame of data from either the first buffer or the second buffer is received via a three-line queue, and the currently processed scan line in the three-line queue is divided into n blocks. Parallel filtering is then performed on the jth sampling point within any block and the preceding and following scan lines at its corresponding position, generating filtered data. An adaptive threshold is calculated based on the statistical characteristics of each block, and the adaptive threshold is compared with the filtered data. Noise signals below the adaptive threshold are suppressed based on the comparison result. The signal energy at the corresponding positions of the three lines is compared, and the result with the highest energy is selected as the final output. The original signal characteristics of detected edge points are also preserved. This method solves the problem of excessive resource usage when processing millimeter-wave radar echo signals on existing FPGAs. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] Figure 1 1 is a flow chart of a parallel pipeline filtering method for millimeter-wave radar data based on FPGA provided by the first embodiment of the present invention;

[0046] Figure 2 This is a module diagram of a millimeter-wave radar data parallel pipeline filtering device based on FPGA provided by the second embodiment of the present invention. DETAILED DESCRIPTION

[0047] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0048] In order to better understand the technical solution of the present invention, the embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0049] It should be understood that the embodiments described are only a portion of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without creative work are within the scope of protection of the present invention.

[0050] The terms used in the embodiments of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. The singular forms "a", "an", "the" and "the" used in the embodiments of the present invention and the appended claims are also intended to include plural forms unless the context clearly indicates otherwise.

[0051] It should be understood that the term "and / or" as used herein is merely a description of the relationship between associated objects, indicating that three possible relationships exist. For example, "A and / or B" can represent: A exists alone, A and B exist simultaneously, or B exists alone. Furthermore, the character " / " in this document generally indicates that the associated objects are in an "or" relationship.

[0052] The word "if," as used herein, may be interpreted as "at the time of" or "when" or "in response to determining" or "in response to detecting," depending on the context. Similarly, the phrases "if it is determined" or "if (stated condition or event) is detected" may be interpreted as "when it is determined" or "in response to the determination" or "when detecting (stated condition or event)" or "in response to detecting (stated condition or event)," depending on the context.

[0053] The terms "first" and "second" in the embodiments are merely used to distinguish similar objects and do not represent a specific ordering of the objects. It is understood that the terms "first" and "second" may interchangeably represent a specific order or precedence where permitted. It should be understood that the terms "first" and "second" may interchangeably represent objects where appropriate, such that the embodiments described herein can be implemented in an order other than that illustrated or described herein.

[0054] The specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0055] The present invention discloses a method, device, equipment and storage medium for parallel pipeline filtering of millimeter-wave radar data based on FPGA, aiming to solve the problem of excessive resource occupation when processing echo signals of millimeter-wave radar on existing FPGA.

[0056] The first embodiment of the present invention provides an FPGA-based millimeter-wave radar data parallel pipeline filtering method, which can be performed by an FPGA-based millimeter-wave radar data parallel pipeline filtering device (hereinafter referred to as the filtering device). In particular, it is performed by one or more processors in the filtering device to implement at least the following steps:

[0057] S101, receiving echo data from a millimeter-wave radar in real time, and alternately writing continuous echo data into a first buffer and a second buffer using a double buffer structure;

[0058] In this embodiment, the filtering device can be a terminal with data processing capabilities such as a desktop computer or a server, which can establish a communication connection with the millimeter wave radar. The filtering device can be installed with a corresponding operating system and application software, and the functions required by this embodiment can be realized through the combination of the operating system and application software.

[0059] It should be noted that the filtering device first receives a continuous stream of echo samples from the millimeter-wave radar front end at the ADC interface. To ensure data reception, two 1024×8-bit memory areas, called Buffer_A and Buffer_B, are instantiated within the FPGA (or on-chip memory in an embedded SoC). The filtering device uses a single-bit buffer select signal, buffer_select, to alternately write a newly arrived frame (1024 points) of echo data into the currently selected buffer while simultaneously pushing the previous frame of data from the other buffer into the subsequent pipeline for processing. The toggle of the buffer_select signal is automatically triggered by a write counter. When the counter reaches 1024 and the write is complete, the counter is reset and the buffer_select value is inverted, switching between write and read responsibilities.

[0060] From a hardware perspective, double buffering requires minimal control logic and a simple counter to avoid complex state machine conflicts. It also leverages the dual-port access capabilities of the FPGA's internal BRAM to achieve secure cross-clock domain transmission. More importantly, it maintains stable operation even at high frequencies (such as a 100MHz master clock).

[0061] S102, receiving full frame data from a first buffer or a second buffer through a three-line queue, and dividing a scan line currently being processed in the three-line queue into n blocks; wherein the first buffer and the second buffer are pushed to the three-line queue when a write counter reaches a preset value;

[0062] In this embodiment, in order to ensure the continuity of data reception in the high-throughput millimeter-wave radar data stream, a "three-line queue" (line_prev, line_curr, line_next) mechanism is introduced, and the entire frame of data from the double buffer (Buffer_A, Buffer_B) is pushed to the queue according to a preset timing. Specifically, the ADC interface continuously writes a frame of data consisting of 1024 sampling points to the double buffer. When the write counter accumulates to the preset value of 1024, the entire frame of data in the current buffer is considered "ready to process" and is pushed to the three-line queue at one time. In this way, whether it is Buffer_A or Buffer_B, once the frame is full, the data is immediately handed over to the queue management module to ensure that each frame of data enters the subsequent processing pipeline intact. At the same time, a new frame of data can be immediately written to the other buffer, and reading and writing are not blocked.

[0063] The three-line queue consists of three storage buffers, each with a capacity of 1024×8 bits. When the first echo scanline is received, the entire frame is written directly to line_curr, and the queue status is marked as "single-line active." Three-line filtering is not yet possible. When the second frame arrives, the control logic moves the data previously stored in line_curr to line_prev, then loads the new frame into line_curr and updates the queue status to "two-line active." This now has the temporal context of the two previous and next frames, but still lacks complete three-line information. Starting from the third frame, each full frame of data pushed through the double buffer is first written to line_next. The original line_next is then automatically moved to line_curr, and the original line_curr is then moved to line_prev, and the queue status changes to "three-line active." At this point, line_prev, line_curr, and line_next are sequentially arranged in time, forming a complete three-frame context that supports subsequent operations such as cross-line moving average, median filtering, and differential enhancement.

[0064] It should be noted that the use of a double-buffering mechanism and three-line queues allows for a natural transition from the gradual accumulation of the first and second frames to full three-line parallel processing. Furthermore, complex state management is simplified to consistent shift operations and status flag updates, reducing the design complexity of the control logic. When dividing the blocks, only the 1024 points in line_curr need to be uniformly segmented into n consecutive sub-blocks. Within each block, data from the corresponding index blocks on line_prev and line_next are then pipelined and retrieved in parallel. This ensures smooth and unimpeded data flow and enables efficient, parallel filtering with sufficient context. This enables low-latency, high-precision real-time filtering of radar echoes on resource-constrained FPGA or embedded platforms.

[0065] S103, performing parallel filtering on the j-th sampling point and the preceding and following scan lines of the corresponding position in any block, and generating filtered data; wherein the filtering includes weighted average filtering, median filtering, and differential enhancement;

[0066] In this implementation, to simultaneously suppress noise and preserve edge features while ensuring low computational power, three filtering operations are performed in parallel on the jth sampling point and the corresponding points on the preceding and following scan lines within each partitioned block, and the results are superimposed and fused for output. First, the corresponding sample values ​​are taken from the three scan lines (line_prev(j), line_curr(j), and line_next(j)) in parallel. A set of shift and add circuits are then used to rapidly perform a weighted average filter at the hardware level. Specifically, the line_curr(j) data is first shifted left by one position to perform a multiplication by 2, then added to line_prev(j) and line_next(j). Finally, the resulting sum is shifted right by two positions to perform a division by 4, yielding the average result for that position, avg_result(j). Next, the comparison and addition unit in the same pipeline inputs the current row and its two adjacent points a, b, and c into the median filter module. After calculating the maximum value max_val and the minimum value min_val among the three, the median value med_val is obtained by using the method a+b+c–max_val–min_val to further eliminate occasional pulse noise.

[0067] After completing the two stages of filtering, a differential calculation is performed in parallel channels between data_curr(j) and its adjacent neighbors, data_curr(j–1) and data_curr(j+1). The forward differential, diff_forward(j), is generated by data_curr(j)–data_curr(j–1), and the backward differential, diff_backward(j), is generated by data_curr(j)–data_curr(j+1). The hardware comparison unit takes the larger of the two absolute values, diff_enhance(j), as the differential enhancement factor to highlight true signal edge features. Finally, these three results are superimposed within the same clock cycle: avg_result(j) and med_val are first weighted, and then diff_enhance(j) is added. This ensures that edge signals are appropriately enhanced while denoising. Notably, this embodiment not only utilizes bit shifting instead of multiplication and division to reduce hardware resource consumption, but also achieves both denoising and edge protection in a low-latency pipeline through a complementary filtering strategy of median and differential filtering.

[0068] S104, calculate the adaptive threshold based on the statistical characteristics of each block, compare the adaptive threshold with the filtered data, and suppress the noise signal below the adaptive threshold according to the comparison result. By comparing the signal energy of the corresponding positions of the three lines, select the result with the highest energy as the final output, and at the same time retain the original signal characteristics of the detected edge points.

[0069] In this implementation, an adaptive threshold suppression mechanism based on block statistics is introduced to further remove residual low-energy noise after filtering while preserving true target edge features. Specifically, after the pipeline completes filtering operations such as weighted averaging, median enhancement, and differential enhancement, the system concurrently obtains preliminary filtering results for 32 points in each block. In hardware, parallel accumulation, comparison, and subtraction circuits are used to rapidly calculate the block's sum, maximum, and minimum values. These statistics not only measure the overall signal energy distribution within the block but also reflect the dynamic changes in noise and target echoes in the current environment.

[0070] The filter uses a bit shift or simple adder to divide the block sum by 32 to obtain the block average, block_avg. Parallel comparison logic is used to determine block_max and block_min, and a subtractor calculates their difference in real time as block_range. The adaptive threshold T is obtained by right-shifting the dynamic range by two bits (i.e., dividing by 4) and adding the resulting value to block_avg. This threshold takes into account both the baseline signal strength within the block and the magnitude of signal fluctuations, allowing it to automatically adapt to noise levels in varying echo scenarios.

[0071] After the threshold is generated, the processing unit compares the filtered result of each point with the T of the corresponding block. Only points with amplitudes strictly above T are retained as valid signals, while small amplitude outputs below or equal to T are momentarily suppressed, completing a secondary cleaning of noise in the hardware pipeline. At this point, the 1024-point filtered result of each scan line has removed most random jitter or background noise.

[0072] Next, to further improve the reliability of the output results, the three-line fusion stage begins: for the same position j, the thresholded amplitudes of the three filtered signals (prev_line, curr_line, and next_line) are reread, and the "signal energy" of the three is evaluated through parallel cumulative square or absolute value comparison logic. Only the signal with the highest energy is retained as the final output value; it is worth noting that this can take into account the changes in transient targets on different scan lines while avoiding artifacts left over from single-path filtering. At the same time, at locations marked as edge points in the previous differential enhancement, the system bypasses this energy selection and retains the original differential features to prevent edge details from being smoothed or lost due to energy screening.

[0073] A second embodiment of the present invention provides a millimeter-wave radar data parallel pipeline filtering device based on FPGA, comprising:

[0074] A double-buffer processing unit, configured to receive echo data from the millimeter-wave radar in real time and alternately write the continuous echo data into a first buffer and a second buffer using a double-buffer structure;

[0075] A three-line processing unit is configured to receive full frame data from a first buffer or a second buffer through a three-line queue, and divide a scan line currently being processed in the three-line queue into n blocks; wherein the first buffer and the second buffer are pushed to the three-line queue when a write counter reaches a preset value;

[0076] A filtering unit, configured to perform parallel filtering on the j-th sampling point and the preceding and following scan lines of the corresponding position in any block, and generate filtered data; wherein the filtering includes weighted average filtering, median filtering, and differential enhancement;

[0077] The adaptive threshold processing unit is used to calculate the adaptive threshold based on the statistical characteristics of each block, compare the adaptive threshold with the filtered data, and suppress the noise signal below the adaptive threshold according to the comparison result. By comparing the signal energy of the corresponding positions of the three lines, the result with the highest energy is selected as the final output, and the original signal characteristics of the detected edge points are retained.

[0078] A third embodiment of the present invention provides an FPGA-based millimeter-wave radar data parallel pipeline filtering device, characterized in that it includes a memory and a processor, the memory storing a computer program, and the computer program can be executed by the processor to implement an FPGA-based millimeter-wave radar data parallel pipeline filtering method as described in any one of the above.

[0079] A fourth embodiment of the present invention provides a computer-readable storage medium, characterized in that it stores a computer program, and the computer program can be executed by a processor of the device where the computer-readable storage medium is located to implement an FPGA-based millimeter-wave radar data parallel pipeline filtering method as described in any one of the above items.

[0080] The present invention provides an FPGA-based millimeter-wave radar data parallel pipeline filtering method, device, equipment, and storage medium. The method receives millimeter-wave radar echo data in real time and alternately writes continuous echo data into a first buffer and a second buffer using a double-buffered structure. A full frame of data from either the first buffer or the second buffer is received via a three-line queue, and the currently processed scan line in the three-line queue is divided into n blocks. Parallel filtering is then performed on the jth sampling point within any block and the preceding and following scan lines at its corresponding position, generating filtered data. An adaptive threshold is calculated based on the statistical characteristics of each block, and the adaptive threshold is compared with the filtered data. Noise signals below the adaptive threshold are suppressed based on the comparison result. The signal energy at the corresponding positions of the three lines is compared, and the result with the highest energy is selected as the final output. The original signal characteristics of detected edge points are also preserved. This method solves the problem of excessive resource usage when processing millimeter-wave radar echo signals on existing FPGAs.

[0081] For example, the computer programs described in the third and fourth embodiments of the present invention can be divided into one or more modules, which are stored in the memory and executed by the processor to implement the present invention. The one or more modules can be a series of computer program instruction segments capable of performing specific functions, which are used to describe the execution process of the computer program in the implementation of an FPGA-based millimeter-wave radar data parallel pipeline filtering device. For example, the device described in the second embodiment of the present invention.

[0082] The processor may be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or any conventional processor, etc. The processor is the control center of the FPGA-based millimeter-wave radar data parallel pipeline filtering method, and utilizes various interfaces and lines to connect the various parts of the FPGA-based millimeter-wave radar data parallel pipeline filtering method.

[0083] The memory can be used to store the computer program and / or module. The processor implements various functions of an FPGA-based millimeter-wave radar data parallel pipeline filtering method by running or executing the computer program and / or module stored in the memory and calling the data stored in the memory. The memory may mainly include a program storage area and a data storage area. The program storage area may store an operating system and at least one application required for a function (such as a sound playback function, a text conversion function, etc.); the data storage area may store data created based on the use of the mobile phone (such as audio data, text message data, etc.). In addition, the memory may include high-speed random access memory and non-volatile memory, such as a hard disk, internal memory, a plug-in hard disk, a smart memory card (SmartMediaCard, SMC), a secure digital (SecureDigital, SD) card, a flash card (FlashCard), at least one disk storage device, a flash memory device, or other volatile solid-state storage device.

[0084] Wherein, if the module is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the present invention implements all or part of the process in the above-mentioned embodiment method, and can also be completed by a computer program to instruct the relevant hardware. The computer program can be stored in a computer-readable storage medium. When the computer program is executed by the processor, it can implement the steps of the above-mentioned various method embodiments. Wherein, the computer program includes computer program code, and the computer program code can be in source code form, object code form, executable file or some intermediate form. The computer-readable medium may include: any entity or device capable of carrying the computer program code, recording medium, USB flash drive, mobile hard disk, magnetic disk, optical disk, computer memory, read-only memory (ROM), random access memory (RAM), electric carrier signal, telecommunication signal and software distribution medium. It should be noted that the content contained in the computer-readable medium can be appropriately increased or decreased according to the requirements of legislation and patent practice in the jurisdiction. For example, in some jurisdictions, according to legislation and patent practice, computer-readable media do not include electric carrier signals and telecommunication signals.

[0085] It should be noted that the device embodiments described above are merely illustrative, wherein the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or they may be distributed across multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the present embodiment. In addition, in the drawings of the device embodiments provided by the present invention, the connection relationship between the modules indicates that there is a communication connection between them, which may be specifically implemented as one or more communication buses or signal lines. A person of ordinary skill in the art can understand and implement the present invention without inventive effort.

[0086] The above description is merely a preferred embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in the present invention should be included in the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be based on the scope of protection of the claims.

Claims

1. A millimeter wave radar data parallel pipeline filtering method based on FPGA, characterized in that: include: Receive the echo data of the millimeter-wave radar in real time, and write the continuous echo data alternately into the first buffer and the second buffer using a double buffer structure; receiving full frame data from a first buffer or a second buffer through a three-line queue, and dividing a scan line currently being processed in the three-line queue into n blocks; wherein the first buffer and the second buffer are pushed to the three-line queue when a write counter reaches a preset value; Parallel filtering is performed on the j-th sampling point and the preceding and following scan lines of the corresponding position in any block, and filtered data is generated; wherein the filtering includes weighted average filtering, median filtering and differential enhancement; An adaptive threshold is calculated based on the statistical characteristics of each block, and the adaptive threshold is compared with the filtered data. Noise signals below the adaptive threshold are suppressed according to the comparison result. By comparing the signal energies of the corresponding positions of the three lines, the result with the highest energy is selected as the final output, while the original signal characteristics of the detected edge points are retained.

2. The FPGA-based millimeter-wave radar data parallel pipeline filtering method according to claim 1, characterized in that: The double buffer structure is used to alternately write the continuous echo data into the first buffer and the second buffer, specifically: Create a first buffer Buffer_A and a second buffer Buffer_B with a capacity of 1024×8 bits, and use the buffer selection signal buffer_select to control the data flow, where: When buffer_select=0, the newly received scan line data is written to Buffer_A, and the stored scan line data is read from Buffer_B for processing; When buffer_select=1, the newly received scan line data is written to Buffer_B, and the stored scan line data is read from Buffer_A for processing; When a buffer is filled with 1024 sampling points, the value of the buffer_select signal is automatically switched.

3. The FPGA-based millimeter-wave radar data parallel pipeline filtering method according to claim 1, characterized in that: The three-line queue consists of three data buffers: line_prev, line_curr and line_next, each buffer has a capacity of 1024×8 bits; When the first scan line is received, it is stored in line_curr and the status is marked as "a line"; When the second scan line is received, the first scan line is moved from line_curr to line_prev, the second scan line is stored in line_curr, and the state is marked as two lines; Starting from the third scan line, each time a new scan line is received, the new data enters line_next, line_next moves to line_curr, line_curr moves to line_prev, and the status is marked as three lines.

4. The FPGA-based millimeter-wave radar data parallel pipeline filtering method according to claim 1, characterized in that: The weighted average filtering is specifically as follows: for each sampling point position j, the weighted average value of the corresponding positions of the three scan lines is calculated: avg_result(j)=(line_prev(j)+2×line_curr(j)+line_next(j))÷4, where the multiplication by 2 is achieved by shifting the data left by 1 bit, and the division by 4 is achieved by shifting the data right by 2 bits; The median filter is specifically as follows: for three consecutive sampling points a, b, and c, the maximum value max_val and the minimum value min_val are found through comparison operation, and the median is calculated: med_val=a+b+c-max_val-min_val; The difference enhancement is specifically as follows: calculating the forward difference of each sampling point: diff_forward(j)=data_curr(j)-data_curr(j-1); Compute the backward difference at each sample point: diff_backward(j)=data_curr(j)-data_curr(j+1); Take the maximum of the two difference absolute values ​​as the difference enhancement factor: diff_enhance=max(|diff_forward|,|diff_backward|); The differential enhancement factor is superimposed on the filtering result to highlight edge features.

5. The FPGA-based millimeter-wave radar data parallel pipeline filtering method according to claim 1, characterized in that: The adaptive threshold is calculated based on the statistical characteristics of each block, the adaptive threshold is compared with the filtered data, and the noise signal below the adaptive threshold is suppressed according to the comparison result, specifically: Calculate statistical parameters for each 32-point block: block_sum, maximum value block_max, minimum value block_min; Calculate the block average: block_avg = block_sum ÷ 32; Calculate the block dynamic range: block_range = block_max - block_min; Generate adaptive threshold: T = block_avg + (block_range ÷ 4); The filtering result of each sampling point in the block is compared with the threshold T, the signal greater than the threshold is retained, and the noise less than or equal to the threshold is suppressed.

6. A millimeter wave radar data parallel pipeline filtering device based on FPGA, characterized in that: include: A double-buffer processing unit, configured to receive echo data from the millimeter-wave radar in real time and alternately write the continuous echo data into a first buffer and a second buffer using a double-buffer structure; A three-line processing unit is configured to receive full frame data from a first buffer or a second buffer through a three-line queue, and divide a scan line currently being processed in the three-line queue into n blocks; wherein the first buffer and the second buffer are pushed to the three-line queue when a write counter reaches a preset value; A filtering unit, configured to perform parallel filtering on the j-th sampling point and the preceding and following scan lines of the corresponding position in any block, and generate filtered data; wherein the filtering includes weighted average filtering, median filtering, and differential enhancement; The adaptive threshold processing unit is used to calculate the adaptive threshold based on the statistical characteristics of each block, compare the adaptive threshold with the filtered data, and suppress the noise signal below the adaptive threshold according to the comparison result. By comparing the signal energy of the corresponding positions of the three lines, the result with the highest energy is selected as the final output, and the original signal characteristics of the detected edge points are retained.

7. A millimeter wave radar data parallel pipeline filtering device based on FPGA, characterized in that: The method comprises a memory and a processor, wherein the memory stores a computer program, and the computer program can be executed by the processor to implement an FPGA-based millimeter-wave radar data parallel pipeline filtering method as described in any one of claims 1 to 5.

8. A computer-readable storage medium, characterized in that A computer program is stored, and the computer program can be executed by a processor of the device where the computer-readable storage medium is located to implement an FPGA-based millimeter-wave radar data parallel pipeline filtering method as described in any one of claims 1 to 5.

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