A voltage stabilizing circuit
By combining an operational amplifier module and a comparator module in the voltage regulator circuit and switching the operating mode, the PSRR and response speed problems of traditional LDOs are solved, achieving high-performance voltage regulation, which is suitable for high integration and low power consumption applications in SoC.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- WUXI INDYCHIP MICROELECTRONICS TECH CO LTD
- Filing Date
- 2025-08-20
- Publication Date
- 2026-04-28
AI Technical Summary
Traditional analog LDOs have poor PSRR performance and slow response speed, while digital LDOs have poor PSRR performance and discontinuous output voltage, making it difficult to meet the requirements of high integration and low power consumption in SoCs.
A voltage regulator circuit was designed, which combines an operational amplifier module and a comparator module. The operating mode is switched through a channel selection module. Under light load, a switching mode is used to reduce ripple, and under heavy load, a hybrid voltage regulation mode is used to quickly adjust the output voltage.
The power supply rejection ratio and response speed of the voltage regulator circuit have been improved, meeting the requirements of high integration and low power consumption in SoC and improving voltage regulation performance.
Smart Images

Figure CN120653056B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of integrated circuit technology, and in particular to a voltage regulator circuit. Background Technology
[0002] Low dropout regulators (LDOs) convert a range of input voltages into a stable output voltage to power load circuits. Due to their simple structure, low power consumption, low ripple, and high integration, LDOs are widely used in large-scale digital systems such as Systems on Chips (SoCs). Typically, load circuits are large-scale digital circuits, and the current drawn from the voltage source varies depending on the operating state and time of the load circuit. Therefore, LDOs need to have strong drive capability and fast response capability to ensure stable system operation.
[0003] As SoC integration becomes increasingly sophisticated, the requirements for power consumption and area cost of LDOs become more stringent, necessitating cost reduction while maintaining good stability. Traditional analog LDOs suffer from drawbacks: PMOS LDOs are suitable for low current and small voltage drop, but have poor power supply rejection ratio (PSRR); NMOS LDOs are suitable for high current and have good PSRR, but have large voltage drop and require additional charge pump circuitry, increasing design complexity and reliability risks. Compared to analog LDO solutions, digital LDOs have become a research hotspot due to their advantages such as small regulating transistor area, easily guaranteed stability, and good process scalability. However, the discontinuous output voltage regulation process of digital LDOs generates significant ripple. Furthermore, the power transistor in the on-state of a digital LDO operates in the deep linear region, resulting in extremely low equivalent resistance and poor overall PSRR performance. Summary of the Invention
[0004] To address the aforementioned technical problems, embodiments of the present invention provide a voltage regulator circuit to achieve high-performance voltage regulation.
[0005] According to one aspect of the present invention, a voltage regulator circuit is provided, comprising: an operational amplifier module, a comparator module, a channel selection module, an output control module, and a voltage divider module;
[0006] The first input terminal of the operational amplifier module is connected to the voltage divider output terminal of the voltage divider module; the second input terminal of the operational amplifier module is connected to the reference voltage terminal; the output terminal of the operational amplifier module is connected to the first input terminal of the channel selection module; the first input terminal of the comparator module is connected to the voltage divider output terminal of the voltage divider module; the second input terminal of the comparator module is connected to the reference voltage terminal; the output terminal of the comparator module is connected to the second input terminal of the channel selection module; the output terminal of the channel selection module is connected to the control terminal of the output control module; the input terminal of the output control module is connected to the input voltage terminal; the first terminal of the output control module is connected to the first terminal of the voltage divider module; the second terminal of the output control module is connected to the bias current source; and the output terminal of the output control module is connected to the second terminal of the voltage divider module.
[0007] The channel selection module is used to select any input terminal and output terminal; the comparison module is used to output a first control signal to the control terminal of the output control module based on the voltage of the voltage divider output terminal of the voltage divider module and the reference voltage; the operational amplifier module is used to output a second control signal to the control terminal of the output control module based on the voltage of the voltage divider output terminal of the voltage divider module and the reference voltage; the output control module is used to control the output voltage of the output control module based on the first control signal or the second control signal.
[0008] Optionally, the voltage regulator circuit further includes a logic control module, the input terminal of which is connected to the output terminal of the output control module, and the output terminal of which is connected to the control terminal of the channel selection module. The logic control module is used to generate a first gating signal or a second gating signal based on the relationship between the voltage at the output terminal of the output control module and the target voltage.
[0009] Optionally, the logic control module includes a successive approximation logic unit and a logic controller. The input terminal of the successive approximation logic unit is connected to the output terminal of the output control module, and the output terminal of the successive approximation logic unit is connected to the input terminal of the logic controller. The output terminal of the logic controller is connected to the control terminal of the channel selection module. The successive approximation logic unit is used to output a digital logic signal after comparing the voltage at the output terminal of the output control module with the target voltage. The logic controller is used to generate a first strobe signal or a second strobe signal based on the digital logic signal.
[0010] Optionally, the output control module includes a first current mirror unit, a first transistor, a second current mirror unit, a second transistor, and an output control unit; the first terminal of the first current mirror unit is connected to the input voltage terminal, the second terminal of the first current mirror unit is connected to a reference current source, the third terminal of the first current mirror unit is connected to the first electrode of the first transistor, the gate of the first transistor is connected to the output terminal of the channel selection module, the second electrode of the first transistor is connected to the first terminal of the second current mirror unit, the second terminal of the second current mirror unit is connected to the first terminal of the voltage divider module, the third terminal of the second current mirror unit is connected to the second electrode of the second transistor, the first electrode of the second transistor is connected to the input voltage terminal, the gate of the second transistor is connected to the second electrode of the second transistor and the first terminal of the output control unit, the second terminal of the output control unit is connected to the input voltage terminal, and the third terminal of the output control unit is connected to the second terminal of the voltage divider module.
[0011] Optionally, the first current mirror unit includes a third transistor and a fourth transistor. The first terminal of the third transistor is connected to the input voltage terminal, the second terminal of the third transistor is connected to the gate of the third transistor, the second terminal of the third transistor is also connected to a reference current source, the gate of the third transistor is also connected to the gate of the fourth transistor, the first terminal of the fourth transistor is connected to the input voltage terminal, and the second terminal of the fourth transistor is connected to the first terminal of the first transistor.
[0012] Optionally, the second current mirror unit includes a fifth transistor and a sixth transistor. The second terminal of the fifth transistor is connected to the second terminal of the first transistor. The second terminal of the fifth transistor is also connected to the gate of the fifth transistor. The gate of the fifth transistor is also connected to the gate of the sixth transistor. The first terminals of the fifth transistor and the sixth transistor are both connected to the first terminal of the voltage divider module. The second terminal of the sixth transistor is connected to the second terminal of the second transistor.
[0013] Optionally, the output control unit includes a seventh transistor, an eighth transistor, and a ninth transistor. The first terminals of the seventh transistor and the eighth transistor are both connected to the input voltage terminal. The gate of the seventh transistor is connected to the gate of the second transistor. The gate of the seventh transistor is also connected to the second terminal of the ninth transistor. The gate of the eighth transistor is connected to the first terminal of the ninth transistor. The second terminals of the seventh transistor and the eighth transistor are both connected to the second terminal of the voltage divider module. The gate of the ninth transistor is connected to the output terminal of the logic controller.
[0014] Optionally, the channel selection module includes a first gating switch and a second gating switch. The first terminal of the first gating switch is connected to the output terminal of the operational amplifier module, and the control terminal of the first gating switch is connected to the output terminal of the logic controller. The second terminals of both the first and second gating switches are connected to the control terminal of the output control module. The first terminal of the second gating switch is connected to the output terminal of the comparison module, and the control terminal of the second gating switch is connected to the output terminal of the logic controller.
[0015] Optionally, the operational amplifier module includes an operational amplifier, the first input terminal of which is connected to the voltage divider output terminal of the voltage divider module, the second input terminal of which is connected to the reference voltage terminal, and the output terminal of which is connected to the first terminal of the first gating switch.
[0016] Optionally, the voltage divider module includes a first resistor and a second resistor, a first end of the first resistor is connected to the output terminal of the output control module, a second end of the first resistor is connected to the first end of the second resistor, and a second end of the second resistor is connected to the first terminal of the output control module.
[0017] In this embodiment of the invention, both the operational amplifier module and the comparator module can output control signals based on the voltage at the voltage divider output terminal of the voltage divider module and the reference voltage. These signals control the current flowing from the input voltage terminal to the output terminal of the voltage regulator circuit, thereby adjusting and stabilizing the output voltage of the voltage regulator circuit. The channel selection module can select either the operational amplifier module or the comparator module. When the operational amplifier module is selected, the voltage regulator circuit is similar to a traditional analog voltage regulator circuit. By controlling the magnitude of the current flowing from the input voltage terminal to the output terminal of the voltage regulator circuit, the output voltage of the voltage regulator circuit is maintained near the target voltage. The comparator module can quickly adjust the output voltage of the voltage regulator circuit. The channel selection module can switch the operating mode of the voltage regulator circuit. Under light load conditions, a switching mode can be selected to reduce output ripple. Under heavy load conditions, a hybrid voltage regulation mode can be used. During power-on, the switching mode is selected, allowing the output voltage to rise rapidly to near the target value. After stabilization, it can switch to linear mode. This embodiment of the invention, by switching the operating mode of the voltage regulator circuit through the channel selection module according to the connected load circuit, solves the problem of poor power supply rejection ratio in traditional digital voltage regulator circuits and improves the slow response speed of traditional analog voltage regulator circuits, thus enhancing the performance of the voltage regulator circuit.
[0018] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of the present invention, nor is it intended to limit the scope of the invention. Other features of the invention will become readily apparent from the following description. Attached Figure Description
[0019] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0020] Figure 1 This is a schematic diagram of a simulated LDO structure in related technologies.
[0021] Figure 2 This is a schematic diagram of another simulated LDO structure in related technologies.
[0022] Figure 3 This is a schematic diagram of the structure of a digital LDO in related technologies.
[0023] Figure 4 This is a schematic diagram of a voltage regulator circuit provided in an embodiment of the present invention.
[0024] Figure 5 This is a schematic diagram of another voltage regulator circuit provided in an embodiment of the present invention.
[0025] Figure 6 This is a schematic diagram of another voltage regulator circuit provided in an embodiment of the present invention.
[0026] Figure 7 This is a circuit diagram of a voltage regulator circuit provided in an embodiment of the present invention.
[0027] Figure 8 This is a schematic diagram of signal changes during the operation of a voltage regulator circuit provided in an embodiment of the present invention. Detailed Implementation
[0028] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.
[0029] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.
[0030] Figure 1 , Figure 2 This refers to the analog linear voltage regulator circuit in related technologies. Figure 1 This is a schematic diagram of a PMOS LDO in related technologies. A PMOS LDO mainly includes a first operational amplifier EA1, a first voltage divider resistor Rf1, a second voltage divider resistor Rf2, a first capacitor C1, and a PMOS transistor MP1. The PMOS LDO adjusts the output voltage Vout1 by regulating the PMOS transistor MP1 based on the first voltage divider voltage Vf1 and the first reference voltage Vref1, through the operational amplifier EA1. PMOS LDOs are mainly used in low-current applications and are characterized by high output impedance, a small voltage difference between the input voltage VIN1 and the output voltage Vout1, and poor power supply rejection ratio (PSRR) performance. Figure 2 This is a schematic diagram of an NMOS LDO in related technologies. An NMOS LDO mainly includes an operational amplifier EA2, a third voltage divider resistor Rf3, a fourth voltage divider resistor Rf4, a charge pump circuit, a second capacitor C2, and an NMOS transistor MN1. Clk is the clock signal. The NMOS LDO adjusts the NMOS transistor MN1 through the second operational amplifier EA2 based on the second voltage divider voltage Vf2 and the second reference voltage Vref2, thereby regulating the output voltage Vout2 of the NMOS LDO. NMOS LDOs are mainly used in high-current applications, with low output impedance and good PSRR performance. However, they have disadvantages such as a large voltage difference between the input voltage VIN2 and the output voltage Vout2, more additional circuitry, increased design complexity, and lower reliability.
[0031] Figure 3The structure of a digital LDO in related technologies is shown. A digital LDO mainly includes a comparator COMP, a clock module OSC, a digital control logic (DCL), multiple transistors MP2-MPn, a fifth voltage divider resistor Rf5, a sixth voltage divider resistor Rf6, and a third capacitor C3. The digital LDO adjusts the number of transistors MP2, MP3, ..., MPn turned on by the comparator COMP based on the comparison result between the third voltage divider voltage Vf3 and the third reference voltage Vref3, as well as by the clock module OSC and the DCL, thereby regulating the output voltage Vout3. The DCL is typically a bidirectional shift register. The digital LDO adjusts the number of transistors turned on through the clock module OSC and the bidirectional shift register. This method causes discontinuous control of the output voltage Vout3, resulting in significant output ripple. Furthermore, the power transistors in the LDO's on state operate in the deep linear region, where the equivalent resistance of the adjusting transistors is very small, resulting in poor overall PSRR (Power Surge Reduction).
[0032] In view of this, Figure 4 This is a schematic diagram of a voltage regulator circuit provided in an embodiment of the present invention. This embodiment is suitable for scenarios with high requirements for output voltage accuracy, response speed, or anti-interference performance, especially in applications with a large load variation range, such as microprocessors, communication equipment power supplies, automotive electronics, and industrial automation. Figure 4 As shown, the voltage regulator circuit includes: an operational amplifier module 101, a comparator module 102, a channel selection module 103, an output control module 104, and a voltage divider module 105;
[0033] The first input terminal of the operational amplifier module 101 is connected to the voltage divider output terminal of the voltage divider module 105. The second input terminal of the operational amplifier module 101 is connected to the reference voltage terminal. The output terminal of the operational amplifier module 101 is connected to the first input terminal of the channel selection module 103. The first input terminal of the comparator module 102 is connected to the voltage divider output terminal of the voltage divider module 105. The second input terminal of the comparator module 102 is connected to the reference voltage terminal. The output terminal of the comparator module 102 is connected to the second input terminal of the channel selection module 103. The output terminal of the channel selection module 103 is connected to the control terminal of the output control module 104. The input terminal of the output control module 104 is connected to the input voltage terminal VIN. The first terminal of the output control module 104 is connected to the first terminal of the voltage divider module 105. The second terminal of the output control module 104 is connected to the bias current source Ib. The output terminal of the output control module 104 is connected to the second terminal of the voltage divider module 105.
[0034] The channel selection module 103 is used to select any of its own input and output terminals; the comparison module 102 is used to output a first control signal to the control terminal of the output control module 104 based on the voltage Vf of the voltage divider output terminal of the voltage divider module 105 and the reference voltage Vref; the operational amplifier module 101 is used to output a second control signal to the control terminal of the output control module 104 based on the voltage Vf of the voltage divider output terminal of the voltage divider module 105 and the reference voltage Vref; the output control module 104 is used to control the output voltage Vout of the output control module 104 based on the first control signal or the second control signal.
[0035] The voltage divider module 105 divides the output voltage Vout of the output control module 104 to obtain the voltage Vf at the voltage divider output terminal. The output voltage of the output control module 104 is the output voltage of the voltage regulator circuit; both the output voltage of the output control module 104 and the output voltage of the voltage regulator circuit can be represented by Vout. A reference voltage terminal provides a reference voltage. The reference voltage terminal is connected to the second input terminal of the operational amplifier module 101 and the second input terminal of the comparator module 102. The operational amplifier module 101 can be an operational amplifier that continuously detects the voltage Vf at the voltage divider output terminal and the reference voltage Vref, amplifies the voltage difference between the two input terminals, and generates a second control signal. The second control signal can be a continuous analog control signal. If the channel selection module 103 selects the operational amplifier module 101 to participate in the voltage regulation operation, the operating mode of the voltage regulator circuit can be called the linear mode. The comparator module 102 can be a high-speed comparator that compares the voltage Vf at the voltage divider output terminal and the reference voltage Vref, and outputs a first control signal based on the magnitude relationship between the two input terminals. The first control signal can be a switch control signal, such as 0 or 1. If the channel selection module 103 selects the comparator module 102 to participate in the voltage regulation, the operating mode of the voltage regulator circuit can be called the switch mode. For example, when the external load is light, the switch mode can be selected. Under light load conditions, using the switch mode can reduce the output ripple and achieve stable output. Under heavy load conditions, a hybrid voltage regulation mode can be used. During power-up, the switch mode can be selected, allowing the output voltage to rise quickly to near the target value. After stabilization, it can be switched to linear mode. Using the hybrid voltage regulation mode under heavy load can solve the problem of poor PSRR in traditional digital LDOs and improve the stability of the voltage regulator circuit.
[0036] The channel selection module 103 can be a multiplexer or multiple switches, which can select the output terminal of the operational amplifier module 101 or the output terminal of the comparator module 102 to be connected to its output terminal and transmitted as a control signal to the control terminal of the output control module 104. The channel selection module 103 can select a switching mode or a linear mode based on the relationship between the output voltage Vout of the voltage regulator circuit and the target voltage. For example, when the output voltage Vout of the voltage regulator circuit is close to the target voltage, i.e., the difference between the output voltage Vout of the voltage regulator circuit and the target voltage is small, the linear mode can be selected, and a second control signal is output to the control terminal of the output control module 104; when the output voltage Vout of the voltage regulator circuit is much smaller than the target voltage, i.e., the difference between the output voltage Vout of the voltage regulator circuit and the target voltage is large, the switching mode is selected, and a first control signal is output to the control terminal of the output control module 104. The output control module 104 can include multiple transistors. Based on the control signal selected by the channel selection module 103, the current flowing from the input voltage terminal VIN to the output terminal of the voltage regulator circuit can be adjusted, thereby adjusting the output voltage Vout of the voltage regulator circuit to stabilize it.
[0037] Specifically, the voltage divider module 105 divides the output voltage Vout of the voltage regulator circuit to obtain the voltage Vf1 at the divided output terminal. The operational amplifier module 101 detects the magnitudes of the voltage Vf1 at the divided output terminal and the reference voltage Vref, and outputs a second control signal. The comparator module 102 can also compare the magnitudes of the voltage Vf1 at the divided output terminal and the reference voltage Vref, and output a first control signal. The channel selection module 103 selects to output either the first or second control signal to the control terminal of the output control module 104 based on the relationship between the output voltage Vout of the voltage regulator circuit and the target voltage. If the output control module 104 receives the second control signal from the operational amplifier module 101, similar to a traditional analog voltage regulator circuit, it can adjust the output voltage Vout of the voltage regulator circuit by linearly adjusting the conduction level of the power devices. If the output control module 104 receives the first control signal from the comparator module 102, it can adjust the output voltage Vout of the voltage regulator circuit by rapidly switching the power devices. The adjusted output voltage Vout of the voltage regulator circuit is then divided by the voltage divider module 105 to obtain the voltage Vf at the divided output terminal, which is compared with the reference voltage Vref to form a closed-loop negative feedback system. Regardless of the mode chosen, the goal is to keep the output voltage Vout of the voltage regulator circuit near the target voltage.
[0038] In this embodiment of the invention, both the operational amplifier module and the comparator module can output control signals based on the relationship between the voltage at the voltage divider output terminal of the voltage divider module and the reference voltage. These signals control the current flowing from the input voltage terminal to the output terminal of the voltage regulator circuit, thereby adjusting and stabilizing the output voltage of the voltage regulator circuit. The channel selection module can select either the operational amplifier module or the comparator module. When the operational amplifier module is selected, the voltage regulator circuit behaves similarly to a traditional analog voltage regulator circuit. By controlling the magnitude of the current flowing from the input voltage terminal to the output terminal of the voltage regulator circuit, the output voltage of the voltage regulator circuit is maintained near the target voltage. The comparator module can quickly adjust the output voltage of the voltage regulator circuit. The channel selection module can switch the operating mode of the voltage regulator circuit. Under light load conditions, a switching mode can be selected to reduce output ripple. Under heavy load conditions, a hybrid voltage regulation mode can be used. During power-on, the switching mode is selected, allowing the output voltage to rise rapidly to near the target value. After stabilization, it can switch to linear mode. This embodiment of the invention, by switching the operating mode of the voltage regulator circuit through the channel selection module according to the connected load circuit, solves the problem of poor power supply rejection ratio in traditional digital voltage regulator circuits and improves the slow response speed of traditional analog voltage regulator circuits, thus enhancing the performance of the voltage regulator circuit.
[0039] Figure 5 This is a schematic diagram of another voltage regulator circuit provided in an embodiment of the present invention. In some optional embodiments of the present invention, the voltage regulator circuit further includes a logic control module 106. The input terminal of the logic control module 106 is connected to the output terminal of the output control module 104, and the output terminal of the logic control module 106 is connected to the control terminal of the channel selection module 103. The logic control module 106 is used to generate a first gating signal or a second gating signal according to the relationship between the voltage Vout of the output terminal of the output control module 104 and the target voltage.
[0040] The input terminal of the logic control module 106 is connected to the output terminal of the output control module 104, i.e., the output terminal of the voltage regulator circuit. The logic control module 106 can directly monitor the output voltage Vout of the voltage regulator circuit, compare it with the target voltage, and generate and output the corresponding gating signal. The first gating signal can indicate that the output terminal of the operational amplifier module 101 is connected to the output terminal of the channel selection module 103. The second gating signal can indicate that the output terminal of the comparison module 102 is connected to the output terminal of the channel selection module 103.
[0041] Specifically, the logic control module 106 continuously monitors the output voltage Vout of the voltage regulator circuit and compares it with the target voltage. If the output voltage Vout of the voltage regulator circuit is close to the target voltage, i.e., the difference between the output voltage Vout of the voltage regulator circuit and the target voltage is small, the logic control module 106 generates a first gating signal, and the channel selection module 103 connects the output terminal of the operational amplifier module 101 to the control terminal of the output control module 104. By adjusting the state of the power transistor in the linear region and controlling the current flowing from the input voltage terminal to the output terminal of the voltage regulator circuit, the output voltage Vout of the voltage regulator circuit is maintained near the target voltage. If the output voltage Vout of the voltage regulator circuit is much smaller than the target voltage, i.e., the difference between the output voltage Vout of the voltage regulator circuit and the target voltage is large, the logic control module 106 generates a second gating signal, and the channel selection module 103 connects the output of the comparison module 102 to the control terminal of the output control module 104. The output of the comparison module 102 is usually high or low, which can quickly boost the output voltage Vout of the voltage regulator circuit.
[0042] In some alternative embodiments of the present invention, reference continues to be made. Figure 5 The logic control module 106 includes a successive approximation logic unit 1061 and a logic controller 1062. The input terminal of the successive approximation logic unit 1061 is connected to the output terminal of the output control module 104, and the output terminal of the successive approximation logic unit 1061 is connected to the input terminal of the logic controller 1062. The output terminal of the logic controller 1062 is connected to the control terminal of the channel selection module 103. The successive approximation logic unit 1061 is used to output a digital logic signal after comparing the voltage at the output terminal of the output control module 104 with the target voltage. The logic controller 1062 is used to generate a first strobe signal or a second strobe signal based on the digital logic signal.
[0043] The successive approximation logic unit 1061 can digitally evaluate the deviation of the output voltage Vout of the voltage regulator circuit from the target voltage using a successive approximation method. The digital logic signal output by the successive approximation logic unit 1061 can be a digital quantity representing the evaluation result of the output voltage Vout of the voltage regulator circuit. Based on the evaluation result of the successive approximation logic unit 1061, the logic controller 1062 can output a first strobe signal or a second strobe signal to the control terminal of the channel selection module 103.
[0044] Specifically, the successive approximation logic unit 1061 can continuously or periodically sample the output Vout of the voltage regulator circuit. Through the successive approximation process, it converts the relationship between the output voltage Vout of the voltage regulator circuit and the target voltage into a digital logic signal, and outputs the digital logic signal to the logic controller 1062. The logic controller 1062 outputs a corresponding gating signal to the control terminal of the channel selection module 103 based on the received digital logic signal. The channel selection module 103 connects the output terminal of the operational amplifier module 101 or the output terminal of the comparator module 102 to the control terminal of the output control module 104 based on the received gating signal, thereby adjusting the output voltage Vout of the voltage regulator circuit. After adjustment, the successive approximation logic unit 1061 samples again to begin a new round of evaluation and selection.
[0045] In some alternative embodiments of the present invention, such as Figure 5 As shown, the output control module 104 includes a first current mirror unit 1041, a first transistor M1, a second current mirror unit 1042, a second transistor M2, and an output control unit 1043. The first terminal of the first current mirror unit 1041 is connected to the input voltage terminal VIN, the second terminal of the first current mirror unit 1041 is connected to the reference current source Ib, the third terminal of the first current mirror unit 1041 is connected to the first electrode of the first transistor M1, the gate of the first transistor M1 is connected to the output terminal of the channel selection module 103, and the second electrode of the first transistor M1 is connected to the second current mirror unit 1043. The first end of unit 1042 is connected to the second end of the second current mirror unit 1042 and the first end of the voltage divider module 105. The third end of the second current mirror unit 1042 is connected to the second terminal of the second transistor M2. The first terminal of the second transistor M2 is connected to the input voltage terminal VIN. The gate of the second transistor M2 is connected to the second terminal of the second transistor M2 and the first end of the output control unit 1043. The second end of the output control unit 1043 is connected to the input voltage terminal VIN. The third end of the output control unit 1043 is connected to the second end of the voltage divider module 105.
[0046] The first current mirror unit 1041 can be a POMS current mirror. The first current mirror unit 1041 mirrors the reference current Ib to its third terminal, providing a static operating current for the first transistor M1. Here, both the reference current source and the reference current are represented by Ib. The first transistor M1 can be a PMOS transistor. The first terminal of the first transistor M1 can be the source, and the second terminal can be the drain. The gate of the first transistor M1 is connected to the output terminal of the channel selection module 103, and can transmit the current signal to the second current mirror unit 1042 according to the control signal of the channel selection module 103. The second current mirror unit 1042 can be an NMOS current mirror. The second current mirror unit 1042 can drive the second transistor M2 using the current signal transmitted by the first transistor M1. The second transistor M2 can be a PMOS transistor. The first terminal of the second transistor M2 can be the source, and the second terminal can be the drain. The gate and drain of the second transistor M2 are short-circuited, causing it to operate in the saturation region. When current flows through the second current mirror unit 1042, since the second transistor is operating in the saturation region, the gate of the second transistor M2 can drive the output control unit 1043.
[0047] Figure 6 This is a schematic diagram of another voltage regulator circuit provided in an embodiment of the present invention. In some optional embodiments of the present invention, such as... Figure 6 As shown, the first current mirror unit 1041 includes a third transistor M3 and a fourth transistor M4. The first terminal of the third transistor M3 is connected to the input voltage terminal VIN, the second terminal of the third transistor M3 is connected to the gate of the third transistor M3, the second terminal of the third transistor M3 is also connected to the reference current source Ib, the gate of the third transistor M3 is also connected to the gate of the fourth transistor M4, the first terminal of the fourth transistor M4 is connected to the input voltage terminal VIN, and the second terminal of the fourth transistor M4 is connected to the first terminal of the first transistor M1.
[0048] In this configuration, the third transistor M3 and the fourth transistor M4 can be PMOS transistors. The first terminal of the third transistor M3 and the fourth transistor M4 can be the source, and the second terminal can be the drain. The first current mirror unit 1041 can be used to provide the first transistor M1 with a current proportional to the bias current source Ib. The drain of the third transistor M3 is shorted to its gate, causing it to operate in the saturation region. The reference current source Ib draws current from the second terminal of the third transistor M3, is mirrored by the fourth transistor M4, and then provides it to the first transistor M1. Here, the size of the fourth transistor M4 can be set to be n times that of the third transistor M3. When the first transistor M1 operates in switching mode, the current flowing through the first transistor M1 is equal to n*Ib; when the first transistor M1 operates in linear mode, the linear loop controls the operating state of the first transistor, and the current flowing through the first transistor M1 is less than or equal to n*Ib.
[0049] In some alternative embodiments of the present invention, reference continues to be made. Figure 6 The second current mirror unit 1042 includes a fifth transistor M5 and a sixth transistor M6. The second terminal of the fifth transistor M5 is connected to the second terminal of the first transistor M1. The second terminal of the fifth transistor M5 is also connected to the gate of the fifth transistor M5. The gate of the fifth transistor M5 is also connected to the gate of the sixth transistor M6. The first terminals of the fifth transistor M5 and the sixth transistor M6 are both connected to the first terminal of the voltage divider module 105. The second terminal of the sixth transistor M6 is connected to the second terminal of the second transistor M2.
[0050] In this configuration, the fifth transistor M5 and the sixth transistor M6 can be NMOS transistors. The first terminal of both transistors M5 and M6 can be the source, and the second terminal can be the drain. The gate and drain of transistor M5 are shorted, causing it to operate in the saturation region. The current flowing through transistor M5 is the drain current of transistor M1, which, after being mirrored by transistor M1, directly drives transistor M2. Here, transistors M5 and M6 can be configured to have the same dimensions.
[0051] In some alternative embodiments of the present invention, reference continues to be made. Figure 6 The output control unit 1043 includes a seventh transistor M7, an eighth transistor M8, and a ninth transistor M9. The first terminals of the seventh transistor M7 and the eighth transistor M8 are both connected to the input voltage terminal VIN. The gate of the seventh transistor M7 is connected to the gate of the second transistor M2. The gate of the seventh transistor M7 is also connected to the second terminal of the ninth transistor M9. The gate of the eighth transistor M8 is connected to the first terminal of the ninth transistor M9. The second terminals of the seventh transistor M7 and the eighth transistor M8 are both connected to the second terminal of the voltage divider module 105. The gate of the ninth transistor M9 is connected to the output terminal of the logic controller 1062.
[0052] In this circuit, the seventh transistor M7 and the eighth transistor M8 can be PMOS transistors. The first terminal of the seventh transistor M7 and the eighth transistor M8 can be the source, and the second terminal can be the drain. The gate of the seventh transistor M7 is connected to the gate of the second transistor M2, and the gate and drain of the second transistor M2 are shorted, allowing the seventh transistor M7 and the second transistor M2 to form a current mirror structure. Therefore, the seventh transistor M7 can mirror the current flowing through the second transistor. The ninth transistor M9 can act as a switch, controlling whether the eighth transistor M8 is connected to the voltage regulator circuit. The gate of the ninth transistor M9 is connected to the output terminal of the logic controller 1062. The ninth transistor M9 can be turned on when the channel selection module selects the operational amplifier module 101. For example, when the output voltage Vout of the voltage regulator circuit is close to the target voltage (i.e., the difference between the output voltage Vout and the target voltage is small), the logic control module 106 generates a first gating signal. The channel selection module 103 connects the output terminal of the operational amplifier module 101 to the control terminal of the output control module 104. At this time, the gate of the ninth transistor M9 receives a high-level signal, and the ninth transistor M9 is turned on. The eighth transistor M8 is connected to the voltage regulator circuit and, together with the seventh transistor M7, controls the output voltage Vout of the voltage regulator circuit. When the output voltage Vout of the voltage regulator circuit is much smaller than the target voltage (i.e., the difference between the output voltage Vout and the target voltage is large), the logic control module 106 generates a second gating signal. The channel selection module 103 connects the output of the comparison module 102 to the control terminal of the output control module 104. At this time, the gate of the ninth transistor M9 receives a low-level signal, and the ninth transistor M9 is not turned on. At this time, the eighth transistor M8 is not connected to the voltage regulator circuit.
[0053] Figure 7 This is a circuit diagram of a voltage regulator circuit provided in an embodiment of the present invention. In some optional embodiments of the present invention, such as... Figure 7 As shown, the channel selection module 103 includes a first gating switch 1031 and a second gating switch 1032. The first end of the first gating switch 1031 is connected to the output end of the operational amplifier module 101, and the control end of the first gating switch 1031 is connected to the output end of the logic controller 1062. The second ends of both the first gating switch 1031 and the second gating switch 1032 are connected to the control end of the output control module 104. The first end of the second gating switch 1032 is connected to the output end of the comparison module 102, and the control end of the second gating switch 1032 is connected to the output end of the logic controller 1062.
[0054] The first gating switch 1031 controls the connection between the output of the operational amplifier module 101 and the control terminal of the output control module 104. The second gating switch 1032 controls the connection between the output of the comparator module 102 and the control terminal of the output control module 104. The gating signals may include a first gating switch control signal EN_L and a second gating switch control signal EN_S. The first gating signal can be a high level for the first gating switch control signal EN_L and a low level for the second gating switch control signal EN_S. Alternatively, the second gating signal can be a low level for the first gating switch control signal EN_L and a high level for the second gating switch control signal EN_S. For example, when the logic controller 1062 outputs the first strobe signal, the first strobe switch 1031 is turned on, connecting the output terminal of the operational amplifier module 101 to the control terminal of the output control module 104, and adjusting the output voltage Vout of the voltage regulator circuit in a linear mode; when the logic controller 1062 outputs the second strobe signal, the second strobe switch 1032 is turned on, connecting the output terminal of the comparator module 102 to the control terminal of the output control module 104, and adjusting the output voltage Vout of the voltage regulator circuit in a switching mode.
[0055] In some optional embodiments of the present invention, the operational amplifier module 101 includes an operational amplifier EA, the first input terminal of the operational amplifier EA is connected to the voltage divider output terminal Vf of the voltage divider module 105, the second input terminal of the operational amplifier EA is connected to the reference voltage terminal Vref, and the output terminal of the operational amplifier EA is connected to the first terminal of the first gating switch 1031.
[0056] In this circuit, the first input terminal of operational amplifier EA can be a non-inverting input terminal, and the second input terminal can be an inverting input terminal. Operational amplifier EA can continuously sample the voltage Vf from the voltage divider output terminal of voltage divider module 105 and send it to the non-inverting input terminal of operational amplifier EA. The inverting input terminal is connected to a reference voltage Vref. Operational amplifier EA can be a differential amplifier, capable of detecting the voltage difference between the two input terminals and amplifying this voltage difference to generate a second control signal. The second control signal can be a continuous analog control signal. The second control signal can adjust the output voltage Vout of the voltage regulator circuit in linear regulation mode. Similar to the operating mode of a traditional analog voltage regulator circuit, the second control signal controls the current flowing through the first transistor M1, maintaining the output voltage Vout of the voltage regulator circuit near the target voltage.
[0057] In some optional embodiments of the present invention, the voltage divider module 105 includes a first resistor R1 and a second resistor R2. The first end of the first resistor R1 is connected to the output end of the output control module 104, the second end of the first resistor R1 is connected to the first end of the second resistor R2, and the second end of the second resistor R2 is connected to the first end of the output control module 104.
[0058] The connection point between the second end of the first resistor and the first end of the second resistor is the voltage divider output terminal of the voltage divider module 105. The voltage divider module 105 can sample the output voltage Vout of the voltage regulator circuit and generate a voltage Vf at the voltage divider output terminal, which is then transmitted to the first input terminal of the operational amplifier module 101 and the first input terminal of the comparator module 102 for comparison with the reference voltage Vref.
[0059] The working principle of this invention is described in reference to... Figure 7 and Figure 8 , Figure 8 The diagram illustrates the changes in the output voltage Vout, reference voltage Vref, voltage Vf at the voltage divider output, and control signals EN_L and EN_S of the voltage regulator circuit, demonstrating the operation of the voltage regulator circuit of this invention. When the output voltage Vout of the voltage regulator circuit is much smaller than the target voltage (i.e., the difference between the output voltage Vout and the target voltage is large), the successive approximation logic unit 1061 compares the output voltage Vout of the voltage regulator circuit with the target voltage and outputs the second gating signal EN_S. At this time, the second gating switch 1032 is turned on, and the comparison module 102 participates in the operation of the voltage regulator circuit. The comparison module 102 compares the voltage Vf at the voltage divider output with the reference voltage Vf, thereby generating a first control signal and transmitting it to the gate of the first transistor M1, causing the first transistor M1 to turn on. The signal then flows through the fifth transistor M5, the sixth transistor M6, and the second transistor M2, finally flowing through the seventh transistor M7, causing the seventh transistor M7 to output current, thereby increasing the output voltage Vout of the voltage regulator circuit. When the output voltage Vout of the voltage regulator circuit approaches the target voltage, i.e., when the difference between the output voltage Vout and the target voltage is small, the successive approximation logic unit 1061 compares the output voltage Vout of the voltage regulator module with the target voltage and generates a first gating signal. At this time, the operational amplifier EA will participate in the operation of the voltage regulator circuit. Similar to the traditional analog loop operation mode, the operational amplifier EA generates a second control signal based on the voltage Vf at the output of the voltage divider module and the reference voltage Vref, and transmits it to the gate of the first transistor M1. By controlling the magnitude of the current flowing through the first transistor M1, the output voltage Vout of the voltage regulator circuit is maintained near the target voltage.
[0060] It should be understood that the various forms of processes shown above can be used, with steps reordered, added, or deleted. For example, the steps described in this invention can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this invention can be achieved, and no limitation is imposed herein.
[0061] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.
Claims
1. A voltage regulator circuit, characterized in that, include: Operational amplifier module, comparator module, channel selection module, output control module, and voltage divider module; The first input terminal of the operational amplifier module is connected to the voltage divider output terminal of the voltage divider module; the second input terminal of the operational amplifier module is connected to the reference voltage terminal; the output terminal of the operational amplifier module is connected to the first input terminal of the channel selection module; the first input terminal of the comparator module is connected to the voltage divider output terminal of the voltage divider module; the second input terminal of the comparator module is connected to the reference voltage terminal; the output terminal of the comparator module is connected to the second input terminal of the channel selection module; the output terminal of the channel selection module is connected to the control terminal of the output control module; the input terminal of the output control module is connected to the input voltage terminal; the first terminal of the output control module is connected to the first terminal of the voltage divider module; the second terminal of the output control module is connected to the bias current source; and the output terminal of the output control module is connected to the second terminal of the voltage divider module. The channel selection module is used to select any input terminal and output terminal; the comparison module is used to output a first control signal to the control terminal of the output control module based on the voltage of the voltage divider output terminal of the voltage divider module and the reference voltage; the operational amplifier module is used to output a second control signal to the control terminal of the output control module based on the voltage of the voltage divider output terminal of the voltage divider module and the reference voltage; the output control module is used to control the output voltage of the output control module based on the first control signal or the second control signal. The voltage regulator circuit further includes a logic control module. The input terminal of the logic control module is connected to the output terminal of the output control module, and the output terminal of the logic control module is connected to the control terminal of the channel selection module. The logic control module is used to generate a first gating signal or a second gating signal based on the relationship between the voltage at the output terminal of the output control module and the target voltage. The output control module includes a first current mirror unit, a first transistor, a second current mirror unit, a second transistor, and an output control unit. The first terminal of the first current mirror unit is connected to the input voltage terminal, the second terminal of the first current mirror unit is connected to a reference current source, the third terminal of the first current mirror unit is connected to the first electrode of the first transistor, the gate of the first transistor is connected to the output terminal of the channel selection module, the second electrode of the first transistor is connected to the first terminal of the second current mirror unit, the second terminal of the second current mirror unit is connected to the first terminal of the voltage divider module, the third terminal of the second current mirror unit is connected to the second electrode of the second transistor, the first electrode of the second transistor is connected to the input voltage terminal, the gate of the second transistor is connected to both the second electrode of the second transistor and the first terminal of the output control unit, the second terminal of the output control unit is connected to the input voltage terminal, and the third terminal of the output control unit is connected to the second terminal of the voltage divider module. The output control unit includes a seventh transistor, an eighth transistor, and a ninth transistor. The first terminals of the seventh transistor and the eighth transistor are both connected to the input voltage terminal. The gate of the seventh transistor is connected to the gate of the second transistor. The gate of the seventh transistor is also connected to the second terminal of the ninth transistor. The gate of the eighth transistor is connected to the first terminal of the ninth transistor. The second terminals of the seventh transistor and the eighth transistor are both connected to the second terminal of the voltage divider module. The gate of the ninth transistor is connected to the output terminal of the logic control module.
2. The voltage regulator circuit according to claim 1, characterized in that, The logic control module includes a successive approximation logic unit and a logic controller. The input terminal of the successive approximation logic unit is connected to the output terminal of the output control module, and the output terminal of the successive approximation logic unit is connected to the input terminal of the logic controller. The output terminal of the logic controller is connected to the control terminal of the channel selection module. The successive approximation logic unit is used to output a digital logic signal after comparing the voltage at the output terminal of the output control module with the target voltage. The logic controller is used to generate a first strobe signal or a second strobe signal based on the digital logic signal.
3. The voltage regulator circuit according to claim 1, characterized in that, The first current mirror unit includes a third transistor and a fourth transistor. The first terminal of the third transistor is connected to the input voltage terminal, the second terminal of the third transistor is connected to the gate of the third transistor, the second terminal of the third transistor is also connected to a reference current source, the gate of the third transistor is also connected to the gate of the fourth transistor, the first terminal of the fourth transistor is connected to the input voltage terminal, and the second terminal of the fourth transistor is connected to the first terminal of the first transistor.
4. The voltage regulator circuit according to claim 1, characterized in that, The second current mirror unit includes a fifth transistor and a sixth transistor. The second terminal of the fifth transistor is connected to the second terminal of the first transistor. The second terminal of the fifth transistor is also connected to the gate of the fifth transistor. The gate of the fifth transistor is also connected to the gate of the sixth transistor. The first terminals of the fifth transistor and the sixth transistor are both connected to the first terminal of the voltage divider module. The second terminal of the sixth transistor is connected to the second terminal of the second transistor.
5. The voltage regulator circuit according to claim 2, characterized in that, The channel selection module includes a first gating switch and a second gating switch. The first terminal of the first gating switch is connected to the output terminal of the operational amplifier module, and the control terminal of the first gating switch is connected to the output terminal of the logic controller. The second terminals of both the first and second gating switches are connected to the control terminal of the output control module. The first terminal of the second gating switch is connected to the output terminal of the comparison module, and the control terminal of the second gating switch is connected to the output terminal of the logic controller.
6. The voltage regulator circuit according to claim 5, characterized in that, The operational amplifier module includes an operational amplifier, the first input terminal of which is connected to the voltage divider output terminal of the voltage divider module, the second input terminal of which is connected to the reference voltage terminal, and the output terminal of which is connected to the first terminal of the first gating switch.
7. The voltage regulator circuit according to claim 1, characterized in that, The voltage divider module includes a first resistor and a second resistor. The first end of the first resistor is connected to the output end of the output control module, the second end of the first resistor is connected to the first end of the second resistor, and the second end of the second resistor is connected to the first end of the output control module.
Citation Information
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