Watchdog circuit and device for shielding watchdog in software burning process

Abstract

The invention belongs to the technical field of watchdog reset, and mainly relates to a watchdog circuit and a device comprising the watchdog circuit and used for shielding a watchdog in the software burning process. Wherein the watchdog circuit comprises a watchdog chip, an nWDO end of the watchdog chip is connected with a PF I end through a diode D1, an nRESET end and a WDI end of the watchdog chip are respectively connected with the micro-control processor, and a PFI end of the watchdog chip is connected with a power interface J1; when the voltage of the nWDO end is smaller than the break-over voltage of the diode D1, the voltage of the PFI end is smaller than the first threshold voltage, and the micro-control processor receives a reset signal of the nEREST end; when the voltage of the nWDO end is smaller than the break-over voltage of the diode D1 and the power interface J1 works, the power interface J1 provides voltage for the PFI end to enable the voltage of the PFI end to be larger than first threshold voltage, and the micro-control processor receives a holding signal of the nEREST end; therefore, the technical defects that in the prior art, operation is complex, and the reliability of the whole equipment is affected due to the fact that the printed circuit board is possibly damaged by frequent welding are overcome.

Description

Technical Field

[0001] The invention belongs to the technical field of watchdog reset, and in particular relates to a watchdog circuit and a device for shielding the watchdog during software burning. Background Art

[0002] Typically, a microcontroller (MCU) periodically sends a "feed the watchdog" signal to the watchdog chip during operation to prevent the chip from triggering a reset. However, during program programming or downloading, the MCU may not yet be running or may not be functioning properly. In this case, it cannot send a signal to the watchdog chip's WDI terminal. This causes the watchdog chip's nWDO terminal to output a low level to the nMR terminal, which in turn causes the nRESET terminal to continuously send reset signals to the microcontroller (MCU), interfering with the normal program download.

[0003] To address the above technical deficiencies, during implementation, a person skilled in the art chose to add a jumper cap or resistor between the nMR and nWDO terminals of the watchdog chip, and between the nRESET terminal and the microcontroller (MCU). During program downloading or debugging, the staff can unplug the jumper cap or disconnect the resistor so that the watchdog chip will not trigger a reset. After the program download or debugging is complete, the staff can reinsert the jumper cap or solder the resistor, allowing the MCU to "feed the watchdog" normally during normal operation while avoiding accidental reset triggering during program execution.

[0004] However, for some products, due to extremely high vibration and reliability requirements, jumper caps are not permitted in the final product. This necessitates soldering resistors to short-circuit the circuit to ensure device stability. If resistors are used to disconnect the circuit, soldering with a soldering iron is required each time. This process is not only complex, but frequent soldering can also damage the printed circuit board, compromising the reliability of the entire device.

[0005] Based on this, it is urgent to improve the existing watchdog circuit and the device for shielding the watchdog during the software burning process including the watchdog circuit to solve the technical defects in the prior art. Summary of the Invention

[0006] One of the purposes of the present invention is to address the deficiencies of the prior art and provide a watchdog circuit that can shield the watchdog chip during the software programming process of a microcontroller processor.

[0007] In order to achieve the above-mentioned invention objectives, this application implements the following technical solutions:

[0008] A watchdog circuit includes a watchdog chip, wherein an nWDO terminal and a PFI terminal of the watchdog chip are connected via a diode D1, an nRESET terminal and a WDI terminal of the watchdog chip are respectively connected to a microcontroller processor, and a PFI terminal of the watchdog chip is connected to a power connector J1;

[0009] When the voltage at the nWDO terminal is less than the conduction voltage of the diode D1, the voltage at the PFI terminal is less than the first threshold voltage, and the microcontroller receives a reset signal from the nEREST terminal;

[0010] When the voltage at the nWDO terminal is less than the conduction voltage of the diode D1 and the power connector J1 is working, the power connector J1 provides a voltage to the PFI terminal so that the PFI terminal voltage is greater than the first threshold voltage, and the microcontroller receives a hold signal from the nEREST terminal.

[0011] The above technical solution produces the following technical effects:

[0012] To address the shortcomings of the aforementioned prior art, the watchdog circuit provided by this application eliminates the need for jumper caps and resistors when the watchdog chip is in normal use. The watchdog circuit of this application is short-circuited to the power supply via an external wiring harness only when the microcontroller is programming software, thereby causing the watchdog chip to send a hold signal to the microcontroller. Thus, the technical solution of this application eliminates the need for repeated plugging and unplugging of jumper caps or soldering of resistors, resulting in simple operation and no damage to the PCB pads. Furthermore, on the PCB board installed in the housing of a mass-produced product, the watchdog can be shielded via an external wiring harness during software upgrades. The overall circuit structure is ingenious and simple, requiring no additional peripheral components and resulting in high stability.

[0013] As a further improvement to a watchdog circuit of the present application, the FPI terminal is grounded through a resistor R1, and the enable terminal of the power connector J1 is connected to the PFI terminal through the resistor R1 and is grounded through a resistor R2.

[0014] As a further improvement to a watchdog circuit of the present application, when the power connector J1 is working, the enable end is pulled up to the power supply VBAT through an external connection, and the voltage at the PFI end is divided by the resistor R1 and the resistor R2 so that the voltage at the PFI end is greater than the first threshold voltage.

[0015] As a further improvement to the watchdog circuit of this application, the voltage at the PFI terminal is

[0016]

[0017] As a further improvement to a watchdog circuit of the present application, the nMR terminal of the watchdog chip is electrically connected to the nPFO terminal of the watchdog chip;

[0018] When the voltage at the PFI terminal is lower than the first threshold voltage, the nPFO terminal outputs a low level to directly trigger the nMR terminal;

[0019] After the nMR terminal is triggered, the watchdog chip drives the nEREST terminal to send a reset signal to the microcontroller processor.

[0020] As a further improvement to the watchdog circuit of the present application, the WDI terminal of the watchdog chip is used to receive the dog feeding signal sent by the control processor. When the WDI terminal does not receive the dog feeding signal, the voltage of the nWDO terminal driven by the watchdog chip is less than the conduction voltage of the diode D1.

[0021] As a further improvement to the watchdog circuit of the present application, the VCC terminal of the watchdog circuit is connected to the power supply of the microcontroller processor.

[0022] As a further improvement to the watchdog circuit of the present application, the direction of the diode D1 from the nWDO terminal to the PFI terminal is forward.

[0023] As a further improvement to the watchdog circuit of the present application, the watchdog chip is an SGM706B chip.

[0024] The second object of the present invention is to provide a device for shielding the watchdog during the software burning process of a microcontroller processor by shielding the watchdog chip during the software burning process to address the deficiencies of the existing technology.

[0025] In order to achieve the above-mentioned invention objectives, this application implements the following technical solutions:

[0026] The device for shielding the watchdog during the software burning process of the present application includes a watchdog circuit, a power connector J1 electrically connected to the watchdog circuit, and a microcontroller processor;

[0027] When the microcontroller software is burned, the power connector J1 module is pulled up. When the PFI terminal voltage of the watchdog chip in the watchdog circuit is greater than the first threshold voltage, the microcontroller receives a holding signal from the watchdog circuit.

[0028] The above technical solution produces the following technical effects:

[0029] The device for shielding the watchdog during the software burning process provided by the present application can pull up the PFI terminal voltage of the watchdog chip through the power connector J1 when the microcontroller is performing software burning, so that it is greater than the first threshold voltage. In this way, the watchdog chip will send a hold signal to the microcontroller to prevent it from resetting, thereby ensuring the smooth progress of the software burning. At the same time, when the microcontroller is operating normally, the voltage at the PFI terminal is less than the first threshold voltage, and the watchdog chip can operate normally, monitor the microcontroller, and prevent it from running and freezing due to program abnormalities. Therefore, the technical solution of the present application not only ensures the smooth progress of software burning, but also ensures the stability of the microcontroller during normal operation. In addition, the technical solution of the present application does not require repeated plugging and unplugging of jumper caps or welding resistors, is simple to operate, does not damage the PCB pads, and the overall circuit structure is ingenious and simple, does not require the addition of too many peripheral components, has high stability, and has broad application prospects. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] The drawings described herein are used to provide a further understanding of the present invention and constitute a part of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the drawings:

[0031] Figure 1 Schematic diagram of the structure of the watchdog circuit in the present invention;

[0032] Figure 2 Schematic diagram of the structure of the device for shielding the watchdog during software burning in the present invention;

[0033] in:

[0034] 1-Watchdog circuit;

[0035] 2- Microcontroller. DETAILED DESCRIPTION

[0036] The technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application. Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by technicians in the technical field of the present application. The terms used herein in the specification of the present application are only for the purpose of describing specific embodiments and are not intended to limit the present application.

[0037] In the description of the present invention, unless otherwise expressly specified or limited, the terms "mounted," "connected," "connected," and "fixed" should be understood in a broad sense. For example, they may refer to fixed connection, detachable connection, or integration; mechanical connection or electrical connection; direct connection or indirect connection through an intermediate medium; internal communication between two components or interaction between two components. Those skilled in the art will understand the specific meanings of the above terms in the present invention based on specific circumstances.

[0038] To facilitate understanding of the solutions provided by the following embodiments of the present invention, before describing the technical solutions provided by the present invention, the following terms involved in the present invention are explained as follows:

[0039] A watchdog timer chip is a dedicated integrated circuit (ASIC) used to monitor the operating status of a microcontroller (MCU) to prevent system failures due to program errors or freezes. Its functions include timed monitoring and timeout reset. In practice, the watchdog chip has a built-in counter, requiring the MCU to periodically send a "feed the watchdog" signal (such as a voltage level inversion or pulse). If the signal is not received on time, a reset signal (such as pulling nRESET low) is output, forcing the MCU to restart.

[0040] The microcontroller unit (MCU) is a single-chip computer that integrates a central processing unit (CPU), memory (ROM / RAM), input / output interface (GPIO) and peripherals (such as timers and ADC). Its main function is to run embedded software and control external devices. 2 C interface to communicate with sensors and actuators. It is used in smart homes (such as thermostats), consumer electronics (such as smart watches), and industrial automation (such as PLCs).

[0041] Watchdog Feeding: The MCU periodically sends a specific signal to the watchdog chip to reset its internal counter and prevent a timeout reset. This is primarily achieved in hardware by toggling the GPIO level (e.g., toggling the WDI pin every second). In software, this is achieved by writing a specific value to the watchdog control register (e.g., IWDG_ReloadCounter() in the STM32). If the watchdog is not fed promptly, the watchdog detects a system anomaly and triggers a reset, ensuring system recovery.

[0042] Diode: A semiconductor device with unidirectional conductivity, allowing current to flow only from the anode to the cathode. It conducts when the anode voltage is higher than the cathode voltage (voltage drop of approximately 0.3V to 0.7V, depending on the type). It also blocks current when the cathode voltage is higher than the anode voltage. It is primarily used to prevent reverse current interference (for example, in watchdog circuit 1, a diode is used to isolate nWDO and PFI).

[0043] Although the present application is disclosed as above in terms of a preferred embodiment, it is not intended to limit the claims. Any person skilled in the art may make several possible changes and modifications without departing from the concept of the present application. Therefore, the scope of protection of the present application shall be based on the scope defined by the claims of the present application.

[0044] Typically, a microcontroller (MCU) sends a "feed the watchdog" signal to the watchdog chip during operation to prevent it from triggering a reset. However, during program programming or downloading, the MCU may not be running or may not be functioning properly. Therefore, it cannot send a signal to the watchdog chip's WDI pin. This causes the watchdog chip's WDO pin to output a low level to the MR pin, which in turn causes the RESET pin to continuously send reset signals to the MCU, disrupting normal program downloading.

[0045] In order to solve this problem, those skilled in the art generally take the following measures:

[0046] 1) Add jumpers or resistors between the MR and WDO terminals, and between the RESET and MCU terminals. Remove the jumpers or disconnect the resistors during program downloads or debugging to prevent the watchdog chip from triggering a reset. After program downloads or debugging are complete, reinstall the jumpers or solder the resistors to ensure the watchdog chip is properly fed during normal operation and prevent accidental resets during program execution.

[0047] However, in some products, due to extremely high vibration and reliability requirements, jumper caps are not permitted in the final product. This necessitates soldering to short-circuit the resistors to ensure device stability. If resistors were used to disconnect the circuit, soldering would be necessary each time to connect or disconnect them. This process is not only complex, but frequent soldering can also damage the printed circuit board, compromising the reliability of the entire device.

[0048] 2) Using a watchdog with an enable pin typically results in higher chip costs, making it difficult to mass-produce. Therefore, a new solution was developed to overcome these limitations while also saving costs. Using a watchdog with an enable function, when programming is required, the enable pin is connected to GND via a jumper cap or the power connector to disable the watchdog.

[0049] However, considering that the use of a watchdog with an enable pin usually results in higher chip costs and is not conducive to mass production, we need to develop a new solution to overcome these limitations while saving costs.

[0050] In view of the limitations of the prior art, the present application aims to provide a watchdog circuit 1 design that solves the above-mentioned technical defects. This design does not require the addition of jumper caps and resistors under normal use conditions. It only needs to be connected to the power supply through an external wiring harness during the software burning process, thereby avoiding the additional cost of replacing the watchdog chip with an enabling function; at the same time, there is no need to frequently plug and unplug jumper caps or solder resistors, which simplifies the operation process and protects the PCB pads from damage. In addition, during the shell assembly stage of mass-produced products, software upgrades on the PCB board can also temporarily shield the watchdog function through an external wiring harness. The overall circuit structure design is simple, without the need to introduce too many peripheral components, ensuring the high stability of the system.

[0051] To achieve the above objectives, the present invention adopts the following technical solution, including a watchdog circuit 1, an MCU, and a power connector: the watchdog circuit 1 includes a power supply VCC, a watchdog chip, resistors R1 and R2, and a diode D1. The WDO terminal of the watchdog chip is connected to the PFI terminal via diode D1, the PFO terminal of the watchdog chip is connected to the nMR terminal of the watchdog chip, and the nRESET terminal and WDI terminal of the watchdog chip are respectively connected to the microcontroller 2 (MCU); the enable terminal of the power connector J1 is connected to the PFI terminal of the watchdog chip via resistor R1, and the PFI is connected to GND via resistor R2.

[0052] The working principle of the above technical solution is:

[0053] During normal operation, when no external power is connected to power connector J1, the voltage at the PFI pin is determined by the internal circuitry of the watchdog chip or by the default voltage divider. If the microcontroller (MCU) is feeding the watchdog normally, the nWDO pin remains high, diode D1 is reverse-blocked, the PFI pin voltage stabilizes, and the watchdog does not trigger a reset.

[0054] When the microcontroller 2 (MCU) is being burned or debugged, an external power supply is connected to the power connector J1, and the enable terminal of the power connector J1 injects a high level (such as 3.3V) into the PFI terminal, causing the voltage at the PFI terminal to exceed the first threshold. At this time, even if the nWDO terminal pulls down the diode D1 due to the lack of dog feeding, the diode D1 is forward-conducted. However, the PFI terminal is forced to be pulled high by the external power supply, and the watchdog chip determines that the power supply is normal, shielding the reset signal (that is, the nRESET terminal sends a hold signal to the microcontroller 2, driving the microcontroller 2 to perform software burning normally) to maintain a high level. That is, when the voltage at the nWDO terminal is less than the conduction voltage of the diode D1, the voltage at the PFI terminal is less than the first threshold voltage, and the microcontroller 2 receives the reset signal from the nEREST terminal;

[0055] When the voltage at the nWDO terminal is less than the conduction voltage of the diode D1 and the power connector J1 is working, the power connector J1 provides a voltage to the PFI terminal so that the PFI terminal voltage is greater than the first threshold voltage, and the microcontroller 2 receives the hold signal from the nEREST terminal.

[0056] Furthermore, the FPI terminal is grounded through the resistor R1, and the enable terminal of the power connector J1 is connected to the PFI terminal through the resistor R1 and grounded through the resistor R2. When the power connector J1 is working, the enable terminal is pulled up to the power supply VBAT through the external connection, and the voltage of the PFI terminal is divided by the resistor R1 and the resistor R2 so that the voltage of the PFI terminal is greater than the first threshold voltage. At this time, the voltage of the PFI terminal satisfies

[0057] Specifically, such as Figure 1 As shown in the figure, WDT_EN (Watchdog Enable) is the enable signal of the watchdog, which is connected to VBAT (battery power) through a pull-up resistor to ensure that the watchdog is enabled by default.

[0058] Furthermore, the watchdog chip's nMR pin is electrically connected to the watchdog chip's nPFO pin. PFO is a pin on the watchdog chip used to monitor the voltage on the PFI pin. When the PFI pin voltage is detected to be below a first threshold, PFO outputs a low-level signal. nMR is a manual reset input, typically active low. When nMR is externally forced low, the watchdog chip triggers a reset signal, restarting the microcontroller (MCU).

[0059] Therefore, in the circuit design of the present application, when the voltage of the PFI terminal is less than the first threshold voltage, the nPFO terminal outputs a low level to directly trigger the nMR terminal; after the nMR terminal is triggered, the watchdog chip drives the nEREST terminal to send a reset signal to the microcontroller processor 2.

[0060] Furthermore, the WDI terminal of the watchdog chip is used to receive a dog feeding signal sent by the control processor. When the WDI terminal does not receive the dog feeding signal, the voltage of the nWDO terminal driven by the watchdog chip is less than the conduction voltage of the diode D1.

[0061] Furthermore, diode D1 is connected in the forward direction from nWDO to PFI. When nWDO is pulled low, diode D1 conducts, pulling PFI down to 0.3V (which can be used to trigger a reset or alarm). When the external power supply is enabled, nWDO is de-energized, and diode D1 prevents PFI from being mistakenly pulled low, ensuring that power detection is not disturbed.

[0062] Specifically, the watchdog chip is a SGM706B chip, and the VCC terminal of the watchdog circuit 1 is connected to the power supply of the microcontroller 2. In addition, Figure 2 As shown, the present application also relates to a device for shielding the watchdog during software burning, comprising a watchdog circuit 1 and a power interface J1 electrically connected to the watchdog circuit 1 and a microcontroller 2; when the microcontroller 2 is software burning, the power interface J1 module is pulled up and when the PFI terminal voltage of the watchdog chip in the watchdog circuit 1 is greater than the first threshold voltage, the microcontroller 2 receives a hold signal from the watchdog circuit 1. Through the above-mentioned device, the watchdog function can be effectively shielded during the software burning process to prevent the watchdog from mistakenly triggering the reset signal and interfering with the normal burning of the program. At the same time, after the software burning is completed, the device can restore the normal monitoring function of the watchdog without performing additional operations, thereby simplifying the operation process and improving work efficiency. In addition, the device also avoids the frequent plugging and unplugging of jumper caps or welding resistors, protects the PCB pads from damage, and improves the stability and reliability of the equipment.

[0063] The present invention will be further described in detail below with reference to specific examples, but the embodiments of the present invention are not limited thereto.

[0064] Example 1

[0065] Figure 1 Take the schematic diagram of the typical watchdog chip SGM706B as an example:

[0066] When microcontroller 2 (MCU) is feeding the watchdog chip normally, the output voltage at WDO is ≥2.31V. After passing through diode D1, the input voltage at PFI is 2.31V - 0.3V = 2.01V (a diode voltage drop of 0.3V), and this input voltage is higher than the first threshold voltage of 1.29V at PFI. At this point, the output voltage at PFO is ≥2.31V, exceeding the 2V threshold at nMR. As a result, nRESET outputs a high level ≥2.31V (a high level maintains MCU 2's operation), satisfying the MCU reset requirement of not resetting.

[0067] When microcontroller 2 (MCU) is not properly fed, the output voltage at WDO is ≤0.2V. Through diode D1 (the voltage at WDO is now less than the forward voltage of diode D1 and cannot transmit voltage to PFI), the input voltage at PFI is 0V, below the PFI threshold of 1.21V. At this point, the output voltage at PFO is ≤0.3V, below the 0.8V threshold at nMR. Consequently, nRESET outputs a low level of 0.4V (below the 0.99V threshold at the reset pin of MCU 2), triggering a reset of MCU 2.

[0068] When the watchdog timer is disabled using the enable terminal of the power connector J1, the enable terminal (WDT_EN) of the power connector J1 needs to be pulled up to the power supply VBAT through an external connection. At this time, the voltage of the PFI terminal is calculated to be approximately The voltage divider resistor can be calculated through actual application. It only needs to ensure that the voltage obtained after voltage division is greater than 1.29V.

[0069] At this point, due to the presence of diode D1, when nWDO is low, the PFI pin remains unaffected and is not pulled low. When nWDO is high and reaches its theoretical maximum output voltage of 3.3V, the PFI pin voltage is 3.3V - 0.3V = 3V, exceeding the PFI pin's required voltage of 1.29V, allowing MCU 2 to operate normally. At this point, the PFO pin output voltage is ≥ 2.31V, exceeding the nMR pin's required voltage of 2V. Consequently, nRESET's output voltage is high, ≥ the 2.31V reset pin required by MCU 2, allowing MCU 2 to operate normally. Therefore, after WDT_EN is pulled up to VBAT, the watchdog chip will not output a reset signal to reset MCU 2, regardless of whether the MCU's feed signal is normal.

[0070] Example 2

[0071] The difference from Example 1 is that the following Table 1 shows the level matching of the input and output voltages of each pin of the SGM706B chip. Specifically, the data in Table 1 is the high and low level limits of the IO port of the example chip SGM706B, which is used to illustrate the feasibility of the example watchdog circuit 1.

[0072]

[0073] Table 1

[0074] As shown in Table 1, when the PFI input voltage is ≥1.29V, it is identified as a high-level input; when the voltage is ≤1.21V, it is identified as a low-level input. For the nMR terminal, its upper input threshold is 2V (active high) and its lower input threshold is 0.8V (active low). It is particularly noteworthy that the nPFO terminal outputs a high level of 2.31V when PFI monitoring is normal and a low level of 0.3V when abnormal. This voltage difference effectively drives the state switching of the nMR terminal.

[0075] Regarding the reset signal output, the high-level output of the nRESET terminal is 2.31V (typical), fully covering the MCU reset terminal operating voltage range of 0.99V-2.31V. Its low-level output is 0.4V, significantly below the MCU reset determination threshold, ensuring the reliability of the reset signal. The nWDO terminal outputs a high level of 2.31V when the dog is normally fed and a low level of only 0.2V when the dog is not fed. This wide dynamic range of voltage changes enables effective control of the PFI terminal through diode D1.

[0076] Other details that are the same as those in Implementation 1 will not be described in detail in this implementation.

[0077] Those skilled in the art will appreciate that embodiments of the present invention may provide methods, systems, or computer program products. Thus, the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to magnetic disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0078] The present invention is described with reference to flowcharts and / or block diagrams of methods, devices (systems) and computer program products according to embodiments of the present invention. It should be understood that each process and / or block in the flowcharts and / or block diagrams, as well as combinations of processes and / or blocks in the flowcharts and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowcharts and / or block diagrams. Figure 1 a process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0079] These computer program instructions may also be stored in a computer readable memory that can direct a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 a process or multiple processes and / or boxes Figure 1 The function specified in one or more boxes.

[0080] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operational steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing the instructions executed on the computer or other programmable device for implementing the process. Figure 1 a process or multiple processes and / or boxes Figure 1 A step that specifies a function in one or more boxes.

[0081] The above is only a preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, various modifications and variations of the present application are possible. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present application shall be included in the scope of protection of the present application.

Claims

1. A watchdog circuit, comprising a watchdog chip, wherein the nWDO terminal of the watchdog chip is connected to the PFI terminal via a diode D1, and the nRESET terminal and the WDI terminal of the watchdog chip are respectively connected to a microcontroller processor, characterized in that: The PFI terminal of the watchdog chip is connected to the power connector J1; When the voltage at the nWDO terminal is less than the conduction voltage of the diode D1, the voltage at the PFI terminal is less than the first threshold voltage, and the microcontroller receives a reset signal from the nEREST terminal; When the voltage at the nWDO terminal is less than the conduction voltage of the diode D1 and the power connector J1 is working, the power connector J1 provides a voltage to the PFI terminal so that the PFI terminal voltage is greater than a first threshold voltage, and the microcontroller receives a hold signal from the nEREST terminal.

2. A watchdog circuit according to claim 1, characterized in that: The FPI terminal is grounded through a resistor R1 , and an enable terminal of the power connector J1 is connected to the PFI terminal through the resistor R1 and is grounded through a resistor R2 .

3. A watchdog circuit according to claim 2, characterized in that: When the power connector J1 is working, the enable terminal is pulled up to the power supply VBAT through an external connection, and the voltage of the PFI terminal is divided by the resistor R1 and the resistor R2 so that the voltage of the PFI terminal is greater than a first threshold voltage.

4. A watchdog circuit according to claim 3, characterized in that: The voltage at the PFI terminal is 5. A watchdog circuit according to claim 1, characterized in that: The nMR terminal of the watchdog chip is electrically connected to the nPFO terminal of the watchdog chip; When the voltage of the PFI terminal is lower than a first threshold voltage, the nPFO terminal outputs a low level to directly trigger the nMR terminal; After the nMR terminal is triggered, the watchdog chip drives the nEREST terminal to send a reset signal to the microcontroller processor.

6. A watchdog circuit according to claim 1, characterized in that: The WDI terminal of the watchdog chip is used to receive the dog feeding signal sent by the microcontroller. When the WDI terminal does not receive the dog feeding signal, the voltage of the nWDO terminal driven by the watchdog chip is less than the conduction voltage of the diode D1.

7. A watchdog circuit according to claim 1, characterized in that: The VCC terminal of the watchdog circuit is connected to the power supply of the microcontroller.

8. A watchdog circuit according to claim 1, characterized in that: The direction of the diode D1 from the nWDO terminal to the PFI terminal is a forward direction.

9. A watchdog circuit according to claim 1, characterized in that: The watchdog chip is an SGM706B chip.

10. A device for shielding the watchdog during software burning, characterized in that: comprising a watchdog circuit as claimed in any one of claims 1 to 9, a power connector J1 electrically connected to the watchdog circuit, and a microcontroller processor; When the software of the microcontroller is burned, the power connector J1 pulls up the PFI terminal voltage of the watchdog chip in the watchdog circuit. When the voltage is greater than a first threshold voltage, the microcontroller receives a holding signal from the watchdog circuit.

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