Method for improving thermal stability of nickel-based silicide in semiconductor device
By depositing a nickel film structure with a gradient doping of rare earth elements at the metal/semiconductor interface of semiconductor devices and combining it with a rapid thermal annealing process, the problem of phase change of nickel-based silicide in high-temperature environments was solved, and the coordinated optimization of the resistivity and thermal stability of nickel-based silicide was achieved.
Patent Information
- Application Number
- CN202510718133.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-05-30
- Publication Date
- 2025-09-16
AI Technical Summary
Nickel-based silicides are prone to phase changes and performance degradation in high-temperature environments, resulting in insufficient thermal stability and limiting their application in advanced processes.
A nickel film structure with gradient doping of rare earth elements is deposited at the metal/semiconductor interface of the semiconductor device. A rare earth enriched layer is formed by the high content of rare earth elements at the interface to inhibit the diffusion of nickel atoms. The conductivity of the NiSi lattice is maintained by the low content of rare earth elements at the surface. Combined with the rapid thermal annealing process, a stable nickel-based silicide is formed.
The synergistic optimization of the resistivity and thermal stability of nickel-based silicide was achieved, the formation of NiSi2 high-resistance phase was suppressed, the thermal stability was improved and the grain boundary resistance was reduced.
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Figure CN120656995A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of semiconductor technology, and in particular to a method for improving the thermal stability of nickel-based silicide in semiconductor devices. Background Art
[0002] As semiconductor devices develop towards smaller feature sizes, the resistivity and thermal stability of metal / semiconductor contacts have become key factors limiting device performance. Nickel-based silicide (NiSi) is widely used in source / drain contacts and gate metallization due to its excellent electrical conductivity and moderate thermal stability. However, NiSi is prone to phase transition and performance degradation in high-temperature environments. In particular, during high-temperature annealing, NiSi is prone to phase transition to form a high-resistance state, NiSi2. Its insufficient thermal stability limits its application in advanced processes. Therefore, improving the thermal stability of NiSi has become a focus of current semiconductor research.
[0003] In view of this, the present invention is proposed. Summary of the Invention
[0004] The object of the present invention is to provide a method for improving the thermal stability of nickel-based silicide in semiconductor devices, which solves the problems raised by the above-mentioned background technology.
[0005] A first aspect of the present invention provides a method for improving the thermal stability of nickel-based silicide in a semiconductor device, comprising the following steps:
[0006] S1. forming contact holes corresponding to the source and drain regions, and performing source and drain doping;
[0007] S2, removing the oxide layer on the surface of the source and drain regions;
[0008] S3, depositing a nickel film structure doped with a gradient rare earth element in the contact hole; wherein the nickel film structure doped with a gradient rare earth element has a high rare earth content at the metal / semiconductor contact interface and a low rare earth content at the surface;
[0009] S4, forming a nickel-based silicide by a heat treatment process, and removing the unreacted nickel film structure of the gradient doped rare earth element;
[0010] S5. Deposit a metal stack to fill the contact holes.
[0011] Preferably, in step S2, the oxide layer on the surface of the source and drain regions is removed by a wet method, the solution used for the wet removal is HF solution or BOE solution, the processing time is 30 to 60 seconds, and the solution temperature is 20 to 30°C.
[0012] Preferably, in step S3, the rare earth element is any one or more of La (lanthanum), Er (erbium), Y (yttrium), Ce (cerium), Pr (praseodymium), Nd (neodymium), Pm (promethium), Sm (samarium), Eu (europium), Gd (gadolinium), Tb (terbium), Dy (dysprosium), Ho (holmium), Tm (thulium), Yb (ytterbium), and Lu (lutetium).
[0013] Preferably, in step S3, the deposition thickness of the nickel film structure gradiently doped with rare earth elements is 5 to 10 nm.
[0014] Preferably, in step S3, in the nickel film structure gradiently doped with rare earth elements, the rare earth content at the metal / semiconductor contact interface is 3-7 at.%, and the rare earth content at the surface is 0.5-2 at.%.
[0015] Preferably, in step S4, the heat treatment process includes:
[0016] S41, the first step of annealing, the annealing temperature is 250 ~ 350 ° C, the time is 30 ~ 60 seconds, to form nickel-based silicide Ni2Si;
[0017] S42, the second step is annealing, the annealing temperature is 400-600°C, the time is 10-30s, and nickel-based silicide NiSi is formed.
[0018] Preferably, in step S4, SC1 solution is used to remove unreacted metallic nickel, the treatment time is 180 to 300 seconds, and the solution temperature is 40 to 60°C.
[0019] Preferably, in step S5, the metal stack is a Ti / TiN / AlCu stack.
[0020] Preferably, the Ti / TiN / AlCu stack includes at least three layers: the first layer is Ti with a thickness of 3 to 5 nm; the second layer is TiN with a thickness of 8 to 10 nm; and the third layer is AlCu with a thickness of 200 to 400 nm.
[0021] A second aspect of the present invention provides a semiconductor device manufactured using the above method.
[0022] Specifically, the semiconductor device includes: a substrate, with source and drain regions, a channel, a high-k / metal gate and an interlayer dielectric arranged above the substrate; the source and drain regions are located on both sides of the channel, and the upper surface of the source and drain regions has a nickel-based silicide prepared by the above method; sidewalls are provided between the high-k / metal gate and the source and drain regions; the interlayer dielectric is located above the source and drain regions and the high-k / metal gate; isolation structures are provided on both sides of the substrate, and device isolation can adopt any one of Mesa, STI and LOCOS technologies.
[0023] The present invention has at least the following beneficial effects:
[0024] The present invention deposits a nickel film structure with a gradient doping of rare earth elements at the metal / semiconductor interface of a semiconductor device. The high rare earth content at the interface forms a rare earth-enriched layer at the Ni / Si interface, suppressing excessive diffusion of nickel atoms into the silicon substrate through the pinning effect and preventing the formation of the high-resistance NiSi2 phase. The low rare earth content at the surface helps maintain the conductivity of the NiSi lattice and avoids lattice distortion caused by high rare earth content. The high rare earth content at the interface suppresses element segregation, while the low rare earth content in the bulk phase maintains conductivity, achieving synergistic optimization of resistivity and thermal stability. BRIEF DESCRIPTION OF THE DRAWINGS
[0025] In order to more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the specific embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.
[0026] Figure 1 A schematic flow chart of a method for improving the thermal stability of nickel-based silicide in semiconductor devices provided by the present invention;
[0027] Figure 2 A schematic diagram of the structure after forming contact holes corresponding to the source and drain regions provided by the present invention;
[0028] Figure 3 This is a schematic diagram of the structure after source and drain doping provided by the present invention;
[0029] Figure 4 A schematic diagram of the structure after a nickel film structure with gradient doping of rare earth elements is deposited in a contact hole provided by the present invention;
[0030] Figure 5 A schematic diagram of the structure of nickel-based silicide formed by a heat treatment process provided by the present invention;
[0031] Figure 6 A schematic diagram of the structure of the nickel film structure after removing the unreacted gradient-doped rare earth elements provided by the present invention;
[0032] Figure 7 This is a schematic diagram of the structure after the contact hole is filled with deposited metal stacks provided by the present invention.
[0033] Explanation of the accompanying symbols: 1. Substrate; 2. Source and drain regions; 3. High-k / metal gate; 4. Sidewall; 5. Interlayer dielectric; 6. Isolation structure; 7. Contact hole; 8. Nickel film structure doped with rare earth elements; 81. Surface; 82. Interface; 9. Nickel-based silicide; 10. Metal stack. DETAILED DESCRIPTION
[0034] It should be noted that the following detailed descriptions are illustrative and intended to provide further explanation of the present application. Unless otherwise specified, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the art to which the present application belongs.
[0035] It should be noted that the terms used herein are only for describing specific embodiments and are not intended to limit the exemplary embodiments according to the present application. As used herein, unless the context clearly indicates otherwise, the singular also includes the plural. In addition, it should be understood that when the terms "comprise" and / or "include" are used in this specification, they indicate the presence of features, steps, operations, devices, components and / or combinations thereof.
[0036] The technical solutions of the present invention are described clearly and completely below with reference to the embodiments. It is obvious that the embodiments described are only a portion of the embodiments of the present invention, not all of them. All other embodiments derived by persons of ordinary skill in the art based on the embodiments of the present invention without creative effort are also within the scope of protection of the present invention.
[0037] Example
[0038] This embodiment provides a method for improving the thermal stability of nickel-based silicide in a semiconductor device, comprising the following steps:
[0039] S1. forming contact holes corresponding to the source and drain regions, and performing source and drain doping;
[0040] S2, removing the oxide layer on the surface of the source and drain regions;
[0041] S3. depositing a nickel film structure doped with a gradient rare earth element in the contact hole; wherein the nickel film structure doped with a gradient rare earth element has a high rare earth content at the metal / semiconductor contact interface and a low rare earth content at the surface;
[0042] S4, forming a nickel-based silicide by a heat treatment process, and removing the unreacted nickel film structure of the gradient doped rare earth element;
[0043] S5. Deposit a metal stack to fill the contact holes.
[0044] In this embodiment, in step S2, the oxide layer on the surface of the source and drain regions is removed by wet method. The solution used in the wet method is HF solution or BOE solution. The treatment time is 30-60 seconds and the solution temperature is 20-30°C.
[0045] In this embodiment, in step S3, the metal rare earth element is any one or more of La, Er, Y, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Tm, Yb, and Lu.
[0046] In this embodiment, in step S3 , the deposition thickness of the nickel film structure gradiently doped with rare earth elements is 5-10 nm.
[0047] In this embodiment, in step S3, in the nickel film structure gradiently doped with rare earth elements, the rare earth content at the metal / semiconductor contact interface is 3-7 at.%, and the rare earth content at the surface is 0.5-2 at.%.
[0048] In this embodiment, in step S4, the heat treatment process includes:
[0049] S41, the first step of annealing, the annealing temperature is 250 ~ 350 ° C, the time is 30 ~ 60 seconds, to form nickel-based silicide Ni2Si;
[0050] S42, the second step is annealing, the annealing temperature is 400-600°C, the time is 10-30s, and nickel-based silicide NiSi is formed.
[0051] In this embodiment, in step S4, SC1 solution is used to remove unreacted metallic nickel, the treatment time is 180-300 seconds, and the solution temperature is 40-60°C.
[0052] In this embodiment, in step S5 , the metal stack is a Ti / TiN / AlCu stack.
[0053] In this embodiment, the Ti / TiN / AlCu stack includes at least three layers: the first layer is Ti with a thickness of 3 to 5 nm; the second layer is TiN with a thickness of 8 to 10 nm; and the third layer is AlCu with a thickness of 200 to 400 nm.
[0054] like Figure 1 As shown, taking NMOS as an example, the preparation method of this embodiment is described in more detail with reference to the accompanying drawings:
[0055] For step S1, Figure 2 As shown, referring to the traditional NMOS device manufacturing process, a Si substrate 1 is provided to form a P well, and contact holes 7 corresponding to the source and drain regions 2 are formed by photolithography and etching processes.
[0056] Specifically, the material of the substrate 1 is not limited to Si, and other substrate materials such as SOI may also be selected.
[0057] like Figure 3 As shown, ion implantation forms n+ heavy doping in the P well, and P or As is implanted. Taking P as an example, the energy is 0.5-3keV and the dose is 1×1015 cm -3 ~1×10 16 cm -3 In addition to ion implantation, the source and drain regions 2 may also be doped with P or As using an in-situ doping method.
[0058] In step S2, a wet method is used to remove the natural oxide layer on the surface of the source and drain regions 2 to ensure that there is no interference from oxygen elements at the interface. Specifically, the solution used for the wet removal is a diluted HF solution or a diluted BOE solution, the treatment time is 30 to 60 seconds, and the solution temperature is 25°C.
[0059] For step S3, Figure 4 As shown, a nickel film structure 8 gradiently doped with rare earth elements is deposited in the contact hole 7, with a thickness of 5 to 10 nm. The rare earth element content 82 at the interface is 5 at.%, and the rare earth element content 81 at the surface decreases to 1 at.%. The high rare earth element content (5 at.%) at the interface forms a rare earth-enriched layer at the Ni / Si interface, which suppresses excessive diffusion of Ni atoms into the Si substrate through a pinning effect, avoiding the formation of a high-resistance NiSi2 phase. The rare earth element content decreases to 1 at.% at the surface, which helps maintain the conductivity of the NiSi lattice and avoids lattice distortion caused by high rare earth concentrations. The high rare earth content at the interface suppresses element segregation, while the low rare earth content in the bulk maintains conductivity, achieving synergistic optimization of resistivity and thermal stability.
[0060] Specifically, rare earth elements form a "Ni-Si-rare earth" ternary alloy with Ni and Si, which reduces the activation energy of grain boundary diffusion, promotes the metastable phase → stable phase (Ni2Si→NiSi) of NiSi2, and inhibits the stable phase → high-resistance phase (NiSi→NiSi2) to improve thermal stability. Moreover, rare earth atoms can fill grain boundary defects, optimize grain boundary resistance, reduce grain boundary resistance by 80%, and suppress resistance fluctuations.
[0061] Specifically, the rare earth element is any one or more of La, Er, Y, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Tm, Yb, and Lu.
[0062] For step S4, Figure 5 As shown, a two-step rapid thermal processing (RTP) process is used to form a stable nickel-based silicide 9. In this step, metallic nickel only reacts with Si to form the nickel-based silicide 9.
[0063] Specifically, the first annealing temperature is 250-350° C. and the time is 30-60 seconds to form nickel-based silicide Ni2Si; the second annealing temperature is 400-600° C. and the time is 10-30 seconds to form nickel-based silicide NiSi.
[0064] like Figure 6 As shown, SC1 solution (standard cleaning solution 1) is used to remove the unreacted gradient rare earth element doped nickel film structure 8, with a treatment time of 180 to 300 seconds and a solution temperature of 40 to 60° C. The SC1 solution only removes the unreacted gradient rare earth element doped nickel film structure 8 and does not react with NiSi.
[0065] For step S5, Figure 7 As shown, a Ti / TiN / AlCu metal stack 11 is deposited to fill the contact hole 7 .
[0066] Specifically, the first layer is Ti with a thickness of 3 to 5 nm; the second layer is TiN with a thickness of 8 to 10 nm; and the third layer is AlCu with a thickness of 200 to 400 nm.
[0067] This embodiment also provides a semiconductor device, comprising: a substrate 1, with source and drain regions 2, a channel, a high-k / metal gate 3, and an interlayer dielectric 5 disposed above the substrate 1; the source and drain regions 2 are located on both sides of the channel, and the upper surface of the source and drain regions 2 has a nickel-based silicide prepared by the method of this embodiment; sidewalls 4 are disposed between the high-k / metal gate 3 and the source and drain regions 2; the interlayer dielectric 5 is located above the source and drain regions 2 and the high-k / metal gate 3; isolation structures 6 are disposed on both sides of the substrate, and device isolation can adopt any one of Mesa, STI, and LOCOS technologies.
[0068] Comparative Example
[0069] The difference between this comparative example and the embodiment is that in step S3, pure nickel without rare earth element doping is deposited. The results show that high-resistance NiSi2 has begun to be generated after the second annealing step.
[0070] In summary, the present invention deposits a nickel film structure with a gradient doping of rare earth elements at the metal / semiconductor interface of the semiconductor device. The high content of rare earth elements at the interface forms a rare earth enriched layer at the Ni / Si interface, which inhibits the excessive diffusion of nickel atoms into the silicon substrate through the pinning effect, thereby avoiding the formation of the high-resistance NiSi2 phase; the low content of rare earth elements at the surface helps to maintain the conductivity of the NiSi lattice, avoiding the lattice distortion caused by the high content of rare earth. The high content of rare earth at the interface inhibits element segregation, and the low content of rare earth in the bulk phase maintains conductivity, thereby achieving synergistic optimization of resistivity and thermal stability. The present invention achieves a reduction in NiSi contact resistivity and an improvement in thermal stability through the synergistic effect of gradient doping of rare earth elements and rapid thermal annealing process, which has significant technical innovation and industrial application value.
[0071] While the above description does not provide detailed technical details regarding patterning and etching of each layer, those skilled in the art will appreciate that various technical means can be employed to form layers, regions, and the like in desired shapes. Furthermore, those skilled in the art may devise methods that differ from those described above to form the same structure. Furthermore, while each embodiment has been described separately, this does not mean that the measures in each embodiment cannot be advantageously combined.
[0072] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the above embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.
Claims
1. A method for improving the thermal stability of nickel-based silicide in semiconductor devices, characterized in that: The steps include: S1. forming contact holes corresponding to the source and drain regions, and performing source and drain doping; S2, removing the oxide layer on the surface of the source and drain regions; S3, depositing a nickel film structure doped with a gradient rare earth element in the contact hole; wherein the nickel film structure doped with a gradient rare earth element has a high rare earth content at the metal / semiconductor contact interface and a low rare earth content at the surface; S4, forming a nickel-based silicide by a heat treatment process, and removing the unreacted nickel film structure of the gradient doped rare earth element; S5. Deposit a metal stack to fill the contact holes.
2. The method for improving the thermal stability of nickel-based silicide in semiconductor devices according to claim 1, characterized in that: In step S2, the oxide layer on the surface of the source and drain regions is removed by a wet method. The solution used in the wet removal is an HF solution or a BOE solution. The treatment time is 30 to 60 seconds and the solution temperature is 20 to 30°C.
3. The method for improving the thermal stability of nickel-based silicide in semiconductor devices according to claim 1, wherein: In step S3, the rare earth element is any one or more of La, Er, Y, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Tm, Yb, and Lu.
4. The method for improving the thermal stability of nickel-based silicide in semiconductor devices according to claim 1, wherein: In step S3, the deposition thickness of the nickel film structure gradiently doped with rare earth elements is 5-10 nm.
5. The method for improving the thermal stability of nickel-based silicide in semiconductor devices according to claim 1, wherein: In step S3, in the nickel film structure gradiently doped with rare earth elements, the rare earth content at the metal / semiconductor contact interface is 3-7 at.%, and the rare earth content at the surface is 0.5-2 at.%.
6. The method for improving the thermal stability of nickel-based silicide in semiconductor devices according to claim 1, wherein: In step S4, the heat treatment process includes: S41, the first step of annealing, the annealing temperature is 250 ~ 350 ° C, the time is 30 ~ 60 seconds, to form nickel-based silicide Ni2Si; S42, the second step is annealing, the annealing temperature is 400-600°C, the time is 10-30s, and nickel-based silicide NiSi is formed.
7. The method for improving the thermal stability of nickel-based silicide in semiconductor devices according to claim 1, characterized in that: In step S4, SC1 solution is used to remove unreacted metallic nickel, the treatment time is 180-300 seconds, and the solution temperature is 40-60°C.
8. The method for improving the thermal stability of nickel-based silicide in semiconductor devices according to claim 1, wherein: In step S5, the metal stack is a Ti / TiN / AlCu stack.
9. The method for improving the thermal stability of nickel-based silicide in semiconductor devices according to claim 8, characterized in that: The Ti / TiN / AlCu stack comprises at least three layers: the first layer is Ti with a thickness of 3 to 5 nm; the second layer is TiN with a thickness of 8 to 10 nm; and the third layer is AlCu with a thickness of 200 to 400 nm.
10. A semiconductor device, characterized in that: The method according to any one of claims 1 to 9 is used to prepare the product.