Semiconductor memory device

Abstract

According to one embodiment, a semiconductor memory device includes a case, a substrate housed in the case, a semiconductor memory provided on the substrate, and a heat dissipation structure provided on the case.

Description

Technical Field

[0001] An embodiment of the present invention relates to a semiconductor memory device. Background Art

[0002] A semiconductor memory device including a housing, a substrate housed in the housing, and a semiconductor memory provided on the substrate is known. Summary of the Invention

[0003] One embodiment provides a semiconductor memory device capable of improving heat dissipation performance.

[0004] A semiconductor memory device according to one embodiment includes a housing, a substrate, a semiconductor memory, and a heat dissipation structure. The substrate is housed in the housing. The semiconductor memory is disposed on the substrate. The heat dissipation structure is disposed on the housing. The housing includes a first component and a second component. When the thickness direction of the substrate is set as a first direction, the first component includes a first wall portion, which includes a portion exposed to the outside of the housing and faces the substrate from a first side in the first direction. The second component includes a second wall portion, which includes a portion exposed to the outside of the housing and faces the substrate from a second side opposite to the first side in the first direction. The heat dissipation structure includes a plurality of first heat sinks protruding from the first wall portion toward the side opposite to the substrate. The second component further includes a third wall portion, which overlaps with a portion of the first component from the outside of the housing when viewed from a second direction in which the plurality of first heat sinks are arranged. BRIEF DESCRIPTION OF THE DRAWINGS

[0005] Figure 1 It is a perspective view showing the semiconductor memory device according to the first embodiment.

[0006] Figure 2 It is a perspective view showing the substrate unit according to the first embodiment.

[0007] Figure 3 This is a perspective view showing an exploded view of the housing and the heat dissipation structure of the first embodiment.

[0008] Figure 4 It is a perspective view showing the first component of the first embodiment.

[0009] Figure 5 It is a perspective view showing the second component of the first embodiment.

[0010] Figure 6 It is along Figure 1 sectional view of the semiconductor memory device shown in FIG. 1 along the line F6-F6.

[0011] Figure 7 It is a cross-sectional view showing a first end portion of the housing according to the first embodiment.

[0012] Figure 8 It is a cross-sectional view showing the housing and heat dissipation structure of the first embodiment.

[0013] Figure 9 It is along Figure 6 sectional view of the semiconductor memory device shown in FIG. 1 along the line F9-F9.

[0014] Figure 10 It is a bottom view showing the semiconductor memory device according to the first embodiment.

[0015] Figure 11 This is a perspective view for explaining the assembly method of the semiconductor memory device according to the first embodiment.

[0016] Figure 12 This is a cross-sectional view showing an example of a usage environment of the semiconductor memory device according to the first embodiment.

[0017] Figure 13 This is a cross-sectional view for explaining the operation of the heat dissipation structure of the first embodiment.

[0018] Figure 14 It is a cross-sectional view showing a semiconductor memory device according to a second embodiment.

[0019] Figure 15 It is a cross-sectional view showing a semiconductor memory device according to a third embodiment.

[0020] Figure 16 It is a perspective view showing a semiconductor memory device according to a fourth embodiment. DETAILED DESCRIPTION

[0021] Hereinafter, a semiconductor memory device according to an embodiment will be described with reference to the accompanying drawings. In the following description, components having the same or similar functions are denoted by the same reference numerals. In addition, repeated descriptions of these components may be omitted. In the present application, "parallel", "orthogonal", or "same" may each mean "approximately parallel", "approximately orthogonal", or "approximately the same". "Connection" in the present application is not limited to mechanical connection, but may include electrical connection. In other words, "connection" is not limited to direct connection to an object, but may include connection to an object with other elements interposed therebetween.

[0022] In this application, the +X direction, -X direction, +Y direction, -Y direction, +Z direction and -Z direction are defined as follows. The +X direction, -X direction, +Y direction and -Y direction are directions parallel to the first surface 21a of the substrate 21 described later (refer to Figure 2 +X direction is the direction from the first end 10e1 toward the second end 10e2 of the housing 10 (refer to Figure 1). The -X direction is the opposite direction of the +X direction. When the +X direction and the -X direction are not distinguished, they are simply referred to as the "X direction". The +Y direction and the -Y direction are directions that intersect (for example, are perpendicular to) the X direction. The +Y direction is the direction from one side wall (the third wall 42A) of the housing 10 described later toward the other side wall (the third wall 42B) (refer to Figure 1 ). -Y direction is the opposite direction of +Y direction. When the +Y direction and -Y direction are not distinguished, they are simply referred to as "Y direction". +Z direction and -Z direction are directions that intersect (for example, are perpendicular to) the X direction and the Y direction. +Z direction is the direction from the second wall 41 of the housing 10 described later toward the first wall 31 (refer to Figure 1 ). The -Z direction is the opposite direction of the +Z direction. When the +Z direction and -Z direction are not distinguished, they are simply referred to as the "Z direction." The Z direction is the thickness direction of the substrate 21. The Z direction is an example of the "first direction." The +Z direction side is an example of the "first side." The -Z direction side is an example of the "second side." The Y direction is an example of the "second direction."

[0023] (First embodiment)

[0024] <1. Overall Structure of Semiconductor Memory Device>

[0025] refer to Figures 1 to 13 A semiconductor storage device 1 according to a first embodiment will be described. The semiconductor storage device 1 is, for example, a storage device such as an SSD (Solid State Drive). The semiconductor storage device 1 is connected to a host device and functions as a storage device for the host device. The host device may be a personal computer, mobile device, video recorder, or in-vehicle device, but the host device is not limited to these examples.

[0026] Figure 1 1 is a perspective view showing a semiconductor memory device 1. The semiconductor memory device 1 includes, for example, a housing 10, a substrate unit 20, and a heat dissipation structure HS. Here, the substrate unit 20 will be described first.

[0027] Figure 2 This is a perspective view of substrate unit 20. Substrate unit 20 is an assembly on which components including circuits are mounted. Substrate unit 20 includes, for example, a substrate 21, a connector 22, a controller 23, multiple DRAMs (Dynamic Random Access Memory) 24, multiple NAND flash memories 25 (hereinafter referred to as "NAND 25"), multiple capacitors 26, and multiple thermally conductive components 27.

[0028] Substrate 21 is a plate member extending in the X and Y directions. Substrate 21 is a printed circuit board. Substrate 21 includes an insulating substrate and a wiring pattern provided on the insulating substrate. Substrate 21 has a first surface 21a and a second surface 21b located opposite first surface 21a. First surface 21a extends in the X and Y directions. First surface 21a faces the +Z direction. Second surface 21b extends in the X and Y directions. Second surface 21b faces the -Z direction.

[0029] The substrate 21 has a first end 21e1 and a second end 21e2. The first end 21e1 and the second end 21e2 are the ends of the substrate 21 in the longitudinal direction (X direction). The first end 21e1 is the end on the -X direction side of the substrate 21. The second end 21e2 is the end on the +X direction side of the substrate 21. In this embodiment, the second end 21e2 of the substrate 21 has a through hole 21h. The through hole 21h penetrates the substrate 21 in the Z direction. The fastening member 73 (see FIG. 2 ) described later is inserted into the through hole 21h. Figure 9 ).

[0030] The connection connector 22 is a connection portion that can be connected to the connector of the host device. The connection connector 22 includes a plurality of metal terminals that can be connected to the connector of the host device. The connection connector 22 is provided at the second end portion 21e2 of the substrate 21, for example. The connection connector 22 is inserted through the opening 10a of the housing 10 (see FIG. Figure 9 ) is exposed to the outside of the housing 10.

[0031] The controller 23 is a component that comprehensively controls the entire semiconductor storage device 1. The controller 23 is a semiconductor package. This semiconductor package, for example, includes a host interface circuit for a host device and a control circuit for controlling multiple NAND flashes 25, all integrated on a single semiconductor chip, such as an SoC (System on a Chip). The controller 23 is, for example, provided on the first surface 21a of the substrate 21.

[0032] The DRAM 24 is a data buffer that temporarily stores write data received from the host device or read data read from the NAND 25. The plurality of DRAMs 24 include, for example, a DRAM 24A disposed on the first surface 21a of the substrate 21 and a DRAM 24B disposed on the second surface 21b of the substrate 21. Alternatively, the number of DRAMs 24 may be one. Furthermore, the DRAM 24 may be disposed within the controller 23 as part of the controller 23, rather than as a separate component from the controller 23.

[0033] NAND 25 is a semiconductor package that includes a nonvolatile semiconductor memory chip. Multiple NAND 25 chips, for example, include multiple NAND 25A chips arranged on the first surface 21a of substrate 21 and multiple NAND 25B chips arranged on the second surface 21b of substrate 21. NAND 25 is an example of a "semiconductor memory." Furthermore, the "semiconductor memory" mentioned in this application is not limited to NAND 25 chips and may also include other types of semiconductor memory, such as NOR (Not-or) memory, MRAM (Magnetoresistive Random Access Memory), or resistance change memory.

[0034] Capacitor 26 is one of the components electrically connected to substrate 21. Capacitor 26 performs a power backup function, for example, to protect data during an unexpected power outage. In this embodiment, capacitor 26 continues to supply power to controller 23, multiple DRAMs 24, and multiple NAND flash memories 25 for a fixed period of time if power from the host device is unexpectedly cut off.

[0035] The heat conducting member 27 is attached to the controller 23, DRAM 24, or NAND 25, that is, each component (hereinafter referred to as "heat generating components"). The heat conducting member 27 is disposed between the heat generating components and the inner surface of the housing 10. The heat conducting member 27 is connected to the heat generating components and the inner surface of the housing 10. The heat conducting member 27 transfers at least a portion of the heat generated by the heat generating components to the housing 10.

[0036] <2. Housing and heat dissipation structure>

[0037] Then, return to Figure 1 , the housing 10 and the heat dissipation structure HS will be described.

[0038] The housing 10 houses the substrate unit 20. The housing 10 has a housing space S1 for housing the substrate unit 20. In this application, the term "housing" refers to a component that defines a space (e.g., housing space S1) for housing electronic components. Therefore, from one perspective, the heat dissipation structure HS, described later, can be considered a heat dissipation structure located outside the housing 10.

[0039] The housing 10 has a first end 10e1 and a second end 10e2. The first end 10e1 and the second end 10e2 are the ends of the housing 10 in the longitudinal direction (X direction). The first end 10e1 is the end of the housing 10 on the -X direction side. The second end 10e2 is the end of the housing 10 on the +X direction side. In this embodiment, the first end 10e1 of the housing 10 has a pair of through-holes 10h. The through-holes 10h are open in the Z direction. Fastening members FS (e.g., screws) that secure the semiconductor storage device 1 to the host device are inserted through the through-holes 10h.

[0040] In this embodiment, a heat dissipation structure HS is provided on the housing 10. The heat dissipation structure HS is, for example, formed integrally with the housing 10. However, the heat dissipation structure HS may be formed separately from the housing 10 and then attached to the housing 10 using a fixing member (such as a fastening member such as a screw, welding, or adhesive). In this application, "a heat dissipation structure is provided on the housing" may include both the case where the heat dissipation structure is formed integrally with the housing and the case where the heat dissipation structure is formed separately from the housing and then attached to the housing.

[0041] Figure 3 This is a perspective view showing the housing 10 and the heat dissipation structure HS in an exploded manner. In this embodiment, the housing 10 includes a first component 30 and a second component 40. The heat dissipation structure HS includes a first heat dissipation portion 50 formed integrally with the first component 30, and a second heat dissipation portion 60 formed integrally with the second component 40. Alternatively, the first heat dissipation portion 50 may be formed separately from the first component 30 and then mounted on the first component 30. The second heat dissipation portion 60 may also be formed separately from the second component 40 and then mounted on the second component 40. Hereinafter, for the sake of convenience, the first component 30 and the first heat dissipation portion 50 may be collectively referred to as the "first part P1." In addition, the second component 40 and the second heat dissipation portion 60 may be collectively referred to as the "second part P2."

[0042] <2.1 Part 1>

[0043] First, the first member 30 will be described.

[0044] Figure 4 1 is a perspective view showing a first part P1. The first member 30 is a member forming a portion of the housing 10. The first member 30 includes, for example, a first wall 31 and a pair of engaging portions 32.

[0045] <2.1.1 First Wall>

[0046] The first wall 31 is a plate-shaped wall extending in the X and Y directions. The first wall 31 extends in the X direction. The first wall 31 defines a portion of the end of the housing space S1 of the housing 10 on the +Z direction side (see Figure 6 The first wall 31 is a portion facing the storage space S1 from the +Z direction side. The first wall 31 is a portion facing the substrate unit 20 from the +Z direction side. The first wall 31 is an example of a "first wall part." The first wall 31 includes, for example, a first portion 31a and a second portion 31b.

[0047] The first portion 31a is located at the first end portion 10e1 of the housing 10 (see Figure 1). The first portion 31a is a region that does not overlap with the heat dissipation structure HS when viewed from the Z direction. The first portion 31a is exposed to the outside of the housing 10 (for example, the outside of the semiconductor memory device 1). The first portion 31a is a portion that faces a portion of the substrate unit 20 from the +Z direction side. The first portion 31a includes the through-hole 10h. The width W1 of the first portion 31a in the Y direction is large enough to extend between a pair of third walls 42A and 42B of the second component 40, which will be described later.

[0048] The second portion 31b is integral with the first portion 31a and extends from the first portion 31a in the +X direction. The second portion 31b overlaps with the heat dissipation structure HS when viewed from the Z direction. The second portion 31b faces a portion of the substrate unit 20 from the +Z direction. In this embodiment, the Y-direction width W2 of the second portion 31b is smaller than the Y-direction width W1 of the first portion 31a.

[0049] The first wall 31 has a first surface 31s1 and a second surface 31s2. The first surface 31s1 faces the +Z direction. The second surface 31s2 faces the -Z direction. The second surface 31s2 faces the housing space S1 of the housing 10.

[0050] The first wall 31 is thermally connected to each of the plurality of heat generating components (eg, the controller 23, the DRAM 24A, and the plurality of NAND 25A) mounted on the first surface 21a of the substrate 21 via the heat conducting member 27 (see FIG. 2 ). Figure 6 、 Figure 9 At least a portion of the heat generated by each of the plurality of heat-generating components (eg, the controller 23 , the DRAM 24A, and the plurality of NAND 25A) mounted on the first surface 21 a of the substrate 21 is transferred to the first wall 31 via the heat conducting member 27 .

[0051] <2.1.2 Fastening section>

[0052] A pair of engaging portions 32 (engaging portions 32A and 32B) are provided on the first portion 31a of the first wall 31. The pair of engaging portions 32 are spaced apart at both ends of the first portion 31a of the first wall 31 in the Y direction. Each engaging portion 32 protrudes from the first portion 31a of the first wall 31 in the -Z direction.

[0053] Each engaging portion 32 includes, for example, a first portion 33a and a second portion 33b. The first portion 33a protrudes from the first portion 31a of the first wall 31 in the -Z direction. The second portion 33b protrudes from the end of the first portion 33a on the -Z direction side in the +X direction. The function of the engaging portion 32 will be described below. The engaging portion 32 is an example of a "second engaging portion."

[0054] <2.2 First Heat Dissipation Section>

[0055] The first heat sink 50 facilitates heat dissipation from the first component 30. This facilitates heat dissipation from the first component 30. This facilitates heat dissipation from the multiple heat-generating components (e.g., the controller 23, DRAM 24A, and multiple NAND flash drives 25A) mounted on the first surface 21a of the substrate 21. In this embodiment, the first component 30 and the first heat sink 50 are made of metal (e.g., aluminum or an aluminum alloy) and have high thermal conductivity.

[0056] The first heat dissipation portion 50 includes multiple (e.g., four) heat dissipation fins 51. The multiple heat dissipation fins 51 are provided on the first wall 31 and protrude from the first wall 31 toward the side opposite to the storage space S1 (opposite to the substrate 21). The multiple heat dissipation fins 51 are arranged at regular intervals in the Y direction. Each heat dissipation fin 51 is a plate portion extending along the X and Z directions. Each heat dissipation fin 51 extends in the X direction. For example, each heat dissipation fin 51 extends in the X direction to cover at least half of the X-direction length of the second portion 31b of the first wall 31. For example, each heat dissipation fin 51 extends in the X direction to cover the entire X-direction length of the second portion 31b of the first wall 31. At least one heat dissipation fin 51 (e.g., all heat dissipation fins 51) among the multiple heat dissipation fins 51 overlaps with the controller 23 and one or more NAND devices 25 when viewed from the Z direction. The heat dissipation fin 51 is an example of a "first heat dissipation fin" and also an example of a "protrusion."

[0057] In this embodiment, the height H1 of each heat sink 51 in the Z direction is larger than the height H2 of the heat sink 63 of the second heat sink 60 described later in the Z direction (see FIG. Figure 6 In this embodiment, the number of the plurality of heat sinks 51 (e.g., 4) is greater than the number of the heat sinks 63 of the second heat sink 60 described later (e.g., 3) (see Figure 6 ).

[0058] <2.3 Part 2>

[0059] Next, the second member 40 will be described.

[0060] Figure 5 2 is a perspective view showing the second part P2. The second member 40 is a member forming another portion of the housing 10. The second member 40 includes, for example, a second wall 41, a pair of third walls 42, a pair of fourth walls 43, and a pair of engaging portions 44.

[0061] <2.3.1 Second Wall>

[0062] The second wall 41 is a plate-shaped wall extending in the X and Y directions. The second wall 41 extends in the X direction. The width of the second wall 41 in the Y direction is the same as the width W1 of the first portion 31a of the first wall 31 in the Y direction. The length of the second wall 41 in the X direction is the same as the length of the first wall 31 in the X direction. The second wall 41 is exposed to the outside of the housing 10 (for example, the outside of the semiconductor memory device 1). The second wall 41 defines the end of the housing space S1 of the housing 10 on the -Z direction side (refer to Figure 6 The second wall 41 is a portion facing the storage space S1 from the -Z direction side. The second wall 41 is a portion facing the substrate unit 20 from the -Z direction side. The second wall 41 is an example of a "second wall part".

[0063] The second wall 41 is thermally connected to each of the plurality of heat generating components (for example, the DRAM 24B and the plurality of NAND 25B) mounted on the second surface 21b of the substrate 21 via the heat conducting member 27 (see Figure 6 、 Figure 9 At least a portion of the heat generated by each of the plurality of heat-generating components (eg, the DRAM 24B and the plurality of NAND 25B) mounted on the second surface 21 b of the substrate 21 is transferred to the second wall 41 via the heat conducting member 27 .

[0064] <2.3.2 Third Wall>

[0065] Each of the pair of third walls 42 (third walls 42A and 42B) is a plate-shaped wall extending along the X and Z directions. Each of the pair of third walls 42 extends vertically from the second wall 41 toward the +Z direction. For example, one third wall 42A extends vertically from the -Y end of the second wall 41 toward the +Z direction. The third wall 42A is a portion facing the storage space S1 from the -Y side. The third wall 42A is a portion facing the substrate unit 20 from the -Y side. The other third wall 42B extends vertically from the +Y end of the second wall 41 toward the +Z direction. The third wall 42B is a portion facing the storage space S1 from the +Y side. The third wall 42B is a portion facing the substrate unit 20 from the +Y side. Each of the pair of third walls 42 extends in the X direction.

[0066] Figure 6 It is along Figure 1 , a cross-sectional view taken along line F6-F6 of the semiconductor memory device 1 is shown in FIG. Each of the pair of third walls 42 overlaps with a portion of the first component 30 when viewed from the outside of the housing 10 in the Y direction. For example, each of the pair of third walls 42 overlaps with the first wall 31 of the first component 30 when viewed from the outside of the housing 10 in the Y direction. Each of the pair of third walls 42 is an example of a "third wall portion."

[0067] In the present application, the connection portion between two walls (e.g., the connection portion J1 between the third wall 42 and the fourth wall 43) is a portion of one wall (e.g., the third wall 42) and a portion of another wall (the fourth wall 43). Therefore, in the present application, "the third wall 42 overlaps with the first wall 31 when viewed in the Y direction" includes the case where the connection portion J1 between the third wall 42 and the fourth wall 43 overlaps with the first wall 31 when viewed in the Y direction.

[0068] <2.3.3 Fourth Wall>

[0069] Each of the pair of fourth walls 43 (fourth walls 43A, 43B) is a plate-shaped wall extending in the X and Y directions. Each of the pair of fourth walls 43 extends from the third wall 42 in the Y direction. For example, one fourth wall 43A extends from the end of the third wall 42A in the +Z direction toward the +Y direction. The other fourth wall 43B extends from the end of the third wall 42B in the +Z direction toward the -Y direction. Each of the pair of fourth walls 43 defines a portion of the end on the +Z direction side of the housing space S1 of the housing 10 (refer to FIG. Figure 6 Each of the pair of fourth walls 43 is a portion facing the storage space S1 from the +Z direction side. Each of the pair of fourth walls 43 is a portion facing the substrate unit 20 from the +Z direction side. Each of the pair of fourth walls 43 extends in the X direction.

[0070] Each of the pair of fourth walls 43 overlaps with a portion of the first member 30 when viewed from the outside of the housing 10 in the Y direction. For example, each of the pair of fourth walls 43 overlaps with the first wall 31 of the first member 30 when viewed from the outside of the housing 10 in the Y direction. Each of the pair of fourth walls 43 corresponds to another example of a "third wall portion."

[0071] The fourth wall 43 has a first surface 43s1 and a second surface 43s2. The first surface 43s1 faces the +Z direction. The first surface 43s1 is, for example, located on the same plane as the first surface 31s1 of the first wall 31 of the first component 30. The second surface 43s2 is located on the -Z direction. The second surface 43s2 faces the storage space S1 of the housing 10. The second surface 43s2 is, for example, located on the same plane as the second surface 31s2 of the first wall 31 of the first component 30. In this embodiment, a cylindrical (e.g., rectangular) storage space S1 is defined by the first wall 31 of the first component 30, the second wall 41 of the second component 40, the third walls 42A and 42B, and the fourth walls 43A and 43B. The storage space S1 is open to the outside of the semiconductor storage device 1 in the +X and -X directions.

[0072] <2.3.4 Fastening section>

[0073] Back to Figure 5Next, the engaging portions 44 are described. A pair of engaging portions 44 (engaging portions 44A and 44B) are provided at the ends of the third wall 42 on the -X direction side. One engaging portion 44A is provided at the end of one third wall 42A on the -X direction side. The other engaging portion 44B is provided at the end of the other third wall 42B on the -X direction side.

[0074] The snap-fitting portion 44, for example, includes a first portion 45a and a second portion 45b. The second portion 45b is located closer to the +Z direction than the first portion 45a. The second portion 45b protrudes further toward the -X direction than the first portion 45a. Thus, the snap-fitting portion 44 includes a recess 45c defined by the step between the first portion 45a and the second portion 45b. The function of the snap-fitting portion 44 will be described below. The snap-fitting portion 44 is an example of a "first snap-fitting portion."

[0075] <2.4 Second Heat Dissipation Section>

[0076] The second heat sink 60 facilitates heat dissipation from the second component 40. This facilitates heat dissipation from the second component 40. This facilitates heat dissipation from the multiple heat-generating components (e.g., DRAM 24B and multiple NAND flash memory devices 25B) mounted on the second surface 21b of the substrate 21. In this embodiment, the second component 40 and the second heat sink 60 are made of metal (e.g., aluminum or an aluminum alloy) and have high thermal conductivity. The second heat sink 60 includes, for example, a pair of upright portions 61, a top plate 62, and multiple (e.g., three) heat sinks 63.

[0077] (Upright part)

[0078] A pair of upright portions 61 (upright portions 61A and 61B) stand upright from the fourth wall 43 of the second member 40 toward the side opposite to the accommodation space S1 (the +Z direction side). One upright portion 61A stands upright in the +Z direction from the +Y direction end of one fourth wall 43A. The other upright portion 61B stands upright in the +Z direction from the -Y direction end of the other fourth wall 43B.

[0079] In this embodiment, the upright portion 61 is a plate-shaped wall (upright wall) along the X direction and the Z direction. The upright portion 61 extends in the X direction. For example, the upright portion 61 extends in the X direction over more than half of the length of the second portion 31b of the first wall 31 in the X direction. For example, the upright portion 61 extends in the X direction over the entire length of the second portion 31b of the first wall 31 in the X direction. At least a portion of the upright portion 61 overlaps with the plurality of heat sinks 51 of the first heat dissipation portion 50 when viewed from the Y direction (see FIG. 2 ). Figure 6 ).

[0080] (Top plate)

[0081] The top plate portion covers the first heat dissipating portion 50 from the +Z direction side. The top plate portion 62 is supported by a pair of upright portions 61. The top plate portion 62 is disposed on the opposite side of the first wall 31 of the first member 30 relative to the plurality of heat dissipating fins 51.

[0082] In this embodiment, the top plate portion 62 is a plate-shaped wall (top wall) extending in the X and Y directions. The top plate portion 62 extends in the X direction. For example, the top plate portion 62 extends in the X direction over at least half of the X-direction length of the second portion 31b of the first wall 31. For example, the top plate portion 62 extends in the X direction over the entire X-direction length of the second portion 31b of the first wall 31.

[0083] (Multiple heat sinks)

[0084] A plurality of heat sinks 63 are provided on the top plate portion 62. The plurality of heat sinks 63 protrude from the top plate portion 62 toward the -Z direction. The plurality of heat sinks 63 protrude from the top plate portion 62 toward the first wall 31 of the first component 30. The plurality of heat sinks 63 are arranged at regular intervals in the Y direction. Each heat sink 63 is a plate portion extending along the X and Y directions. Each heat sink 63 extends in the X direction. Each heat sink 63 extends in the X direction, for example, so as to extend over at least half of the X-direction length of the second portion 31b of the first wall 31. Each heat sink 63 extends in the X direction, for example, so as to extend over the entire X-direction length of the second portion 31b of the first wall 31. The heat sink 63 is an example of a "second heat sink."

[0085] In this embodiment, at least one of the plurality of heat sinks 63 in the second heat sink 60 is positioned in the Y direction to correspond to a position between two of the plurality of heat sinks 51 in the first heat sink 50. Furthermore, at least one of the plurality of heat sinks 51 in the first heat sink 50 is positioned in the Y direction to correspond to a position between two of the plurality of heat sinks 63 in the second heat sink 60. In this embodiment, the heat sinks 51 and 63 are alternately positioned in the Y direction.

[0086] In this embodiment, a cylindrical (e.g., rectangular) air flow path space S2 is defined by the first wall 31 of the first component 30, the pair of upright portions 61A, 61B of the second heat dissipating portion 60, and the top plate portion 62 of the second heat dissipating portion 60 (see FIG. Figure 6 Air flow space S2 is open to the exterior of semiconductor memory device 1 in the +X and -X directions. Air can flow through air flow space S2 in the X direction. The plurality of heat sinks 51 of the first heat sink 50 and the plurality of heat sinks 63 of the second heat sink 60 are disposed within air flow space S2.

[0087] <3. Buckle structure>

[0088] Next, the engaging structure of the first member 30 and the second member 40 will be described.

[0089] Figure 7 This is a cross-sectional view showing the first end portion 10e1 of the housing 10. As described above, the engaging portion 32 of the first component 30 includes a first portion 33a and a second portion 33b. The first portion 33a protrudes from the first wall 31 in the -Z direction. The second portion 33b protrudes from the -Z end of the first portion 33a in the +X direction.

[0090] On the other hand, the snap-fit ​​portion 44 of the second component 40 includes a first portion 45a and a second portion 45b. The second portion 45b is located closer to the +Z direction than the first portion 45a. The second portion 45b protrudes further toward the -X direction than the first portion 45a. Thus, the snap-fit ​​portion 44 includes a recess 45c defined by the step between the first portion 45a and the second portion 45b. The recess 45c is provided at a position corresponding to the second portion 33b of the snap-fit ​​portion 32. By inserting the second portion 33b of the snap-fit ​​portion 32 into the recess 45c, the Z-direction position of the first component 30 relative to the second component 40 is restricted at the first end portion 10e1 of the housing 10.

[0091] In this embodiment, the engaging portion 44 has an inclined portion 45i. The inclined portion 45i is located on the opposite side of the second portion 45b relative to the recess 45c. The inclined portion 45i is located from the opposite side of the second portion 45b toward the second portion 33b of the engaging portion 32 inserted into the recess 45c. The inclined portion 45i is inclined so as to move away from the second portion 33b of the engaging portion 32 as it moves in the -X direction. The inclined portion 45i is inclined relative to the horizontal plane, for example.

[0092] If the inclined portion 45i is provided, the second portion 33b of the engaging portion 32 can be inserted into the recess 45c (see FIG. 4 ) in a tilted position relative to the second portion 45b of the engaging portion 44. Figure 7 Furthermore, by making the second portion 33b of the engaging portion 32 horizontal, the position of the first component 30 relative to the second component 40 in the Z direction is restricted (refer to Figure 7 (b) of the .

[0093] Figure 8 10 and the heat dissipation portion HS. In this embodiment, the second portion 33b of the buckle portion 32 is inserted into the recess 45c ( Figure 8 (a)). Furthermore, the first component 30 is set to be horizontal so that the first component 30 is parallel to the second component 40. Thus, the position of the first component 30 in the Z direction relative to the second component 40 is restricted in the first end portion 10e1 of the housing 10 (refer to Figure 8 (b) of the .

[0094] <4. Fixed structure>

[0095] Next, the fixing structure of the first member 30 and the second member 40 will be described.

[0096] Figure 9 It is along Figure 6 , which is a cross-sectional view taken along line F9-F9 of semiconductor memory device 1. A second end portion 10e2 of housing 10 includes a fixing portion 70. Fixing portion 70 includes, for example, a first portion 71, a second portion 72, and a fastening member 73.

[0097] The first portion 71 is provided on the first wall 31 of the first component 30. For example, the first portion 71 is a protrusion that protrudes from the first wall 31 of the first component 30 in the -Z direction. The first portion 71 has a threaded hole 71h that opens in the -Z direction. The inner circumference of the threaded hole 71h has an internal thread. The threaded hole 71h communicates with the through-hole 21h of the substrate 21.

[0098] The second portion 72 is provided on the second wall 41 of the second member 40. For example, the second portion 72 is a protrusion that protrudes from the second wall 41 of the second member 40 in the +Z direction. The second portion 72 has a through hole 72h that penetrates the second member 40 in the Z direction. The through hole 72h communicates with the through hole 21h of the substrate 21.

[0099] The fastening member 73 fastens the first member 30 and the second member 40. The fastening member 73 is, for example, a screw. The fastening member 73 is passed from the outside of the housing 10 through the through-hole 72h of the second portion 72. The fastening member 73, having passed through the through-hole 72h, engages with the threaded hole 71h of the first portion 71 via the through-hole 21h of the substrate 21. By engaging the fastening member 73 with the threaded hole 71h, the first member 30 and the second member 40 are fixed together, with the substrate 21 being sandwiched between the first portion 71 and the second portion 72.

[0100] Figure 10 This is a bottom view of the semiconductor memory device 1. In this embodiment, the fixing portion 70 is provided at the center of the housing 10 in the Y direction at the second end portion 10e2 of the housing 10. In this embodiment, the fixing portion 70 is provided at only one location in the housing 10. The first component 30 and the second component 40 are fixed by a single fastening member 73 with the engaging portions 32A and 32B engaged with the engaging portions 44A and 44B.

[0101] <5. Assembly Method>

[0102] Next, a method of assembling semiconductor memory device 1 will be described.

[0103] Figure 11 1 is a perspective view for explaining the method of assembling the semiconductor memory device 1. First, prepare a first part P1 in which the first part 30 and the first heat dissipation portion 50 are integrated, and a second part P2 in which the second part 40 and the second heat dissipation portion 60 are integrated (see FIG. Figure 11 For example, the first part P1 is formed integrally by extruding the first component 30 and the first heat dissipating portion 50. For example, the second part P2 is formed integrally by extruding the second component 40 and the second heat dissipating portion 60.

[0104] Next, the substrate unit 20 is inserted into the interior of the second part P2. The substrate unit 20 is placed on the second wall 41 of the second component 40 via the heat conducting member 27. In addition, a portion of the substrate 21 is placed on the second portion 72 included in the fixing portion 70 (see FIG. 2 ). Figure 9 ).

[0105] Next, the first part P1 is inserted into the interior of the second part P2 in such a manner that the heat sink 51 of the first heat sink 50 is inserted between the plurality of heat sinks 63 of the second heat sink 60 (see FIG. Figure 11 For example, the first part P1 can be inserted into the interior of the second part P2 along the X direction by allowing the left and right side portions of the first wall 31 to follow the inner surfaces of the pair of upright portions 61A and 61B of the second heat dissipating portion 60 and being guided by the inner surfaces of the upright portions 61A and 61B.

[0106] Next, the first part P1 is tilted in the Z direction relative to the second part P2 (refer to Figure 8 (a) of the first part 30), the engaging portions 32A and 32B of the first part 30 are engaged with the engaging portions 44A and 44B of the second part 40. Next, the first part P1 is brought into a parallel position relative to the second part P2 (refer to Figure 8 (b)). Furthermore, the first component 30 and the second component 40 are fixed using the fastening member 73 (refer to Figure 11 (c)). Thus, the first part P1 and the second part P2 are integrated. The substrate unit 20 is sandwiched between the first wall 31 of the first part 30 and the second wall 41 of the second part 40 via the heat conducting member 27. Thus, the assembly of the semiconductor memory device 1 is completed.

[0107] <6. Function>

[0108] Next, the function of the heat dissipation structure HS will be described.

[0109] Figure 12 1 is a cross-sectional view showing an example of a usage environment of the semiconductor memory device 1 . Figure 12 FIG. 1 shows a usage environment in which the semiconductor memory device 1 is connected to the connector HDa of the host device HD. Figure 12 In the figure, for the convenience of explanation, the substrate unit 20 is omitted.

[0110] like Figure 12 As shown, multiple semiconductor memory devices are arranged side by side in the Z direction, for example. In the host device HD, the Z-direction position of the connector HDa connected to the semiconductor memory device 1 is specified by the specifications or specifications. Furthermore, in the host device HD, the region R where the heat sink of the semiconductor memory device 1 can be placed is specified by the specifications or specifications. Thus, semiconductor memory device 1 is sometimes limited to having the heat sink located on the -Z-direction side of the housing 10.

[0111] Figure 13 This is a cross-sectional view illustrating the operation of the heat dissipation structure HS of this embodiment. Here, a small gap g exists between the first wall 31 of the first component 30 and the fourth walls 43A, 43B of the second component 40, allowing the first component 30 and the second component 40 to be assembled. Consequently, heat transfer between the first component 30 and the second component 40 is limited.

[0112] Arrow A in the figure indicates the path of heat generated by heat-generating components (e.g., controller 23, DRAM 24A, and NAND 25A) mounted on first surface 21a of substrate 21. At least a portion of the heat generated by the heat-generating components mounted on first surface 21a of substrate 21 is transferred from the heat-generating components via heat-conducting member 27 and first wall 31 to the plurality of heat sinks 51 of first heat dissipation section 50. The heat transferred to the plurality of heat sinks 51 is dissipated to the outside by, for example, air flowing through air flow space S2.

[0113] On the other hand, arrow B in the figure shows the path of heat transfer generated by the heat-generating components (e.g., DRAM 24B and NAND 25B) mounted on the second surface 21b of the substrate 21. At least a portion of the heat generated by the heat-generating components mounted on the second surface 21b of the substrate 21 is transferred from the heat-generating components to the third wall 42 and the fourth wall 43 of the second component 40 via the heat-conducting member 27 and the second wall 41. In this embodiment, the third wall 42 and the fourth wall 43 of the second component 40 overlap with the first wall 31 of the first component 30 from the outside of the housing 10 and are exposed to the outside of the semiconductor memory device 1. Therefore, at least a portion of the heat transferred to the third wall 42 and the fourth wall 43 of the second component 40 diffuses from the third wall 42 and the fourth wall 43 to the outside of the semiconductor memory device 1.

[0114] Furthermore, a portion of the heat transferred to third wall 42 and fourth wall 43 is transferred from third wall 42 and fourth wall 43 to second heat dissipation portion 60. A portion of the heat transferred to second heat dissipation portion 60 is released from upright portion 61 and top plate portion 62 of second heat dissipation portion 60 to the outside of semiconductor memory device 1. Furthermore, a portion of the heat transferred to second heat dissipation portion 60 is transferred to the plurality of heat dissipation fins 63. The heat transferred to the plurality of heat dissipation fins 63 is diffused to the outside by, for example, air flowing through air flow path space S2.

[0115] <4. Advantages>

[0116] As a comparative example, consider a structure in which the housing 10 is formed by a base member having a second wall 41 and a cover member having a first wall 31, a third wall 42, a fourth wall 43, and a plurality of heat sinks 51. In this comparative example, the base member and the cover member are separate. At least a portion of the heat transferred from the heat-generating components mounted on the first surface 21a of the substrate 21 to the first wall 31 is diffused to the outside through the first wall 31, the third wall 42, the fourth wall 43, and the plurality of heat sinks 51. On the other hand, the heat from the heat-generating components mounted on the second surface 21b of the substrate 21 is transferred to the second wall 41 and diffused. However, since the heat dissipation area is limited, it is difficult to promote heat dissipation. Therefore, it is difficult to diffuse the heat transferred from the substrate 21 to the first wall 31 and the heat transferred from the substrate 21 to the second wall 41 to the outside in a well-balanced manner, making it difficult to improve the heat dissipation performance of the semiconductor storage device.

[0117] On the other hand, in this embodiment, the semiconductor memory device 1 includes a housing 10 and a heat dissipation structure HS. The heat dissipation structure HS is provided in the housing 10. The housing 10 includes a first component 30 and a second component 40. The first component 30 includes a first wall portion (e.g., first wall 31). The first wall portion includes a portion exposed to the outside of the housing 10 and faces the substrate 21 from the +Z direction side. The second component 40 includes a second wall portion (e.g., second wall 41). The second wall portion includes a portion exposed to the outside of the housing 10 and faces the substrate 21 from the -Z direction side. The heat dissipation structure HS includes a plurality of heat dissipation fins 51 protruding from the first wall 31 toward the side opposite to the substrate 21. The second component 40 includes a third wall portion (e.g., third wall 42 or fourth wall 43) that overlaps with a portion of the first component 30 when viewed from the outside of the housing 10 in the direction in which the plurality of heat dissipation fins 51 are arranged. For example, the second wall portion and the third wall portion are integrally formed. For example, the second component 40 is a single-piece component including the second wall portion and the third wall portion.

[0118] With this configuration, at least a portion of the heat transferred from substrate 21 to the first wall portion is dissipated to the outside via the plurality of heat sinks 51. Meanwhile, at least a portion of the heat transferred from substrate 21 to the second wall portion is dissipated to the outside via the third wall portion, which overlaps with first component 30 from the outside of housing 10. Consequently, compared to the configuration of the comparative example, for example, the heat transferred from substrate 21 to the first wall portion and the heat transferred from substrate 21 to the second wall portion can be dissipated to the outside with a better balance. This improves the heat dissipation performance of semiconductor memory device 1.

[0119] In this embodiment, the third wall overlaps with the first wall when viewed from the outside of the housing 10, as seen from the direction in which the plurality of heat sinks 51 are arranged. With this configuration, at least a portion of the heat transferred from the substrate 21 to the second wall is dissipated to the outside via the third wall, which overlaps with the first wall from the outside of the housing 10. This allows the heat transferred from the substrate 21 to the first wall to be dissipated in a well-balanced manner with the heat transferred from the substrate 21 to the second wall. This improves the heat dissipation performance of the semiconductor memory device 1.

[0120] In this embodiment, the housing 10 has a storage space S1 for accommodating the substrate 21. The first wall portion faces the storage space S1 from the +Z direction side. The second wall portion faces the storage space S1 from the -Z direction side. The third wall portion (e.g., the fourth wall 43) faces the storage space S1 from the +Z direction side. With this configuration, at least a portion of the heat transferred from the substrate 21 to the second wall portion is dissipated to the outside through the third wall portion located on the +Z direction side relative to the storage space S1. This further improves the heat dissipation performance of the semiconductor memory device 1.

[0121] In this embodiment, the heat dissipation structure HS includes a first heat dissipation portion 50 comprising a plurality of heat dissipation fins 51 and a second heat dissipation portion 60 provided on the second member 40. At least a portion of the second heat dissipation portion 60 overlaps with at least a portion of the heat dissipation fins 51 when viewed from the direction in which the heat dissipation fins 51 are arranged. With this configuration, at least a portion of the heat transferred from the substrate 21 to the second wall portion is dissipated to the outside via the second heat dissipation portion 60, which is arranged in alignment with at least a portion of the heat dissipation fins 51. This further improves the heat dissipation performance of the semiconductor memory device 1.

[0122] In this embodiment, the second heat dissipation portion 60 includes a plurality of second heat dissipation fins 63. The plurality of second heat dissipation fins 63 are arranged in the direction in which the plurality of heat dissipation fins 51 are arranged. With this configuration, at least a portion of the heat transferred from the substrate 21 to the second wall portion is dissipated to the outside via the plurality of heat dissipation fins 63. This further improves the heat dissipation performance of the semiconductor memory device 1.

[0123] In this embodiment, the second heat dissipation portion 60 includes an upright portion 61 and a top plate portion 62. The upright portion 61 overlaps with the plurality of heat dissipation fins 51 when viewed from the direction in which the plurality of heat dissipation fins 51 are arranged. The top plate portion 62 is supported by the upright portion 61 and is arranged on the opposite side of the first wall portion relative to the plurality of heat dissipation fins 51. A plurality of heat dissipation fins 63 protrude from the top plate portion 62 toward the first wall portion. With this configuration, at least a portion of the heat transferred from the substrate 21 to the second wall portion is dissipated to the outside via the plurality of heat dissipation fins 63 arranged on the opposite side of the first wall portion relative to the plurality of heat dissipation fins 51. This further improves the heat dissipation performance of the semiconductor memory device 1.

[0124] In this embodiment, at least one heat sink 63 included in the plurality of heat sinks 63 is positioned between two heat sinks 51 included in the plurality of heat sinks 51. This configuration facilitates air flow around the plurality of heat sinks 51 and the plurality of heat sinks 63. This further improves the heat dissipation performance of semiconductor memory device 1.

[0125] In this embodiment, the third wall portion (e.g., third wall 42) has a snap-fit ​​portion 44. The first component 30 includes a snap-fit ​​portion 32 that engages with the snap-fit ​​portion 44 to restrict its position in the Z direction. This configuration, by using the snap-fit ​​portion 44 provided on the third wall portion to improve heat dissipation, reduces the number of fastening components required for assembling the semiconductor memory device 1. Consequently, the semiconductor memory device 1 can achieve either or both improved assemblability and reduced manufacturing costs.

[0126] (Second embodiment)

[0127] Next, the second embodiment will be described. The second embodiment differs from the first embodiment in that the second heat dissipating portion 60 does not include the heat dissipating fins 63 , etc. The configuration other than that described below is the same as that of the first embodiment.

[0128] Figure 14 This is a cross-sectional view of a semiconductor memory device 1A according to a second embodiment. In this embodiment, the second heat dissipating portion 60 does not include a top plate portion 62 or heat dissipating fins 63. The air flow path space S2 is open in the +Z direction. The upright portion 61 of the second heat dissipating portion 60 functions as a heat dissipating fin, for example.

[0129] With this configuration, at least a portion of the heat transferred from substrate 21 to first wall 31 is dissipated to the outside via the plurality of heat dissipating fins 51. Meanwhile, at least a portion of the heat transferred from substrate 21 to second wall 41 is dissipated to the outside via the third wall portion (third wall 42 or fourth wall 43) overlapping with first member 30 from the outside of housing 10 and the rising portion 61 of second heat dissipating portion 60. Consequently, compared to the configuration of the comparative example, for example, the heat transferred from substrate 21 to first wall 31 and the heat transferred from substrate 21 to second wall 41 can be dissipated to the outside with a better balance. This improves the heat dissipation performance of semiconductor memory device 1.

[0130] (Third embodiment)

[0131] Next, the third embodiment will be described. The third embodiment differs from the first embodiment in that the second heat dissipation portion 60 is not provided. The configuration other than that described below is the same as that of the first embodiment.

[0132] Figure 15 1 is a cross-sectional view showing a semiconductor memory device 1B according to Embodiment 3. In this embodiment, the second heat dissipating portion 60 is not provided.

[0133] With this configuration, at least a portion of the heat transferred from substrate 21 to first wall 31 is dissipated to the outside via the plurality of heat sinks 51. Meanwhile, at least a portion of the heat transferred from substrate 21 to second wall 41 is dissipated to the outside via the third wall portion (third wall 42 or fourth wall 43) that overlaps with first member 30 from the outside of housing 10. Consequently, compared to the configuration of the comparative example, for example, the heat transferred from substrate 21 to first wall 31 and the heat transferred from substrate 21 to second wall 41 can be dissipated to the outside with a better balance. This improves the heat dissipation performance of semiconductor memory device 1B.

[0134] (Fourth embodiment)

[0135] Next, the fourth embodiment will be described. The third embodiment differs from the first embodiment in that the first heat dissipation portion 50 has a plurality of protrusions 51A, and the second heat dissipation portion 60 has a plurality of protrusions 63A. The configuration other than that described below is the same as that of the first embodiment.

[0136] Figure 16This is a cross-sectional view of a semiconductor storage device 1C according to a fourth embodiment. In this embodiment, the first heat dissipation portion 50 includes a plurality of protrusions 51A instead of the plurality of heat sinks 51. The plurality of protrusions 51A protrude from the first wall 31 toward the +Z direction. The protrusions 51A are, for example, cylindrical, but may also be prism-shaped, conical, or pyramid-shaped. The plurality of protrusions 51A are arranged at intervals in the X and Y directions. Similarly, the second heat dissipation portion 60 includes a plurality of protrusions 63A instead of the plurality of heat sinks 63. The plurality of protrusions 63A protrude from the top plate portion 62 toward the -Z direction. The protrusions 63A are, for example, cylindrical, but may also be prism-shaped, conical, or pyramid-shaped. The plurality of protrusions 63A are arranged at intervals in the X and Y directions.

[0137] With this configuration, at least a portion of the heat transferred from substrate 21 to first wall 31 is dissipated to the outside via multiple protrusions 51A. Meanwhile, at least a portion of the heat transferred from substrate 21 to second wall 41 is dissipated to the outside via the third wall portion (third wall 42 or fourth wall 43) and multiple protrusions 63A, which overlap with first member 30 from the outside of housing 10. Consequently, compared to the configuration of the comparative example, for example, the heat transferred from substrate 21 to first wall 31 and the heat transferred from substrate 21 to second wall 41 can be dissipated to the outside with a better balance. This improves the heat dissipation performance of semiconductor memory device 1C.

[0138] Although several embodiments have been described above, the embodiments are not limited to the examples described above. For example, a plurality of embodiments may be combined with each other to realize the present invention.

[0139] According to at least one embodiment described above, a semiconductor memory device of the embodiment includes a housing, a substrate, a semiconductor memory, and a heat dissipation structure. The housing includes a first component and a second component. When the thickness direction of the substrate is set as a first direction, the first component includes a first wall portion facing the substrate from a first side in the first direction. The second component includes a second wall portion facing the substrate from a second side opposite to the first side in the first direction. The heat dissipation structure includes a plurality of first heat sinks protruding from the first wall portion toward the opposite side of the substrate. The second component further includes a third wall portion that overlaps with a portion of the first component from the outside of the housing when viewed from a second direction in which the plurality of first heat sinks are arranged. According to this configuration, it is possible to improve the heat dissipation performance of the semiconductor memory device.

[0140] While several embodiments of the present invention have been described above, these embodiments are provided as examples and are not intended to limit the scope of the invention. These embodiments may be implemented in various other forms and may be omitted, replaced, or modified without departing from the spirit of the invention. These embodiments and their variations are intended to be within the scope and spirit of the invention and are encompassed by the invention as set forth in the claims and their equivalents.

[0141] [Explanation of symbols]

[0142] 1 Semiconductor memory device

[0143] 10. Housing

[0144] 20 substrate units

[0145] 21 substrate

[0146] 23 Controller

[0147] 24 DRAM

[0148] 25 NAND flash memory (semiconductor memory)

[0149] 30 Part 1

[0150] 31 1st wall (1st wall part)

[0151] 32, 32A, 32B buckle part (second buckle part)

[0152] 40 Part 2

[0153] 41 2nd wall (2nd wall part)

[0154] 42, 42A, 42B third wall (third wall portion)

[0155] 43, 43A, 43B 4th wall (3rd wall)

[0156] 44, 44A, 44B buckle part (first buckle part)

[0157] 50 1st heat dissipation unit

[0158] 51 heat sink (1st heat sink)

[0159] 51A protrusion

[0160] 60 2nd heat dissipation unit

[0161] 61,61A,61B vertical part

[0162] 62 top plate

[0163] 63 heat sink (second heat sink)

[0164] 63A protrusion

[0165] HS heat dissipation structure.

Claims

1. A semiconductor memory device comprising: shell; a substrate housed in the housing; a semiconductor memory disposed on the substrate; and a heat dissipation structure, disposed on the housing; and The housing includes a first component and a second component. When the thickness direction of the substrate is defined as the first direction, The first component includes a portion exposed to the outside of the housing and has a first wall portion facing the substrate from a first side in the first direction. The second member includes a portion exposed to the outside of the housing and has a second wall portion facing the substrate from a second side opposite to the first side in the first direction. The heat dissipation structure includes a plurality of first heat dissipation fins protruding from the first wall portion toward the side opposite to the substrate. The second member further includes a third wall portion that overlaps with a portion of the first member from the outside of the housing when viewed from a second direction in which the plurality of first heat sinks are arranged.

2. The semiconductor memory device according to claim 1, wherein The third wall portion overlaps with the first wall portion from the outside of the housing when viewed from the second direction.

3. The semiconductor memory device according to claim 1 or claim 2, wherein The second member is a one-piece member including the second wall portion and the third wall portion.

4. The semiconductor memory device according to claim 1 or claim 2, wherein The housing has a receiving space for receiving the substrate. The first wall portion faces the accommodation space from the first side in the first direction. The second wall portion faces the accommodation space from the second side in the first direction. The third wall portion faces the accommodation space from the first side in the first direction.

5. The semiconductor memory device according to claim 1 or claim 2, wherein The heat dissipation structure includes: a first heat dissipation portion including the plurality of first heat dissipation fins, and a second heat dissipation portion provided on the second component. At least a portion of the second heat dissipating portion overlaps with at least a portion of the plurality of first heat dissipating fins when viewed from the second direction. The semiconductor memory device according to claim 5 , wherein The second heat dissipation portion includes a plurality of second heat dissipation fins arranged in the second direction.

7. The semiconductor memory device according to claim 6, wherein The second heat dissipation portion further comprises: a standing portion, which overlaps with the plurality of first heat dissipation fins when viewed from the second direction; and a top plate portion, which is supported by the standing portion and is arranged on the opposite side of the first wall portion relative to the plurality of first heat dissipation fins; and The plurality of second heat dissipation fins protrude from the top plate portion toward the first wall portion.

8. The semiconductor memory device according to claim 7, wherein At least one second heat sink included in the plurality of second heat sinks is disposed corresponding to a position between two first heat sinks included in the plurality of first heat sinks.

9. The semiconductor memory device according to claim 1 or claim 2, wherein The third wall portion has a first buckling portion, The first member includes a second engaging portion that is engaged with the first engaging portion to regulate the position in the first direction.

10. The semiconductor memory device according to claim 1 or claim 2, further comprising: A controller provided on the substrate, At least one first heat sink included in the plurality of first heat sinks overlaps with the semiconductor memory and the controller when viewed from the first direction.

11. The semiconductor memory device according to claim 1 or claim 2, wherein The first wall portion and the third wall portion are separated from each other with a gap therebetween.

12. A semiconductor memory device comprising: shell; a substrate housed in the housing; a semiconductor memory disposed on the substrate; and a heat dissipation structure, disposed on the housing; and The housing includes a first component and a second component. When the thickness direction of the substrate is defined as the first direction, The first component includes a portion exposed to the outside of the housing and has a first wall portion facing the substrate from a first side in the first direction. The second member includes a portion exposed to the outside of the housing and has a second wall portion facing the substrate from a second side opposite to the first side in the first direction. The heat dissipation structure includes a first heat dissipation portion provided on the first component and a second heat dissipation portion provided on the second component. The first heat dissipation portion includes a plurality of first heat dissipation fins provided on the first wall portion. The second heat dissipation portion includes a plurality of second heat dissipation fins arranged on the opposite side of the second wall portion with respect to the first wall portion.

13. The semiconductor memory device according to claim 12, wherein The housing has a receiving space for receiving the substrate. The first wall portion faces the accommodation space from the first side in the first direction. The second wall portion faces the accommodation space from the second side surface in the first direction.

14. A semiconductor memory device comprising: shell; a substrate housed in the housing; a semiconductor memory disposed on the substrate; and a heat dissipation structure, disposed on the housing; and The housing includes a first component and a second component. When the thickness direction of the substrate is set as the first direction, The first component includes a portion exposed to the outside of the housing and has a first wall portion facing the substrate from a first side in the first direction. The second member includes a portion exposed to the outside of the housing and has a second wall portion facing the substrate from a second side opposite to the first side in the first direction. The heat dissipation structure includes a plurality of protrusions protruding from the first wall toward the opposite side of the substrate. The second member further includes a third wall portion that overlaps with a portion of the first member from the outside of the housing when viewed from the second direction in which the plurality of protrusions are arranged.

15. The semiconductor memory device according to claim 14, wherein The housing has a receiving space for receiving the substrate. The first wall portion faces the accommodation space from the first side in the first direction. The second wall portion faces the accommodation space from the second side surface in the first direction.

Images