Prediction and control of power modules of electrical load

Abstract

Prediction and control of power modules of an electrical load. A system for prediction and control of a power module includes a gate driver circuit and a controller circuit. The gate driver circuit drives a target gate node of a target power transistor in response to a pulse width modulation signal, measures a target gate voltage, switches a desaturation signal in response to the target power transistor switching between an off-state and an on-state, measures a target transistor voltage, and measures a target transistor current. The controller circuit modulates the pulse width modulation signal to increase a target gate voltage, determines a target threshold voltage as the target gate voltage in response to the desaturation signal switching state, determines a target on-resistance based on the target transistor voltage and the target transistor current, and controlling the target power transistor based on the target threshold voltage and the target on-resistance.

Description

[0001] introduction

[0002] The present disclosure relates to a system and method for prognosis and control of power modules for electrical loads.

[0003] Power module designs for electric motors typically incorporate multiple power transistors. In some designs, the same power transistor type is used. In hybrid power modules, different transistor types, transistor sizes, and / or semiconductor materials are used. Component-to-component variations, type-to-type variations, semiconductor-to-semiconductor variations, size variations, reductions in threshold voltage, and reductions in drain-to-source / collector-to-emitter on-resistance can cause second-order effects during operation. These effects typically include, but are not limited to, current sharing mismatch, false turn-on, overvoltage spikes, and electromagnetic interference.

[0004] Therefore, those skilled in the art continue their research and development efforts in the field of prediction and control of power modules of electrical loads. Summary of the Invention

[0005] A system for predicting and controlling a power module for an electrical load is provided herein. The system includes a gate driver circuit and a controller circuit. The gate driver circuit is coupled to a target power transistor in the power module. The target power transistor includes a target gate node, a target high-side node, and a target low-side node. The gate driver circuit is operable to drive the target gate node in response to a pulse-width modulated signal, measure a target gate voltage between the target gate node and a target low-side node, switch a desaturation signal in response to the target power transistor switching between an off state and an on state, measure a target transistor voltage between the target high-side node and a target low-side node, and measure a target transistor current from the target high-side node to the target low-side node. The controller circuit is in electrical communication with the gate driver circuit. The controller circuit is operable to modulate the pulse-width modulated signal to increase the target gate voltage, determine a target threshold voltage of the target power transistor as the target gate voltage in response to the desaturation signal switching from the off state to the on state, determine a target on-resistance of the target power transistor based on the target transistor voltage and the target transistor current, and control the target power transistor based on the target threshold voltage and the target on-resistance.

[0006] In one or more embodiments of the system, the controller circuit is further operable to command a reduction in the high power voltage received by the power module during determination of the target threshold voltage and the target on-resistance of the target power transistor.

[0007] In one or more embodiments of the system, measurements of the target transistor voltage are performed at a predetermined test temperature and two different current points.

[0008] In one or more embodiments of the system, the controller circuit is further operable to control the gate driver circuit to precondition the target gate node before determining the target threshold voltage and the target on-resistance of the target power transistor.

[0009] In one or more embodiments of the system, the pulse width modulated signal is modulated at a plurality of different amplitudes.

[0010] In one or more embodiments of the system, the controller circuit is further operable to control the temperature of the power module to one or more of (i) an efficient operating temperature and (ii) a peak torque operating temperature during determination of the target threshold voltage and target on-resistance of the target power transistor.

[0011] In one or more embodiments of the system, the controller circuit is further operable to control sampling timing for measurements of the target transistor voltage and the target transistor current.

[0012] In one or more embodiments of the system, the power module includes a plurality of power transistors. The controller circuit is further operable to command one or more of (i) the gate driver circuit and (ii) the multiplexer to electrically isolate the target power transistor from the plurality of power transistors during determination of a target threshold voltage and a target on-resistance of the target power transistor.

[0013] In one or more embodiments of the system, the controller circuit is further operable to detect degradation of the target power transistor based on the target threshold voltage and the target on-resistance.

[0014] In one or more embodiments of the system, the controller circuit is further operable to detect a failure of the target power transistor based on the target threshold voltage and the target on-resistance.

[0015] In one or more embodiments of the system, the controller circuit is further operable to calculate a temperature of the target power transistor based on the target on-resistance.

[0016] In one or more embodiments of the system, the power module includes a plurality of power transistors, and the plurality of power transistors includes one or more of (i) a plurality of different transistor types and (ii) a plurality of different semiconductor types.

[0017] In one or more embodiments, the system includes a galvanic isolation circuit between a high power voltage received by the power module and a supply voltage received by the controller circuit.

[0018] In one or more embodiments of the system, the power module includes a plurality of power transistors having a plurality of threshold voltages and a plurality of on-resistances. The controller circuit is further operable to adjust one or more of (i) a switching speed of the plurality of power transistors and (ii) a switching utilization of the plurality of power transistors based on one or more of (1) the plurality of threshold voltages and (2) the plurality of on-resistances.

[0019] In one or more embodiments of the system, the controller circuit is further operable to utilize the target threshold voltage and the target on-resistance for one or more of thermal control, dynamic switching control, and degradation mitigation of the target power transistor.

[0020] In one or more embodiments, the system includes one or more of a discrete temperature sensor operable to measure a temperature of a target power transistor and a discrete current sensor operable to measure a current of the target transistor.

[0021] In one or more embodiments of the system, the controller circuit is further operable to detect degradation in the target power transistor based on one or more of the target threshold voltage and the target on-resistance, and to assert an alarm signal in response to detecting the degradation.

[0022] In one or more embodiments of the system, the gate driver circuit is further operable to measure one or more of: (i) a current across a parasitic inductor connected in series with the target power transistor, and (ii) a voltage across a parasitic capacitor connected in parallel with the target power transistor. The controller circuit is further operable to calculate a switching speed of the target power transistor in response to one or more of (i) the current across the parasitic inductor and (ii) the voltage across the parasitic capacitor.

[0023] A method for predicting and controlling a power module for an electrical load is provided herein. The method includes driving a target gate node of a target power transistor of the power module using a gate driver circuit in response to a pulse width modulated signal. The target power transistor includes a target gate node, a target high-side node, and a target low-side node. The method further includes measuring a target gate voltage between the target gate node and the target low-side node, switching a desaturation signal in response to the target power transistor switching between an off state and an on state, measuring a target transistor voltage between the target high-side node and the target low-side node, and measuring a target transistor current from the target high-side node to the target low-side node. The method includes modulating the pulse width modulated signal using a controller circuit in electrical communication with the gate driver circuit to increase the target gate voltage, determining a target threshold voltage of the target power transistor as the target gate voltage in response to the desaturation signal switching from the off state to the on state, determining a target on-resistance of the target power transistor based on the target transistor voltage and the target transistor current, and controlling the target power transistor based on the target threshold voltage and the target on-resistance.

[0024] A vehicle is provided herein. The vehicle includes an electric motor, a power module, a gate driver circuit, and a controller circuit. The gate driver circuit is coupled to a target power transistor in the power module. The target power transistor includes a target gate node, a target high-side node, and a target low-side node. The gate driver circuit is operable to drive the target gate node in response to a pulse-width modulated signal, measure a target gate voltage between the target gate node and a target low-side node, switch a desaturation signal in response to the target power transistor switching between an off state and an on state, measure a target transistor voltage between the target high-side node and a target low-side node, and measure a target transistor current from the target high-side node to the target low-side node. The controller circuit is in electrical communication with the gate driver circuit. The controller circuit is operable to modulate the pulse-width modulated signal to increase the target gate voltage, determine a target threshold voltage of the target power transistor as the target gate voltage in response to the desaturation signal switching from the off state to the on state, determine a target on-resistance of the target power transistor based on the target transistor voltage and the target transistor current, and control the target power transistor based on the target threshold voltage and the target on-resistance.

[0025] This application provides the following technical solutions:

[0026] 1. A system for predicting and controlling a power module of an electric load, the system comprising:

[0027] A gate driver circuit is coupleable to a target power transistor in a power module, wherein:

[0028] The target power transistor includes a target gate node, a target high-side node, and a target low-side node; and

[0029] The gate driver circuit is operable to:

[0030] driving a target gate node in response to a pulse width modulated signal;

[0031] measuring a target gate voltage between a target gate node and a target low-side node;

[0032] switching a desaturation signal in response to the target power transistor switching between an off state and an on state;

[0033] measuring a target transistor voltage between a target high-side node and a target low-side node; and

[0034] measuring a target transistor current from a target high-side node to a target low-side node; and

[0035] a controller circuit in electrical communication with the gate driver circuit and operable to:

[0036] modulating the pulse width modulation signal to increase the target gate voltage;

[0037] determining a target threshold voltage of the target power transistor as a target gate voltage in response to the desaturation signal switching from an off state to an on state;

[0038] determining a target on-resistance of a target power transistor based on the target transistor voltage and the target transistor current; and

[0039] The target power transistor is controlled based on the target threshold voltage and the target on-resistance.

[0040] 2. The system according to claim 1, wherein the controller circuit is further operable to:

[0041] A reduction in the high power voltage received by the power module is commanded during determination of a target threshold voltage and a target on-resistance of a target power transistor.

[0042] 3. The system according to technical solution 1, wherein the measurement of the target transistor voltage is performed at a predetermined test temperature and two different current points.

[0043] 4. The system according to claim 1, wherein the controller circuit is further operable to:

[0044] The control gate driver circuit preconditions the target gate node before determining a target threshold voltage and a target on-resistance of the target power transistor.

[0045] 5. The system according to technical solution 1, wherein the pulse width modulation signal is modulated with multiple different amplitudes.

[0046] 6. The system according to claim 1, wherein the controller circuit is further operable to:

[0047] The temperature of the power module is controlled to one or more of (i) an efficient operating temperature and (ii) a peak torque operating temperature during determination of a target threshold voltage and a target on-resistance of a target power transistor.

[0048] 7. The system according to claim 1, wherein the controller circuit is further operable to:

[0049] Sampling timing for measurement of the target transistor voltage and the target transistor current is controlled.

[0050] 8. The system according to claim 1, wherein the power module comprises a plurality of power transistors, and the controller circuit is further operable to:

[0051] One or more of (i) the gate driver circuit and (ii) the multiplexer are commanded to electrically isolate the target power transistor from the plurality of power transistors during determination of a target threshold voltage and a target on-resistance of the target power transistor.

[0052] 9. The system according to claim 1, wherein the controller circuit is further operable to:

[0053] Degradation of a target power transistor is detected based on a target threshold voltage and a target on-resistance.

[0054] 10. The system according to claim 1, wherein the controller circuit is further operable to:

[0055] A failure of a target power transistor is detected based on a target threshold voltage and a target on-resistance.

[0056] 11. The system according to claim 1, wherein the controller circuit is further operable to:

[0057] The temperature of the target power transistor is calculated based on the target on-resistance.

[0058] 12. The system according to technical solution 1, wherein the power module includes a plurality of power transistors, and the plurality of power transistors include one or more of (i) a plurality of different transistor types and (ii) a plurality of different semiconductor types.

[0059] 13. The system according to technical solution 1 further comprises:

[0060] A galvanic isolation circuit is located between the high power voltage received by the power module and the supply voltage received by the controller circuit.

[0061] 14. The system according to technical solution 1, wherein the power module includes a plurality of power transistors having a plurality of threshold voltages and a plurality of on-resistances, and the controller circuit is further operable to:

[0062] One or more of (i) a switching speed of the plurality of power transistors and (ii) a switching utilization of the plurality of power transistors are adjusted based on one or more of (1) a plurality of threshold voltages and (2) a plurality of on-resistances.

[0063] 15. The system according to claim 1, wherein the controller circuit is further operable to:

[0064] The target threshold voltage and the target on-resistance are utilized to perform one or more of thermal control, dynamic switching control, and degradation mitigation of the target power transistor.

[0065] 16. The system according to technical solution 1 further includes one or more of the following:

[0066] a discrete temperature sensor operable to measure the temperature of the target power transistor; and

[0067] A discrete current sensor operable to measure the target transistor current.

[0068] 17. The system according to claim 1, wherein the controller circuit is further operable to:

[0069] detecting degradation in a target power transistor based on one or more of a target threshold voltage and a target on-resistance; and

[0070] An alarm signal is issued in response to detecting the degradation.

[0071] 18. The system according to technical solution 1, wherein:

[0072] The gate driver circuit is further operable to measure one or more of: (i) a current across a parasitic inductance in series with the target power transistor, and (ii) a voltage across a parasitic capacitance in parallel with the target power transistor; and

[0073] The controller circuit is further operable to calculate a switching speed of the target power transistor in response to one or more of (i) a current across the parasitic inductance and (ii) a voltage across the parasitic capacitance.

[0074] 19. A method for predicting and controlling a power module of an electric load, the method comprising:

[0075] driving a target gate node of a target power transistor of the power module in response to a pulse width modulated signal using a gate driver circuit, wherein the target power transistor includes a target gate node, a target high-side node, and a target low-side node;

[0076] measuring a target gate voltage between a target gate node and a target low-side node;

[0077] switching a desaturation signal in response to the target power transistor switching between an off state and an on state;

[0078] measuring a target transistor voltage between a target high-side node and a target low-side node;

[0079] measuring a target transistor current from a target high-side node to a target low-side node;

[0080] modulating the pulse width modulation signal to increase the target gate voltage using a controller circuit in electrical communication with the gate driver circuit;

[0081] determining a target threshold voltage of the target power transistor as a target gate voltage in response to the desaturation signal switching from an off state to an on state;

[0082] determining a target on-resistance of a target power transistor based on the target transistor voltage and the target transistor current; and

[0083] The target power transistor is controlled based on the target threshold voltage and the target on-resistance.

[0084] 20. A vehicle comprising:

[0085] electric motor;

[0086] a power module electrically coupled to the electric motor;

[0087] A gate driver circuit is coupleable to a target power transistor in a power module, wherein:

[0088] The target power transistor includes a target gate node, a target high-side node, and a target low-side node; and

[0089] The gate driver circuit is operable to:

[0090] driving a target gate node in response to a pulse width modulated signal;

[0091] measuring a target gate voltage between a target gate node and a target low-side node;

[0092] switching a desaturation signal in response to the target power transistor switching between an off state and an on state;

[0093] measuring a target transistor voltage between a target high-side node and a target low-side node; and

[0094] measuring a target transistor current from a target high-side node to a target low-side node; and

[0095] a controller circuit in electrical communication with the gate driver circuit and operable to:

[0096] modulating the pulse width modulation signal to increase the target gate voltage;

[0097] determining a target threshold voltage of the target power transistor as a target gate voltage in response to the desaturation signal switching from an off state to an on state;

[0098] determining a target on-resistance of a target power transistor based on the target transistor voltage and the target transistor current; and

[0099] The target power transistor is controlled based on the target threshold voltage and the target on-resistance.

[0100] The above features and advantages and other features and advantages of the present disclosure are readily apparent from the following detailed description of the best modes for carrying out the disclosure when taken in connection with the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0101] Figure 1 is a schematic plan view illustrating the context of the machine.

[0102] Figure 2 is a schematic diagram of a system according to one or more exemplary embodiments.

[0103] Figure 3 is a schematic diagram of another system according to one or more exemplary embodiments.

[0104] Figure 4 is a graph of a first pulse width modulation signal at different gate-to-source voltages according to one or more exemplary embodiments.

[0105] Figure 5 is a graph of a second pulse width modulation signal at different gate currents according to one or more exemplary embodiments.

[0106] Figure 6 is a graph of a third pulse width modulation signal at different duty cycles according to one or more exemplary embodiments.

[0107] Figure 7 is a graph illustrating threshold voltage determination according to one or more exemplary embodiments.

[0108] Figure 8is a graph illustrating a pre-processing process according to one or more exemplary embodiments.

[0109] Figure 9 is a schematic diagram of an implementation of two power transistors in a power module according to one or more exemplary embodiments.

[0110] Figure 10 is a schematic diagram of power transistor fault detection according to one or more exemplary embodiments.

[0111] Figure 11 is a graph illustrating power transistor failure detection according to one or more exemplary embodiments.

[0112] Figure 12 is a graph of junction temperature as a function of on-resistance according to one or more exemplary embodiments. DETAILED DESCRIPTION

[0113] Embodiments of the present disclosure provide systems and / or methods for predicting and controlling power modules for electrical loads. The systems / methods measure the gate-to-source and / or gate-to-emitter threshold voltage (Vth) and on-resistance (Rdson) of each power transistor in a single semiconductor power module (PM) and / or hybrid power module for an inverter, converter, and / or motor drive. Various embodiments utilize a gate driver current source (I S ) or voltage source (V S ) to optimally increase the gate voltage of the power transistor until the threshold voltage Vth is reached and the power transistor switches from the off state to the on state. The measurement enables on-chip measurement of the threshold voltage Vth and the on-resistance Rdson to allow fault detection, degradation detection, and improved inverter control to optimize current sharing and reduce losses, reverse recovery, overshoot, electromagnetic interference, and bearing currents. In hybrid switching power module designs, silicon (Si) insulated gate bipolar transistors (IGBTs) may experience (see) improved switching speeds and losses, while wide bandgap (WBG) power transistor usage can be reduced. Without built-in prediction, the switching speed of the power transistor is typically reduced to control overshoot, accommodate component-to-component variations, and degradation resulting in a loss of performance.

[0114] refer to Figure 1, shows a schematic plan view of an environment for the illustrated machine. The machine may implement a vehicle 70. The vehicle 70 typically includes a battery pack 80, a low-voltage battery 82, one or more electrical loads 90 (one electrical load 90 is shown for clarity), and a system 100. The system 100 may include a controller circuit 110, a gate driver circuit 120, a power module 130, a coolant loop 140, and a feedback circuit 150. The power module 130 typically includes one or more temperature sensors 132 (one temperature sensor 132 is shown for clarity), one or more current sensors 134 (one current sensor 134 is shown for clarity), and an optional multiplexer 136.

[0115] Vehicle 70 may include, but is not limited to, mobile objects such as electric vehicles, hybrid vehicles, internal combustion engine vehicles, trucks, motorcycles, boats, trains, and / or airplanes. In some embodiments, vehicle 70 may include fixed objects such as billboards, kiosks, backup power systems (e.g., uninterruptible power supplies), and / or tents. Other types of vehicles 70 may be implemented to meet the design criteria of a particular application.

[0116] The battery pack 80 implements a high-voltage battery pack configured to store electrical energy. The battery pack 80 is generally operable to receive electrical power from an onboard alternator and / or an off-board charging station and provide electrical power to the system 100. The battery pack 80 may include a plurality of battery cells electrically connected in series and / or in parallel between a positive battery terminal and a negative battery terminal. In various embodiments, the battery pack 80 may provide a potential of approximately 200 to 1000 volts DC (direct current) between the positive battery terminal and the negative battery terminal. Other battery voltages may be implemented to meet the design criteria of a specific application.

[0117] The low-voltage battery 82 implements a battery configured to store electrical energy. The low-voltage battery 82 is operable to provide electrical power to the system 100 (e.g., the controller circuit 110 and a portion of the optional power module 130). In various embodiments, the low-voltage battery 82 can provide a DC potential of approximately 12 to 24 volts between the positive and negative battery terminals. Other battery voltages can be implemented to meet the design criteria of a specific application.

[0118] The electrical load 90 (or individual electrical loads in the plurality of electrical loads 90 ) implements a high-power electrical load. In a mobile embodiment, the electrical load 90 implements an electric motor 90 a, such as a hybrid gas / electric motor and / or a traction motor. The electric motor 90 a is generally operable to provide rotation and torque to drive the wheels of the vehicle 70 so as to propel the vehicle 70 around a surface and / or a road. The electrical power consumed by the electric motor 90 a can be provided by the battery pack 80 and / or the alternator of the vehicle 70. In various fixed embodiments, the electrical load 90 implements a pump, a fan, an electric heater, an uninterruptible power supply, a DC-AC power supply, and / or a welding power supply. Other types of electrical loads can be implemented to meet the design criteria of a specific application.

[0119] System 100 implements a power conversion system. System 100 is operable to convert DC power received from battery pack 80 into single-phase and / or multi-phase AC power provided to electrical load 90. System 100 can drive the gate nodes of power transistors in power module 130 in response to pulse-width modulated signals. To characterize individual transistors in power module 130, a single target gate node of a target power transistor can be exercised at a time. The temperature of the target power transistor can be adjusted by driving electrical load 90 to heat the power transistor and / or controlling coolant loop 140 to cool the power transistor.

[0120] The target power transistor can be electrically isolated from other power transistors by the system 100. The system 100 then modulates the pulse width modulation signal with a pre-processing pattern applied to the target gate node of the target power transistor. The pulse width modulation signal is then adjusted to increase the gate voltage between the target gate node of the target power transistor and the corresponding source / emitter (e.g., low side) node. The system 100 switches the desaturation signal in response to the target power transistor switching between the cut-off state and the on-state (e.g., the power transistor operates in the saturation region). Subsequently, the system 100 measures the gate voltage in response to the target power transistor switching to the on-state. In response to the desaturation signal switching from the cut-off state to the on-state, the measured gate voltage is determined and recorded as the threshold voltage Vth of the target power transistor.

[0121] The system 100 also measures the transistor voltage between the corresponding drain / collector (e.g., high-side) node of the target power transistor and the corresponding source / emitter node of the target power transistor. The system 100 also measures the transistor current from the corresponding drain / collector node to the corresponding source / emitter node. The system 100 determines the target on-resistance Rdson of the target power transistor based on the transistor voltage and transistor current. Once the power transistors in the power module 130 are characterized, the system 100 controls each power transistor based on the respective threshold voltage Vth and the respective on-resistance Rdson to balance current, temperature, and performance.

[0122] The controller circuit 110 implements one or more computers. In various embodiments, the controller circuit 110 typically includes at least one microcontroller. The at least one microcontroller may include one or more processors, each of which may be implemented as a separate processor, an application specific integrated circuit (ASIC), a field programmable gate array (FPGA), or a dedicated electronic control unit. The at least one microcontroller may be an electronic processor (implemented in hardware, software executed on the hardware, or a combination of the two). The at least one microcontroller may also include tangible, non-transitory memory (e.g., read-only memory in the form of optical, magnetic, and / or flash memory). For example, the at least one microcontroller may include an appropriate number of random access memories, read-only memories, flash memories, and other types of electrically erasable programmable read-only memories, as well as accompanying hardware in the form of high-speed clocks or timers, analog-to-digital and digital-to-analog circuits, and input / output circuits and devices, as well as appropriate signal conditioning and buffering circuits.

[0123] The computer-readable and executable instructions for implementing the present method can be recorded (or stored) in a memory and executed as described herein. The executable instructions can be a series of instructions for running an application on at least one microcontroller (in the foreground or background). At least one microcontroller can receive commands and information in the form of one or more input signals from various controllers or components and transmit the instructions to other electronic components.

[0124] The gate driver circuit 120 implements a multi-channel driver circuit for controlling the power transistors in the power module 130. The gate driver circuit is operable to drive the gate nodes of the power transistors in response to pulse-width modulated signals received from the controller circuit 110, measure the corresponding gate voltages between the corresponding gate nodes and the corresponding source / emitter nodes, and switch the desaturation signal in response to the target power transistor switching between the off state and the on state. The gate driver circuit 120 is also operable to measure the transistor voltage between the drain / collector node and the source / emitter node, and measure the transistor current from the drain / collector node to the source / emitter node.

[0125] The power module 130 implements a high-current / high-voltage power switching module. The power module 130 is operable to convert DC power received from the battery pack 80 into single-phase and / or multi-phase (e.g., three-phase) AC power. Control of the switching is provided by gate signals generated by the gate driver circuit 120. The gate signals control the gate nodes of the power transistors to regulate the power provided by the power module 130 to the electrical load 90.

[0126] The power module 130 may include one or more temperature sensors 132 (one temperature sensor 132 is shown for clarity), one or more current sensors 134 (one current sensor 134 is shown for clarity), and a multiplexer 136 .

[0127] In various embodiments, each temperature sensor 132 is mounted in thermal contact with a corresponding power transistor. In other embodiments, one or more (e.g., four) temperature sensors 132 are mounted around the power module 130. Each temperature sensor 132 is operable to measure the temperature of a corresponding power transistor and / or a group of adjacent power transistors. The measured temperature is reported to the controller circuit 110. The controller circuit 110 can use the measured temperature to regulate heating and cooling of the power module 130 while measuring the threshold voltage Vth and / or on-resistance Rdson of the power transistor.

[0128] In some embodiments, temperature sensor 132 may be omitted. In such a design, the temperature of the power transistor may be determined based on the measured Rdson. As the temperature of the target power transistor changes, the conductivity of the transistor's drain / collector to source / emitter path changes, and thus the Rdson changes.

[0129] In various embodiments, each current sensor 134 is electrically connected to a corresponding power transistor. Each current sensor 134 is operable to measure the current flowing through the corresponding power transistor. The measured current is reported back to the controller circuit 110 to determine the on-resistance Rdson of the power transistor. In other embodiments, a single current sensor 134 can be electrically connected to an input node of a power module 130 that receives electrical power from the battery pack 80. In the case where the controller circuit 110 characterizes a single target power transistor at a time, the current sensor 134 can measure the current flowing through the input node and the target power transistor. The measured current is reported back to the controller circuit 110 to determine the on-resistance Rdson of the target power transistor.

[0130] Multiplexer 136 implements a high voltage / low voltage multiplexer. Multiplexer 136 is operable to alternately route the high voltage received from battery pack 80 or the low voltage received from low-voltage battery 82 to the power transistor. During normal operation, multiplexer 136 can route the high voltage from battery pack 80 to the DC bus, to the power transistor, and to the electrical load 90 / motor 90a. When measuring power transistor parameters, multiplexer 136 can route the low voltage from low-voltage battery 82 to the power transistor.

[0131] The coolant loop 140 implements a coolant system in the vehicle 70. The coolant loop 140 is in thermal contact with the power module 130. The coolant loop 140 is operable to remove heat from the power module 130. The removed heat is controlled by the controller circuit 110 to cool the power module 130 to a predetermined temperature while characterizing the power transistors (e.g., Vth and Rdson).

[0132] Feedback circuit 150 implements a dc feedback path from the power transistor to a desaturation circuit within gate driver circuit 120 .

[0133] refer to Figure 2 , a schematic diagram illustrating an example implementation of a system 100a according to one or more exemplary embodiments. System 100a may be a variation of system 100. System 100a includes a controller circuit 110, a gate driver circuit 120a, a power module 130, and a feedback circuit 150. Gate driver circuit 120a is a variation of gate driver circuit 120. Gate driver circuit 120a implements a variable current source to control the gate voltage of a power transistor in power module 130.

[0134] The gate driver circuit 120a generally includes one or more analog-to-digital A / D converter and comparator (ADC / Comp) circuits 122a-122n, one or more variable current sources 124a-124n, and a desaturation circuit 126. The power module 130 includes a plurality of power transistors 138a-138n.

[0135] Pulse-width modulated signals 102a-102n can be generated by controller circuit 110 and provided to gate driver circuit 120a. Pulse-width modulated signals 102a-102n transmit pulse-width modulated voltages that control variable current sources 124a-124n. This control is based on the duty cycle and / or voltage amplitude of pulse-width modulated signals 102a-102n. Current select code signals 104a-104n are generated by controller circuit 110 and transmitted to gate driver circuit 120a. Current select code signals 104a-104n determine the target amplitude of the current provided by variable current sources 124a-124n. Voltage signals 106a-106n are generated by ADC / Comp circuits 122a-122n and transmitted to controller circuit 110. Voltage signals 106a-106n carry the gate voltages of corresponding power transistors 138a-138n. Desaturation signal 108 is generated by desaturation circuit 126 and provided to controller circuit 110. The desaturation signal 108 indicates whether the target power transistors 138 a - 138 n are operating in a saturation mode (eg, an on-state) or a non-saturation mode (eg, an off-state).

[0136] A / D converter / compensation circuits (ADC / Comp) 122a-122n are operable to measure the gate voltage of respective power transistors 138a-138n. The measured gate voltage is provided to controller circuit 110 as voltage signals 106a-106n.

[0137] The variable current sources 124a-124n are operable to generate variable controlled currents that establish gate currents in the corresponding power transistors 138a-138n. The variable current sources 124a-124n are controlled by the pulse width modulation signals 102a-102n and the current selection code signals 104a-104n.

[0138] The desaturation circuit 126 is operable to determine when one or more of the power transistors 138a-138n has switched between off and on conditions, with the corresponding gate-source voltage (Vgs) falling below and exceeding a turn-on threshold voltage (Vth). The desaturation circuit 126 determines the on / off condition based on a voltage provided from the power module 130 by the feedback circuit 150.

[0139] Each power transistor 138a-138n has a corresponding gate node (e.g., a first gate node of the first power transistor 138a, a second gate node of the second power transistor 138b, etc.), a corresponding high node (e.g., a first high node of the first power transistor 138a, a second high node of the second power transistor 138b, etc.), and a corresponding low node (e.g., a first low node of the first power transistor 138a, a second low node of the second power transistor 138b, etc.). The high nodes of the power transistors 138a-138n can be wired together, and the low nodes of the power transistors 138a-138n can be wired together. The gate nodes of the power transistors 138a-138n can be wired together, or each gate node can be directly connected to a corresponding variable current source 124a-124n in the gate driver circuit 120a. In some embodiments, an optional switch 139 can be provided between the gate nodes and the corresponding variable current source 124a-124n. If the gate nodes of the power transistors 138a-138n are connected together, the switch 139 may be opened to provide protection to the other power transistors 138a-138n from the pre-processed signal.

[0140] In various embodiments, the power transistors 138a-138n can implement similar technologies and similar geometries. Because the power transistors 138a-138n operate in a similar manner, a common technology, common type, and common geometry can result in a single power module 130. In some embodiments, the power transistors 138a-138n can be of different technologies, different types, and / or different geometries. Such differences can result in a hybrid power module 130. For example, the hybrid power module can be manufactured using different semiconductor technologies (e.g., Si, SiC, GaN, Ga2O3, diamond), different transistor types (e.g., IGBT, MOSFET, HEMT, JFET, Cascode, BJT), and / or different geometries.

[0141] refer to Figure 3 , a schematic diagram illustrating an example partial implementation of a system 100b according to one or more exemplary embodiments. System 100b may be a variation of system 100. System 100b includes a gate driver circuit 120b and a power module 130. Gate driver circuit 120b is a variation of gate driver circuit 120. Gate driver circuit 120b implements a variable voltage source to control the gate voltage of a power transistor in power module 130.

[0142] The gate driver circuit 120b generally includes a plurality of transistors 160a-160d and a plurality of resistors 162a-162d. Each resistor 162a-162d has a node connected to the gate node of a power transistor (e.g., 138a). The other node of each resistor 162a-162d is connected to the corresponding transistor 160a-160d. Half of the transistors (e.g., 160a and 160b) are configured to be connected to a positive voltage rail (e.g., V G+ ) of the pull-up transistors. The other half of the transistors are configured to connect to the negative voltage rail (e.g., V G- ) pull-down transistor. By turning on / off each transistor 160a-160d (e.g., 162a=Rg1_ON, 162b=Rg2_ON, 162c=Rg1_Off, and 162d=Rg2_Off), the voltage at the gate node of transistor 138a can be driven to a specified voltage. An optional switch 139 can be included to protect other gate nodes.

[0143] refer to Figure 4, a graph 170 of a first example pulse width modulated signal at different gate-to-source voltages (Vgs) according to one or more exemplary embodiments is shown. Graph 170 has a first axis 172 in units of time and a second axis 174 in units of voltage. Curve 176 illustrates a plurality of voltage control pulses having different amplitudes and different duty cycles. The amplitude and / or duty cycle can be adjusted by controller circuit 110 to vary the gate-to-source voltage Vgs and control the rate of change in real time while characterizing the target power transistor.

[0144] refer to Figure 5 , a graph 180 of a second example pulse width modulation signal at different gate currents (Ig) according to one or more exemplary embodiments is shown. Graph 180 has a first axis 182 in units of time and a second axis 184 in units of current. Curve 186 illustrates a plurality of current control pulses having different amplitudes and different duty cycles. The amplitude and / or duty cycle can be adjusted by controller circuit 110 to increase the gate-to-source voltage Vgs (curve 188) and control the rate of change in real time until the power transistor switches to the on state (e.g., curve 192), resulting in a drop in the drain-source voltage (Vds) (curve 190).

[0145] refer to Figure 6 , a graph 200 is shown of a third example pulse width modulated signal at different duty cycles according to one or more exemplary embodiments. Graph 200 has a first axis 202 measured in time and a second axis 204 measured in amplitude. Curve 206 illustrates multiple pulses with different duty cycles (e.g., 255%, 50%, and 75% duty cycles). The duty cycle can be adjusted by controller circuit 110 to vary the gate-to-source voltage Vgs and control the rate of change in real time while characterizing the power transistor.

[0146] refer to Figure 7 , a graph 210 illustrating an example threshold voltage determination according to one or more exemplary embodiments is shown. Graph 210 has a first axis 212 in units of voltage and a second axis 214 in units of voltage. Curve 216 illustrates the gate-to-source voltage Vgs. Curve 218 illustrates the transistor (or drain-to-source) voltage Vds. When the gate-to-source voltage Vgs increases to point 220, the target power transistor begins to conduct, and thus the target transistor voltage Vds begins to decrease from the non-conducting voltage 222. Therefore, point 220 can determine the threshold voltage Vth of the target power transistor.

[0147] Return Reference Figure 1 and Figure 2, a method for measuring the threshold voltage Vth of the target power transistor is described as follows. The junction temperature of the target power transistor is adjusted to a predetermined temperature by slowly turning the target power transistor on and off to increase the junction temperature, or by adjusting the control of the coolant loop 140 to reduce or increase the junction temperature. A DC bus voltage can be applied to the power module 130. In some embodiments, the DC bus voltage can be a high voltage provided by the battery pack 80. In other embodiments, the DC bus voltage can be a low voltage provided by the low-voltage battery 82 to protect the power module 130 from damage due to possible faults. To apply a lower DC bus voltage, the battery pack 80 can be disconnected from the power transistor via the multiplexer 136. Thereafter, the controller circuit 110 waits until the target voltage value is reached. The target voltage value can be achieved by passively discharging or actively discharging the DC bus. The multiplexer 136 can also connect the low-voltage battery 82 to the power transistor.

[0148] Once the target DC bus voltage is achieved, a preconditioning process can be sequentially applied to each target power transistor in power module 130. In addition to the target power transistor, power transistors 138a-138n can be turned on, and the target power transistor can be turned off. Using current source gate driver circuit 120a or voltage source gate driver circuit 120b, the gate-to-source voltage Vgs can be increased from zero volts to the fully on voltage. As the gate-to-source voltage Vgs increases, the transistor voltage Vds is monitored / measured via desaturation circuit 126 to detect when the transistor voltage Vds exceeds a threshold voltage, thereby indicating that the target power transistor has turned on. Control of the pulse width modulated signal can be used to shorten the detection process while controlling the rate of change to better control the junction temperature and / or reduce voltage and current overshoot when the target power transistor turns on. If power module 130 is a hybrid power module, the other power transistors can remain off. This process is repeated to measure the other power transistors in single power modules and hybrid power modules.

[0149] refer to Figure 8 , a graph 240 illustrating an example pre-processing process according to one or more exemplary embodiments is shown. Graph 240 has a first axis 242 in units of time and a second axis 244 in units of voltage amplitude. Curve 246 illustrates the pre-processed signal. Pre-processing generally ensures measurement accuracy of the threshold voltage Vth.

[0150] Preconditioning can begin by regulating the junction temperature of the target power transistor by slowly switching to heating or coolant loop activation to cool or heat. The high voltage DC bus is disconnected (e.g., controlling the relay and / or multiplexer 136 to disconnect the power module 130 from the battery pack 80). Thereafter, the preconditioning signal can be applied to the target gate node of the target power transistor.

[0151] The pre-processing signal may initially switch multiple times between a first (e.g., high) gate-to-source voltage (Vgson) 250 that ensures the target power transistor is turned on and a second (e.g., low) gate-to-source voltage (Vgsoff) 252 that ensures the target power transistor is turned off. After switching, the gate-to-source voltage may be set to an intermediate voltage 254 (or to another voltage amplitude). Next, a long pulse at the second gate-to-source voltage 252 (or other voltage amplitude) may be applied. The gate-to-source voltage Vgs then returns to the intermediate voltage 254. Next, a long pulse of the first gate-to-source voltage 250 is applied. The gate-to-source voltage Vgs then returns to the intermediate voltage 254. Thereafter, the pre-processing process may end and the process of determining the threshold voltage Vth may begin.

[0152] For the voltage source gate driver circuit 120a, the electrical power supplied to the gate driver circuit 120 is controlled to provide Vgson and Vgsoff amplitudes for preconditioning the target power transistor to turn on and off. For the current source gate driver circuit 120b, the variable current sources 124a-124n are used to control the current Ig entering the gate of the target power transistor through pulse width modulation control or a pre-calibrated duration based on voltage feedback (e.g., the power supply's ADC) to achieve the target pre-conditioning Vgson and Vgsoff amplitudes. If performed without the pre-conditioning process, this may result in variations in the threshold voltage measurement.

[0153] Return Reference Figure 1 ,refer to Figure 9 , a schematic diagram of an example implementation of two power transistors in a power module 130 according to one or more exemplary embodiments is shown. Power transistors 138x and 138y can be arranged as a pull-up transistor and a pull-down transistor pair. Pull-up power transistor 138x can be referred to as a high-side (HS) power transistor. Pull-down power transistor 138y can be referred to as a low-side (LS) power transistor. The low-side node 131x of pull-up power transistor 138x can be connected to the high-side node 133y of pull-down power transistor 138y. The low-side node 131y of pull-down power transistor 138y can be connected to a negative DC bus. The high-side node 133x of pull-up power transistor 138x can be connected to a positive DC bus. The output node 137 of the transistor pair can be connected to an electrical load / motor 90 / 90a.

[0154] The process for transistor on-resistance Rdson measurement can begin by regulating the junction temperature of the target power transistor 138x or 138y by slowly switching to heating or activating the coolant loop 140 to cool or heat. The high voltage DC bus is disconnected (e.g., controlling the relay and / or multiplexer 136) to disconnect the power module 130 from the battery pack 80. The pre-processed signal can then be applied to the target gate node 135x or 135y of the target power transistor 138x or 138y, respectively.

[0155] After preconditioning and the DC link voltage reaches the target test amplitude, the desaturation circuit 126 can be powered by a voltage source or current source output (I_desat). The output voltage (V_desat) of the desaturation circuit 126 and the target transistor current (Id) are monitored and measured simultaneously. To improve temperature consistency and reduce noise, the desaturation voltage Vdesat can be measured for at least two different current points, both of which are within a constant Rdson region relative to the target transistor current Id. When the load (e.g., motor) current is at a first current point (1), the voltage can be measured by the ADC / Comp circuit in the gate driver circuit 120 through the desaturation circuit 126 according to the following equation 1, and the drain current Id is measured by the current sensor 134 or the shunt resistor / inductor:

[0156] V_desat_I d1 =R_desat*I_desat1+V_f D +V_zenner+Rdson*Id1

[0157] Equation (1)

[0158] Where R_desat is the resistance of resistor Rdesat, and Vf D yes Figure 2 The total forward voltage drop across the single or multiple blocking diodes D5 in , and the total voltage drop across the single or multiple Zener diodes (if implemented).

[0159] The voltage at the second current point (2) can be determined according to the following equation 2:

[0160] V_desat_I d2 =R_desat*I_desat2+V_f D +V_zenner+Rdson*Id2

[0161] Equation (2)

[0162] The on-resistance Rdson of the target transistor can be determined by the following equation 3:

[0163] Rdson=(V_desat_I d2 -V_desat_I d1 -R_desat*(I_desat2-I_desat1))

[0164] / (Id2-Id1)Equation (3)

[0165] The voltage V_desat_I can be measured after the circuit reaches equilibrium d2 and V_desat_I d1 , to reduce the magnitude difference between currents I_desat2 and I_desat1. A constant current source can be used to power the desaturation circuit 126 to further reduce the magnitude difference to near zero or zero. This process can be repeated to measure the Rdson of other power transistors in single power modules and hybrid power modules.

[0166] Return Reference Figure 2 ,refer to Figure 10 , shows a schematic diagram of an example power transistor fault detection according to one or more exemplary embodiments. System 100c may include a controller circuit 110, a gate driver circuit 120, and a power module 130a. Power module 130a is a variation of power module 130.

[0167] The controller circuit 110 may be operable to generate an alarm signal 112. This alarm signal may notify the driver or operator of the vehicle 70 that the power module 130a has degraded. The issuance of the alarm signal 112 generally indicates that the power module 130a may require attention. A fault signal 114 may also be generated by the controller circuit 110. The issuance of the fault signal 114 generally indicates that the power module 130a has failed and should be replaced to prevent damage to the battery pack 80 and / or the electrical load 90 or the motor 90a.

[0168] The power module 130a is illustrated as having a plurality of power transistors 138a-138e arranged in parallel. In this example, the power transistors 138a, 138c, and 138d may have a common gate node. The power transistors 138b and 138e may have another common gate node. In various embodiments, the power transistor 138d and / or the power transistor 138e may have become degraded and / or failed. A power transistor failure may be detected by the gate driver circuit 120 and the controller circuit 110 via a measured threshold voltage Vth, a measured on-resistance Rdson, and / or a desaturation circuit voltage Vdesat.

[0169] In various cases, the system 100c can measure the on-resistance Rdson, threshold voltage Vth, and / or desaturation circuit voltage Vdesat of each power transistor under controlled temperature, as described above. A degradation condition can be detected in the event that one or more of the power transistors 138a-138e have a fault open circuit condition from the drain to the source. In response to the degradation condition, the controller circuit 110 can issue an alarm signal 112 to notify the driver that the power module 130a is degraded and may need repair. If more than a threshold number of power transistors 138a-138e fail open circuit, or if one or more power transistors 138a-138e have a fault short circuit condition from the drain to the source, the power module 130a can be considered faulty and should be replaced. Therefore, the controller circuit 110 can issue a fault signal 114 to notify the driver accordingly.

[0170] In various situations, the power transistors 138a-138e may experience a gate fault open condition. If one or more power transistors 138a-138e are detected to have a gate fault open condition, an alarm signal 112 may be issued. If more than a gate threshold number of power transistors 138a-138e have a gate fault open condition, a fault signal 114 may be issued.

[0171] To detect a gate fault open condition, the controller circuit 110 and the gate driver circuit 120 can measure the transistor voltage Vds via the desaturation circuit 126. A gate fault open condition typically means that the target power transistor has a smaller gate-to-source capacitance (Cgs) and therefore reaches the threshold voltage of the desaturation circuit Vds_desat more quickly if given the same Ig / Vg pulse width modulation pulse and the same preconditioning process. In various embodiments, the Vds_desat rise time is measured by the ADC / Comp circuit 124a. In other embodiments, the Vgs rise time can be measured by the ADC / Comp circuit 124a or by current feedback from the voltage-controlled gate driver circuit 120b via a parasitic inductor, a shunt resistor, or a current sensor. The process of measuring the Rdson of the other power transistors 138a-138e can be repeated for single power modules and hybrid power modules.

[0172] refer to Figure 11, shows a graph 260 of example power transistor fault detection according to one or more exemplary embodiments. Graph 260 has a first axis 262 of measurement instances and a second axis 244 of Vth measurement results. A first curve 268 illustrates the threshold voltage Vth of a first power transistor under test that begins to experience degradation after time 32. A second curve 268 illustrates the threshold Vth of a second power transistor under test that is not degraded. Line 270 illustrates the threshold Vth without degradation.

[0173] refer to Figure 12 , shows a graph 280 of example junction temperature as a function of on-resistance according to one or more example embodiments. The graph 280 includes a first axis 282 in units of gate-to-source voltage Vgs and a second axis 283 in units of drain current I D A second axis 284 is plotted with units of Vdc in microamperes. In this example, when the transistor voltage Vdc is one volt, curves 286a-286f represent transistor transfer curves at temperatures ranging from 300K (curve 286a) to 500K (curve 286f). Arrow 288 shows that the drain current I decreases as the junction temperature increases. D Or the increased on-resistance Rdson. The above Rdson measurement method can be used to measure the junction temperature of the transistor die of a single semiconductor power switch or a hybrid power switch.

[0174] Embodiments of the present disclosure generally provide a built-in measurement method for the voltage threshold Vth and on-resistance Rdson of power transistors in a power module. This measurement enables the controller circuit to optimize inverter control and detect degradation and failure of the hybrid power module. The gate drive circuit can use a controlled variable current source or a variable voltage source to measure the threshold voltage Vth and on-resistance Rdson of the power module and / or internal switch. The on-resistance Rdson and threshold voltage Vth can be measured at a reduced power bus voltage (Vdc) by passive discharge or active discharge of a high-voltage battery pack. An integrated pre-processing process can be applied to the power transistor gate to ensure high-precision measurement of the threshold voltage Vth and on-resistance Rdson. An isolation method can be used to measure the on-resistance Rdson of both the high-side power transistor and the low-side power transistor or a single die. The measured threshold voltage Vth and / or the measured on-resistance Rdson can be used to detect transistor degradation and / or measure die temperature.

[0175] The system and method are applicable to hybrid power modules with different substrates (e.g., Si, SiC, GaN, Ga2O3, diamond), implementing different semiconductor technologies (e.g., IGBT, MOSFET, HEMT, JFET, cascode, BJT), and having different physical geometries. The system and method enable improved inverter control capable of adjusting switching speed based on threshold voltage Vth prediction.

[0176] Embodiments of the present disclosure enable implementation using wide-bandgap (WBG) semiconductors and transistor dies with large manufacturing variations in threshold voltage (Vth) and / or on-resistance (Rdson). Despite low threshold voltage (Vth), which results in rapid voltage / current transients during switching and can increase stress on power modules, inverters, and electric drive motors, the system maintains performance. This system tolerates large on-resistance (Rdson), which leads to power loss, potentially leading to imbalances among the die and power transistors and potentially causing quiescent current deviations. Hybrid switches can integrate switches of different materials, technologies, and / or sizes to enhance advantages and compensate for conflicts. For example, Si IGBT power transistors have high switching losses due to larger capacitance, tail current, and other factors. SiC MOSFET power transistors have lower switching losses and better thermal conductivity. Greater device variation and more complex structure and control significantly impact hybrid switch performance. SiC power transistors have large variations in Vth and Rdson. IGBT power transistors have large stray inductance, which can lead to current imbalance, overshoot, power loss, and the like. With built-in measurement and prediction, the system can maintain high switching speeds without overshoot due to part-to-part variations and degradation, which would otherwise affect power consumption and performance.

[0177] Embodiments of the present disclosure generally provide a system for predicting and controlling a power module for an electrical load. The system includes a gate driver circuit and a controller circuit. The gate driver circuit can be coupled to a target power transistor in the power module. The target power transistor typically includes a target gate node, a drain / collector (high-side) node, and a source / emitter (low-side) node.

[0178] The gate driver circuit is operable to drive a gate node in response to a pulse width modulated signal. The gate driver circuit can measure a gate voltage between the gate node and a source / emitter node, switch a desaturation signal in response to the target power transistor switching between an off state and an on state, measure a transistor voltage between a drain / collector node and a source / emitter node, and measure a transistor current from the drain / collector node to the source / emitter node.

[0179] The controller circuit is operable to modulate the pulse width modulation signal to increase the gate voltage, determine a threshold voltage of the target power transistor as the gate voltage in response to the desaturation signal switching from an off state to an on state, determine an on-resistance of the target power transistor based on the transistor voltage and the transistor current, and control the target power transistor based on the threshold voltage and the on-resistance as measured.

[0180] The numerical values ​​of parameters (such as parameters of quantities or conditions) in this specification (including the appended claims) are to be understood as being modified by the term "approximately" in each case, regardless of whether "approximately" actually appears before the numerical value. "Approximately" indicates that the numerical value allows some slight imprecision (close to accuracy in value; approximately or quite close to the value; almost). If the imprecision provided by "approximately" is not otherwise understood in this art with this ordinary meaning, then "approximately" as used herein at least indicates the changes that may be produced by the common methods of measuring and using such parameters. In addition, the disclosure of the range includes the disclosure of the values ​​within the range and the further divided ranges. Each value within the range and the endpoints of the range are thus disclosed as separate embodiments.

[0181] While the best modes for carrying out the disclosure have been described in detail, those familiar with the art to which this disclosure relates will recognize various alternative designs and embodiments for practicing the disclosure within the scope of the appended claims.

Claims

1. A system for predicting and controlling a power module of an electric load, the system comprising: A gate driver circuit is coupleable to a target power transistor in a power module, wherein: The target power transistor includes a target gate node, a target high-side node, and a target low-side node; and The gate driver circuit is operable to: driving a target gate node in response to a pulse width modulated signal; measuring a target gate voltage between a target gate node and a target low-side node; switching a desaturation signal in response to the target power transistor switching between an off state and an on state; measuring a target transistor voltage between a target high-side node and a target low-side node; and measuring a target transistor current from a target high-side node to a target low-side node; and a controller circuit in electrical communication with the gate driver circuit and operable to: modulating the pulse width modulation signal to increase the target gate voltage; determining a target threshold voltage of the target power transistor as a target gate voltage in response to the desaturation signal switching from an off state to an on state; determining a target on-resistance of a target power transistor based on the target transistor voltage and the target transistor current; and The target power transistor is controlled based on the target threshold voltage and the target on-resistance.

2. The system of claim 1 , wherein the controller circuit is further operable to: A reduction in the high power voltage received by the power module is commanded during determination of a target threshold voltage and a target on-resistance of a target power transistor. 3 . The system of claim 1 , wherein the measuring of the target transistor voltage is performed at a predetermined test temperature and two different current points.

4. The system of claim 1 , wherein the controller circuit is further operable to: The control gate driver circuit preconditions the target gate node before determining a target threshold voltage and a target on-resistance of the target power transistor. The system of claim 1 , wherein the pulse width modulated signal is modulated at a plurality of different amplitudes.

6. The system of claim 1 , wherein the controller circuit is further operable to: The temperature of the power module is controlled to one or more of (i) an efficient operating temperature and (ii) a peak torque operating temperature during determination of a target threshold voltage and a target on-resistance of a target power transistor.

7. The system of claim 1 , wherein the controller circuit is further operable to: Sampling timing for measurement of the target transistor voltage and the target transistor current is controlled.

8. The system of claim 1 , wherein the power module comprises a plurality of power transistors, and the controller circuit is further operable to: One or more of (i) the gate driver circuit and (ii) the multiplexer are commanded to electrically isolate the target power transistor from the plurality of power transistors during determination of a target threshold voltage and a target on-resistance of the target power transistor.

9. The system of claim 1 , wherein the controller circuit is further operable to: Degradation of a target power transistor is detected based on a target threshold voltage and a target on-resistance.

10. A method for predicting and controlling a power module of an electrical load, the method comprising: driving a target gate node of a target power transistor of the power module in response to a pulse width modulated signal using a gate driver circuit, wherein the target power transistor includes a target gate node, a target high-side node, and a target low-side node; measuring a target gate voltage between a target gate node and a target low-side node; switching a desaturation signal in response to the target power transistor switching between an off state and an on state; measuring a target transistor voltage between a target high-side node and a target low-side node; measuring a target transistor current from a target high-side node to a target low-side node; modulating the pulse width modulation signal to increase the target gate voltage using a controller circuit in electrical communication with the gate driver circuit; determining a target threshold voltage of the target power transistor as a target gate voltage in response to the desaturation signal switching from an off state to an on state; determining a target on-resistance of a target power transistor based on a target transistor voltage and a target transistor current; as well as The target power transistor is controlled based on the target threshold voltage and the target on-resistance.

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