Method and apparatus for amplitude-fixed pulse width driving modulation for silicon optical device state switching

Abstract

The application discloses a constant-amplitude variable-pulse-width driving modulation method and device for silicon optical device state switching, and the method comprises the following steps: generating a high-frequency clock signal corresponding to an initial clock signal according to the received initial clock signal; receiving input driving control information, performing cross-clock domain synchronization on a control signal contained in the driving control information to obtain a corresponding synchronization signal; performing state switching on a preset finite state machine according to the synchronization signal and the high-frequency clock signal; generating a corresponding pulse driving signal according to the real-time state of the finite state machine and preset amplitude information; and outputting the pulse driving signal to a constant-amplitude driving circuit, modulating an output corresponding amplified pulse signal, and applying the amplified pulse signal to a silicon optical device. The above method generates a high-frequency clock signal and generates a pulse driving signal with adjusted pulse width based on driving control information, and an amplified pulse signal with a fixed voltage amplitude is obtained through a constant-amplitude driving circuit, so that the pulse signal modulation process is simplified, and power consumption and control complexity are significantly reduced.

Description

Technical Field

[0001] This invention relates to the field of semiconductor drive control technology, and in particular to a fixed-amplitude variable pulse width drive modulation method and apparatus for state switching of silicon photonic devices. Background Technology

[0002] With the rapid development of information technology, the demand for data storage and processing is increasing daily. Traditional electronic devices face challenges in terms of integration and processing speed, while novel devices such as silicon photonics have attracted widespread attention due to their high speed and potential low power consumption, showing broad practical application prospects in high-speed optical communication, microwave photonics, optical neural networks, and optical quantum computing. Optical modulation methods, being closely related to the state changes of silicon photonics devices, are crucial for the effective realization of functional units in silicon photonics.

[0003] Thermo-optic modulation is a common modulation scheme, and using electrical pulses to control microheaters is an important method. This method applies electrical pulses to drive a microheater, using the heat generated to rapidly change the temperature of the silicon material, thereby causing a change in its refractive index. This change in refractive index directly affects the modulation process of the optical signal. By precisely controlling the amplitude and width of the pulse, dynamic modulation of the optical signal can be achieved and is applicable to silicon photonics devices. This modulation process has advantages such as low power consumption and simple fabrication, making it suitable for optical communication and integrated optics applications. Pulse control can also improve the modulation response speed and accuracy, giving it broad application prospects in the field of silicon photonics.

[0004] However, the modulation methods based on variable amplitude constant pulse width (VPWM) commonly used in academia have some limitations. First, the modulation process requires frequent changes in voltage amplitude, which not only increases circuit complexity but also leads to increased power consumption and reduced response speed. Furthermore, due to the instability of voltage amplitude and the potential overshoot and oscillations during high-speed switching, modulation accuracy is difficult to guarantee effectively. Especially in high-speed optical communication and integrated optics applications, insufficient response speed and modulation accuracy have become major bottlenecks limiting the performance improvement of silicon photonic devices. Therefore, existing pulse modulation methods for driving silicon photonic devices suffer from poor modulation accuracy. Summary of the Invention

[0005] This invention provides a fixed-amplitude variable pulse width driving modulation method and apparatus for state switching of silicon photonics devices, aiming to solve the problem of poor modulation accuracy in existing pulse modulation methods for driving silicon photonics devices.

[0006] In a first aspect, embodiments of the present invention provide a fixed-amplitude variable pulse width driving modulation method for state switching of silicon photonics devices. This method is applied in a controller of a fixed-amplitude variable pulse width driving modulation device for state switching of silicon photonics devices. The fixed-amplitude variable pulse width driving modulation device for state switching of silicon photonics devices further includes a fixed-amplitude driving circuit communicatively connected to the controller. The method includes:

[0007] Generate a high-frequency clock signal corresponding to the received initial clock signal;

[0008] Receive the input drive control information, synchronize the control signals contained in the drive control information across clock domains, and obtain the corresponding synchronization signal;

[0009] The preset finite state machine is switched according to the synchronization signal and the high-frequency clock signal;

[0010] Generate corresponding pulse drive signals based on the real-time state of the finite state machine;

[0011] The pulse drive signal is output to the fixed amplitude drive circuit so that the fixed amplitude drive circuit modulates and outputs a corresponding amplified pulse signal based on the pulse drive signal and applies it to the silicon photonics device.

[0012] Secondly, embodiments of the present invention also provide a fixed-amplitude variable pulse width drive modulation device for state switching of silicon photonics devices. The controller in the fixed-amplitude variable pulse width drive modulation device applies the fixed-amplitude variable pulse width drive modulation method for state switching of silicon photonics devices as described in the first aspect above. The device includes a high-frequency clock module, a register, a signal synchronization module, a finite state machine, and a pulse signal generator configured in the controller. The device also includes a clock module.

[0013] The clock module is connected to the high-frequency clock module, and the clock module is used to output an initial clock signal;

[0014] The register is connected to the signal synchronization module, and the register is used to store the input drive control information;

[0015] The high-frequency clock module and the signal synchronization module are respectively connected to the finite state machine, and the finite state machine is connected to the pulse signal generator; the output of the pulse signal generator is connected to the fixed amplitude driving circuit.

[0016] This invention provides a fixed-amplitude variable pulse width drive modulation method and apparatus for state switching of silicon photonics devices. The method includes: generating a high-frequency clock signal corresponding to the received initial clock signal; receiving input drive control information and synchronizing the control signals contained in the drive control information across clock domains to obtain a corresponding synchronization signal; switching the state of a preset finite state machine based on the synchronization signal and the high-frequency clock signal; generating a corresponding pulse drive signal based on the real-time state of the finite state machine and preset amplitude information; and outputting the pulse drive signal to a fixed-amplitude drive circuit, so that the fixed-amplitude drive circuit modulates and outputs a corresponding amplified pulse signal based on the pulse drive signal and applies it to the silicon photonics device. This method generates a high-frequency clock signal internally by the controller and generates a pulse drive signal with adjustable pulse width based on the drive control information, and modulates it through a fixed-amplitude drive circuit to obtain an amplified pulse signal with a fixed voltage amplitude. This not only simplifies the pulse signal modulation process but also significantly reduces power consumption and control complexity. It enables precise control of the optical signal by flexibly adjusting the pulse width, while reducing instability caused by voltage changes, making modulation faster and more accurate, and improving the accuracy of pulse signal modulation. Attached Figure Description

[0017] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the following description of the embodiments will be briefly introduced. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 This is a flowchart of a fixed-amplitude variable-pulse-width driving modulation method for state switching of silicon photonics provided in an embodiment of the present invention;

[0019] Figure 2 This is a schematic diagram of a fixed-amplitude variable-pulse-width driving modulation device for state switching of silicon photonics provided in an embodiment of the present invention.

[0020] Figure 3 This is an application diagram of a fixed-amplitude variable-pulse-width drive modulation device for state switching of silicon photonics provided in an embodiment of the present invention.

[0021] Figure 4 A circuit structure diagram of the fixed-amplitude driving circuit provided in an embodiment of the present invention;

[0022] Figure 5 An application effect diagram of the constant amplitude variable pulse width driving modulation device for state switching of silicon photonics provided in an embodiment of the present invention;

[0023] Figure 6Another application effect diagram of the constant amplitude variable pulse width driving modulation device for state switching of silicon photonics provided in the embodiment of the present invention;

[0024] Figure 7 This is a schematic block diagram of a computer device provided in an embodiment of the present invention. Detailed Implementation

[0025] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0026] It should be understood that, when used in this specification and the appended claims, the terms "comprising" and "including" indicate the presence of the described features, integrals, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components and / or collections thereof.

[0027] It should also be understood that the terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to limit the invention. As used in this specification and the appended claims, the singular forms “a,” “an,” and “the” are intended to include the plural forms unless the context clearly indicates otherwise.

[0028] It should also be further understood that the term "and / or" as used in this specification and the appended claims refers to any combination of one or more of the associated listed items and all possible combinations, and includes such combinations.

[0029] Please see Figure 1 As shown in the figure, an embodiment of this invention provides a fixed-amplitude variable pulse width driving modulation method for state switching of silicon photonics devices. This method is applied in the controller of a fixed-amplitude variable pulse width driving modulation device for state switching of silicon photonics devices, and is executed by application software installed in the controller. Specific application scenarios are as follows... Figure 2As shown, one input terminal of the controller is connected to a clock module, which is used to input an initial clock signal to the controller. The output terminal of the controller is connected to a fixed-amplitude drive circuit, which outputs a pulse drive signal to the fixed-amplitude drive circuit. The fixed-amplitude drive circuit modulates and outputs a corresponding amplified pulse signal according to the pulse drive signal. This amplified pulse signal can be used to drive a microheater and generate heat to act on the silicon photonics device. The controller is equipped with at least one 8-bit input port, which can be used to input drive control information. The controller can be an FPGA (Field-Programmable Gate Array) chip. Figure 1 As shown, the method includes steps S110 to S150.

[0030] S110. Generate a high-frequency clock signal corresponding to the received initial clock signal.

[0031] The controller can receive an initial clock signal from the clock module. This initial clock signal is a low-frequency clock signal. To improve control accuracy, the controller can generate a high-frequency clock signal based on the initial clock signal. For example, the clock module can be a crystal oscillator clock that generates a clock signal with a frequency of 33.333MHz, and the corresponding high-frequency clock signal generated has a frequency of 250MHz.

[0032] In a specific embodiment, step S110 includes the following sub-steps: dividing the initial clock signal in the time domain according to preset pulse division parameters to obtain the corresponding high-frequency signal; determining the time parameters of each signal in the high-frequency signal to obtain the corresponding high-frequency clock signal.

[0033] Specifically, the initial clock signal can be divided in the time domain according to the pulse division parameters. For example, if the division parameter is 15 / 2, then one clock cycle of the clock signal is divided into 15 equal parts. Each pair of these parts is combined to form a signal for one clock cycle (clock cycle is 4ns), and this resulting signal is considered the high-frequency signal. Further, the time parameters of each signal within the high-frequency signal are determined. For example, if the frequency of the high-frequency signal is 250MHz, then 2.5 × 10⁻⁶ pulses will be generated per second. 8 To differentiate between high-frequency signals, a time parameter can be added to a specific high-frequency signal. For example, if a time parameter is added to the first high-frequency signal generated every millisecond, and subsequent high-frequency signals generated within the same millisecond share this time parameter, then the origin of the high-frequency signal can be distinguished by the time parameter. Once the time parameter is determined, the corresponding high-frequency clock signal is obtained, which is crucial for subsequent fine pulse width control. To further improve accuracy, a time parameter can be added to the first high-frequency signal generated every microsecond, allowing the distinction of which microsecond the high-frequency signal originated.

[0034] S120. Receive the input drive control information, and synchronize the control signals contained in the drive control information across clock domains to obtain the corresponding synchronization signal.

[0035] The controller can receive input drive control information. If the drive control information contains multiple control signals, it can synchronize these control signals across clock domains based on the received drive control information to obtain corresponding synchronization signals. Specifically, the drive control information includes control signals such as low-level duration (pulse_low_i), high-level duration (pulse_high_i), pulse number (pulse_number_i), and control command (sys_cmd_i). To improve control accuracy, these control signals need to be synchronized, resulting in a set of synchronization signals corresponding to the drive control information.

[0036] In a specific embodiment, step S120 includes the following sub-steps: determining the corresponding synchronization time based on the storage time of each control signal in the drive control information; and aligning each control signal according to the synchronization time to obtain the corresponding synchronization signal.

[0037] After receiving the drive control information, the controller stores it in a register. Data synchronization across clock domains is achieved through the register, ensuring that the data used within the pulse generation clock domain is stable and synchronized. The corresponding synchronization time can be determined based on the storage time of each control signal in the drive control information. For example, the latest stored control signal can be obtained and its storage time used as the synchronization time. Alternatively, the latest stored control signal can be obtained, and the next time parameter closest to its storage time can be used as the synchronization time. In this case, the synchronization time coincides with a time parameter that will soon be generated in the high-frequency clock signal. The control signals are aligned according to the determined synchronization time. The control signals contained in the drive control information are then bound into a group of synchronization signals based on the determined synchronization time. These synchronization signals are then processed for synchronization in subsequent steps.

[0038] S130. The preset finite state machine is switched according to the synchronization signal and the high-frequency clock signal.

[0039] Furthermore, a finite state machine is pre-configured in the controller. This finite state machine is used to record the current state information. The finite state machine has one and only one state at any given time. The state of the finite state machine is switched according to the synchronization signal and high-frequency clock signal obtained in the above steps.

[0040] In a specific embodiment, step S130 includes the following sub-steps: setting switching parameters corresponding to each state in the finite state machine according to the synchronization signal; receiving a start command and switching from the idle state to the high-level state; switching between the high-level state and the low-level state according to the switching parameters until the number of pulses reaches the number parameter set in the switching parameters, then switching to the stop state.

[0041] Specifically, the switching parameters corresponding to each state in the finite state machine can be set according to the synchronization signal. Finite state machines include idle (IDLE) state, high (HIGH) state, low (LOW) state, and stop (STOP) state; the switching parameters for the high (HIGH) state and the low (LOW) state, as well as the switching parameters of the finite state machine (the switching parameters of the finite state machine are also the global switching parameters of the finite state machine) can be set accordingly.

[0042] The finite state machine (FSM) is initially in an idle state. Upon receiving the start command (CPSG_cmd_sync_r == 8'h01), it begins operation, transitioning from the idle state to a high-level state. The start command can be triggered by the generated synchronization signal; that is, the start command is triggered simultaneously with the generation of the synchronization signal. The FSM switches between high and low levels based on switching parameters. Specifically, if the FSM is in a high-level state, it determines whether the switching parameters for the high-level state are met based on the number of continuously received high-frequency clock signals (e.g., whether the number of continuously received high-frequency clock signals is not small). If the high-level counting parameter is satisfied, the system switches from a high-level state to a low-level state and counts the current number of pulses. It then determines whether the currently counted number of pulses has reached the number parameter set in the switching parameters (whether the switching parameters of the finite state machine are satisfied). If the number parameter is reached, the system switches to a stop state and exits the above loop. If the number parameter is not reached, the system determines whether the switching parameters of the low-level state are satisfied (whether the number of continuously received high-frequency clock signals is not less than the low-level counting parameter). If the switching parameters of the low-level state are satisfied, the system switches from a low-level state to a high-level state, thus realizing the high-level / low-level state cyclic switching.

[0043] If the finite state machine is in the stopped state, it can receive a new start instruction (CPSG_cmd_sync_r == 8'h02). If a new start instruction is received, it switches to the idle state or remains in the stopped state. At this time, it waits for the subsequent start instruction (CPSG_cmd_sync_r == 8'h01) to start working and repeats the above state switching process.

[0044] In a specific embodiment, setting the switching parameters corresponding to each state in the finite state machine according to the synchronization signal includes: calculating the corresponding quantity parameters, high-level counting parameters, and low-level counting parameters according to the synchronization signal; and setting the switching parameters corresponding to each state in the finite state machine according to the quantity parameters, the high-level counting parameters, and the low-level counting parameters.

[0045] When setting switching parameters, the corresponding quantity parameters, high-level count parameters, and low-level count parameters can be calculated based on the synchronization signal. Specifically, the number of pulses in the synchronization signal can be used as the corresponding quantity parameter. The low-level count parameter is calculated based on the duration of the low level in the synchronization signal. The low-level count parameter is obtained by dividing the low-level duration by the clock period of the high-frequency clock signal. Similarly, the high-level count parameter is obtained by dividing the high-level duration in the synchronization signal by the clock period of the high-frequency clock signal.

[0046] Furthermore, the obtained quantity parameters are configured as global switching parameters of the finite state machine. The low-level counting parameter is configured as the switching parameter for the low-level state, and the high-level counting parameter is configured as the switching parameter for the high-level state, thereby completing the setting of the switching parameters corresponding to each state in the finite state machine.

[0047] S140. Generate a corresponding pulse drive signal based on the real-time state of the finite state machine.

[0048] The real-time state of the finite state machine is obtained, and a corresponding pulse drive signal is generated based on the real-time state. The generated pulse drive signal corresponds to the real-time state of the finite state machine.

[0049] In a specific embodiment, generating a corresponding pulse drive signal based on the real-time state of the finite state machine includes: determining whether the real-time state of the finite state machine is a high-level state; if the finite state machine is a high-level state, generating a high-level signal as the pulse drive signal; if the finite state machine is not a high-level state, generating a low-level signal as the pulse drive signal.

[0050] Specifically, it can be determined whether the real-time state of the finite state machine is a high-level state. If it is, a high-level signal is generated accordingly; if it is not, a low-level signal is generated accordingly. The combination of the high-level and low-level signals forms a continuous pulse drive signal. If the finite state machine is in an idle or stopped state, a low-level signal is also generated, but this low-level signal is not a pulse drive signal; it is a continuous low-voltage signal (non-pulse signal).

[0051] S150. Output the pulse drive signal to the fixed amplitude drive circuit, so that the fixed amplitude drive circuit modulates and outputs the corresponding amplified pulse signal based on the pulse drive signal and applies it to the silicon photonics device.

[0052] The obtained pulse drive signal is output to the fixed amplitude drive circuit. The fixed amplitude drive circuit amplifies and modulates the pulse drive signal to output an amplified pulse signal corresponding to the pulse drive signal. This amplified pulse signal can be applied to silicon photonic devices.

[0053] The fixed-amplitude variable pulse width drive modulation method for state switching of silicon photonics disclosed in the above embodiments includes: generating a high-frequency clock signal corresponding to the received initial clock signal; receiving input drive control information and synchronizing the control signals contained in the drive control information across clock domains to obtain a corresponding synchronization signal; switching the state of a preset finite state machine according to the synchronization signal and the high-frequency clock signal; generating a corresponding pulse drive signal according to the real-time state of the finite state machine and preset amplitude information; and outputting the pulse drive signal to the fixed-amplitude drive circuit so that the fixed-amplitude drive circuit modulates and outputs a corresponding amplified pulse signal based on the pulse drive signal and applies it to the silicon photonics device. This method generates a high-frequency clock signal internally by the controller and generates a pulse drive signal with adjustable pulse width based on the drive control information, and obtains an amplified pulse signal with a fixed voltage amplitude through modulation by the fixed-amplitude drive circuit. This not only simplifies the pulse signal modulation process but also significantly reduces power consumption and control complexity. It enables precise control of the optical signal by flexibly adjusting the pulse width, while reducing instability caused by voltage changes, making modulation faster and more accurate, and improving the accuracy of pulse signal modulation.

[0054] This invention also provides a fixed-amplitude variable pulse width drive modulation device for state switching of silicon photonics devices. The controller in this fixed-amplitude variable pulse width drive modulation device applies any of the aforementioned embodiments of the fixed-amplitude variable pulse width drive modulation method for state switching of silicon photonics devices. Specifically, please refer to... Figures 2 to 4 .

[0055] like Figure 2As shown, the fixed-amplitude variable pulse width drive modulation device includes a high-frequency clock module 11, a register 12, a signal synchronization module 13, a finite state machine 14, and a pulse signal generator 15 configured within the controller 10; the device also includes a clock module 20; the clock module 20 is connected to the high-frequency clock module 11 and is used to output an initial clock signal; the register 12 is connected to the signal synchronization module 13 and is used to store the input drive control information; the high-frequency clock module 11 and the signal synchronization module 13 are respectively connected to the finite state machine 14, and the finite state machine 14 is connected to the pulse signal generator 15; the output terminal of the pulse signal generator 15 is connected to the fixed-amplitude drive circuit 30.

[0056] The clock module 20 can be a crystal oscillator clock, used to generate a low-frequency initial clock signal. The high-frequency clock module 11 receives the initial clock signal and generates a corresponding high-frequency clock signal. The register 12 receives and stores the input drive control information. The signal synchronization module 13 acquires a set of drive control information stored in the register 12 and performs cross-clock domain synchronization on the control signals contained in the drive control information. The synchronization signal and the high-frequency clock signal are respectively input into the finite state machine 14, and the finite state machine 14 switches states according to the high-frequency clock signal and the synchronization signal. The pulse signal generator 15 acquires the real-time state of the finite state machine 14 and generates a corresponding pulse drive signal. The pulse drive signal is output to the fixed-amplitude drive circuit 30 to drive the fixed-amplitude drive circuit 30 to modulate and output the corresponding amplified pulse signal.

[0057] In a more specific embodiment, such as Figure 4 As shown, the fixed-amplitude driving circuit 30 includes an optocoupler U1, a driving transistor Q1, a first diode D1, a first resistor R1, a second resistor R2, and a third resistor R3. One end of the first resistor R1 is connected to the output terminal of the pulse signal generator 15; the other end of the first resistor R1 is connected to the cathode of the first diode D1 and the first terminal of the optocoupler U1; the cathode of the first diode D1 and the second terminal of the optocoupler U1 are grounded; the third terminal of the optocoupler U1 is grounded; the fourth terminal of the optocoupler U1 is connected to one end of the second resistor R2 and the gate of the driving transistor Q1; the other end of the second resistor R2 is connected to the regulated power supply VCC; the source of the driving transistor Q1 is grounded; the drain of the driving transistor Q1 is connected to one end of the third resistor R3 and serves as the output terminal for amplifying the pulse signal; the other end of the third resistor R3 is connected to the transistor power supply terminal V2.

[0058] V1 is connected to the pulse output terminal of controller 10. When controller 10 outputs a low level, optocoupler U1 is lit, allowing current to flow; when controller 10 outputs a high level, optocoupler U1 is not lit, cutting off the current. This indicates that the pulse drive signal output by controller 10 directly controls the on / off state of optocoupler U1. Figure 4 Probe 1 is used to measure the voltage (amplitude) of the amplified pulse signal output by the fixed-amplitude drive circuit 30; XSC1 is a signal detector (such as an oscilloscope) used to detect the pulse width of the amplified pulse signal output by the fixed-amplitude drive circuit 30.

[0059] The optocoupler U1 acts as a switch here. It receives the pulse drive signal output by the controller 10, converts it into an optical signal through the internal optical transmitter, and then converts the optical signal back into an electrical signal by the optical receiver, thereby driving the subsequent drive transistor Q1.

[0060] The driving transistor Q1, also known as a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor), is the core power switch in this scheme. The output signal of the optocoupler U1 is directly connected to the gate of the driving transistor Q1. When the signal output from the optocoupler U1 is input to the gate of the driving transistor Q1 and turns it on, a low-resistance path is formed between the drain and source of the driving transistor Q1, allowing current to flow through the load. When the output signal from the optocoupler U1 is input to the gate of the driving transistor Q1 and turns it off, a high resistance is formed between the drain and source of the driving transistor Q1, cutting off the current. By controlling the on and off states of the driving transistor Q1, the voltage and current capabilities of the input pulse drive signal can be amplified, thereby driving a higher-power load and achieving "fixed-amplitude" pulse output. The driving transistor Q1 also serves as a high-speed analog switch (single-pole double-throw switch) configured within the fixed-amplitude drive circuit. The specific process of the controller 10 controlling the driving transistor Q1 is as follows... Figure 3 As shown.

[0061] The power supply to the driving transistor Q1 is achieved through the transistor power supply terminal V2, and its voltage value directly determines the amplitude of the output pulse. Regardless of the pulse width variation, as long as the transistor power supply terminal V2 remains stable, the amplitude of the output pulse remains constant. Variable pulse width: The variable pulse width pulse drive signal generated at the controller's output terminal is isolated by the optocoupler U1 and directly controls the switching time of the driving transistor Q1. This allows the output amplified pulse signal to accurately replicate the pulse width variation output by the controller 10, achieving variable pulse width pulse signal modulation. This scheme, through the isolation of the optocoupler U1 and the power amplification of the driving transistor Q1, combined with the fixed power supply voltage input at the transistor power supply terminal V2, ultimately achieves the application effect of generating a precise variable pulse width signal with a fixed amplitude high-power output via a fixed-amplitude variable pulse width drive modulation device.

[0062] The aforementioned fixed-amplitude variable-pulse-width driving modulation method and apparatus overcomes the problems of slow response speed, insufficient modulation accuracy, and high power consumption in the modulation process of existing silicon photonic devices. By fixing the voltage amplitude and adjusting only the pulse width, this method simplifies the modulation process, avoids system complexity and stability issues caused by voltage amplitude variations, and ensures the accuracy and consistency of the modulation effect. The application process of the aforementioned fixed-amplitude variable-pulse-width driving modulation apparatus was tested, and the relationship between the specific pulse width variation and the surface temperature of the optical waveguide material is as follows: Figure 5 As shown. Where, T c T represents the crystallization temperature of the Sb₂Se₃ phase change material, while T m This indicates the melting temperature. Sb₂Se₃ phase change materials can reversibly transition between their amorphous and crystalline states, thereby enabling multi-level storage and supporting the ability to write multi-bit information. Based on the graphical relationship between electrical parameters and temperature response, under fixed voltage amplitude conditions, the material can be effectively induced to complete crystallization and amorphization processes by precisely controlling the pulse width. The aforementioned constant-amplitude variable-pulse-width driving modulation method provides crucial technical support for the state switching of silicon photonic devices. The working principle of silicon photonic devices (such as silicon-based electro-optic modulators, optical switches, etc.) often relies on mechanisms such as carrier injection, depletion, or thermo-optic effects. The response speed and efficiency of these mechanisms are highly sensitive to the amplitude and duration of the driving pulse. The method proposed in this patent cleverly applies these advanced pulse generation and driving technologies to silicon photonic devices to overcome the limitations of traditional driving methods and achieve more efficient and precise device state switching. Figure 6 This diagram illustrates the device temperature in a photonic circuit integrated from Ge2Sb2Se4Te1 and Si3N4, with a fixed voltage amplitude of 7.5V and pulsed drives using 13µs and 5µs pulse widths, respectively. The diagram reflects the variation in the intensity of the current-induced thermal effect under different pulse widths. In the figure, T... mThe figure represents the melting temperature of the Ge2Sb2Se4Te1 material. τ1 and τ2 represent two different thermal time constants, revealing a two-stage heat dissipation mechanism: the initial stage is dominated by extremely fast planar heat dissipation within the graphene layer, followed by a slower vertical heat dissipation process towards the Si3N4 substrate. This figure demonstrates precise control of device state switching by fixing the voltage amplitude (7.5V) to ensure stable heating power and finely adjusting the pulse width (comparing 5μs and 13μs), providing crucial information for optimizing switching power consumption. In the fixed-amplitude variable pulse width drive modulation device for state switching of silicon photonics provided in this embodiment of the invention, the controller applies the aforementioned fixed-amplitude variable pulse width drive modulation method for state switching of silicon photonics. It generates a high-frequency clock signal corresponding to the received initial clock signal; receives input drive control information; synchronizes the control signals contained in the drive control information across clock domains to obtain a corresponding synchronization signal; switches the state of a preset finite state machine based on the synchronization signal and the high-frequency clock signal; generates a corresponding pulse drive signal based on the real-time state of the finite state machine and preset amplitude information; and outputs the pulse drive signal to the fixed-amplitude drive circuit, so that the fixed-amplitude drive circuit modulates and outputs a corresponding amplified pulse signal based on the pulse drive signal and applies it to the silicon photonics device. This method generates a high-frequency clock signal internally by the controller and generates a pulse drive signal with adjustable pulse width based on the drive control information, and modulates it through the fixed-amplitude drive circuit to obtain an amplified pulse signal with a fixed voltage amplitude. This not only simplifies the pulse signal modulation process but also significantly reduces power consumption and control complexity. It enables precise control of the optical signal by flexibly adjusting the pulse width, while reducing instability caused by voltage changes, making modulation faster and more accurate, and improving the accuracy of pulse signal modulation.

[0063] The aforementioned fixed-amplitude variable-pulse-width drive modulation method for state switching of silicon photonic devices can be implemented as a computer program, which can be used in various ways, such as... Figure 7 If the controller runs on the computer device shown, it can be implemented as follows: Figure 7 The computer equipment shown.

[0064] Please see Figure 7 , Figure 7 This is a schematic block diagram of a computer device provided in an embodiment of the present invention. The computer device may be a controller for executing a constant-amplitude variable-pulse-width drive modulation method for switching the state of silicon photonics devices to achieve constant-amplitude variable-pulse-width drive modulation.

[0065] See Figure 7 The computer device 500 includes a processor 502, a memory, and a network interface 505 connected via a communication bus 501. The memory may include a storage medium 503 and internal memory 504.

[0066] The storage medium 503 may store an operating system 5031 and a computer program 5032. When the computer program 5032 is executed, it causes the processor 502 to execute a constant amplitude variable pulse width drive modulation method for switching the state of silicon photonics devices. The storage medium 503 may be a volatile storage medium or a non-volatile storage medium.

[0067] The processor 502 provides computing and control capabilities to support the operation of the entire computer device 500.

[0068] The internal memory 504 provides an environment for the operation of the computer program 5032 in the storage medium 503. When the computer program 5032 is executed by the processor 502, the processor 502 can execute a constant amplitude variable pulse width drive modulation method for state switching of silicon photonic devices.

[0069] This network interface 505 is used for network communication, such as providing data transmission. Those skilled in the art will understand that... Figure 7 The structure shown is merely a block diagram of a portion of the structure related to the present invention and does not constitute a limitation on the computer device 500 to which the present invention is applied. The specific computer device 500 may include more or fewer components than shown in the figure, or combine certain components, or have different component arrangements.

[0070] The processor 502 is used to run the computer program 5032 stored in the memory to implement the corresponding functions in the fixed amplitude variable pulse width drive modulation method for switching the state of silicon photonic devices.

[0071] Those skilled in the art will understand that Figure 7 The embodiments of the computer device shown do not constitute a limitation on the specific configuration of the computer device. In other embodiments, the computer device may include more or fewer components than illustrated, or combine certain components, or have different component arrangements. For example, in some embodiments, the computer device may include only memory and a processor. In such embodiments, the structure and function of the memory and processor are different from those shown. Figure 7 The embodiments shown are consistent and will not be described again here.

[0072] It should be understood that, in this embodiment of the invention, the processor 502 may be a Central Processing Unit (CPU), or it may be other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or any conventional processor.

[0073] In another embodiment of the invention, a computer-readable storage medium is provided. This computer-readable storage medium may be volatile or non-volatile. The computer-readable storage medium stores a computer program, wherein when executed by a processor, the computer program implements the steps included in the above-described constant-amplitude variable-pulse-width drive modulation method for state switching of silicon photonic devices.

[0074] Those skilled in the art will readily understand that, for the sake of convenience and brevity, the specific working processes of the devices, apparatuses, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here. Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described in terms of function in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this invention.

[0075] In the embodiments provided by this invention, it should be understood that the disclosed devices, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative. For instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. Units with the same function may be grouped into one unit. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. In addition, the coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection through some interfaces, devices, or units, or it may be an electrical, mechanical, or other form of connection.

[0076] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of the embodiments of the present invention, depending on actual needs.

[0077] Furthermore, the functional units in the various embodiments of the present invention can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0078] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a computer-readable storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned computer-readable storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), magnetic disks, or optical disks.

[0079] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in the present invention, and these modifications or substitutions should all be covered within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A fixed-amplitude variable-pulse-width driving modulation method for state switching of silicon photonic devices, characterized in that, The method is applied to the controller of a fixed-amplitude variable pulse width drive modulation device for switching the state of silicon photonics devices. The fixed-amplitude variable pulse width drive modulation device for switching the state of silicon photonics devices further includes a fixed-amplitude drive circuit that is communicatively connected to the controller. The fixed-amplitude drive circuit includes an optocoupler isolator, a drive transistor, a first diode, a first resistor, a second resistor, and a third resistor. One end of the first resistor is connected to the output terminal of the pulse signal generator; the other end of the first resistor is connected to the negative terminal of the first diode and the first terminal of the optocoupler isolator; the pulse signal generator generates a pulse drive signal and outputs it to the fixed amplitude drive circuit. The negative terminal of the first diode and the second terminal of the optocoupler are grounded; the third terminal of the optocoupler is grounded; the fourth terminal of the optocoupler is connected to one end of the second resistor and the gate of the driving transistor; the other end of the second resistor is connected to a regulated power supply. The source of the driving transistor is grounded, and the drain of the driving transistor is connected to one end of the third resistor and serves as the output terminal for amplifying the pulse signal. The other end of the third resistor is connected to the transistor power supply terminal; The method includes: Generate a high-frequency clock signal corresponding to the received initial clock signal; Receive the input drive control information, synchronize the control signals contained in the drive control information across clock domains, and obtain the corresponding synchronization signal; The preset finite state machine is switched according to the synchronization signal and the high-frequency clock signal; Generate corresponding pulse drive signals based on the real-time state of the finite state machine; The pulse drive signal is output to the fixed amplitude drive circuit, so that the fixed amplitude drive circuit modulates and outputs a corresponding amplified pulse signal based on the pulse drive signal and applies it to the silicon photonics device. The step of generating a high-frequency clock signal corresponding to the received initial clock signal includes: The initial clock signal is divided in the time domain according to preset pulse division parameters to obtain the corresponding high-frequency signal; Determine the time parameters of each signal in the high-frequency signal to obtain the corresponding high-frequency clock signal; The step of synchronizing the control signals contained in the drive control information across clock domains to obtain the corresponding synchronization signal includes: The corresponding synchronization time is determined based on the storage time of each control signal in the drive control information; The control signals are aligned according to the synchronization time to obtain the corresponding synchronization signals. The step of switching the state of a preset finite state machine according to the synchronization signal and the high-frequency clock signal includes: The switching parameters corresponding to each state in the finite state machine are set according to the synchronization signal; Receives a start command and switches from idle state to high level state; The system switches between a high-level state and a low-level state according to the switching parameters until the number of pulses reaches the number parameter set in the switching parameters, at which point it switches to a stop state. The step of generating the corresponding pulse drive signal based on the real-time state of the finite state machine includes: Determine whether the real-time state of the finite state machine is a high-level state; If the finite state machine is in a high-level state, a high-level signal is generated as the pulse drive signal; If the finite state machine is not in a high-level state, a low-level signal is generated as the pulse drive signal.

2. The fixed-amplitude variable pulse width driving modulation method for state switching of silicon photonics devices according to claim 1, characterized in that, The step of setting the switching parameters corresponding to each state in the finite state machine according to the synchronization signal includes: The corresponding quantity parameters, high-level count parameters, and low-level count parameters are calculated based on the synchronization signal. The switching parameters corresponding to each state in the finite state machine are set according to the quantity parameter, the high-level counting parameter, and the low-level counting parameter.

3. A fixed-amplitude variable-pulse-width driving modulation device for state switching of silicon photonic devices, characterized in that, The controller in the fixed-amplitude variable pulse width drive modulation device applies the fixed-amplitude variable pulse width drive modulation method for state switching of silicon photonics devices as described in claim 1 or 2. The device includes a high-frequency clock module, a register, a signal synchronization module, a finite state machine, and a pulse signal generator configured in the controller; the device also includes a clock module. The clock module is connected to the high-frequency clock module, and the clock module is used to output an initial clock signal; The register is connected to the signal synchronization module, and the register is used to store the input drive control information; The high-frequency clock module and the signal synchronization module are respectively connected to the finite state machine, and the finite state machine is connected to the pulse signal generator; the output of the pulse signal generator is connected to the fixed amplitude driving circuit.

4. A computer device, characterized in that, The device includes a processor, a communication interface, a memory, and a communication bus, wherein the processor, the communication interface, and the memory communicate with each other through the communication bus; Memory, used to store computer programs; When a processor executes a program stored in a memory, it implements the steps of the constant amplitude variable pulse width drive modulation method for state switching of silicon photonic devices as described in claim 1 or 2.

5. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the steps of the constant amplitude variable pulse width drive modulation method for state switching of silicon photonic devices as described in claim 1 or 2.

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