Full duplex scheme for asymmetric communication links using zero disparity modulation

Abstract

Embodiments of the present disclosure relate to a full duplex scheme for asymmetric communication links using zero disparity modulation. An Ethernet physical layer (PHY) device for use in an automotive network includes a cable interface, a transmitter, and a receiver. The cable interface is configured to connect to an Ethernet cable. The transmitter is configured to generate an outbound signal by modulating outbound data with zero disparity modulation at a first data rate, and to transmit the outbound signal to the Ethernet cable via the cable interface. The receiver is configured to receive an inbound signal having a second data rate from the Ethernet cable via the cable interface, the second data rate being lower than the first data rate, the inbound signal at least partially overlapping the outbound signal in spectrum, and to demodulate the inbound signal to produce inbound data.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the benefit of U.S. Provisional Patent Application No. 63 / 557,119, filed February 23, 2024, the disclosure of which is incorporated herein by reference. Technical Field

[0003] The present disclosure relates generally to digital communications and, more particularly, to methods and systems for full-duplex communications using zero-parallax modulation. Background Art

[0004] Various communication systems and applications involve bidirectional communication with asymmetric data rates, where the data rate of upstream communication differs from the data rate of downstream communication. For example, a communication link between a camera and a controller typically carries high-data-rate signals that transmit sensor data from the camera to the controller, and low-data-rate signals that transmit control data from the controller to the camera. Another example of an asymmetric communication link is the link connecting a processor and a display. In such a link, the data rate from the processor to the display is typically much higher than the data rate in the reverse direction.

[0005] The above description is presented as a general overview of the relevant art in this field and should not be construed as an admission that any of the information it contains constitutes prior art with respect to the present patent application. Summary of the Invention

[0006] Embodiments described herein provide an Ethernet physical layer (PHY) device for use in an automotive network. The Ethernet PHY device includes a cable interface, a transmitter, and a receiver. The cable interface is configured to connect to an Ethernet cable. The transmitter is configured to generate an outbound signal by modulating outbound data using zero-parallax modulation at a first data rate, and to send the outbound signal to the Ethernet cable via the cable interface. The receiver is configured to receive an inbound signal having a second data rate from the Ethernet cable via the cable interface, the second data rate being lower than the first data rate, the inbound signal at least partially overlapping in spectrum with the outbound signal, and to demodulate the inbound signal to generate inbound data.

[0007] In some embodiments, the transmitter is configured to obtain outbound data from one or more sensors, and the receiver is configured to receive control data in an inbound signal for controlling the one or more sensors.

[0008] In a disclosed embodiment, the transmitter is configured to modulate the outbound data using bipolar non-return-to-zero (NRZ) modulation. In another embodiment, the transmitter is configured to modulate the outbound data using Manchester code modulation.

[0009] In yet another embodiment, the transmitter is configured to modulate the outbound data using pulse amplitude modulation (PAM) to generate a PAM signal and filter the PAM signal using a high pass filter (HPF).In some embodiments, the receiver is configured to demodulate the inbound signal using a zero-disparity decoder.

[0010] According to the embodiments described herein, an Ethernet physical layer (PHY) device for use in an automotive network is additionally provided. The Ethernet PHY device includes a cable interface, a transmitter, and a receiver. The cable interface is configured to connect to an Ethernet cable. The receiver is configured to receive an inbound signal from the Ethernet cable via the cable interface, the inbound signal modulated with zero-parallax modulation at a first data rate, and demodulate the inbound signal to generate inbound data. The transmitter is configured to generate an outbound signal by modulating the outbound data at a second data rate lower than the first data rate, the outbound signal at least partially overlapping in spectrum with the inbound signal, and transmit the outbound signal to the Ethernet cable via the cable interface.

[0011] In some embodiments, the receiver is configured to receive sensor data originating from one or more sensors in inbound data, and the transmitter is configured to transmit control data for controlling the one or more sensors in outbound data.

[0012] In one embodiment, the receiver is configured to demodulate the inbound signal using a bipolar non-return-to-zero (NRZ) decoder. In another embodiment, the receiver is configured to demodulate the inbound signal using a Manchester code decoder. In yet another embodiment, the receiver is configured to demodulate the inbound signal using a pulse amplitude modulation (PAM) decoder. In the disclosed embodiment, the transmitter is configured to modulate the outbound data using outbound zero-parallax modulation.

[0013] According to embodiments described herein, a method for communicating in an Ethernet physical layer (PHY) device in an automotive network is also provided. The method includes generating an outbound signal by modulating outbound data at a first data rate using zero-parallax modulation, and transmitting the outbound signal to an Ethernet cable. An inbound signal is received from the Ethernet cable. The inbound signal has a second data rate lower than the first data rate. The inbound signal at least partially overlaps spectrally with the outbound signal. The inbound signal is demodulated to generate inbound data.

[0014] According to embodiments described herein, a method for communicating in an Ethernet physical layer (PHY) device in an automotive network is further provided. The method includes receiving an inbound signal from an Ethernet cable, the inbound signal modulated at a first data rate using zero-parallax modulation, and demodulating the inbound signal to produce inbound data. An outbound signal is generated by modulating the outbound data at a second data rate lower than the first data rate. The outbound signal at least partially overlaps the inbound signal in frequency spectrum. The outbound signal is transmitted to the Ethernet cable.

[0015] The present disclosure will be more fully understood through the following detailed description of embodiments of the present disclosure taken in conjunction with the accompanying drawings, in which: BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 is a block diagram schematically illustrating an asymmetric automotive Ethernet link according to embodiments described herein;

[0017] Figure 2 is a schematic diagram illustrating an embodiment according to the present invention Figure 1 A block diagram of the internal configuration of the camera-side physical layer (PHY) device in the link;

[0018] Figure 3 is a flow chart schematically illustrating a method for asymmetric Ethernet communication according to embodiments described herein;

[0019] Figure 4 is a schematic diagram illustrating an embodiment according to the present invention Figure 1 Block diagram of a low-speed (LS) receiver in a camera-side PHY device;

[0020] Figure 5 is a schematic diagram illustrating an embodiment according to the present invention Figure 1 Block diagram of the high-speed (HS) transmitter in the camera-side PHY device;

[0021] Figure 6 is a block diagram schematically illustrating a camera-side PHY device according to an embodiment described herein;

[0022] Figure 7 is a block diagram schematically illustrating a central (switch-side) PHY device according to embodiments described herein;

[0023] Figure 8 is a block diagram schematically illustrating a camera-side PHY device according to an alternative embodiment described herein; and

[0024] Figure 9 is a schematic diagram illustrating an alternative embodiment according to the present invention Figure 8Figure 2 is a diagram of the frequency spectrum of the HS and LS signals in the camera-side PHY device. DETAILED DESCRIPTION

[0025] The embodiments described herein provide improved techniques for multiplexing signals sent in opposite directions on a shared communication link. The embodiments disclosed herein are primarily described in the context of an asymmetric Ethernet link that connects a camera or other sensor in an automotive Ethernet communication system to a switch or other central controller. However, this selection is made by way of example only. In alternative embodiments, the disclosed techniques may be used in any other suitable system, application, and / or with any other suitable communication protocol involving asymmetric communication. Non-limiting examples of alternative applications include industrial and enterprise networks.

[0026] In some embodiments, an automotive Ethernet communication link includes two Ethernet physical layer (PHY) devices that communicate over an Ethernet cable. One PHY device is connected to a camera or other sensor and is referred to as a "camera-side" or "sensor-side" PHY device. The other PHY device is connected to a switch or central controller and is referred to as a "switch-side" or "central" PHY device. The Ethernet signals sent by the camera-side PHY device are referred to as "high-speed" (HS) signals, and the Ethernet signals sent by the switch-side PHY device are referred to as "low-speed" (LS) signals. In one example embodiment, the HS signal has a data rate of 5 Gbps, while the LS signal has a data rate of 100 Mbps.

[0027] In the disclosed embodiment, an HS PHY device and an LS PHY device concurrently transmit HS and LS signals over a cable. The spectrum of the LS signal is much narrower than that of the HS signal. When the two signals are transmitted concurrently, the spectrum of the LS signal typically overlaps with the lower portion of the spectrum of the HS signal. Unless accounted for, this spectral overlap can cause interference between the two signals.

[0028] In some embodiments, the interference between the HS signal and the LS signal is reduced by appropriately designing the modulation scheme of the HS signal. In the embodiments described herein, zero parallax modulation is used to modulate the HS signal. In this context, the term "zero parallax modulation" refers to a modulation scheme in which the modulated signal has a spectral notch near zero frequency (0 Hz, also known as "direct current" DC). Equivalently, the term "zero parallax modulation" can be defined as a modulation scheme in which the average amplitude of the modulated signal is zero (or close to zero). An example of zero parallax modulation is bipolar non-return-to-zero (bipolar NRZ). Another example is Manchester code modulation. Yet another example is pulse amplitude modulation (PAM) followed by high-pass filtering (HPF). These three examples are described in detail below. Alternatively, any other suitable zero parallax modulation may be used.

[0029] When zero-parallax modulation is used for the HS signal, the spectrum of the LS signal falls into a spectral region where the HS signal has very low power content. Therefore, interference in both directions (interference from the LS signal to the HS signal demodulation and interference from the HS signal to the LS signal demodulation) is greatly reduced.

[0030] The disclosed multiplexing scheme offers advantages over conventional schemes such as frequency division multiplexing (FDD) and time division multiplexing (TDD), for example, in terms of cost, size, and design simplicity of the PHY device. Unlike FDD, the disclosed multiplexing scheme uses the spectral shape of the signal to distinguish between the signals transmitted in the two link directions, thereby eliminating the need for strict frequency separation and filtering between the HS and LS signals. Unlike TDD, the multiplexing scheme described herein enables continuous concurrent transmission of the two signals ("full duplex") and does not require switching and timing circuitry. Furthermore, the low level of interference between the HS and LS signals eliminates the need for echo cancellation in the PHY device. Consequently, the disclosed PHY device is easier to implement and has low cost, size, and power consumption.

[0031] Figure 1 FIG2 is a block diagram schematically illustrating an asymmetric Automotive Ethernet link 20 according to embodiments described herein. Link 20 is typically installed in a vehicle 22 as part of an Automotive Ethernet communication system. In alternative embodiments, link 20 can be used in any other suitable system or application, such as an industrial or enterprise network. Link 20 includes a pair of Ethernet PHY devices 24A and 24B that communicate via an Ethernet cable 28. Cable 28 can include, for example, a twisted-pair Automotive Ethernet cable or any other suitable medium shared between the two transmission directions of the link.

[0032] In this example, PHY device 24A ("camera-side PHY") is locally connected to camera 32, and PHY device 24B ("central PHY") is locally connected to a port of a switch or central controller. PHY device 24A receives sensor data (e.g., video data) from camera 32, generates an HS signal that conveys the sensor data, and sends the HS signal to PHY device 24B via cable 28. PHY device 24B receives control data for controlling camera 32, for example, from the central controller, generates an LS signal that conveys the control data, and sends the LS signal to PHY device 24A via cable 28.

[0033] exist Figure 1 In the embodiment of FIG. 4 , the camera-side PHY device 24A includes an HS transmitter 36, an LS receiver 40, and a mixer 44. The mixer 44 acts as a cable interface for transmission and reception. The HS transmitter 36 obtains sensor data from the camera 32, generates an HS signal (including modulating the sensor data using zero-parallax modulation described below), and transmits the HS signal via the mixer 44 over the cable 28. The LS receiver 40 receives the LS signal from the cable via the mixer 44, demodulates the LS signal, and forwards control data to the camera 32.

[0034] exist Figure 1 In the example shown, central PHY device 24B includes HS receiver 48, LS transmitter 52, and mixer 44. HS receiver 48 receives HS signals from cable 28 via mixer 44, demodulates the HS signals, and forwards sensor data to its locally connected switch or central controller. LS transmitter 52 obtains control data from the switch or central controller, generates LS signals, and transmits the LS signals through cable 28 via mixer 44.

[0035] Figure 1 The bottom graph illustrates the spectrum of the HS and LS signals in an embodiment. The vertical axis represents power spectral density (PSD) in arbitrary logarithmic units. The horizontal axis represents frequency in GHz. Graph 56 shows the spectrum of the HS signal transmitted by HS transmitter 36 (in camera-side PHY device 24A). Graph 60 shows the spectrum of the LS signal transmitted by LS transmitter 52 (in central PHY device 24B).

[0036] As can be seen, the HS and LS signals partially overlap in frequency spectrum: the spectrum 60 of the LS signal coincides with the lower portion of the spectrum 56 of the HS signal. To reduce the level of interference between the two signals, given the partial overlap, the modulation scheme used in the HS signal has a spectral notch 64 around DC (zero frequency). Notch 64 is achieved by modulating the sensor data using zero-parallax modulation, in which the DC component is typically reduced to zero. In various embodiments, the HS transmitter 36 may modulate the sensor data using any suitable type of zero-parallax modulation.

[0037] In one embodiment, HS transmitter 36 modulates sensor data using bipolar NRZ modulation. In bipolar NRZ, the modulator receives a sequence of "0" and "1" bits. The "0" bit is mapped to a symbol value of zero. The "1" bits in the sequence are alternately mapped to +V and -V. When averaged (e.g., integrated) over time, the average amplitude of the modulated signal approaches zero.

[0038] In another embodiment, the HS transmitter 36 modulates the sensor data using Manchester code modulation. In Manchester code modulation, each individual symbol is positive during a portion of the symbol interval and negative during the remaining symbol interval, so that the average amplitude of each symbol is zero. In one example, a bit value of "0" is mapped to a symbol equal to +V during the first half of the symbol interval and transitions to -V during the second half of the symbol interval. A bit value of "1" is mapped to a symbol equal to -V during the first half of the symbol interval and transitions to +V during the second half of the symbol interval.

[0039] In the frequency domain, the spectra of both bipolar NRZ and Manchester code modulation have a spectral notch around DC (because the average signal amplitude is essentially zero) similar to notch 64. This characteristic reduces interference between the HS signal and the LS signal.

[0040] In various embodiments, the LS transmitter 52 (in the central PHY device 24B) can modulate the control data using various types of modulation to generate the LS signal. The modulation used for the LS signal can be, but is not necessarily, zero-parallax modulation. For example, in some embodiments, the LS transmitter 52 can use PAM (e.g., PAM-2 or PAM-4) to generate the LS signal. Alternatively, however, in some embodiments, the LS transmitter 52 can also use zero-parallax modulation for the LS signal. For example, this implementation is useful because it reduces baseline wander effects, where the baseline level of a signal changes slowly over time. Figure 1 In the non-limiting example of φ , spectrum 60 is seen to also have a spectral notch at DC, which is caused by the LS transmitter 52 using zero-disparity modulation.

[0041] Figure 2is a block diagram schematically illustrating an internal configuration of the camera-side PHY device 24A according to the embodiments described herein.

[0042] In this example, the HS transmitter 36 includes a framing module 68, a bipolar NRZ encoder 72, a digital-to-analog converter (DAC) 76, and a transmit (Tx) filter 80. The framing module 68 formats the sensor data into frames, including, in some embodiments, calculating forward error correction (FEC) and cyclic redundancy check (CRC) bits. The encoder 72 encodes the resulting bit stream using bipolar NRZ (i.e., mapping a "0" bit to a "0" and mapping a "1" bit alternately to a "1" and a "-1"). The DAC 76 converts the output of the encoder 72 into an analog signal having three analog values ​​{-V, 0, +V}. The Tx filter 80 filters the output of the DAC 76. The resulting HS signal is transmitted via the cable 28 via the mixer 44.

[0043] exist Figure 2 In the example of FIG, LS receiver 40 includes a low-pass (LP) filter 84, an analog-to-digital converter (ADC) 88, an NRZ decoder 92, a framing module 96, and a clock data recovery (CDR) module 100. LP filter 84 applies low-pass filtering to the LS signal received from cable 28 via mixer 44.

[0044] The spectral response of the LP filter 84 is designed to pass the spectrum of the LS signal (e.g. Figure 1 60), while suppressing most of the spectrum of the HS signal (e.g. Figure 1 As explained above, spectrum notch 64 reduces the amount of power in the HS signal that overlaps with the LS signal. Combined with the low-pass filtering of LP filter 84, the energy of the HS signal that leaks into LS receiver 40 is minimized. Thus, interference caused by the transmission of the HS signal into the reception of the LS signal is minimized.

[0045] ADC 88 digitizes the filtered signal at the output of LP filter 84. NRZ decoder 92 decodes the digitized signal. Framing module 96 decodes and removes FEC and CRC bits. The resulting control data is passed to camera head 32. CDR module 100 reconstructs the clock of the LS signal and controls the sampling clock of ADC 88.

[0046] Figure 3 FIG2 is a flow chart schematically illustrating a method for asymmetric Ethernet communication according to an embodiment described herein. The method focuses on the operation of the camera-side PHY device 24A. The left side of the figure illustrates operations related to the transmission of HS signals. The right side of the figure illustrates operations related to the reception of LS signals.

[0047] At sensor data receiving operation 104 , HS transmitter 36 receives sensor data from camera 32 . At modulation operation 108 , HS transmitter 36 modulates the sensor data using bipolar NRZ modulation. At transmission operation 112 , HS transmitter 36 transmits the HS signal to cable 28 .

[0048] At control signal receiving operation 116 , the LS receiver 40 receives the LS signal from the cable 28 . At demodulation operation 120 , the LS receiver 40 demodulates the LS signal to reproduce the control data. At forwarding operation 124 , the LS receiver 40 forwards the control data to the camera 32 .

[0049] Figure 4 FIG2 is a block diagram schematically illustrating the internal structure of an LS receiver in a camera-side PHY device 24A according to another embodiment described herein. In this example, the LS signal is also modulated using bipolar NRZ modulation. Figure 4 The example LS receiver includes an analog front end (AFE) 128 followed by a digital processor 132. The AFE 128 includes an analog LP filter 136, a gain block 140, and a pair of comparators 144. The digital block 132 includes a downsampler 148, a slicer (also known as a decision circuit) 156, a framer module 160, and a clock data recovery (CDR) module 152.

[0050] LP filter 136 applies low pass filtering (similar to Figure 2 LP filter 84). As explained above, this filtering removes most of the energy of the HS signal that might leak into the LS receiver.

[0051] Gain block 140 amplifies the filtered LS signal to the appropriate level expected by comparator 144. Comparator 144 compares the level of the LS signal to -0.5 and +0.5. The outputs of the two comparators are summed together. At the output of AFE 128, the resulting signal is a sequence of analog values ​​with three possible values ​​{-V, 0, +V} based on the bipolar modulation of the LS signal.

[0052] The downsampler 148 samples the output of the AFE 128 at a rate of one sample per symbol (i.e., the symbol rate of the LS signal). The slicer 156 determines for each sample produced by the downsampler 148 whether the sample represents a "1," a "0," or a "-1." The operation of the framing module 160 is similar to Figure 2 The framing module 96.

[0053] Figure 5FIG1 is a block diagram schematically illustrating the internal structure of an HS transmitter in a camera-side PHY device 24A according to another embodiment described herein. In this implementation, the HS transmitter includes a digital processor 164 followed by an AFE 168. The digital processor 164 includes a framing module 172 and a bipolar NRZ mapper 176. The AFE 168 includes a 3-level DAC 180 and an analog Tx filter 184.

[0054] and Figure 2 Similar to the framing module 68 of FIG. 1 , the framing module 172 receives sensor data from the camera 32 and frames the data. In an embodiment, the mapper 176 maps the framed sensor data into a sequence of {-1, 0, 1} values ​​according to bipolar NRZ. The DAC 180 converts the {-1, 0, 1} values ​​into corresponding analog values. The Tx filter 185 filters the output of the DAC 180, similar to FIG. Figure 2 The resulting HS signal is transmitted via the mixer 44 over the cable 28. In alternative embodiments, other suitable types of HS modulation may be used, and the HS transmitter may have any other suitable configuration.

[0055] Figure 6 is a block diagram schematically illustrating a camera-side PHY device according to embodiments described herein. Figure 6 The camera side PHY device includes AFE 188 and digital processor 192. In addition to the mixer 44, AFE 188 also includes similar Figure 4 The transmission circuit device of the AFE 128 (including the LP filter 136, the gain block 140 and the comparator 144) and the similar Figure 5 The digital processor 192 includes the receiving circuitry of the AFE 168 (including the 3-level DAC 204 and the analog TX filter 208). Figure 4 The transmission circuit device similar to the digital processor 132 of the embodiment of the present invention (including the down sampler 148, the slicer 156, the frame module 160 and the CDR module 152) and the transmission circuit device similar to the digital processor 132 of the embodiment of the present invention (including the down sampler 148, the slicer 156, the frame module 160 and the CDR module 152) Figure 5 The digital processor 164 is similar to the receiving circuit device (including the framing module 196 and the bipolar NRZ mapper 200).

[0056] exist Figure 6 In this configuration, the transmit clock can be independent of the receive clock.

[0057] Figure 7 2 is a block diagram schematically illustrating the internal structure of a central PHY device 24B according to an embodiment described herein. The PHY device 24B includes an AFE 212 and a digital processor 216. In this example, the LS signal uses conventional PAM modulation, while the HS signal uses bipolar NRZ modulation.

[0058] The transmission circuitry in the digital processor 216 includes a framing / mapping module 216 and a physical coding sublayer (PCS) module 220, the outputs of which are multiplexed by a multiplexer 224. The framing / mapping module 216 receives a bit stream as input and generates a higher rate bit stream based on bipolar NRZ. In an embodiment, the framing / mapping module 216 repeats an incoming "1" bit into "+3" and "-3" and converts an incoming "0" bit into an alternating sequence of "+1" and "-1".

[0059] The PAM mapping module outputs a digital PAM symbol sequence for the LS signal. The pre-emphasis filter 232 filters the PAM symbol sequence. In one embodiment, the pre-emphasis filter 232 comprises an even-length symmetric LP filter that converts sequences of "+1" and "-1" to zero. The transmission circuitry in the AFE 212 includes a DAC 236 that converts the digital PAM signal to an analog PAM signal and an analog Tx filter 240 that filters the analog PAM signal. The output of the filter 240 is transmitted to the cable 28 via the mixer 44.

[0060] The receiving circuitry in AFE 212 includes an analog LP filter 244, which filters the HS signal received from cable 28 via mixer 44. ADC 248 digitizes the HS signal. In digital processor 216, the receiving circuitry includes a CDR module 252, which recovers the HS signal clock and controls the sampling clock of ADC 248. A downsampler 256 reduces the rate of the digitized HS signal to one sample per symbol. A feedforward equalizer (FFE) 260 and a decision feedback equalizer (DFE) 276 equalize the signal. Equalizers 260 and 276 typically include digital filters with adaptive coefficients (taps). Alternatively, other suitable equalizer types may be used. A slicer 264 performs bit decisions. A framing and demapping module 268 and a PCS module extract and output sensor data.

[0061] In some embodiments, digital echo cancellation (DEC) module 280 cancels the echo of the transmitted LS signal from the received HS signal. In alternative embodiments, analog echo cancellation may be used. In other embodiments, the receive performance of PHY device 24B is sufficient without echo cancellation, and echo cancellation module 280 is omitted.

[0062] Figure 7The central PHY device 24B can be implemented while utilizing certain elements of a conventional IEEE 802.2ch compliant PHY device. Certain blocks (e.g., framing modules 216 and 268 and multiplexer 224) may be new, while other elements may require slight modifications. In some embodiments, certain elements (e.g., analog LP filter 244 and / or DFE 276) may be omitted. Figure 7 In this configuration, the transmit clock and receive clock can be locked to each other.

[0063] Figure 8 is a block diagram schematically illustrating a camera-side PHY device according to an alternative embodiment described herein. In this example, the HS signal is modulated using PAM-4, and a spectrum notch near DC is generated by analog filtering of the PAM-4 signal. The resulting signal spectrum is as follows Figure 9 As shown. Alternatively, digital filtering can be used.

[0064] In this example, the internal structure of the PHY device 24A is similar to the above Figure 6 . Figure 8 PHY device with Figure 6 The differences between the PHY devices are as follows:

[0065] ■The digital processor 192 includes a PAM-4 mapper 284 instead of the bipolar NRZ mapper 200.

[0066] ■ The AFE 188 includes a 4-level DAC 288 instead of the 3-level DAC 204.

[0067] In some embodiments, when PAM-4 modulation is used for the HS signal followed by high-pass filtering, the central PHY device 24B may be similar to the above Figure 7 .

[0068] Figure 9 is a schematic diagram illustrating an alternative embodiment according to the present invention Figure 8 Graph 292 shows the spectrum of the HS signal transmitted by the HS transmitter 36 and the spectrum of the LS signal received by the LS receiver. As can be seen, the spectrum 292 of the HS signal has a spectrum notch 300 around zero frequency. This notch is caused by the high pass filtering operation of the analog Tx filter 208 ( Figure 8 ).

[0069] Figures 1 to 8The configurations of the various communication links and PHY devices and their components (such as HS and LS transmitters and receivers) shown are example configurations described for clarity only. In alternative embodiments, any other suitable configuration may be used.

[0070] Various elements of the disclosed communication link and PHY device can be implemented using dedicated hardware or firmware, such as using hardwired or programmable logic, for example in an application specific integrated circuit (ASIC) or a field programmable gate array (FPGA). Additionally or alternatively, certain elements of the disclosed communication link and PHY device can be implemented in software and / or using a combination of hardware and software elements. For the sake of clarity, elements that are not mandatory for understanding the disclosed technology have been omitted from the drawings.

[0071] In some embodiments, certain functions of the disclosed communication links and PHY devices may be implemented in one or more programmable processors (e.g., one or more central processing units (CPUs) or microcontrollers) that are programmed in software to perform the functions described herein. The software may be downloaded to any processor in electronic form, for example, over a network, or it may alternatively or additionally be provided and / or stored on non-transitory tangible media, such as magnetic, optical, or electronic memory.

[0072] Although the embodiments described herein primarily deal with automotive Ethernet links, the methods and systems described herein may also be used in other applications involving bidirectional communications with asymmetric data rates.

[0073] It should be noted that the above embodiments are cited by way of example, and the present invention is not limited to the contents specifically shown and described above. On the contrary, the scope of the present invention includes combinations and sub-combinations of the various features described above and variations and modifications that will occur to those skilled in the art upon reading the foregoing description and that are not disclosed in the prior art. The documents incorporated by reference into this patent application should be considered as an integral part of this application, unless any term is defined in these incorporated documents in a manner that conflicts with the definition made explicitly or implicitly in this specification, otherwise only the definition in this specification should be considered.

Claims

1. An Ethernet physical layer (PHY) device for use in an automotive network, the Ethernet PHY device comprising: a cable interface configured to connect to an Ethernet cable; a transmitter configured to generate an outbound signal by modulating outbound data using zero-parallax modulation at a first data rate, and to transmit the outbound signal to the Ethernet cable via the cable interface; as well as a receiver configured to receive an inbound signal having a second data rate from the Ethernet cable via the cable interface, the second data rate being lower than the first data rate, the inbound signal at least partially spectrally overlapping with the outbound signal, and demodulate the inbound signal to produce inbound data.

2. The Ethernet PHY device of claim 1 , wherein the transmitter is configured to obtain the outbound data from one or more sensors, and wherein the receiver is configured to receive control data for controlling the one or more sensors in the inbound signal.

3. The Ethernet PHY device of claim 1 , wherein the transmitter is configured to modulate the outbound data using bipolar non-return-to-zero (NRZ) modulation.

4. The Ethernet PHY device of claim 1 , wherein the transmitter is configured to modulate the outbound data using Manchester code modulation. 5 . The Ethernet PHY device of claim 1 , wherein the transmitter is configured to modulate the outbound data using pulse amplitude modulation (PAM) to generate a PAM signal, and filter the PAM signal using a high pass filter (HPF).

6. The Ethernet PHY device of claim 1, wherein the receiver is configured to demodulate the inbound signal using a zero-disparity decoder.

7. An Ethernet physical layer (PHY) device for use in an automotive network, the Ethernet PHY device comprising: a cable interface configured to connect to an Ethernet cable; a receiver configured to receive an inbound signal from the Ethernet cable via the cable interface, the inbound signal modulated with zero-parallax modulation at a first data rate, and demodulate the inbound signal to produce inbound data; as well as A transmitter is configured to generate an outbound signal by modulating outbound data at a second data rate lower than the first data rate, the outbound signal at least partially overlapping in spectrum with the inbound signal, and transmit the outbound signal to the Ethernet cable via the cable interface.

8. The Ethernet PHY device of claim 7, wherein the receiver is configured to receive sensor data originating from one or more sensors in the inbound data, and wherein the transmitter is configured to transmit control data for controlling the one or more sensors in the outbound data.

9. The Ethernet PHY device of claim 7, wherein the receiver is configured to demodulate the inbound signal using a bipolar non-return-to-zero (NRZ) decoder.

10. The Ethernet PHY device of claim 7, wherein the receiver is configured to demodulate the inbound signal using a Manchester code decoder.

11. The Ethernet PHY device of claim 7, wherein the receiver is configured to demodulate the inbound signal using a pulse amplitude modulation (PAM) decoder.

12. The Ethernet PHY device of claim 7, wherein the transmitter is configured to modulate the outbound data using outbound zero-parallax modulation.

13. A method for communicating in an Ethernet physical layer (PHY) device in an automotive network, the method comprising: generating an outbound signal by modulating outbound data with zero-parallax modulation at a first data rate, and sending the outbound signal to an Ethernet cable; as well as An inbound signal having a second data rate lower than the first data rate is received from the Ethernet cable, the inbound signal at least partially spectrally overlapping with the outbound signal, and demodulated to produce inbound data.

14. The method for communication of claim 13, wherein generating the outbound signal comprises obtaining the outbound data from one or more sensors, and wherein receiving the inbound signal comprises receiving control data in the inbound signal for controlling the one or more sensors.

15. The method for communication of claim 13, wherein generating the outbound signal comprises modulating the outbound data using bipolar non-return-to-zero (NRZ) modulation.

16. The method for communication of claim 13, wherein generating the outbound signal comprises modulating the outbound data using Manchester code modulation. 17 . The method for communication according to claim 13 , wherein generating the outbound signal comprises modulating the outbound data using pulse amplitude modulation (PAM) to generate a PAM signal, and filtering the PAM signal using a high pass filter (HPF).

18. The method for communication of claim 13, wherein demodulating the inbound signal comprises applying a zero-disparity coder.

19. A method for communicating in an Ethernet physical layer (PHY) device in an automotive network, the method comprising: receiving an inbound signal from an Ethernet cable, the inbound signal modulated with zero-parallax modulation at a first data rate, and demodulating the inbound signal to produce inbound data; as well as An outbound signal is generated by modulating outbound data at a second data rate lower than the first data rate, the outbound signal at least partially overlapping in spectrum with the inbound signal, and the outbound signal is sent to the Ethernet cable.

20. The method for communication of claim 19, wherein receiving the inbound signal comprises receiving sensor data originating from one or more sensors in the inbound data, and wherein sending the outbound signal comprises sending control data for controlling the one or more sensors in the outbound data.

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