Silicon carbide power device and preparation method thereof

Abstract

The invention discloses a silicon carbide power device and a preparation method thereof. The preparation method comprises the following steps that a substrate is provided, the substrate comprises a substrate body and an epitaxial layer which are stacked, the surface of the side, away from the epitaxial layer, of the substrate body is a first surface, and the surface of the side, away from the substrate body, of the epitaxial layer is a second surface; forming a plurality of first grooves extending into the substrate along the first surface in the substrate; and metallizing the first groove and the second surface at the same time to form a first ohmic contact layer covering the bottom surface and the side wall of the first groove so as to obtain a second groove, and forming a second ohmic contact layer partially covering the second surface. The problems of high process difficulty, high cost and long production period of the preparation method of the double-sided metal contact structure in the prior art are solved.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a silicon carbide power device and a method for preparing the same. Background Art

[0002] With the development of power electronics technology, silicon carbide (SiC) materials have been widely used in high-voltage, high-frequency, and high-power applications due to their advantages, including high electric field strength, high breakdown voltage, high thermal conductivity, and high power density. SiC power devices offer high voltage resistance, high switching frequency, low switching losses, low thermal resistance, and strong radiation resistance, making them an ideal alternative to silicon-based power devices. Currently, SiC devices are primarily used in photovoltaics, wind power, rail transit, new energy vehicles, smart grids, and high-voltage transmission.

[0003] In order to pursue lower on-resistance and better heat dissipation performance, the conventional processing technology of current silicon carbide power devices is to thin the back surface before preparing the ohmic contact. Conventional silicon carbide power devices are processed by completing the front process first and then the back process. This is because the mechanical strength provided by the intact, unthinned epitaxial layer of the silicon carbide substrate is required in the front process to ensure that the wafer does not bend or break during subsequent processing. Therefore, the conventional back ohmic contact is placed in the later stage of processing and is not processed together with the front ohmic contact. In the process of preparing ohmic contacts on the front and back sides, high-temperature annealing is used to form the ohmic contact on the front side, thereby reducing the on-resistance of the device, while laser annealing is used on the back side. This method can control the high-temperature area within a certain depth range of the silicon carbide substrate epitaxial layer, so that the formed back ohmic contact does not affect the front structure. However, the conventional thinning method cannot meet the requirements of forming the front and back ohmic contacts in one step, and the two processes require different processing methods, resulting in increased process difficulty and cost.

[0004] In summary, the existing methods for preparing double-sided metal contact structures have the problems of high process difficulty, high cost and long production cycle. Therefore, it is necessary to develop a new method for preparing double-sided metal contact structures to solve the above problems. Summary of the Invention

[0005] The present application provides a silicon carbide power device and a preparation method thereof to solve the problems of difficult process, high cost and long production cycle in the preparation method of a double-sided metal contact structure in the related art.

[0006] According to one aspect of the present application, a method for preparing a silicon carbide power device is provided, comprising the following steps: S1, providing a substrate, wherein the substrate comprises a stacked substrate and an epitaxial layer, wherein a surface of the substrate facing away from the epitaxial layer is a first surface, and a surface of the epitaxial layer facing away from the substrate is a second surface; S2, forming a plurality of first grooves extending along the first surface to the interior in the substrate; S3, simultaneously metallizing the first grooves and the second surface to form a first ohmic contact layer covering the bottom surface and sidewalls of the first groove to obtain a second groove, and forming a second ohmic contact layer partially covering the second surface.

[0007] Optionally, between step S1 and step S2, the step further includes: forming a first sacrificial layer on the second surface, the second surface having a first exposed area not covered by the first sacrificial layer; in step S3, simultaneously performing metallization processing on the first groove and the first exposed area.

[0008] Optionally, the step S2 includes: forming a second sacrificial layer on the first surface, the first surface having a second exposed area not covered by the second sacrificial layer, and etching the substrate through the second exposed area to form the first trench.

[0009] Optionally, the step of simultaneously performing the metallization treatment on the first groove and the first exposed area includes: performing chemical plating treatment on the first groove and the first exposed area to form a metal material layer covering the bottom and side walls of the first exposed area and the first groove; annealing the metal material layer so that part of the metal material layer reacts with the first groove in contact to form the first ohmic contact layer, and simultaneously causes part of the metal material layer to react with the first exposed area in contact to form the second ohmic contact layer.

[0010] Optionally, the step of performing chemical plating treatment on the first groove and the first exposed area includes: forming an activation layer on the bottom surface and side walls of the first exposed area and the first groove; forming the metal material layer on the surface of the activation layer using a chemical plating process, wherein, during the chemical plating treatment, the substrate is placed upright in a chemical plating tank, and ultrasonic oscillations and / or megasonic oscillations are generated in the chemical plating tank.

[0011] Optionally, the material of the metal material layer includes at least one of Ni, Ti, Mo and Pt.

[0012] Optionally, the step of annealing the metal material layer includes: sequentially performing a first annealing treatment and a second annealing treatment on the metal material layer, wherein the temperature of the first annealing treatment is higher than the temperature of the second annealing treatment.

[0013] Optionally, after step S3, the preparation method further includes: thinning the substrate so that the second groove forms a groove structure, and the depth of the groove structure is less than the depth of the second groove; forming a first metal layer on the side of the substrate away from the epitaxial layer, and part of the first metal layer is filled in the groove structure; and forming a second metal layer on the epitaxial layer to cover the second ohmic contact layer.

[0014] According to another aspect of the present application, a silicon carbide power device is provided, which is obtained using the preparation method described above. The silicon carbide power device includes: a substrate, a first surface of the substrate having multiple grooves; an epitaxial layer located on the side of the substrate facing away from the grooves; a first ohmic contact layer located on the bottom and sidewalls of the grooves; and a second ohmic contact layer located on the side of the epitaxial layer facing away from the substrate.

[0015] Optionally, the first ohmic contact layer and the second ohmic contact layer are metal silicide.

[0016] Through the present application, a plurality of first grooves are first formed in the substrate, and then the first grooves and the second surface are metallized simultaneously to form a first ohmic contact layer covering the bottom surface and sidewall of the first groove to obtain a second groove, and to form a second ohmic contact layer partially covering the second surface. Since the formation of front and back ohmic contact metals needs to be carried out separately in the existing silicon carbide power device manufacturing process, compared with the existing technology, the present application completes double-sided metallization in the same process to form the first ohmic contact layer and the second ohmic contact layer, thereby reducing the manufacturing cost and process complexity of the silicon carbide power device; More importantly, the formation of the above-mentioned first ohmic contact layer and the second ohmic contact layer improves the interface bonding strength between the metal and the silicon carbide substrate, reduces the contact resistance, and thus reduces the conduction loss of the device, which is a key indicator of the efficiency of the device when operating at high temperatures; and due to the formation of the second trench in the substrate, the contact area between the ohmic contact metal and the substrate is increased, thereby not only reducing the proportion of substrate resistance, improving the heat dissipation performance of the device and reducing the on-resistance, but also providing more heat conduction paths. The contact area on the traditional plane is relatively small, while the trench structure in the present application greatly increases the contact area and reduces the thermal resistance, so that the device operates at a lower temperature in a high-power or high-temperature environment, and the high-temperature characteristics are thereby improved. The lower operating temperature means that the device can withstand a higher operating current, thereby improving the output efficiency of the entire component. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The accompanying drawings, which constitute part of this application, are intended to provide a further understanding of this application. The exemplary embodiments and descriptions of this application are intended to explain this application and do not constitute an improper limitation on this application. In the accompanying drawings:

[0018] Figure 1 A schematic diagram of a process for preparing a silicon carbide power device proposed in the present application is shown;

[0019] Figure 2 A schematic cross-sectional structure diagram of a substrate provided in a method for preparing a silicon carbide power device proposed in the present application is shown;

[0020] Figure 3 Shown in Figure 2 Schematic diagram of the cross-sectional structure of the base body after the first sacrificial layer is formed on the substrate shown in FIG;

[0021] Figure 4 Shown in Figure 3 Schematic diagram of the cross-sectional structure of the substrate after a second sacrificial layer is formed on one side of the substrate and a first groove is formed by etching;

[0022] Figure 5 Shows the formation of coverage Figure 4 Schematic diagram of the cross-sectional structure of the substrate after the metal material layer on the bottom surface and sidewall of the first exposed area and the first groove is shown;

[0023] Figure 6 Shows the Figure 5 Schematic diagram of the cross-sectional structure of the substrate after the metal material layer forms the first ohmic contact layer and the second ohmic contact layer;

[0024] Figure 7 Shows the Figure 6 Schematic diagram of the cross-sectional structure of the base body after the substrate is thinned;

[0025] Figure 8 Shown in Figure 7 FIG. 3 is a schematic diagram of the cross-sectional structure of the substrate after the first metal layer and the second metal layer are formed on both sides of the substrate.

[0026] The above drawings include the following reference numerals:

[0027] 10. Substrate; 101. First surface; 20. Epitaxial layer; 201. Second surface; 211. First exposed area; 30. Groove structure; 301. First groove; 302. Second groove; 501. First sacrificial layer; 502. Second sacrificial layer; 60. Protective layer; 701. First ohmic contact layer; 702. Second ohmic contact layer; 80. Metal material layer; 901. First metal layer; 902. Second metal layer. DETAILED DESCRIPTION

[0028] It should be noted that the following detailed descriptions are illustrative and intended to provide further explanation of the present application. Unless otherwise specified, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the art to which the present application belongs.

[0029] It should be noted that the terms used herein are only for describing specific embodiments and are not intended to limit the exemplary embodiments according to the present application. As used herein, unless the context clearly indicates otherwise, the singular form is also intended to include the plural form. In addition, it should be understood that when the terms "comprise" and / or "include" are used in this specification, they indicate the presence of features, steps, operations, devices, components and / or combinations thereof.

[0030] It should be noted that the terms "first," "second," and the like in the specification and claims of the present invention and the accompanying drawings are used to distinguish similar objects and are not necessarily used to describe a particular order or precedence. It should be understood that the terms used in this manner are interchangeable where appropriate for the embodiments of the present invention described herein. In addition, the terms "including," "having," and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product, or apparatus comprising a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units that are not explicitly listed or that are inherent to these processes, methods, products, or apparatuses.

[0031] It should be understood that when an element (such as a layer, film, region, or substrate) is described as being "on" another element, the element may be directly on the other element or intervening elements may be present. Moreover, in the specification and claims, when it is described that an element is "connected to" another element, the element may be "directly connected to" the other element or "connected to" the other element through a third element.

[0032] As described in the background technology, existing methods for preparing double-sided metal contact structures have problems such as high process difficulty, high cost, and long production cycle. To solve the above technical problems, embodiments of the present application provide a method for preparing a silicon carbide power device.

[0033] According to an embodiment of the present application, a method for preparing a silicon carbide power device is provided, such as Figure 1 Shown, including:

[0034] Step S1: providing a substrate, the substrate comprising a stacked substrate and an epitaxial layer, wherein a surface of the substrate facing away from the epitaxial layer is a first surface, and a surface of the epitaxial layer facing away from the substrate is a second surface;

[0035] Step S2: forming a plurality of first trenches in the substrate extending along the first surface to the interior;

[0036] Step S3: performing metallization treatment on the first trench and the second surface simultaneously to form a first ohmic contact layer covering the bottom surface and sidewalls of the first trench to obtain a second trench, and forming a second ohmic contact layer partially covering the second surface.

[0037] In an embodiment of the present application, a plurality of first grooves are formed in the substrate, and then the first grooves and the second surface are metallized simultaneously to form a first ohmic contact layer covering the bottom surface and sidewalls of the first groove to obtain a second groove, and a second ohmic contact layer partially covering the second surface is formed. Since the formation of front and back ohmic contact metals needs to be carried out separately in the existing silicon carbide power device manufacturing process, compared with the existing technology, the present application completes double-sided metallization in the same process to form the first ohmic contact layer and the second ohmic contact layer, thereby reducing the manufacturing cost and process complexity of the silicon carbide power device; More importantly, the formation of the above-mentioned first ohmic contact layer and the second ohmic contact layer improves the interface bonding strength between the metal and the silicon carbide substrate, reduces the contact resistance, and thus reduces the conduction loss of the device, which is a key indicator of the efficiency of the device when operating at high temperatures; and due to the formation of the second trench in the substrate, the contact area between the ohmic contact metal and the substrate is increased, thereby not only reducing the proportion of substrate resistance, improving the heat dissipation performance of the device and reducing the on-resistance, but also providing more heat conduction paths. The contact area on the traditional plane is relatively small, while the trench structure in the present application greatly increases the contact area and reduces the thermal resistance, so that the device operates at a lower temperature in a high-power or high-temperature environment, and the high-temperature characteristics are thereby improved. The lower operating temperature means that the device can withstand a higher operating current, thereby improving the output efficiency of the entire component.

[0038] The following will describe in more detail exemplary embodiments of the method for preparing a silicon carbide power device provided by the present application in conjunction with the accompanying drawings. However, these exemplary embodiments can be implemented in a variety of different forms and should be interpreted as being limited to the embodiments described herein. It should be understood that these embodiments are provided to make the disclosure of this application thorough and complete, and to fully convey the concepts of these exemplary embodiments to those of ordinary skill in the art.

[0039] First, proceed to step S1: Figure 2 As shown, a substrate is provided, which includes a stacked substrate 10 and an epitaxial layer 20 , a surface of the substrate 10 facing away from the epitaxial layer 20 is a first surface 101 , and a surface of the epitaxial layer 20 facing away from the substrate 10 is a second surface 201 .

[0040] In some optional embodiments, the present application further includes the steps of forming the aforementioned base: providing a substrate 10 made of silicon carbide; and forming an epitaxial layer 20 on the substrate 10 using an epitaxial process. Specifically, the epitaxial layer 20 comprises silicon carbide, and the substrate 10 comprises, but is not limited to, semiconductor materials such as silicon, silicon carbide, and gallium nitride, which are not specifically limited in this application.

[0041] In the above optional embodiment, the doping types of the substrate 10 and the epitaxial layer 20 are not specifically limited in the embodiment of the present application. Specifically, the above silicon carbide power device can be a SiC MOSFET, and the substrate 10 and the epitaxial layer 20 in the silicon carbide power device can have the same doping type. Exemplarily, the substrate 10 is a highly doped N+ type silicon carbide material, and the substrate 10 has a drain, the epitaxial layer 20 is a lightly doped N-type silicon carbide material, and the epitaxial layer 20 includes a drift region, and an active level is formed in the drift region. The above silicon carbide power device can also be a SiC IGBT, and the substrate 10 and the epitaxial layer 20 in the silicon carbide power device can have different doping types. Exemplarily, the substrate 10 is a highly doped P+ type silicon carbide material, serving as a collector, the epitaxial layer 20 is a lightly doped N-type silicon carbide material, and the epitaxial layer 20 includes a drift region, and an emitter is formed in the drift region.

[0042] It should be noted that the technical solutions in the embodiments of the present application are applicable to the manufacture of various silicon carbide power devices, including but not limited to Schottky diodes, MOSFETs and IGBTs, etc. By improving the metallization process, better electrical performance and thermal management capabilities are achieved. When the silicon carbide power device is a silicon carbide diode, the above-mentioned preparation process reduces the forward voltage drop of the silicon carbide diode, thereby reducing the conduction loss of the device. The silicon carbide diode can be selected from one of SBD, PIN, JBS and MPS. When the silicon carbide power device is a transistor, the above-mentioned preparation process reduces the on-resistance of the silicon carbide transistor, thereby also reducing the conduction loss of the device. The transistor can be a MOSFET, IGBT, etc.

[0043] In some optional embodiments, between the above steps S1 and S2, the preparation method of the embodiment of the present application further includes: Figure 3 As shown, a first sacrificial layer 501 is formed on the second surface, and the second surface has a first exposed area 211 not covered by the first sacrificial layer 501 .

[0044] After providing a base including a stacked substrate 10 and an epitaxial layer 20, step S2 is performed: Figure 3 and Figure 4 As shown, a plurality of first trenches 301 are formed in the substrate 10 and extend along the first surface to the interior.

[0045] In some optional implementations, the above step S2 includes: Figure 4 As shown, a second sacrificial layer 502 is formed on the first surface, and the first surface has a second exposed area not covered by the second sacrificial layer 502 . The substrate 10 is etched through the second exposed area to form a first trench 301 .

[0046] Specifically, a first sacrificial layer 501 can be formed on the side of the epitaxial layer 20 having the second surface through a deposition process and a patterning process, and a second sacrificial layer 502 can be formed on the side of the substrate 10 having the first surface through a deposition process and a patterning process. The patterned second sacrificial layer 502 has a first hollow area that partially exposes the first surface, and the partially exposed first surface is the above-mentioned second exposed area. After deep hole etching is performed on the substrate 10 through the hollow area, a first groove 301 corresponding to the first hollow area is formed; the patterned first sacrificial layer 501 has a second hollow area that partially exposes the second surface, and the partially exposed second surface is the above-mentioned first exposed area 211. Subsequently, the first exposed area 211 and the first groove 301 are metallized to simultaneously form the above-mentioned first ohmic contact layer and the above-mentioned second ohmic contact layer.

[0047] In the process of forming the first groove 301, by forming a first sacrificial layer 501 and a second sacrificial layer 502 on the second surface and the first surface respectively, and retaining the corresponding exposed areas, and then using these exposed areas as etching entrances, the formation position and depth of the groove can be precisely controlled, thereby ensuring the high consistency and depth controllability of the groove structure formed subsequently. The subsequent metallization treatment not only forms a first ohmic contact layer on the bottom surface and sidewall of the first groove 301, but also forms a second ohmic contact layer in the first exposed area 211. This is due to the special reaction properties of the metal material and the silicon carbide substrate, which realizes the effective combination of metal and silicon carbide, reduces the contact resistance, and improves the overall performance of the device. The above embodiment is suitable for the manufacture of silicon carbide power devices that require high-precision groove structure and low contact resistance, such as high-performance MOSFET and IGBT. By precisely controlling the groove structure and optimizing the metallization process, a significant improvement in device performance is achieved.

[0048] In the above optional embodiment, after the step of forming the first sacrificial layer 501 on the second surface and before the step of etching the substrate 10 to form the first trench 301, the step of forming the first trench 301 may further include: forming a protective layer 60 on the second surface to cover the first sacrificial layer 501. Exemplarily, the protective layer 60 is polyimide, but may also be other types of protective layer 60, which is not specifically limited in the present embodiment.

[0049] In the above optional embodiment, the first sacrificial layer 501 and the second sacrificial layer 502 are prepared by at least one of low-pressure chemical vapor deposition (LPCVD), ion-enhanced chemical vapor deposition (PECVD), and atmospheric pressure chemical vapor deposition (APCVD). These deposition techniques can precisely control the thickness and quality of the film. LPCVD can be performed at a relatively low pressure, facilitating the formation of high-quality films, while PECVD can accelerate the deposition process through ion enhancement.

[0050] In the above optional embodiment, the thickness of the first sacrificial layer 501 can be 0.2-1.5 μm. Exemplarily, the thickness of the first sacrificial layer 501 is selected from 0.2 μm, 0.5 μm, 1 μm, and 1.5 μm. By controlling the thickness of the first sacrificial layer 501 to be between 0.2-1.5 μm, the protective effect during metal deposition can be ensured without excessively increasing the process time, thereby saving costs.

[0051] In the above optional embodiment, the thickness of the second sacrificial layer 502 can be 5-10 μm, and the material of the back sacrificial structure is selected from at least one of GaN, SiO2, Si3N4, polysilicon and TiN. Exemplarily, the thickness of the second sacrificial layer 502 is selected from one of 5 μm, 6 μm, 8 μm and 10 μm. The thickness and material type of the above-mentioned second sacrificial layer 502 are selected to provide sufficient masking and support during the back deep trench formation and metallization process. The thickness of 5-10 μm can ensure that it is not penetrated during deep hole etching, while maintaining structural integrity in subsequent metallization and thinning steps. The selection of the second sacrificial layer 502 material such as GaN, SiO2, Si3N4, polysilicon or TiN takes into account not only the compatibility with the silicon carbide substrate, but also their chemical stability and mechanical strength, which is beneficial to protect the back ohmic contact area from damage in subsequent processes.

[0052] In the above optional embodiment, the depth of the first trench 301 can be 150 μm-300 μm. Exemplarily, the depth of the first trench 301 is selected from one of 150 μm, 200 μm, 250 μm, and 300 μm. By optimizing the depth of the first trench 301 to 150 μm-300 μm, it is sufficient to penetrate into the silicon carbide substrate, forming a good contact interface, thereby enhancing the back ohmic contact effect.

[0053] In the above optional embodiment, the etching process of the first groove 301 can adopt inductively coupled plasma etching (ICP). Specifically, the etching gas in the ICP can include SF6 / CF4 mixed gas and O2, and the process conditions of the ICP can include: setting the chamber pressure to 0.5mTorr-2mTorr, the ICP power to 500-1200W, the bias power to 200-500W, the carrier temperature to 50-90°C, and the etching rate to 1-2μm / min. The optimization of the process parameters in the above ICP provides a high-precision and controllable etching process, thereby forming a precise groove structure 30 to enhance the effect of the back ohmic contact. In addition, by adjusting the chamber pressure, ICP power, bias power and carrier temperature, the etching rate and the sidewall quality of the groove can be precisely controlled, the edge effect can be reduced, and the overall performance of the device can be improved.

[0054] In some optional embodiments, the density of the first grooves 301 in the first surface is 1000 / mm 2 -6000 pieces / mm 2 In this embodiment, the density of the first grooves 301 is controlled to be 1000 / mm. 2 -6000 pieces / mm 2 The purpose is to balance the manufacturing cost and process difficulty of the device while increasing the contact area and reducing the contact resistance. Although too high a groove density can further reduce the contact resistance and improve the heat dissipation performance, it will increase the manufacturing cost and process complexity, and it will be difficult to provide sufficient mechanical strength, while too low a groove density may not be able to fully optimize the device performance. By precisely controlling the groove density, the best balance point can be found between device performance and manufacturing economy, which not only avoids the bending or cracking of the substrate in the subsequent process, but also ensures the stable operation of the device under high power and high temperature conditions, while reducing production costs. In addition, it has been verified through experiments that by making the density of the first groove 301 meet 1000 / mm 2 -6000 pieces / mm 2 After the first groove 301 is formed, the warpage of the substrate is ≤±4mm. The value within the range indicates that its mechanical strength is qualified.

[0055] It should be noted that the top view shape of the above-mentioned first groove 301 in the embodiment of the present application can be a hexagonal, rectangular, circular, triangular or other geometric shape, and the bottom surface shape of the first groove 301 can be a rectangular, semicircular, trapezoidal, inverted trapezoidal or other geometric shape, which is not specifically limited in the embodiment of the present application.

[0056] After forming the first trench, step S3 is performed: the first trench and the second surface are metallized simultaneously to form a first ohmic contact layer covering the bottom and sidewalls of the first trench to obtain a second trench, and a second ohmic contact layer partially covering the second surface is formed.

[0057] In some optional embodiments, the step of simultaneously metallizing the first trench 301 and the first exposed area 211 includes: Figure 4 and Figure 5 As shown, the first trench 301 and the first exposed area 211 are subjected to chemical plating to form a metal material layer 80 covering the bottom surface and sidewalls of the first exposed area 211 and the first trench 301; Figure 6 As shown, the metal material layer 80 is annealed so that part of the metal material layer 80 reacts with the first groove 301 in contact to form a first ohmic contact layer 701, and at the same time, part of the metal material layer 80 reacts with the first exposed area 211 in contact to form a second ohmic contact layer 702. After the above-mentioned part of the metal material layer 80 is formed in the first groove 301, the second groove 302 is formed.

[0058] In the prior art, ohmic contact metals in power devices are typically produced using physical vapor deposition (PVD). PVD is a single-sided metal growth method, where metal atoms adhere to the side facing the target, while metal atoms do not adhere to the side facing away from the target. PVD cannot achieve the one-step processing of ohmic metals on both the silicon carbide substrate 10 side and the epitaxial side. The choice of an electroless plating process in the embodiments of the present application not only allows the metal material layer 80 to be simultaneously coated on the surfaces of the first exposed area 211 and the first trench 301, but also utilizes its uniform deposition characteristics to ensure a uniform distribution of the metal material layer 80 across the entire device surface, which helps improve the device's thermal stability and current carrying capacity.

[0059] Specifically, chemical plating is a metal deposition technology that does not require an external power source. It deposits metal on the surface of the substrate through a chemical reduction reaction and can evenly cover irregular surfaces, such as the bottom and sidewalls of the groove. By performing chemical plating on the first groove 301 and the first exposed area 211, a metal material layer 80 is formed. The subsequent annealing process promotes the reaction between the metal material and the silicon carbide substrate, generating a first ohmic contact layer 701 and a second ohmic contact layer 702 with low resistance characteristics. This process not only improves the bonding strength between the metal and the silicon carbide and reduces the contact resistance, but also improves the heat dissipation performance of the device and reduces the on-resistance by increasing the metal contact area of ​​the groove structure 30, providing an important guarantee for the stable operation of the device in high power and high temperature environments. Furthermore, the above embodiment is also applicable to silicon carbide power devices that need to work under extreme conditions, such as devices in the fields of aerospace, automotive electronics, and industrial control. Through the combination of chemical plating and annealing, comprehensive optimization of device performance is achieved.

[0060] In the above optional embodiment, the step of performing chemical plating treatment on the first groove 301 and the first exposed area 211 includes: forming an activation layer on the bottom surface and side walls of the first exposed area 211 and the first groove 301; forming a metal material layer 80 on the surface of the activation layer using a chemical plating process, wherein, during the chemical plating process, the substrate is placed upright in a chemical plating tank, and ultrasonic oscillations and / or megasonic oscillations are generated in the chemical plating tank.

[0061] Specifically, before the electroless plating process, by forming an activation layer on the bottom surface and sidewalls of the first exposed area 211 and the first trench 301, the adhesion between the metal material layer 80 and the silicon carbide substrate can be significantly improved, thereby improving the stability of the subsequently formed ohmic contact layer. The metal material layer 80 is formed on the surface of the activation layer using an electroless plating process. This process is carried out with the assistance of ultrasound or megasonic waves, which can promote the uniform distribution of metal ions, accelerate the chemical reaction rate, and ensure the uniformity and density of the metal material layer 80, thereby forming a high-quality first ohmic contact layer 701 and second ohmic contact layer 702. Furthermore, the above embodiment is suitable for the manufacture of silicon carbide power devices that have strict requirements on the quality of the contact layer, such as MOSFETs and IGBTs in high-frequency switching power supplies. Through the ultrasonic or megasonic wave-assisted electroless plating process, the contact layer quality is significantly improved, the conduction loss of the device is reduced, and the overall electrical performance and reliability are improved.

[0062] Prior to the step of forming an activation layer on the bottom surface and sidewalls of the first exposed area 211 and the first trench 301, the step of performing an electroless plating treatment on the first trench 301 and the first exposed area 211 may further include: pre-treating the first trench 301 and the first exposed area 211 using a pre-treatment solution comprising an inorganic acid. Specifically, a pre-treatment solution comprising hydrofluoric acid (HF) and hydrochloric acid may be used to remove grease, natural oxides, and contaminant particles from the bottom surface and sidewalls of the first exposed area 211 and the first trench 301 at a temperature of 40-50° C., resulting in a clean surface that is convenient for subsequent metallization.

[0063] After pre-treating the first trench 301 and the first exposed area 211, an activation layer is formed on the bottom and sidewalls of the first exposed area 211 and the first trench 301 to promote subsequent chemical reactions. Exemplarily, an activation agent prepared from a 0.5 g / L palladium chloride solution and hydrochloric acid is used at 50°C. The activation agent is used to increase the activity of the substrate surface and promote metal deposition on the silicon carbide substrate.

[0064] After the step of forming an activation layer on the bottom surface and sidewalls of the first exposed area 211 and the first groove 301, a metal material layer 80 is formed on the surface of the activation layer using an electroless plating process. Specifically, the substrate can be immersed in a plating solution containing metal cations (such as Ni, Ti, Mo, Pt, etc.), and the metal cations are reduced to a metallic state by the action of a reducing agent (potassium hypophosphite), and a metal layer is deposited on the surface of the silicon carbide substrate. Taking nickel plating as an example, the plating solution contains nickel chloride, nickel citrate, or nickel sulfate as a source of metal cations, and acetic acid and ammonia water are mixed as a buffer to maintain the pH value of the solution between 4 and 4.8 to ensure the stability of the reduction reaction. The electroless plating operation is carried out at 70°C-80°C for 10-20 minutes, with the goal of obtaining a metal material layer 80 with a thickness of 0.1μm-0.4μm. The nickel salt, reducing agent, and buffer in the nickel plating solution work together to control the chemical balance of the plating solution and ensure the quality and thickness of the coating. Experimental verification shows that a bath temperature of 70-80°C and a nickel plating time of 10-20 minutes can achieve rapid and uniform metal deposition.

[0065] After forming the metal material layer 80 on the surface of the activation layer using an electroless plating process, the step of electrolessly plating the first grooves 301 and the first exposed area 211 may further include cleaning and drying the substrate. For example, after the electroless plating process is completed, deionized water (DIW) and N-methylpyrrolidone (NMP) are used as cleaning agents to thoroughly remove residual chemicals on the wafer surface. The wafer is then dried to prepare for the next high-temperature annealing or other steps.

[0066] In the embodiment of the present application, through the above-mentioned pre-treatment, activation, chemical plating, cleaning and a series of chemical plating treatment steps, the front and back metallization of the silicon carbide power device is achieved, which creates conditions for the subsequent formation of ohmic contact, while ensuring good metal layer quality and high processing efficiency. Compared with the common physical vapor deposition (PVD) technology, this chemical plating method is more adaptable to deep holes and complex surfaces, thereby improving the reliability of ohmic contact and the overall performance of the device. It should be noted that a surfactant can also be added to the three processes of pre-treatment, activation and chemical plating. The embodiment of the present application does not make specific restrictions. The surfactant is conducive to forming a metal film with uniform thickness and high bonding strength on the surface of the first exposed area 211 on one side of the epitaxial layer 20 and the surface of the first groove 301 on one side of the substrate 10 and the solvent contact surface.

[0067] In the above optional embodiment, the material of the metal material layer 80 includes at least one of Ni, Ti, Mo and Pt. The selection of metal materials such as Ni, Ti, Mo and Pt as the main components of the metal material layer 80 is based on their good reactivity and low contact resistance characteristics with the silicon carbide substrate. These metals can form stable metal silicides with silicon carbide during the annealing process, and as the first ohmic contact layer 701 and the second ohmic contact layer 702, they can significantly reduce the contact resistance and improve the electrical performance of the device. In particular, the use of Ni and Ti, due to their stability at high temperatures, can ensure that the ohmic contact layer maintains good electrical connection within the operating temperature range of the device, while Mo and Pt, due to their excellent corrosion resistance and thermal stability, are suitable for devices that need to work in harsh environments.

[0068] In some optional embodiments, the step of annealing the metal material layer 80 includes: sequentially performing a first annealing treatment and a second annealing treatment on the metal material layer 80 , wherein the temperature of the first annealing treatment is higher than the temperature of the second annealing treatment.

[0069] In the above optional embodiment, by performing a staged annealing treatment, that is, first performing a first annealing treatment at a higher temperature and then performing a second annealing treatment at a lower temperature, the reaction process between the metal material layer 80 and the silicon carbide substrate can be effectively controlled to form an ohmic contact layer with better electrical properties. The higher first annealing temperature is conducive to accelerating the reaction between the metal and silicon carbide to form a preliminary metal silicide structure, while the lower second annealing temperature helps to refine the grains of the metal silicide, reduce defects, further reduce the contact resistance, and improve the stability of the contact layer. The above embodiment is suitable for the manufacture of silicon carbide power devices that have strict requirements on contact layer resistance and stability, such as devices in high-performance power converters and drive circuits. By precisely controlling the annealing temperature and time, it is conducive to minimizing the contact layer resistance and maximizing the stability, thereby improving the overall performance and reliability of the device.

[0070] Specifically, the first ohmic contact layer 701 and the second ohmic contact layer 702 are formed in the same annealing process, wherein the annealing process is carried out in a nitrogen environment, and the process conditions of the first annealing treatment include: keeping warm at a temperature of 850℃-1000℃ for 0.1h to form an ohmic contact, and the subsequent second annealing treatment includes cooling to a temperature of 600℃-800℃ and keeping warm for 0.2h. The above-mentioned two-step annealing process is adopted in the embodiment of the present application, especially the control under a nitrogen environment, which is conducive to the formation of high-quality ohmic contacts. The first high-temperature annealing of 850℃-1000℃ helps the metal and the silicon carbide substrate to form a good contact interface and reduce the contact resistance; the subsequent secondary annealing is carried out at a lower temperature to further improve the stability of the contact interface and reduce the material damage that may be caused by high-temperature annealing.

[0071] After forming the first ohmic contact layer 701 and the second ohmic contact layer 702, the preparation method in the embodiment of the present application may further include removing the first sacrificial layer 501 and the second sacrificial layer 502. Specifically, the first sacrificial layer 501 and the second sacrificial layer 502 may be removed by a wet etching process. The wet etching process not only selectively removes the sacrificial structure, but also does not damage the already formed first ohmic contact layer 701 and the second ohmic contact layer 702.

[0072] In some optional embodiments, after the above step S3, the preparation method further comprises: Figure 6 and Figure 7 As shown, the substrate 10 is thinned so that the second trench 302 forms a trench structure 30, and the depth of the trench structure 30 is less than the depth of the second trench 302; Figure 8 As shown, a first metal layer 901 is formed on the side of the substrate 10 away from the epitaxial layer 20 , and part of the first metal layer 901 fills the trench structure 30 ; a second metal layer 902 is formed on the epitaxial layer 20 to cover the second ohmic contact layer 702 .

[0073] In the above optional embodiment, after forming the first ohmic contact layer 701 and the second ohmic contact layer 702, the substrate 10 is thinned, which can accurately control the depth of the second groove 302 converted into the groove structure 30, and optimize the contact area and contact depth between the metal and the silicon carbide substrate, which is crucial for reducing the on-resistance and improving the heat dissipation performance. Subsequently, the first metal layer 901 formed on the side of the substrate 10 away from the epitaxial layer 20 not only fills the groove structure 30, but also forms a good electrical connection with the first ohmic contact layer 701, further reducing the resistance of the device and improving the electrical performance of the device. The second metal layer 902 formed on the epitaxial layer 20 covers the second ohmic contact layer 702, strengthens the electrical connection with the epitaxial layer 20, and also protects the contact layer from the influence of the external environment. The above process steps are applicable to the manufacture of all types of silicon carbide power devices, including but not limited to Schottky diodes, MOSFETs and IGBTs.

[0074] Specifically, the thinning method of the substrate 10 can be selected from one of mechanical grinding, laser thinning, chemical etching and the like, and the thinning amount of the substrate 10 can be 100 μm, 150 μm, 180 μm, 200 μm, 220 μm, etc., so that the depth of the groove structure 30 after the substrate 10 is thinned can reach 1 μm-50 μm. The process of thinning the substrate 10 can not only reduce the weight of the device, but also improve the heat dissipation efficiency while maintaining the mechanical strength of the device. The selection of methods such as mechanical grinding, laser thinning and chemical etching depends on the required thinning amount, the type of substrate 10 material, etc. For example, mechanical grinding is suitable for batch processing with a larger thinning amount, while laser thinning is more suitable for precision control and small batch production. Before the above-mentioned thinning step of the substrate 10 is performed, a protective film such as a blue film can also be used to protect the side of the epitaxial layer 20 facing away from the substrate 10, which is not specifically limited in the embodiments of the present application.

[0075] In the above optional embodiment, the first metal layer 901 can be an alloy such as Ti / Ni / Ag, Ti / NiV / Ag, Ti / Al, Ti / TiN / Al, Ti / TiN / AlCu, etc., and the second metal layer 902 can be an alloy such as Ti / Al, Ti / TiN / Al, Ti / TiN / AlCu, etc., and can be further made into an alloy such as Ti / TiN / Al / Ni / Pd / Au, Ti / TiN / Al / Ni / Au, etc. through chemical plating method to be compatible with double-sided copper substrate packaging. The selection of materials for the above-mentioned first metal layer 901 and second metal layer 902 is beneficial to the bonding strength, conductivity and corrosion resistance of the metal to the silicon carbide substrate, as well as compatibility with the packaging material. For example, Ti / Al alloy is a common front ohmic contact metal layer material due to its good adhesion and conductivity; while Ti / Ni / Ag alloy is particularly suitable for double-sided copper substrate packaging due to its low contact resistance and good welding performance. Further adding metals such as Ni, Pd or Au through chemical plating can enhance the corrosion resistance of the metal layer and the reliability of the packaging interface, thereby helping to improve the long-term stability and service life of the device.

[0076] According to an embodiment of the present application, a silicon carbide power device is also provided, such as Figure 8 As shown, the silicon carbide power device is obtained by the preparation method in the above embodiment, and the silicon carbide power device includes: a substrate 10, the first surface of the substrate 10 has a plurality of grooves; an epitaxial layer 20, located on the side of the substrate 10 away from the grooves; a first ohmic contact layer 701, located on the bottom surface and sidewall of the grooves; a second ohmic contact layer 702, located on the side of the epitaxial layer 20 away from the substrate 10.

[0077] In an embodiment of the present application, a plurality of groove structures 30 are formed in the substrate 10, and the bottom surface and side walls of the groove structure 30 are covered with a first ohmic contact layer 701. At the same time, the second surface of the epitaxial layer 20 facing away from the substrate 10 is covered with a second ohmic contact layer 702. The formation of the groove structure 30 increases the contact area between the ohmic contact metal and the substrate 10, thereby not only reducing the proportion of the resistance of the substrate 10, improving the heat dissipation performance of the device and reducing the on-resistance, but also providing more heat conduction paths. The contact area on the traditional plane is relatively small, while the groove structure 30 in the present application greatly increases the contact area and reduces the thermal resistance, so that the operating temperature of the device in a high-power or high-temperature environment is lower, and the high-temperature characteristics are thereby improved. The lower operating temperature means that the device can withstand a higher operating current, thereby improving the output efficiency of the entire component.

[0078] The embodiments of the present application are applicable to all types of silicon carbide power devices, including but not limited to Schottky diodes, MOSFETs, and IGBTs. Through the unique trench structure 30 and ohmic contact layer design, a comprehensive improvement in device performance is achieved, meeting the current power electronic equipment requirements for high efficiency, high power density, and heat dissipation performance.

[0079] In the above-mentioned silicon carbide power device of the embodiment of the present application, the first ohmic contact layer 701 and the second ohmic contact layer 702 are metal silicides. Specifically, in the embodiment of the present application, the first ohmic contact layer 701 and the second ohmic contact layer 702 can be metal silicides formed through the same process. The formation of metal silicide not only reduces the contact resistance between the metal and the silicon carbide substrate, but also increases the bonding strength of the interface, thereby facilitating the improvement of the electrical performance and long-term reliability of the device. In particular, in high-temperature and high-power environments, the high thermal stability of the metal silicide ensures that the performance of the contact layer does not degrade due to temperature increases, thereby maintaining the efficient operation of the device.

[0080] like Figure 8 As shown, the silicon carbide power device in the embodiment of the present application may also include a first metal layer 901 and a second metal layer 902, the first metal layer 901 is located on the side of the substrate 10 away from the epitaxial layer 20, part of the first metal layer 901 is filled in the trench structure 30, and the second metal layer 902 is located on the epitaxial layer 20 and covers the second ohmic contact layer 702.

[0081] In some optional embodiments, the density of the grooves in the first surface is 1000 / mm 2 -6000 pieces / mm 2 In this embodiment, the density of the grooves in the first surface is controlled to be 1000 / mm 2 -6000 pieces / mm 2 The purpose is to balance the manufacturing cost and process difficulty of the device while increasing the contact area and reducing the contact resistance. Although too high a trench density can further reduce the contact resistance and improve the heat dissipation performance, it will increase the manufacturing cost and process complexity, and it will be difficult to provide sufficient mechanical strength. On the other hand, too low a trench density may not be able to fully optimize the device performance. By precisely controlling the trench density, the best balance can be found between device performance and manufacturing economy, which not only avoids bending or cracking of the substrate in subsequent processes, but also ensures the stable operation of the device under high power and high temperature conditions, while reducing production costs.

[0082] It should also be noted that the terms "comprises," "includes," or any other variations thereof are intended to encompass non-exclusive inclusion, such that a process, method, commodity, or apparatus that includes a series of elements includes not only those elements but also other elements not explicitly listed, or includes elements inherent to such process, method, commodity, or apparatus. In the absence of further limitations, an element defined by the phrase "comprises a ..." does not exclude the presence of other identical elements in the process, method, commodity, or apparatus that includes the element.

[0083] The above are merely embodiments of the present application and are not intended to limit the present application. For those skilled in the art, the present application may have various changes and variations. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present application should all be included within the scope of the claims of the present application.

Claims

1. A method for preparing a silicon carbide power device, characterized in that: The following steps are involved: S1. Providing a substrate, wherein the substrate comprises a stacked substrate and an epitaxial layer, wherein a surface of the substrate facing away from the epitaxial layer is a first surface, and a surface of the epitaxial layer facing away from the substrate is a second surface; S2. forming a plurality of first grooves in the substrate extending along the first surface to the interior; S3. Performing metallization treatment on the first trench and the second surface simultaneously to form a first ohmic contact layer covering the bottom surface and sidewalls of the first trench to obtain a second trench, and forming a second ohmic contact layer partially covering the second surface.

2. The preparation method according to claim 1, characterized in that The steps between step S1 and step S2 also include: A first sacrificial layer is formed on the second surface, and the second surface has a first exposed area not covered by the first sacrificial layer; In the step S3, metallization is performed on the first groove and the first exposed area at the same time.

3. The preparation method according to claim 1, characterized in that The step S2 comprises: A second sacrificial layer is formed on the first surface, the first surface has a second exposed area not covered by the second sacrificial layer, and the substrate is etched through the second exposed area to form the first trench.

4. The preparation method according to claim 2, characterized in that The step of simultaneously performing the metallization process on the first trench and the first exposed area includes: Performing chemical plating on the first trench and the first exposed area to form a metal material layer covering the bottom surface and sidewalls of the first exposed area and the first trench; The metal material layer is annealed to allow a portion of the metal material layer to react with the first trench in contact to form the first ohmic contact layer, and simultaneously allow a portion of the metal material layer to react with the first exposed area in contact to form the second ohmic contact layer.

5. The preparation method according to claim 4, characterized in that The step of performing chemical plating on the first groove and the first exposed area includes: forming an activation layer on the bottom surface and sidewalls of the first exposed area and the first trench; The metal material layer is formed on the surface of the activation layer by using a chemical plating process, Wherein, during the chemical plating process, the substrate is placed upright in a chemical plating tank, and ultrasonic oscillation and / or megasonic oscillation is generated in the chemical plating tank.

6. The preparation method according to claim 4, characterized in that The material of the metal material layer includes at least one of Ni, Ti, Mo and Pt.

7. The preparation method according to claim 4, characterized in that The step of annealing the metal material layer comprises: The metal material layer is sequentially subjected to a first annealing treatment and a second annealing treatment, wherein the temperature of the first annealing treatment is higher than the temperature of the second annealing treatment.

8. The preparation method according to claim 1, characterized in that After step S3, the preparation method further comprises: performing a thinning process on the substrate so that the second trench forms a trench structure, wherein the depth of the trench structure is smaller than the depth of the second trench; forming a first metal layer on a side of the substrate facing away from the epitaxial layer, wherein a portion of the first metal layer is filled in the trench structure; A second metal layer covering the second ohmic contact layer is formed on the epitaxial layer.

9. A silicon carbide power device, characterized in that: The silicon carbide power device is obtained by the preparation method according to any one of claims 1 to 8, comprising: a substrate, wherein a first surface of the substrate has a plurality of grooves; an epitaxial layer, located on a side of the substrate facing away from the trench; a first ohmic contact layer, located on the bottom surface and sidewalls of the trench; The second ohmic contact layer is located on a side of the epitaxial layer facing away from the substrate.

10. The silicon carbide power device according to claim 9, characterized in that: The first ohmic contact layer and the second ohmic contact layer are metal silicide.

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