After-loading work instrument operation system and method

Abstract

The invention discloses an after-loading working instrument operation system and method, and the method comprises the following steps: S1, carrying out the normal operation when a vehicle is in a standby or operation state, and executing S2 and S3; when the vehicle machine control instrument is needed, the step S4 is executed; when the firmware needs to be upgraded, executing the step S5; s2, carrying out data interaction; s3, heartbeat protection is carried out periodically; s4, the vehicle machine sends a control instruction to the instrument; and S5, firmware upgrading. The control is stable, and the control requirements of different stages of the instrument are met.

Description

Technical Field

[0001] The present invention relates to the technical field of automobile instrument control, and in particular to an aftermarket instrument operation system and method. Background Art

[0002] Control of instrument clusters by the vehicle's computer is a core interaction within the automotive electronics architecture. Essentially, it achieves dynamic management of instrument information display through "centralized control + service-oriented communication." However, automotive instrument cluster control is a complex, multi-layered collaborative system, involving the precise coordination of hardware drivers, real-time communication, functional logic, and human-computer interaction. Traditional instrument cluster control suffers from the following technical issues: 1. Data transmission delays result in low real-time display quality; 2. The lack of a heartbeat monitoring system leads to system downtime and reduces user comfort. Summary of the Invention

[0003] The present invention aims to solve the technical problems existing in the prior art, and particularly innovatively proposes an after-installation working instrument operation system and method, which has stable control and meets the control requirements of the instrument at different stages.

[0004] In order to achieve the above object, the present invention provides a method for operating an after-installation working instrument, comprising the following steps:

[0005] S1: When the vehicle is in standby or running mode, it performs normal operation and executes S2 and S3; when the vehicle computer needs to control the instrument, it executes step S4; when the firmware needs to be upgraded, it executes step S5;

[0006] S2: data interaction;

[0007] S3: Periodic heartbeat protection;

[0008] S4: The vehicle computer sends a control command to the instrument;

[0009] S5: Firmware upgrade.

[0010] In the above scheme, step S2 further includes the following steps:

[0011] S2-1: TCP connection establishment;

[0012] S2-2: Check whether the key data transmitted by Ethernet is successfully transmitted to the instrument user interface for display. If not, execute S2-3; if detected, execute S2-5;

[0013] S2-3: The instrument sends a request for IP basic configuration and data instructions to the vehicle computer;

[0014] S2-4: After receiving the IP basic configuration and data instructions, the vehicle computer matches the IP basic configuration and data and sends the IP basic configuration and data to the instrument. After receiving the IP basic configuration and data, the instrument configures the IP basic configuration and data and displays them on the instrument user interface.

[0015] S2-5: The instrument sends a request to the vehicle computer to send IP periodic data instructions;

[0016] S2-6: After receiving the instruction to send IP periodic data, the vehicle computer prepares the IP periodic data and sends the IP periodic data to the instrument;

[0017] S2-7: After receiving the IP periodic data, the instrument displays the updated periodic data through the instrument user interface.

[0018] In the above scheme, step S3 further includes the following steps:

[0019] S3-1: If the vehicle computer has responded to the IP cycle data, execute the next step; if it has not responded to the IP cycle data, execute S2;

[0020] S3-2: Check whether the heartbeat is triggered regularly. If the instrument timer times out, the instrument sends a heartbeat command request to the host.

[0021] S3-3: After the vehicle computer receives the heartbeat command, it regularly updates the instrument status; if the vehicle computer does not receive any heartbeat packet within three heartbeat cycles, it executes S3-4. If it receives a heartbeat request, it executes this step again;

[0022] S3-4: Disconnect the TCP connection and wait for the instrument to re-establish the TCP connection.

[0023] In the above scheme, step S4 further includes the following steps:

[0024] S4-1: If the vehicle computer has responded to the IP cycle data, execute the next step; if it has not responded to the IP cycle data, execute S2;

[0025] S4-2: The vehicle computer sends configuration or action control instructions to the instrument;

[0026] S4-3: After receiving the configuration or action command, the instrument updates the configuration or executes the action, and then feeds back the configuration update status or action execution status to the vehicle computer;

[0027] S4-4: After receiving the feedback information, the vehicle computer compares it with the configuration or action control instruction sent. If they are consistent, it executes S4-5, otherwise it executes S4-2;

[0028] S4-5: Over.

[0029] In the above scheme, step S5 further includes the following steps:

[0030] S5-1: TCP connection established;

[0031] S5-2: The vehicle computer sends a request for part number and FW information to the instrument panel, and the instrument panel sends the part number and FW signal to the vehicle computer;

[0032] S5-3: The vehicle computer selects the corresponding required new FW information based on the instrument's part number and FW information, sends an upgrade request to the instrument, and waits for the instrument to send feedback information;

[0033] S5-4: If the upgrade is ready, the system executes S5-6. If the upgrade feedback is not received from the meter within the set waiting time, S5-3 is executed again. If the upgrade feedback is not received from the meter after more than three attempts, the system determines the initialization status based on the initialization status feedback from the meter. If the initialization is not completed, the system resends the upgrade request to the meter and waits for the meter to respond three times.

[0034] S5-5: If the vehicle computer does not receive the upgrade information fed back by the instrument, the vehicle computer disconnects the TCP connection, records the failure to receive the upgrade information fed back by the instrument in the error log, and executes S5-7;

[0035] S5-6: New FW transmission is performed;

[0036] S5-7: Execute S1.

[0037] In the above scheme, step S5-6 further includes the following steps:

[0038] S5-6-1: The vehicle computer sends a request to the instrument to check the new FW information;

[0039] S5-6-2: The instrument checks the FW information and resources, and sends the checked FW information and resource information to the vehicle computer;

[0040] S5-6-3: The vehicle computer prepares a new FW data packet based on the received FW information and resource information, and sends the data packet to the instrument cluster;

[0041] S5-6-4: After all FW data packets are sent, verify the integrity of the FW data.

[0042] S5-6-5: The vehicle computer records the new FW data detection results of the instrument;

[0043] S5-6-6: End.

[0044] In the above scheme, step S5-6-3 further includes the following steps:

[0045] S5-6-3-1: The vehicle computer divides the prepared new FW information data packet into packets and sends each sub-packet data to the instrument in turn. After each sub-packet data is sent, it waits for the instrument to respond before sending the next sub-packet data.

[0046] S5-6-3-2: If the sub-packet information feedback from the instrument is received, execute S5-6-3-4; if the instrument feedback information is not received within the set sub-packet data feedback information waiting time, resend the sub-packet data and continue to wait for the instrument feedback; if the instrument feedback information is not received after three repetitions, execute the next step;

[0047] S5-6-3-3: Re-execute step S5-6-3-1. At the same time, the vehicle computer disconnects the TCP connection with the instrument cluster and records the error of the FW information data packet in the error log.

[0048] S5-6-3-4: If the information feedback from the instrument received by the vehicle computer is incomplete or the sub-packet sequence number is inconsistent with the sub-packet sequence number sent, the vehicle computer disconnects the TCP connection with the instrument and records the error in the error log.

[0049] In the above scheme, step S5-6-4 further includes the following steps:

[0050] S5-6-4-1: The vehicle computer sends a command to check the new FW data to the instrument and waits for the instrument to respond;

[0051] S5-6-4-2: After receiving the instruction to verify the integrity of the new FW data, the instrument checks the integrity of the new FW data and feeds back the test results to the vehicle computer. If the vehicle computer does not receive the test results from the instrument within the set waiting time, it executes S5-6-4-3. If it receives the test results from the instrument, it executes S5-6-4-4.

[0052] S5-6-4-3: Resend the new FW data verification command to the instrument and wait for the instrument to respond. If no test result is received after two repetitions, the vehicle computer disconnects the TCP connection with the instrument and records the integrity test result in the error log.

[0053] S5-6-4-4: End.

[0054] The present invention also provides a post-installation working instrument operation system, comprising:

[0055] a memory having a computer program stored thereon;

[0056] A processor is used to execute the program in the memory to implement the after-installation working instrument operation method described in the above solution.

[0057] To sum up, the beneficial effects of the present invention are: it can stably drive the instrument to initialize at startup and regularly detect the connection stability, while also being able to upgrade the firmware, thereby improving the comfort of instrument use, ensuring stable connection, smooth display, and comfortable interaction as the core, and ensuring that users obtain the required information efficiently and pleasantly; it covers the core functional requirements of the instrument from startup to long-term operation, and then to maintenance and upgrades, ensuring stable display of the instrument, meeting the usage requirements of the instrument at different stages, and stably driving the instrument operation. BRIEF DESCRIPTION OF THE DRAWINGS

[0058] Figure 1 It is a flow chart of data interaction of the present invention.

[0059] Figure 2 It is a flow chart of the heartbeat protection of the present invention.

[0060] Figure 3 It is a schematic diagram of the process of controlling the instrument by the vehicle computer of the present invention.

[0061] Figure 4 It is a flowchart of the firmware upgrade of the present invention.

[0062] Figure 5 It is a schematic diagram of the process of transmitting a firmware upgrade data packet according to the present invention.

[0063] Figure 6 It is a system diagram of the working system.

[0064] Figure 7 This is the circuit diagram of the connector.

[0065] Figure 8 This is the circuit diagram of the battery sampling circuit.

[0066] Figure 9 This is the circuit diagram of the USB power sampling circuit.

[0067] Figure 10 is a circuit diagram of a first DC-DC converter.

[0068] Figure 11 This is a circuit diagram of the second DC-DC converter.

[0069] Figure 12 This is the circuit diagram of the SOC power supply enabling circuit.

[0070] Figure 13 This is the circuit diagram of a USB hub.

[0071] Figure 14 This is the circuit diagram of the processor power supply unit.

[0072] Figure 15 This is the circuit diagram of the processor System unit.

[0073] Figure 16 This is the circuit diagram of the processor serial communication unit.

[0074] Figure 17 This is a circuit diagram of a processor memory unit.

[0075] Figure 18 This is a circuit diagram of a memory.

[0076] Figure 19 This is the circuit diagram of the OLED power module.

[0077] Figure 20 This is the circuit diagram of terminal block FPC1.

[0078] Figure 21 This is the circuit diagram of terminal block FPC1.

[0079] Figure 22 This is the circuit diagram of the OLED power supply enabling circuit.

[0080] Figure 23 This is a schematic diagram of the structure of the instrument body Figure 1 .

[0081] Figure 24 This is a schematic diagram of the structure of the instrument body Figure 2 .

[0082] Figure 25 This is a schematic diagram of the structure of the mounting plate in the instrument body Figure 1 .

[0083] Figure 26 This is a schematic diagram of the structure of the mounting plate in the instrument body Figure 2 .

[0084] Figure 27 It is a structural diagram of the middle mounting plate of the PCB circuit board in the instrument body.

[0085] Figure 28 It is a structural diagram of the instrument housing in the instrument body.

[0086] Figure 29 This is an exploded view of the instrument body.

[0087] Figure 30 It is a schematic diagram of the installation structure of electrical components in the instrument body.

[0088] Figure 31 It is a structural diagram of the OLED self-luminous screen in the instrument body.

[0089] Figure 32 yes Figure 31 A in the enlarged view. DETAILED DESCRIPTION

[0090] The present invention will be further described below by way of examples and in conjunction with the accompanying drawings:

[0091] like Figures 1 to 5 As shown, a method for operating an after-installation working instrument includes the following steps:

[0092] S1: When the vehicle is in standby or running mode, it performs normal operation and executes S2 and S3; when the vehicle computer needs to control the instrument, it executes step S4; when the firmware needs to be upgraded, it executes step S5;

[0093] S2: data interaction;

[0094] S2-1: TCP connection establishment;

[0095] S2-2: Check whether the key data transmitted by Ethernet is successfully transmitted to the instrument user interface for display. If not, execute S2-3; if detected, execute S2-5;

[0096] S2-3: The instrument sends a request for IP basic configuration and data instructions to the vehicle computer;

[0097] S2-4: After receiving the IP basic configuration and data instructions, the vehicle computer matches the IP basic configuration and data and sends the IP basic configuration and data to the instrument. After receiving the IP basic configuration and data, the instrument configures the IP basic configuration and data and displays them on the instrument user interface.

[0098] S2-5: The instrument sends a request to the vehicle computer to send IP periodic data instructions;

[0099] S2-6: After receiving the instruction to send IP periodic data, the vehicle computer prepares the IP periodic data and sends the IP periodic data to the instrument;

[0100] S2-7: After the instrument receives the IP periodic data, it displays the updated periodic data through the instrument user interface;

[0101] S3: Periodic heartbeat protection;

[0102] S3-1: If the vehicle computer has responded to the IP cycle data, execute the next step; if it has not responded to the IP cycle data, execute S2;

[0103] S3-2: Check whether the heartbeat is triggered regularly. If the instrument timer times out, the instrument sends a heartbeat command request to the host.

[0104] S3-3: After the vehicle computer receives the heartbeat command, it regularly updates the instrument status; if the vehicle computer does not receive any heartbeat packet within three heartbeat cycles, it executes S3-4. If it receives a heartbeat request, it executes this step again;

[0105] S3-4: Disconnect the TCP connection and wait for the instrument to re-establish the TCP connection;

[0106] S4: The vehicle computer sends a control command to the instrument;

[0107] S4-1: If the vehicle computer has responded to the IP cycle data, execute the next step; if it has not responded to the IP cycle data, execute S2;

[0108] S4-2: The vehicle computer sends configuration or action control instructions to the instrument;

[0109] S4-3: After receiving the configuration or action command, the instrument updates the configuration or executes the action, and then feeds back the configuration update status or action execution status to the vehicle computer;

[0110] S4-4: After receiving the feedback information, the vehicle computer compares it with the configuration or action control instruction sent. If they are consistent, it executes S4-5, otherwise it executes S4-2;

[0111] S4-5: End.

[0112] S5: Firmware upgrade;

[0113] S5-1: TCP connection established;

[0114] S5-2: The vehicle computer sends a request for part number and FW information to the instrument panel, and the instrument panel sends the part number and FW signal to the vehicle computer;

[0115] S5-3: The vehicle computer selects the corresponding required new FW information based on the instrument's part number and FW information, sends an upgrade request to the instrument, and waits for the instrument to send feedback information;

[0116] S5-4: If the upgrade is ready, the process proceeds to S5-6. If the upgrade feedback is not received from the meter within the set waiting time, the process proceeds to S5-3 again. The waiting time in this embodiment is 2000ms. If the upgrade feedback is not received from the meter after more than three attempts, the vehicle computer determines based on the initialization status feedback from the meter that initialization is not complete. If the upgrade is not received, the vehicle computer resends the upgrade request to the meter and waits for three more responses.

[0117] S5-5: If the vehicle computer does not receive the upgrade information fed back by the instrument, the vehicle computer disconnects the TCP connection, records the failure to receive the upgrade information fed back by the instrument in the error log, and executes S5-7;

[0118] S5-6: New FW transmission is performed;

[0119] S5-6-1: The vehicle computer sends a request to the instrument to check the new FW information;

[0120] S5-6-2: The instrument checks the FW information and resources, and sends the checked FW information and resource information to the vehicle computer;

[0121] S5-6-3: The vehicle computer prepares a new FW data packet based on the received FW information and resource information, and sends the data packet to the instrument cluster;

[0122] S5-6-3-1: The vehicle computer divides the prepared new FW information data packet into packets and sends each sub-packet data to the instrument in turn. After each sub-packet data is sent, it waits for the instrument to respond before sending the next sub-packet data.

[0123] S5-6-3-2: If the sub-packet information feedback from the instrument is received, execute S5-6-3-4; if the instrument feedback information is not received within the set sub-packet data feedback information waiting time, resend the sub-packet data and continue to wait for the instrument feedback; if the instrument feedback information is not received after three repetitions, execute the next step;

[0124] The waiting time for the sub-packet data feedback information in this embodiment is 2000ms;

[0125] S5-6-3-3: Re-execute step S5-6-3-1. At the same time, the vehicle computer disconnects the TCP connection with the instrument cluster and records the error of the FW information data packet in the error log.

[0126] S5-6-3-4: If the information feedback from the instrument received by the vehicle computer is incomplete or the sub-packet sequence number is inconsistent with the sub-packet sequence number sent, the vehicle computer disconnects the TCP connection with the instrument and records the error in the error log;

[0127] S5-6-4: After all FW data packets are sent, verify the integrity of the FW data.

[0128] S5-6-4-1: The vehicle computer sends a command to check the new FW data to the instrument and waits for the instrument to respond;

[0129] S5-6-4-2: After receiving the instruction to verify the integrity of the new FW data, the instrument checks the integrity of the new FW data and feeds back the test results to the vehicle computer. If the vehicle computer does not receive the test results from the instrument within the set waiting time, it executes S5-6-4-3. If it receives the test results from the instrument, it executes S5-6-4-4.

[0130] S5-6-4-3: Resend the new FW data verification command to the instrument and wait for the instrument to respond. If no test result is received after two repetitions, the vehicle computer disconnects the TCP connection with the instrument and records the integrity test result in the error log.

[0131] S5-6-4-4: End;

[0132] S5-6-5: The vehicle computer records the new FW data detection results of the instrument;

[0133] S5-6-6: End;

[0134] S5-7: Execute S1.

[0135] This technical solution also provides a post-installation working instrument operation system, including:

[0136] a memory having a computer program stored thereon;

[0137] The processor is used to execute the program in the memory to implement the after-installation working instrument operation method described in the above technical solution.

[0138] The present technical solution is a method and system for operating a post-installed working instrument, which is applicable to the following instruments, including a working system and an instrument body. Figures 6 to 22 As shown, the working system includes a processor U1, the display data output end of the processor U1 is connected to the display data input end of the OLED self-luminous screen, the total data end of the processor U1 is connected to the total data end of the USB hub U7, the transmission end of the USB hub U7 is connected to the transmission end of connector 7, connector 7 is used to connect to the vehicle body OBD system, and the USB hub U7 is used to connect to the car computer.

[0139] A first end of connector 7 is connected to one end of transient voltage suppressor diode TVS2, one end of capacitor C64, and the positive electrode of diode D3. The negative electrode of diode D3 is connected to one end of inductor L6, one end of capacitor C65, and one end of capacitor C77. The other end of inductor L6 is connected to the power output terminal of the power supply, one end of capacitor C66, and one end of capacitor C86. The other end of transient voltage suppressor diode TVS2, the other end of capacitor C64, the other end of capacitor C65, the other end of capacitor C77, the other end of capacitor C66, the other end of capacitor C86, and the second end of connector 7 are all connected to the power ground.

[0140] The fourth end of connector 7 is connected to the cathode of the first USB port on USB hub U7 and one end of diode ESD6. The fifth end of connector 7 is connected to the anode of the first USB port on USB hub U7 and one end of diode ESD5. The sixth end of connector 7 is connected to the USB power supply. The eighth end of connector 7 is connected to the cathode of the second USB port on USB hub U7 and one end of diode ESD8. The ninth end of connector 7 is connected to the anode of the second USB port on USB hub U7 and one end of diode ESD7. The tenth, eleventh, and twelfth ends of connector 7, the other end of diode ESD6, the other end of diode ESD7, the other end of diode ESD8, and the other end of diode ESD5 are all connected to the power ground.

[0141] It also includes a battery sampling circuit, which includes a resistor R51. One end of the resistor R51 is connected to the enable end of the battery sampling signal of the processor U1, the other end of the resistor R51 is connected to one end of the resistor R53, one end of the capacitor C63 and the base of the transistor Q5, the other end of the resistor R53, the other end of the capacitor C63 and the emitter of the transistor Q5 are all connected to the power ground, the collector of the transistor Q5 is connected to one end of the resistor R54, the other end of the resistor R54 is connected to the base of the transistor Q6, one end of the resistor R52 and one end of the capacitor C62, the emitter of the transistor Q6 is connected to the other end of the resistor R52, the other end of the capacitor C62 and the power output supply end, the collector of the transistor Q6 is connected to one end of the resistor R56 and one end of the capacitor C67, the other end of the resistor R56 is connected to one end of the resistor R57, one end of the capacitor C91 and the battery sampling signal input end of the processor U1, and the other end of the capacitor C67, the other end of the resistor R57 and the other end of the capacitor C91 are all connected to the power ground.

[0142] It also includes a USB power sampling circuit, which includes one end of a resistor R61 connected to the enable end of the USB power sampling signal of the processor U1, the other end of the resistor R61 connected to one end of the resistor R59, one end of the capacitor C74 and the base of the transistor Q8, the other end of the resistor R59, the other end of the capacitor C74 and the emitter of the transistor Q8 are all connected to the power ground, the collector of the transistor Q8 is connected to one end of the resistor R58, the other end of the resistor R58 is connected to the base of the transistor Q7 and one end of the resistor R60, the emitter of the transistor Q7 is connected to the other end of the resistor R60, the USB power supply end and one end of the diode ESD9, the other end of the diode ESD9 is connected to the power ground, the collector of the transistor Q7 is connected to one end of the resistor R62 and one end of the capacitor C75, the other end of the resistor R62 is connected to one end of the resistor R63, one end of the capacitor C92 and the USB power sampling signal input end of the processor U1, and the other end of the capacitor C75, the other end of the resistor R63 and the other end of the capacitor C92 are all connected to the power ground.

[0143] It also includes a power supply module, the power supply module includes a first DC-DC converter U3 voltage input end connected to the power supply output end, one end of the capacitor C45, one end of the capacitor C46, ​​one end of the capacitor C47 and one end of the capacitor C48, the other end of the capacitor C45, the other end of the capacitor C46, ​​the other end of the capacitor C47 and the other end of the capacitor C48 are all connected to the power ground, the first DC-DC converter U3 enable end is connected to the first end of the switching diode D2 and one end of the resistor R39, the second end of the switching diode D2 is connected to the USB power supply, the third end of the switching diode D2 is connected to the processor U13.3V enable end, the first DC-DC converter U3 supply voltage is connected to one end of the capacitor C44, the other end of the capacitor C44, the other end of the resistor R39 and the first The ground end of the DC-DC converter U3 is connected to the power ground, the BOOT end of the first DC-DC converter U3 is connected to one end of the resistor R34, the other end of the resistor R34 is connected to one end of the capacitor C38, the other end of the capacitor C38 is connected to the SW end of the first DC-DC converter U3 and one end of the inductor L2, the other end of the inductor L2 outputs a 3.3V voltage and is connected to one end of the resistor R35, one end of the capacitor C40, one end of the capacitor C41, one end of the capacitor C42 and one end of the capacitor C43, the feedback end of the first DC-DC converter U3 is connected to the other end of the resistor R35 and one end of the resistor R36, and the other end of the resistor R36, the other end of the capacitor C40, the other end of the capacitor C41, the other end of the capacitor C42 and the other end of the capacitor C43 are all connected to the power ground.

[0144] It also includes a second DC-DC converter U4 voltage input end connected to the other end of the inductor L2, one end of the capacitor C31, one end of the capacitor C32 and one end of the resistor R28, the other end of the capacitor C31, the other end of the capacitor C32, the ground end of the second DC-DC converter U4 and the second DC-DC converter U4MODE end are all connected to the power ground, the other end of the resistor R28 is connected to the enable end of the second DC-DC converter U4, the second DC-DC converter U4PG end is the SOC power supply enable end, connected to one end of the resistor R29, and the second DC-DC converter U4 is connected to the SOC power supply enable end. The SW end of the second DC-DC converter U4 is connected to one end of the inductor L1, and the other end of the inductor L1 outputs a 1.3V voltage and is connected to the other end of the resistor R29, one end of the resistor R31, one end of the capacitor C33, one end of the capacitor C34 and one end of the capacitor C35. The feedback end of the second DC-DC converter U4 is connected to the other end of the capacitor C33, the other end of the resistor R31 and one end of the resistor R30. The ground end of the second DC-DC converter U4, the other end of the resistor R30, the other end of the capacitor C34 and the other end of the capacitor C35 are all connected to the power ground.

[0145] The second DC-DC converter U4PG end is connected to one end of the resistor R44, the other end of the resistor R44 is connected to one end of the capacitor C51 and the base of the transistor Q2, the other end of the capacitor C51 and the emitter of the transistor Q2 are both connected to the power ground, the collector of the transistor Q2 is connected to one end of the resistor R40, the other end of the resistor R40 is connected to the gate of the field effect transistor Q1, one end of the resistor R41 and one end of the capacitor C49, the source of the transistor Q1 is connected to the other end of the resistor R41, the other end of the capacitor C49 and the other end of the inductor L2, the drain of the transistor Q1 is the SOC3.3V power supply end, which is used to power the processor U1, and is connected to one end of the resistor R42 and one end of the capacitor C50, and the other end of the resistor R42 and the other end of the capacitor C50 are both connected to the power ground.

[0146] It also includes an OLED power supply enable circuit, which includes one end of a resistor R45 connected to the processor U1OLED3.3V power supply enable signal output end, the other end of the resistor R45 connected to one end of the resistor R47, one end of the capacitor C53 and the base of the transistor Q3, the other end of the resistor R47, the other end of the capacitor C51 and the emitter of the transistor Q3 are all connected to the power ground, the collector of the transistor Q3 is connected to one end of the resistor R48, the other end of the resistor R48 is connected to the gate of the field effect transistor Q4, one end of the resistor R46 and one end of the capacitor C52, the source of the transistor Q4 is connected to the other end of the resistor R46, the other end of the capacitor C52 and the other end of the inductor L2, the drain of the transistor Q4 is the OLED3.3V power supply end, which is used to power the OLED self-luminous screen, and is connected to one end of the resistor R49 and one end of the capacitor C54, and the other end of the resistor R49 and the other end of the capacitor C54 are both connected to the power ground.

[0147] It also includes a low-voltage difference linear regulator U5, the voltage input end of the low-voltage difference linear regulator U5 is connected to the other end of the inductor L2 and one end of the capacitor C36, the enable end of the low-voltage difference linear regulator U5 is connected to the processor U1OLED1.8V power supply enable end and one end of the resistor R33, the ground end of the low-voltage difference linear regulator U5, the other end of the resistor R33 and the other end of the capacitor C36 are all connected to the power ground, the voltage output end of the low-voltage difference linear regulator U5 outputs a 1.8V voltage for powering the OLED self-luminous screen, and is connected to one end of the capacitor C37, and the other end of the capacitor C37 is connected to the power ground.

[0148] The working voltage end of the USB hub U7 is connected to one end of the resistor R64, one end of the capacitor C78 and one end of the capacitor C76. The other end of the resistor R64 is connected to the other end of the inductor L2. The exposed pad port of the USB hub U7 is connected to the other end of the capacitor C78, ​​one end of the capacitor C79, the other end of the capacitor C76, one end of the capacitor C87 and the power ground. The USB hub U7V5 end is connected to the other end of the capacitor C79, the other end of the capacitor C87 and one end of the resistor R64. The first end of the USB hub U7 is connected to one end of the resistor R73, the normally-on end of the crystal oscillator Y3 and one end of the capacitor C90. The other end of the capacitor C90 and the first end of the crystal oscillator Y3 are both connected to the power ground. The second end of the USB hub U7 is connected to the other end of the resistor R73, the normally-on end of the crystal oscillator Y3 and one end of the capacitor C89. The other end of the capacitor C89 and the third end of the crystal oscillator Y3 are both connected to the power ground.

[0149] The negative pole of the USB hub U7's USB interface is connected to the negative pole of the processor U1's USB interface, and the positive pole of the USB hub U7's USB interface is connected to the positive pole of the processor U1's USB interface.

[0150] The positive power supply voltage terminal of the processor power supply unit U1A3.3V (i.e., pins 2, 20, 38, 65, 85) is connected to the drain of the transistor Q1, one end of the capacitor C20, one end of the capacitor C19, one end of the capacitor C18, one end of the capacitor C17, and one end of the capacitor C16. The other end of the capacitor C20, the other end of the capacitor C19, the other end of the capacitor C18, the other end of the capacitor C17, and the other end of the capacitor C16 are all connected to the power ground. The analog circuit power supply terminal of the processor power supply unit U1A3.3V (i.e., pin 4) is connected to one end of the resistor R7, one end of the capacitor C14, and one end of the capacitor C15. The other end of the resistor R7 is connected to the drain of the transistor Q1. The processor power supply unit U1A3.3V The PLL power supply end is connected to one end of resistor R6 and one end of capacitor C13, the other end of resistor R6 is connected to the drain of transistor Q1, the other end of capacitor C13, the other end of capacitor C14 and the other end of capacitor C15 are all connected to the power ground, the working voltage end of the processor power supply unit U1A is connected to the other end of inductor L1, one end of capacitor C12, one end of capacitor C11, one end of capacitor C10 and one end of capacitor C9, the other end of capacitor C12, the other end of capacitor C11, the other end of capacitor C10 and the other end of capacitor C9 are all connected to the power ground, the 1.2V analog power supply end of the processor power supply unit U1A is connected to one end of capacitor C8 and one end of capacitor C7, and the other end of capacitor C8 and the other end of capacitor C7 are all connected to the power ground.

[0151] The ASDVREF terminal of the processor power supply unit U1A is connected to one end of resistor R2, one end of resistor R1, and one end of capacitor C5. The other ends of resistor R1 and capacitor C5 are both connected to power ground. The other end of resistor R2 is connected to one end of resistor R27, and the other end of resistor R27 is connected to the 1.8VDDR terminal of the processor power supply unit U1A. The AAVDD_RTC terminal of the processor power supply unit U1A is connected to one end of resistor R3 and one end of capacitor C6. The other end of resistor R3 is connected to the drain of transistor Q1. The AAVSS_RTC terminal of the processor power supply unit U1A is connected to one end of resistor R4. The pad port of the processor power supply unit U1A, the other end of resistor R4, and the other end of capacitor C6 are all connected to power ground.

[0152] The transmitting end of the printer serial port of processor serial communication unit U1C is connected to one end of resistor R13 and one end of resistor R17. The other end of resistor R13 is connected to the drain of transistor Q1. One end of resistor R17 is connected to one end of diode ESD1 and the second end of printer terminal block P4. The other end of diode ESD1 and the first end of terminal block P4 are both connected to power ground. The receiving end of the printer serial port of processor serial communication unit U1C is connected to one end of resistor R14 and one end of resistor R18. The other end of resistor R14 is connected to the drain of transistor Q1. One end of resistor R18 is connected to one end of diode ESD2 and the third end of printer terminal block P4. The other end of diode ESD2 is connected to power ground.

[0153] The standby serial port transmitting end of processor serial communication unit U1C is connected to one end of resistor R15 and one end of resistor R19. The other end of resistor R15 is connected to the drain of transistor Q1. One end of resistor R19 is connected to one end of diode ESD4 and the second end of standby wiring block P5. The other end of diode ESD4 and the first end of standby wiring block P5 are both connected to power ground. The printing serial port receiving end of processor serial communication unit U1C is connected to one end of resistor R16 and one end of resistor R20. The other end of resistor R16 is connected to the drain of transistor Q1. One end of resistor R20 is connected to one end of diode ESD3 and the third end of standby wiring block P5. The other end of diode ESD3 is connected to power ground.

[0154] The OLED power setting output of processor U1 is connected to the power setting input of the OLED self-luminous screen. The OLED reset output of processor U1 is connected to the reset input of the OLED self-luminous screen. The OLED self-luminous screen synchronization signal output is connected to the OLED synchronization signal input of processor U1. The positive output of the first display data channel of processor U1 is connected to the positive input of the first display data channel of the OLED self-luminous screen. The negative output of the first display data channel of processor U1 is connected to the negative input of the first display data channel of the OLED self-luminous screen. The positive output of the second display data channel of processor U1 is connected to the positive input of the second display data channel of the OLED self-luminous screen. The negative output of the second display data channel of processor U1 is connected to the negative input of the second display data channel of the OLED self-luminous screen. The positive output of the display data clock channel of processor U1 is connected to the positive input of the display data clock channel of the OLED self-luminous screen. The negative output of the display data clock channel of processor U1 is connected to the negative input of the display data clock channel of the OLED self-luminous screen.

[0155] The first BOOT terminal of processor system unit U1B is connected to one end of resistor R8 and the first end of terminal block P1. The other end of resistor R8 is connected to the drain of transistor Q1. The second end of terminal block P1 is connected to power ground. The second BOOT terminal of processor system unit U1B is connected to one end of resistor R9 and the first end of terminal block P2. The other end of resistor R9 is connected to the drain of transistor Q1. The second end of terminal block P2 is connected to power ground. The oscillator input terminal of processor system unit U1B is connected to one end of resistor R12, the first end of crystal oscillator Y1, and one end of capacitor C24. The other end of capacitor C24 and the normally-open terminal of crystal oscillator Y1 are both connected to power ground. The oscillator output terminal of processor system unit U1B is connected to the other end of resistor R12, the second end of crystal oscillator Y1, and one end of capacitor C25. The other end of capacitor C25 and the normally-open terminal of crystal oscillator Y3 are both connected to power ground.

[0156] The debug port test clock terminal of the processor system unit U1B is connected to one end of resistor R95. The other end of resistor R95 is connected to one end of resistor R84 and the sixth terminal of terminal block P3. It is also connected to an external debug device through terminal block P3. The other end of resistor R84 is connected to the cathode of diode D4, and the anode of diode D4 is connected to the drain of transistor Q1. The debug port test data output terminal of the processor system unit U1B is connected to one end of resistor R94. The other end of resistor R94 is connected to one end of resistor R85 and the fifth terminal of terminal block P3, and the other end of resistor R85 is connected to the cathode of diode D4. The debug port test data input terminal of the processor system unit U1B is connected to one end of resistor R93. The other end of resistor R93 is connected to one end of resistor R86 and the fourth terminal of terminal block P3, and the other end of resistor R86 is connected to the cathode of diode D4. The debug port test mode select terminal of the processor system unit U1B is connected to one end of resistor R92. The other end of resistor R92 is connected to one end of resistor R87 and the third terminal of terminal block P3, and the other end of resistor R87 is connected to the cathode of diode D4. The debug port test reset terminal of processor System unit U1B is connected to one end of resistor R91. The other end of resistor R91 is connected to the second end of terminal block P3, one end of resistor R89, and the cathode of diode D4. The other end of resistor R89 ​​is connected to power ground. The seventh end of terminal block P3 is the system reset switch terminal, connected to one end of resistor R83. The other end of resistor R83 is connected to the cathode of diode D4. The eighth end of terminal block P3 is the clock coordination terminal, connected to one end of resistor R90. The other end of resistor R90 and the ninth end of terminal block P3 are connected to power ground.

[0157] The storage chip select signal end of the processor storage unit U1F is connected to the chip select signal end of the memory U2 and one end of the resistor R24, the other end of the resistor R24 ​​is connected to the power supply voltage end of the memory U2, the storage clock end of the processor storage unit U1F is connected to the clock end of the memory U2, the first storage signal end of the processor storage unit U1F is connected to the input end of the memory U2, the second storage signal end of the processor storage unit U1F is connected to the output end of the memory U2 and one end of the resistor R25, the other end of the resistor R25 is connected to the power ground, the third storage signal end of the processor storage unit U1F is connected to the write protection input end of the memory U2 and the resistor R22. The fourth storage signal terminal of the processor storage unit U1F is connected to the reset terminal of the memory U2 and one end of the resistor R23. The other end of the resistor R23 is connected to the power supply voltage terminal of the memory U2. The power supply voltage terminal of the memory U2 is connected to one end of the magnetic bead FB2, one end of the capacitor C26 and one end of the capacitor C27. The other end of the magnetic bead FB2 is connected to the cathode of the diode D1 and one end of the capacitor C28. The anode of the diode D1 is connected to the drain of the transistor Q1. The ground terminal of the memory U2, the other end of the capacitor C26, the other end of the capacitor C27 and the other end of the capacitor C28 are all connected to the power ground.

[0158] The OLED self-luminous screen is connected via the terminal block FPC1. The OLED self-luminous screen is also equipped with an OLED power module U6. The U6LX3 end of the OLED power module is connected to one end of the inductor L5, and the other end of the inductor L5 is connected to the other end of the inductor L2. The U6LX1 end of the OLED power module is connected to one end of the inductor L4, and the other end of the inductor L4 is connected to the other end of the inductor L2. The U6LX2 end of the OLED power module is connected to one end of the inductor L3, and the other end of the inductor L3 is connected to the power ground. The U6PVIN end of the OLED power module is connected to one end of the capacitor C58, one end of the capacitor C60, and one end of the inductor L2. The U6AVIN end of the OLED power module is connected to one end of the capacitor C59, one end of the capacitor C61, and one end of the inductor L2. The ground end of the OLED power module U6, the other end of the capacitor C59, the other end of the capacitor C61, the other end of the capacitor C58, and the other end of the capacitor C60 are all connected to the power ground. The U6VO3 end of the OLED power module is connected to one end of capacitor C55, one end of capacitor C70 and the AVDD end of the terminal block FPC1. The other end of capacitor C55, the other end of capacitor C70 and the U6PGND2 end of the OLED power module are all connected to the power ground. The U6VO1 end of the OLED power module is connected to one end of capacitor C56, one end of capacitor C98, one end of capacitor C68 and the ELVDD end of the terminal block FPC1. The other end of capacitor C56, the other end of capacitor C98, the other end of capacitor C68 and the U6PGND1 end of the OLED power module are all connected to the power ground. The U6VO2 end of the OLED power module is connected to one end of capacitor C57, one end of capacitor C100, one end of capacitor C69 and the ELVSS end of the terminal block FPC1. The other end of capacitor C57, the other end of capacitor C100 and the other end of capacitor C69 are all connected to the power ground. The IDVCC end of the terminal block FPC1 is connected to the voltage output end of the low voltage difference linear regulator U5. The VCI end of the terminal block FPC1 is connected to the drain of the transistor Q4.

[0159] like Figures 23 to 32 As shown, the instrument body includes an instrument housing 1 and a mounting plate 2 connected to the instrument housing 1, an OLED self-luminous screen 3 is mounted on the mounting plate 2, a control component for controlling the operation of the OLED self-luminous screen 3 is provided in the instrument housing 1, and a glass cover 4 for protecting the OLED self-luminous screen 3 is provided on the mounting plate 2.

[0160] The glass cover 4 is made of 2.5D glass, which is a product between 2D flat glass and 3D curved glass. The middle of its surface is flat, and the edges are curved through processes such as hot bending and cold working. It combines the stability of flat glass with the aesthetics of curved glass. It has high light transmittance and low reflectivity, which can improve the display effect of the screen. The edge curvature is ergonomic and improves grip comfort. It is scratch-resistant, wear-resistant, and anti-fingerprint. This increases the display clarity of the car instrument. By combining the OLED self-luminous screen 3 with the 2.5D glass, the self-luminous performance of the car instrument is guaranteed when the car is driving at night, making it easier for the driver to observe while driving.

[0161] The glass cover 4 and OLED self-luminous screen 3 are seamlessly bonded together using optical adhesive 301 or vacuum suction. This seamless bonding of the touch layer, display layer, and protective glass improves light transmittance and touch sensitivity. The 2.5D glass has a flat center and curved edges, offering both aesthetics and impact resistance.

[0162] The glass cover 4 is located on the outermost layer of the display module and mainly plays the role of protecting the display panel. It can achieve different appearance effects by silk-screening different colors of ink, thereby beautifying and decorating the display module assembly.

[0163] Optical Adhesive 301 utilizes OCA (Optical Clear Adhesive), a colorless, transparent, and optically superior double-sided adhesive. OCA is a type of pressure-sensitive adhesive characterized by high light transmittance exceeding 90%, excellent bonding strength, and minimal shrinkage upon curing. It can cure at room or moderate temperatures.

[0164] The liquid crystal display module (LCM) includes electronic components such as the LCD panel, backlight, touch module, IC driver, and PCB circuit board 5. In OLED self-luminous screens 3, LCM mainly refers to the liquid crystal display module used in conjunction with OLED display technology, and the LCM is primarily responsible for signal processing and display control.

[0165] Polarizer film 302 uses POL (Polarizer), primarily made of PVA (polyvinyl alcohol) film. PVA film polarizes light in the OLED self-luminous screen 3. By adsorbing iodine molecules and stretching them, the iodine molecules are arranged in an orderly pattern on the PVA film, forming a polarizer film 302 with uniform bidirectional absorption.

[0166] The glass encapsulation layer 303 is a key component that protects the OLED's light-emitting layer from the external environment. The encapsulation layer typically consists of a glass substrate and a thin film covering it. This film prevents moisture, oxygen, and other impurities from penetrating the OLED, thereby extending the lifespan of the display. The encapsulation layer's glass substrate is typically made of a special glass with high light transmittance to ensure that light can pass through smoothly without affecting the display.

[0167] The low-temperature polysilicon layer 304 has the characteristics of high electron mobility, which can provide faster switching speed and higher resolution, making the display on the car dashboard clearer. However, due to the large leakage current caused by the high electron mobility, LTPS cannot support low-frequency dynamic refresh adjustment, and the overall power consumption is relatively high.

[0168] The graphite sheet 305 is used as a base material for structural support or heat dissipation.

[0169] The height of the electrical component 9 area is 0.9mm higher than the height of the graphite sheet 305. The height of the connector 7 is higher than the height of the graphite sheet 305. The model of the connector 7 is: FH35C-39S-0.3SHW50. The conductive fabric 8 adopts the specification of 0.05T.

[0170] The control assembly includes a PCB circuit board 5 disposed within the instrument housing 1 and a connector 7 disposed within the mounting plate 2 and connected to the PCB circuit board 5 via an FPC circuit board 6. Connectors 7 are provided at both ends of the FPC circuit board. Connectors 7 within the mounting plate 2 are connected to electrical components 9 via conductive fabric 8. The PCB circuit board 5 is provided with wiring terminals 502 for connecting to the power cord, and a mounting cavity 104 for mounting wiring terminals 502 is provided on the exterior of the instrument housing 1. Mounting slots 204 are provided on the mounting plate 2 for mounting connectors 7, electrical components 9, and conductive fabric 8. The mounting plate 2 also has connecting guides 205 for the FPC circuit board 6 to pass through the mounting plate 2 and connect to the PCB circuit board 5.

[0171] The connector 7 and electrical components 9 within the mounting plate 2 are covered and connected by conductive cloth 8 and connected to the PCB circuit board 5 via the FPC circuit board 6. The PCB circuit board 5 is powered by an external power supply connected to the power socket provided on the back of the instrument housing 1, thereby controlling the display of the OLED self-luminous screen 3. The PCB circuit board 5 is provided within the instrument housing 1, and the conductive cloth 8 is provided on the mounting plate 2. The back of the instrument housing 1 is provided with a terminal 502 for connecting to the PCB circuit board 5. The mounting plate 2 is provided with a mounting groove 204 for accommodating the connector 7, electrical components 9, and conductive cloth 8. The mounting plate 2 is also provided with a connecting guide groove 205 for connecting the FPC circuit board 6 through the mounting plate 2 to the PCB circuit board 5. The mounting groove 204 is provided to facilitate the installation of the connector 7, electrical components 9, and conductive cloth 8, and to connect the FPC circuit board to the PCB circuit board 5 through the mounting plate 2 via the connecting guide groove 205.

[0172] A plurality of positioning blocks 101 for connecting to the mounting plate 2 are provided on the inner edge of the instrument housing 1, a positioning groove 201 matching the positioning blocks 101 is provided on the inner edge of the mounting plate 2, a positioning column 202 for connecting to the instrument housing 1 is provided below the mounting plate 2, a positioning cylinder 102 matching the positioning column 202 is provided on the instrument housing 1, a positioning hole 501 for the positioning column 202 to pass through and be connected to the positioning cylinder 102 is provided on the PCB circuit board 5, the instrument housing 1 is also provided with a screw hole 103 for fixing the bolt to the mounting plate 2, and a threaded cylinder 203 matching the bolt is provided on the mounting plate 2.

[0173] The instrument housing 1 and the mounting plate 2 are positioned and connected by the positioning block 101 and the positioning groove 201, and then the instrument housing 1 and the mounting plate 2 are connected together by bolts to ensure the stability of the instrument panel. The positioning column 202 set under the mounting plate 2 passes through the positioning hole 501 and is connected to the positioning cylinder 102 on the instrument housing 1, thereby fixing the PCB circuit board 5 to prevent the PCB circuit board 5 from moving.

[0174] A mounting platform 10 for securing the instrument panel is provided below the instrument housing 1 and mounting plate 2. A plurality of connection holes 11 for inserting connection posts are provided at intervals below the mounting platform 10. Terminals 502 are provided between adjacent connection holes 11. The mounting platform 10 and the connection holes 11 provided on the mounting platform 10 are provided to secure the instrument panel to the vehicle.

[0175] An LCD bracket 12 is located below the mounting plate 2. This bracket includes a mounting area 1201 below the electrical components 9 and grille areas 1202 located on either side. The bracket is positioned using positioning blocks 101, positioning posts 202, and threaded barrels 203, and is attached to the back of the mounting plate 2. This bracket secures and supports the LCD, enhances heat dissipation, facilitates installation, ensures optimal display quality, and improves system integration and compatibility.

[0176] Mounting plate 2 defines a mounting cavity 104 for mounting an OLED self-luminous screen 3. The OLED self-luminous screen 3 comprises, from top to bottom, a glass cover plate 4, optical adhesive 301, and a liquid crystal display module. The LCD module comprises, in that order, a polarizing film 302, a glass encapsulation layer 303, a low-temperature polysilicon layer 304, and a graphite sheet 305. OLED self-luminous screen 3 utilizes self-luminous technology, eliminating the need for a backlight. This results in a lighter and thinner screen, with each pixel independently emitting light and lowering energy consumption.

[0177] The glass cover plate 4 has the same shape as the mounting plate 2, and its outer edge is attached to the outer edge of the mounting plate 2 via adhesive. The adhesive secures the glass cover plate 4 to the vehicle's instrument panel, preventing it from loosening and shifting during driving. When used to seal the screen frame, the adhesive also prevents light leakage and moisture intrusion, which could affect the display's performance and lifespan. Similar to other electronic circuit boards, the circuit boards of automotive displays require conformal coating to prevent malfunctions caused by harmful substances such as dust.

[0178] By setting up an OLED self-luminous screen 3 and realizing dynamic visual effects, it can be dimmed in different areas to reduce energy consumption. Only the illuminated pixels need to be powered, and the power consumption is 40%-50% lower than that of LCD. It can still maintain high contrast display under strong light and display car information in real time, avoiding the reflection problem of traditional mechanical dials under direct sunlight. It is protected by the instrument housing 1 and the glass cover 4 to ensure the strength of the car dial.

Claims

1. A method for operating an after-installation working instrument, characterized in that: The following steps are involved: S1: When the vehicle is in standby or running mode, it performs normal operation and executes S2 and S3; when the vehicle computer needs to control the instrument, it executes step S4; when the firmware needs to be upgraded, it executes step S5; S2: data interaction; S3: Periodic heartbeat protection; S4: The vehicle computer sends a control command to the instrument; S5: Firmware upgrade.

2. The method for operating the after-installation working instrument according to claim 1, characterized in that: Step S2 further includes the following steps: S2-1: TCP connection establishment; S2-2: Check whether the key data transmitted by Ethernet is successfully transmitted to the instrument user interface for display. If not, execute S2-3; if detected, execute S2-5; S2-3: The instrument sends a request for IP basic configuration and data instructions to the vehicle computer; S2-4: After receiving the IP basic configuration and data instructions, the vehicle computer matches the IP basic configuration and data and sends the IP basic configuration and data to the instrument. After receiving the IP basic configuration and data, the instrument configures the IP basic configuration and data and displays them on the instrument user interface. S2-5: The instrument sends a request to the vehicle computer to send IP periodic data instructions; S2-6: After receiving the instruction to send IP periodic data, the vehicle computer prepares the IP periodic data and sends the IP periodic data to the instrument; S2-7: After receiving the IP periodic data, the instrument displays the updated periodic data through the instrument user interface.

3. The method for operating the after-installation working instrument according to claim 2, characterized in that: Step S3 further includes the following steps: S3-1: If the vehicle computer has responded to the IP cycle data, execute the next step; if it has not responded to the IP cycle data, execute S2; S3-2: Check whether the heartbeat is triggered regularly. If the instrument timer times out, the instrument sends a heartbeat command request to the host. S3-3: After the vehicle computer receives the heartbeat command, it regularly updates the instrument status; if the vehicle computer does not receive any heartbeat packet within three heartbeat cycles, it executes S3-4. If it receives a heartbeat request, it executes this step again; S3-4: Disconnect the TCP connection and wait for the instrument to re-establish the TCP connection.

4. The method for operating the after-installation working instrument according to claim 1, characterized in that: Step S4 further includes the following steps: S4-1: If the vehicle computer has responded to the IP cycle data, execute the next step; if it has not responded to the IP cycle data, execute S2; S4-2: The vehicle computer sends configuration or action control instructions to the instrument; S4-3: After receiving the configuration or action command, the instrument updates the configuration or executes the action, and then feeds back the configuration update status or action execution status to the vehicle computer; S4-4: After receiving the feedback information, the vehicle computer compares it with the configuration or action control instruction sent. If they are consistent, it executes S4-5, otherwise it executes S4-2; S4-5: Over.

5. The method for operating the after-installation working instrument according to claim 1, characterized in that: Step S5 further includes the following steps: S5-1: TCP connection established; S5-2: The vehicle computer sends a request for part number and FW information to the instrument panel, and the instrument panel sends the part number and FW signal to the vehicle computer; S5-3: The vehicle computer selects the corresponding required new FW information based on the instrument's part number and FW information, sends an upgrade request to the instrument, and waits for the instrument to send feedback information; S5-4: If the upgrade is ready, the system executes S5-6. If the upgrade feedback is not received from the meter within the set waiting time, S5-3 is executed again. If the upgrade feedback is not received from the meter after more than three attempts, the system determines the initialization status based on the initialization status feedback from the meter. If the initialization is not completed, the system resends the upgrade request to the meter and waits for the meter to respond three times. S5-5: If the vehicle computer does not receive the upgrade information fed back by the instrument, the vehicle computer disconnects the TCP connection, records the failure to receive the upgrade information fed back by the instrument in the error log, and executes S5-7; S5-6: New FW transmission is performed; S5-7: Execute S1.

6. The method for operating the after-installation working instrument according to claim 1, characterized in that: Step S5-6 further includes the following steps: S5-6-1: The vehicle computer sends a request to the instrument to check the new FW information; S5-6-2: The instrument checks the FW information and resources, and sends the checked FW information and resource information to the vehicle computer; S5-6-3: The vehicle computer prepares a new FW data packet based on the received FW information and resource information, and sends the data packet to the instrument cluster; S5-6-4: After all FW data packets are sent, verify the integrity of the FW data. S5-6-5: The vehicle computer records the new FW data detection results of the instrument; S5-6-6: End.

7. The method for operating the after-installation working instrument according to claim 6, characterized in that: Step S5-6-3 further includes the following steps: S5-6-3-1: The vehicle computer divides the prepared new FW information data packet into packets and sends each sub-packet data to the instrument in turn. After each sub-packet data is sent, it waits for the instrument to respond before sending the next sub-packet data. S5-6-3-2: If the sub-packet information feedback from the instrument is received, execute S5-6-3-4; if the instrument feedback information is not received within the set sub-packet data feedback information waiting time, resend the sub-packet data and continue to wait for the instrument feedback; if the instrument feedback information is not received after three repetitions, execute the next step; S5-6-3-3: Re-execute step S5-6-3-1. At the same time, the vehicle computer disconnects the TCP connection with the instrument cluster and records the error of the FW information data packet in the error log. S5-6-3-4: If the information feedback from the instrument received by the vehicle computer is incomplete or the sub-packet sequence number is inconsistent with the sub-packet sequence number sent, the vehicle computer disconnects the TCP connection with the instrument and records the error in the error log.

8. The method for operating the after-installation working instrument according to claim 6, characterized in that: Step S5-6-4 also includes the following steps: S5-6-4-1: The vehicle computer sends a command to check the new FW data to the instrument and waits for the instrument to respond; S5-6-4-2: After receiving the instruction to verify the integrity of the new FW data, the instrument checks the integrity of the new FW data and feeds back the test results to the vehicle computer. If the vehicle computer does not receive the test results from the instrument within the set waiting time, it executes S5-6-4-3. If it receives the test results from the instrument, it executes S5-6-4-4. S5-6-4-3: Resend the new FW data verification command to the instrument and wait for the instrument to respond. If no test result is received after two repetitions, the vehicle computer disconnects the TCP connection with the instrument and records the integrity test result in the error log. S5-6-4-4: End.

9. A post-installed working instrument operation system, characterized in that: include: a memory having a computer program stored thereon; A processor is used to execute the program in the memory to implement the after-sales working instrument operation method according to any one of claims 1 to 8.

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