High-precision polishing and grinding treatment method for small-size GaN / diamond integrated chip
By forming a photocurable resin protective layer on the surface of the GaN/diamond integrated chip, the damage problem of the Si bonding layer is solved, high-precision polishing and etching are achieved, the device performance and quality are improved, and the processing flow is simplified.
Patent Information
- Application Number
- CN202511190414.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-08-25
- Publication Date
- 2025-09-19
- Estimated Expiration
- 2045-08-25
AI Technical Summary
In the existing technology, during the polishing and etching process of small-sized GaN/diamond integrated chips, the Si bonding layer is easily damaged and the etching is uneven, which affects the device performance.
A photocurable resin protective layer is formed around the GaN/diamond integrated chip and on the surface of the diamond layer. Stereolithography is used for molding, chemical mechanical polishing and etching, and subsequent heat treatment is used to remove the protective layer and protect the Si bonding layer.
Polishing and etching can be completed without damaging the Si bonding layer, thereby improving the performance and quality of the device, reducing the porosity, simplifying the processing flow, and reducing costs.
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Figure CN120674315A_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the technical field of semiconductor devices, and more particularly, relates to a high-precision polishing method for a small-sized GaN / diamond integrated chip. Background Art
[0002] Third-generation semiconductors, represented by gallium nitride (GaN), are widely used in aerospace and 5G communications due to their wide bandgap, high thermal conductivity, and excellent electron mobility and saturation drift velocity. Power chips fabricated with GaN can withstand temperatures up to 600°C, offering both high energy efficiency and stability, and are expected to completely replace traditional Si-based power devices in the future. As industrialization progresses, chip sizes continue to shrink, and performance requirements for power devices are also increasing. GaN power devices often use substrate materials such as sapphire and Si, with a buffer layer added between the GaN and substrate, increasing the interfacial thermal resistance. Consequently, due to the limitations of traditional substrate materials and buffer layers, even packages with good heat dissipation performance cannot meet the rapid heat dissipation requirements of GaN power devices during operation, significantly reducing device performance. Diamond, as the material with the highest thermal conductivity in nature, boasts exceptional thermal conductivity (22 W / cm·K). Its use to aid heat dissipation in GaN power devices—integrated GaN / diamond—is a common approach in the semiconductor industry today.
[0003] GaN and diamond bonding technology is different from heteroepitaxial technology, which uses one of GaN or diamond as the basis to grow the other. It integrates separately grown GaN and diamond together through bonding, avoiding the impact of high-temperature growth environment on the GaN and diamond intermediate layer. At the same time, the technology for growing GaN and diamond separately is mature, has good quality, and can also be post-processed.
[0004] However, domestic technology for etching GaN / diamond integrated wafers still has certain limitations. This is primarily due to the current inability to grow large-scale diamonds on a large scale. Domestic semiconductor etching technology is primarily targeted at first- and second-generation semiconductors, such as Si and InP, and is typically suitable for sizes of 6, 8, and 12 inches. Due to the limitations of diamond growth size, GaN / diamond integrated wafers are generally smaller than 2 inches, making them generally unsuitable for domestic etching equipment. These require additional processing, such as the use of fixtures and assembly of multiple wafers. However, GaN / diamond integrated wafers are primarily used in high-precision packaging. The use of fixtures can result in uneven stress distribution during etching, leading to wafer cracking and deformation. Furthermore, when multiple GaN / diamond integrated wafers are assembled and bonded to a large substrate for etching, stress concentration can occur. Furthermore, uneven etching can occur in the gaps between adjacent wafers, impurity accumulation can affect etching quality, and etching fluid can penetrate the bonding layer, corroding the bonding layer and causing failure. The multi-piece assembly and bonding method requires a certain number of GaN / diamond integrated wafers to be carried out, and the bonding and disassembly processes increase the number of operation steps, seriously affecting the etching efficiency.
[0005] Chemical Mechanical Polishing (CMP) is a key technology process for achieving wafer surface flatness in the integrated circuit manufacturing process. This technology removes impurities and oxides from the wafer surface through the synergistic effect of chemical etching and mechanical grinding, thereby achieving sub-nanometer flatness. It includes steps such as surface preparation, chemical reaction, mechanical grinding, cleaning, and inspection cycles. However, at the end of high-precision polishing, the substrate still needs to be etched. The bonding intermediate layer of GaN / diamond integrated wafers usually uses a Si layer. The polishing liquid and etching solution will corrode the intermediate layer of the integrated wafer, resulting in structural damage and performance degradation of the GaN / diamond integrated wafer. Therefore, it is necessary to develop a method to solve the polishing and etching problems of small-sized GaN / diamond integrated wafers. Summary of the Invention
[0006] The purpose of the present invention is to provide a high-precision polishing method for a small-sized GaN / diamond integrated wafer, so as to complete the polishing and etching of the GaN / diamond integrated wafer without damaging the Si bonding intermediate layer of the GaN / diamond integrated wafer.
[0007] To achieve the above objectives, the present invention provides a high-precision polishing method for a small-sized GaN / diamond integrated wafer, wherein the GaN / diamond integrated wafer includes a Si bonding layer connected between a GaN layer and a diamond layer, and comprises the following steps: S1, performing impurity removal pretreatment on the substrate layer of the GaN / diamond integrated chip; S2, performing a first stereolithography process on the GaN / diamond integrated chip to form a first photocurable resin protective layer on four sides of the GaN / diamond integrated chip; S3, performing chemical mechanical polishing on the substrate layer of the GaN / diamond integrated wafer to partially remove the substrate layer; S4, performing a second stereolithography process on the GaN / diamond integrated chip to form a second photocurable resin protective layer on the surface of the diamond layer of the GaN / diamond integrated chip; S5, etching the GaN / diamond integrated wafer to completely remove the substrate layer; S6. Performing a heat treatment on the GaN / diamond integrated wafer to remove the first photocurable resin protective layer and the second photocurable resin protective layer.
[0008] Furthermore, the first photocurable resin protective layer and the second photocurable resin protective layer each contain the following components: 50~60wt% hydroxyethyl methacrylate, 6~16wt% polyethylene glycol diacrylate, 21.5~23.5wt% diphenoxyethanol, 10~12wt% 2,4,6-trimethylbenzoyl, and 0.4~0.6wt% Sudan Red G.
[0009] Furthermore, the scanning rate during the first stereolithography molding and the second stereolithography molding is 2000-4000 mm / s, and the printing power is 75-85%.
[0010] Furthermore, the thickness of the first photocurable resin protective layer and the second photocurable resin protective layer are each 50-100 μm.
[0011] Furthermore, the pretreatment comprises the following steps: The substrate layer of the GaN / diamond integrated chip is placed in an aqueous solution containing ammonia and hydrogen peroxide for ultrasonic cleaning, and then rinsed with clean water and ethanol in sequence and blown dry; The substrate layer of the GaN / diamond integrated chip is placed in an aqueous solution containing hydrochloric acid and hydrogen peroxide for ultrasonic cleaning, and then rinsed with clean water and ethanol in sequence and blown dry.
[0012] Furthermore, the polishing liquid for chemical mechanical polishing is an aqueous solution containing potassium hydroxide and hydrogen peroxide.
[0013] Furthermore, the etching solution used in the etching process is a tetramethylammonium hydroxide solution.
[0014] Furthermore, the heat treatment is carried out in air at a temperature of 50-150°C.
[0015] Furthermore, the substrate layer is any one of sapphire, SiC, and Si.
[0016] Furthermore, a buffer layer is provided between the substrate layer and the GaN layer.
[0017] Compared with the prior art, the present invention has the following technical effects: The present invention discloses a high-precision polishing method for a small-sized GaN / diamond integrated wafer. Before chemical mechanical polishing and etching of the GaN / diamond integrated wafer, a photocurable resin protective layer is 3D printed around the GaN / diamond integrated wafer through stereolithography, and then chemical mechanical polishing is performed, thereby preventing the polishing liquid from corroding and damaging the Si bonding layer. After the chemical mechanical polishing is completed, a photocurable resin protective layer is 3D printed on the diamond layer again, and then etching is performed. The resin protective layer formed by the two photocuring processes can fully inhibit the etching liquid from penetrating into the interior of the GaN / diamond integrated wafer, effectively protecting the Si bonding layer, and the photocurable resin protective layer can be completely removed by heat treatment. The high-precision polishing method of the present invention can complete the polishing and etching of the GaN / diamond integrated wafer without damaging the Si bonding intermediate layer of the small-sized GaN / diamond integrated wafer. The processing method is relatively simple and takes into account the advantages of high precision and low-cost protection of 3D printing. Compared with other polishing methods, the porosity change of the bonding layer of the GaN / diamond integrated wafer obtained by the method of the present invention has a significant decrease, indicating that the processing method of the present invention has the least impact on the GaN / diamond integrated wafer, and the obtained GaN / diamond integrated wafer has better performance and better quality. BRIEF DESCRIPTION OF THE DRAWINGS
[0018] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.
[0019] Figure 1 A schematic structural diagram of a small-sized GaN / diamond integrated wafer provided in an embodiment of the present invention; Figure 2 A porosity test chart of the Si bonding layer of the original GaN / diamond integrated wafer provided in an embodiment of the present invention; Figure 3 This is a porosity test graph of the Si bonding layer of the GaN / diamond integrated chip after being processed by Example 1 of the present invention; Figure 4 This is a porosity test graph of the Si bonding layer of the GaN / diamond integrated chip after being processed in Comparative Example 1 of the present invention; Figure 5 This is a porosity test diagram of the Si bonding layer of the GaN / diamond integrated chip after being processed in Comparative Example 2 of the present invention.
[0020] Figure 2-5 In the figure, the red part represents the location where pores appear.
[0021] in, Figure 1 The accompanying drawings are marked as follows: 1. Substrate layer, 2. Buffer layer, 3. GaN layer, 4. Si bonding layer, 5. Diamond layer. DETAILED DESCRIPTION
[0022] In order to make the technical problems, technical solutions and beneficial effects to be solved by the present invention more clearly understood, the present invention is further described in detail below in conjunction with the embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.
[0023] The terms used in the embodiments of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. The singular forms "a", "an", "the" and "the" used in the embodiments of the present invention and the appended claims are also intended to include plural forms unless the context clearly indicates otherwise.
[0024] The terms "first" and "second" are used solely for descriptive purposes to distinguish objects, such as substances, from one another and should not be construed as indicating or implying relative importance or implicitly specifying the quantity of the technical features being referred to. For example, a first XX could also be referred to as a second XX, and similarly, a second XX could also be referred to as a first XX, without departing from the scope of the embodiments of the present invention. Thus, features defined as "first" or "second" may explicitly or implicitly include one or more of such features.
[0025] An embodiment of the present invention provides a high-precision polishing method for a small-sized GaN / diamond integrated wafer, wherein the GaN / diamond integrated wafer includes a Si bonding layer connected between a GaN layer and a diamond layer, and comprises the following steps: S1. Pre-treating the substrate layer of the GaN / diamond integrated chip to remove impurities; S2. Performing a first stereolithography process on the GaN / diamond integrated chip to form a first photocurable resin protective layer on all four sides of the GaN / diamond integrated chip; S3, performing chemical mechanical polishing on the substrate layer of the GaN / diamond integrated wafer to partially remove the substrate layer; S4, performing a second stereolithography process on the GaN / diamond integrated chip to form a second photocurable resin protective layer on the surface of the diamond layer of the GaN / diamond integrated chip; S5. Etching the GaN / diamond integrated wafer to completely remove the substrate layer; S6. Performing heat treatment on the GaN / diamond integrated chip to remove the first photocurable resin protective layer and the second photocurable resin protective layer.
[0026] A high-precision polishing method for a small-sized GaN / diamond integrated wafer according to an embodiment of the present invention is applicable to a GaN / diamond integrated wafer containing a Si bonding layer, that is, the GaN / diamond integrated wafer includes a Si bonding layer connected between a GaN layer and a diamond layer, and the small size refers to a size of less than 2 inches. Furthermore, a buffer layer is provided between the substrate layer and the GaN layer of the GaN / diamond integrated wafer. For example, in a specific embodiment, the GaN / diamond integrated wafer includes a substrate layer 1, a buffer layer 2, a GaN layer 3, a Si bonding layer 4, and a diamond layer 5 stacked in sequence, as shown in FIG. Figure 1 As shown, the GaN / diamond integrated chip is prepared by using the existing GaN and diamond bonding technology. For example, a Si-based GaN chip (a Si-based GaN chip with an AlN buffer layer) and a diamond chip are placed in a bonding machine, and Si is used as an intermediate layer. After bonding according to the existing bonding technology, the GaN / diamond integrated chip is obtained. Figure 1 The GaN / diamond integrated chip shown in FIG. The substrate layer 1 can be any one of sapphire, SiC, and Si. For example, in a specific embodiment, the substrate layer 1 is Si and the buffer layer 2 is AlN.
[0027] In the above step S1, in a specific embodiment, the pre-processing includes the following steps: (1) The substrate layer of the GaN / diamond integrated chip is ultrasonically cleaned in an aqueous solution containing ammonia and hydrogen peroxide. The substrate is then rinsed with clean water, ethanol (alcohol), and blown dry. Specifically, the volume ratio of ammonia to hydrogen peroxide in the aqueous solution is 1:1:5. This ultrasonic cleaning step can remove organic impurities on the surface of the GaN / diamond integrated chip.
[0028] (2) The substrate layer of the GaN / diamond integrated chip is ultrasonically cleaned in an aqueous solution containing hydrochloric acid and hydrogen peroxide, followed by rinsing with clean water and ethanol and drying. Specifically, the volume ratio of hydrochloric acid to hydrogen peroxide in the aqueous solution is hydrochloric acid: hydrogen peroxide: water = 1:1:6. This ultrasonic cleaning step can remove metal impurities on the surface of the GaN / diamond integrated chip.
[0029] The embodiment of the present invention removes metal impurities and organic impurities on the surface of the GaN / diamond integrated chip through the above-mentioned pretreatment steps to ensure that subsequent processes such as forming a photocurable resin protective layer and chemical mechanical polishing can be well implemented.
[0030] In the above steps S2 and S4, the embodiment of the present invention forms a first photocurable resin protective layer and a second photocurable resin protective layer on the four sides of the GaN / diamond integrated chip and the surface of the diamond layer respectively through stereolithography molding technology (SLA, Stereo Lithography Apparatus). Stereolithography molding can make the photocurable resin solidify layer by layer on the surface of the GaN / diamond integrated chip, ensuring the accuracy and efficiency of the entire 3D printing process. The formed photocurable resin can be coated on the four sides of the GaN / diamond integrated chip and the surface of the diamond layer, so that the GaN / diamond integrated chip can be protected from the influence of subsequent polishing liquid and etching liquid. The composition structure of the first photocurable resin protective layer and the second photocurable resin protective layer can be exactly the same, that is, the photocurable resin liquid with the same formula is used for 3D printing.
[0031] The embodiment of the present invention selects a photocurable resin formula that can adhere well to the four sides of the GaN / diamond integrated chip and the surface of the diamond layer and can form a dense resin protective layer after photocuring. Therefore, the first photocurable resin protective layer and the second photocurable resin protective layer formed by 3D printing can play a good protective role for the GaN / diamond integrated chip coated therein, and can effectively prevent the polishing liquid and the etching liquid from penetrating into the interior of the GaN / diamond integrated chip.
[0032] The formula composition of the first photocurable resin protective layer and the second photocurable resin protective layer, as well as the control of the scanning rate and printing power during 3D printing are crucial to whether an effective protective layer can be formed on the surface of the GaN / diamond integrated chip. After experimental design and screening, the embodiment of the present invention preferably selected the following formula composition of the first photocurable resin protective layer and the second photocurable resin protective layer, each containing the following components: 50~60wt% hydroxyethyl methacrylate, 6~16wt% polyethylene glycol diacrylate, 21.5~23.5wt% diphenoxyethanol, 10~12wt% 2,4,6-trimethylbenzoyl, and 0.4~0.6wt% Sudan Red G; at the same time, the suitable scanning rate is preferably 2000~4000mm / s and the printing power is 75~85%.
[0033] In one embodiment, the thickness of the first photocurable resin protective layer and the second photocurable resin protective layer are respectively 50-100 μm. By forming protective layers of appropriate thickness on the four sides of the GaN / diamond integrated chip and the surface of the diamond layer, the GaN / diamond integrated chip can be effectively protected.
[0034] In the above step S3, the polishing liquid of the chemical mechanical polishing of the embodiment of the present invention is an aqueous solution containing potassium hydroxide and hydrogen peroxide. In a specific embodiment, the polishing pad uses foamed polyurethane for grinding, and the components of the polishing liquid are potassium hydroxide and hydrogen peroxide solution, and the volume ratio of the three is potassium hydroxide: hydrogen peroxide: water = 2:4:1. Most of the substrate layer is removed by chemical mechanical polishing, while a small part of the substrate layer is retained for removal by a subsequent etching process. In this way, the substrate layer of the GaN / diamond integrated chip can be efficiently removed by the combination of chemical mechanical polishing and etching process, while ensuring that no destructive damage is caused to the GaN / diamond integrated chip.
[0035] In the above step S5, the etching solution of the embodiment of the present invention is a tetramethylammonium hydroxide solution. The tetramethylammonium hydroxide (TMAH) solution is used for etching to remove the residual Si at the interface between the GaN and Si substrate layers.
[0036] In step S6, the heat treatment in this embodiment of the present invention is performed in air at a temperature of 50°C to 150°C. The heat treatment completely burns off the first and second photocurable resin protective layers. A preferred heat treatment temperature is 100°C to 120°C, which allows for rapid burning of the photocurable resin protective layers on the surface of the GaN / diamond integrated chip while minimizing energy consumption.
[0037] After completing high-precision polishing of the GaN / diamond integrated wafer in an embodiment of the present invention, the GaN / diamond integrated wafer is placed under an ultrasonic scanning microscope to test the porosity of the Si bonding layer of the GaN / diamond integrated wafer. By comparing the porosity changes of the Si bonding layer of the GaN / diamond integrated wafer before and after the treatment, the impact of the polishing method on the performance and quality of the GaN / diamond integrated wafer is evaluated.
[0038] In an embodiment of the present invention, a high-precision polishing method for a small-sized GaN / diamond integrated wafer is provided. Before chemical mechanical polishing and etching of the GaN / diamond integrated wafer, a photocurable resin protective layer is 3D printed around the GaN / diamond integrated wafer through stereolithography, and then chemical mechanical polishing is performed to avoid corrosion damage to the Si bonding layer by the polishing liquid. After the chemical mechanical polishing is completed, a photocurable resin protective layer is 3D printed on the diamond layer again, and then etching is performed. The resin protective layer formed by the two photocuring processes can fully inhibit the etching liquid from penetrating into the interior of the GaN / diamond integrated wafer, effectively protecting the Si bonding layer, and the photocurable resin protective layer can be completely removed by heat treatment. The high-precision polishing method of the embodiment of the present invention can complete the polishing and etching of the GaN / diamond integrated wafer without damaging the Si bonding intermediate layer of the small-sized GaN / diamond integrated wafer. The processing method is relatively simple and takes into account the advantages of high precision and low-cost protection of 3D printing. Compared with other polishing methods, the porosity change of the bonding layer of the GaN / diamond integrated wafer obtained by the method of the embodiment of the present invention has a significant decrease, indicating that the processing method of the embodiment of the present invention has the least impact on the GaN / diamond integrated wafer, and the obtained GaN / diamond integrated wafer has better performance and better quality.
[0039] The following describes a high-precision polishing method for a small-sized GaN / diamond integrated wafer according to an embodiment of the present invention through a number of specific embodiments.
[0040] Example 1 Embodiment 1 of the present invention provides a high-precision polishing method for a small-sized GaN / diamond integrated wafer, comprising the following steps: S1. Sample pretreatment: Figure 1 The GaN / diamond integrated chip (substrate layer 1: Si, 725μm thick; buffer layer 2: AlN, 500nm thick; GaN layer 3: 1.5μm thick) was placed in a 600μm-deep groove. The groove was cleaned in a solution of ammonia and hydrogen peroxide at a volume ratio of 1:1:5. The groove was cleaned in an ultrasonic cleaner at 75°C for 12 minutes to remove organic impurities. After rinsing with water, the chip was rinsed in alcohol for 20 seconds, removed, and dried with argon. After cleaning, the chip was placed in a 600μm-deep groove again. The groove was cleaned in a solution of hydrochloric acid and hydrogen peroxide at a volume ratio of 1:1:6. The groove was cleaned in an ultrasonic cleaner at 75°C for 12 minutes to remove metallic impurities. After rinsing with water, the chip was rinsed in alcohol for 20 seconds, removed, and dried with argon.
[0041] S2. Preparation of a photocuring agent: The photocuring agent is composed of: 60 wt% hydroxyethyl methacrylate (HEMA), 6 wt% polyethylene glycol diacrylate (TEGDA), 21.5 wt% diphenoxyethanol (POE), 12 wt% 2,4,6-trimethylbenzoyl (TPO), and 0.5 wt% Sudan Red G. These materials were mixed in the appropriate proportions, stirred in a water bath at 10°C, and then placed in a vacuum mixer to remove air bubbles.
[0042] S3, preparation of photocurable resin protective layer: Place the GaN / diamond integrated chip on the circular lifting platform of SLA, with a rectangular notch in the middle of the lifting platform, which allows the GaN / diamond integrated chip to be placed on its side and lowered until the side of the integrated chip is flush with the table. The relevant preparation parameters are as follows: scanning path spacing of 70μm, laser spot diameter of 30μm, table descending layer spacing of 0.5μm, scanning rate of 3000mm / s, printing power of 85%, supply delay of 200ms, scraper rate of 40mm / s, laser wavelength of 405nm, and number of printing layers of 100. Use the photocuring agent of S2 to cure once on each of the four sides of the GaN / diamond integrated chip, and prepare a 50μm thick first photocurable resin protective layer on all four sides of the GaN / diamond integrated chip, wherein the first layer of cured thickness is 18~20μm. Then take it out and use an argon gas gun to blow dry the residual liquid organic matter on the GaN / diamond integrated chip.
[0043] S4. Chemical mechanical polishing: The GaN / diamond integrated chip is fixed in the polishing area using vacuum suction so that the bottom diamond layer fits tightly with the base. The polishing pad uses foamed polyurethane for grinding. The polishing liquid consists of potassium hydroxide and hydrogen peroxide solution, with the volume ratio of potassium hydroxide: hydrogen peroxide: water = 2:4:1. At the same time, turn on the laser, calibrate the distance between the base and the grinding wheel, and determine the polishing position. During the pre-polishing stage, the grinding wheel pressure is 1.5psi and the rotation speed is 30rpm to avoid impact damage. Then gradually increase the pressure to 4.5psi and the rotation speed to 115rpm. The polishing liquid input flow rate of the multi-hole nozzle is 260ml / min, and the polishing temperature is maintained at 25°C. When the Si substrate layer is polished to only 0.5μm, the polishing is stopped by monitoring the laser film thickness meter. The GaN / diamond integrated chip is removed, rinsed with clean water, and blown dry with an argon air gun.
[0044] S5. Secondary preparation of a photocurable resin protective layer: Using the same parameters and methods, place the GaN / diamond integrated chip Si substrate layer facing downward on the circular lifting table of the SLA, use the S2 photocuring agent to prepare a 50μm thick second photocurable resin protective layer on the diamond surface, and use an argon gas gun to blow dry the residual liquid organic matter on the GaN / diamond integrated chip.
[0045] S6, Etching and Heat Treatment: With the chemically mechanically polished Si substrate facing upward, etch with a tetramethylammonium hydroxide (TMAH) solution to remove any residual Si at the interface between the GaN layer and the Si substrate. Rinse with clean water and heat-treat the GaN / diamond integrated wafer with the resin protective layer in a tube furnace at 120°C in air for 10 minutes to fully burn the protective resin. After cooling naturally, rinse with water and alcohol.
[0046] S7. Testing: The cleaned GaN / diamond integrated chip was blown dry with argon gas and placed under an ultrasonic scanning microscope to test the porosity of the Si bonding layer. At the same time, the porosity of the Si bonding layer of the original GaN / diamond integrated chip, that is, the GaN / diamond integrated chip before polishing, was tested. The test showed that the porosity of the Si bonding layer of the original GaN / diamond integrated chip was 3.79%, as shown in the test figure. Figure 2 As shown; the porosity of the Si bonding layer of the GaN / diamond integrated chip after polishing in this embodiment is 8.31%, and the test diagram is as follows Figure 3 As shown in the figure, the porosity of the Si bonding layer is increased by 119.26% compared with the original GaN / diamond integrated wafer.
[0047] The following Examples 2 to 9 investigate the effects of different scanning rates and printing powers on the formed photocurable resin protective layer during 3D printing. The formulation of the photocuring agent is the same as in Example 1, and other process conditions are the same as in Example 1. The thickness of the first cured layer is used to evaluate the formation of the photocurable resin protective layer and the strength of its adhesion to the GaN / diamond integrated chip. The greater the thickness of the first cured layer, the tighter the adhesion between the photocurable resin protective layer and the GaN / diamond integrated chip, and the better the subsequent protection effect on the GaN / diamond integrated chip.
[0048] The scanning rate, printing power, first layer curing thickness, and evaluation results of Examples 1 to 9 are shown in Table 1 below.
[0049] Table 1 ; The following Examples 10 to 17 investigate the effects of different photocuring agent formulations on the photocurable resin protective layer formed. The scanning rate, printing power, and other process conditions are the same as those in Example 1. The thickness of the first cured layer is used to evaluate the formation of the photocurable resin protective layer and the strength of its adhesion to the GaN / diamond integrated chip.
[0050] The formulation composition, first-layer cured thickness, and evaluation results of the photocuring agents of Examples 1 and 10 to 17 are shown in Table 2 below.
[0051] Table 2 ; In Tables 1 and 2 above, "the bottom layer failed due to damage by the scraper" indicates that the stability of the photocurable resin after molding is very poor; the evaluation result of "excellent" means that the photocurable resin protective layer can form a good and effective protection effect on the GaN / diamond integrated chip, the evaluation result of "general" means that the photocurable resin protective layer can form a certain protection effect on the GaN / diamond integrated chip, but the protection effect is general, and the evaluation result of "poor" means that the photocurable resin protective layer cannot be formed on the surface of the GaN / diamond integrated chip.
[0052] Comparative Example 1 S1. Sample pretreatment: the same as the pretreatment steps in Example 1.
[0053] S2. Chemical mechanical polishing: The chemical mechanical polishing steps are the same as those in Example 1.
[0054] S3, etching: the same as the etching step in Example 1.
[0055] S4. Testing: The cleaned GaN / diamond integrated chip was blown dry with argon gas and placed under an ultrasonic scanning microscope to test the porosity of the Si bonding layer. The test showed that the porosity of the Si bonding layer of the GaN / diamond integrated chip after polishing was 40.43%. Figure 4 As shown in the figure, compared with the original GaN / diamond integrated wafer, the porosity of the Si bonding layer is increased by 966.75%.
[0056] Comparative Example 2 S1. Sample pretreatment: the same as the pretreatment steps in Example 1.
[0057] S2. Chemical mechanical polishing: The chemical mechanical polishing steps are the same as those in Example 1.
[0058] S3. Precision polishing: Place the GaN / diamond integrated chip on a nanosecond pulse fiber laser for fine polishing: Use vacuum suction to fix the GaN / diamond integrated chip in the polishing area, the table tilt angle is 3.5°, the laser is perpendicular to the table base, the wavelength is 355nm, the pulse is 10ns, the repetition frequency is 60kHz, the exposure time is 100μs, and the power is 600mW.
[0059] S4. Inspection: After polishing with nanosecond pulse fiber laser, the GaN / diamond integrated chip was removed and rinsed with water, dried with argon gas, and placed under an ultrasonic scanning microscope to test the porosity of the Si bonding layer. The test showed that the porosity of the Si bonding layer of the GaN / diamond integrated chip after polishing in this comparative example was 20.83%. Figure 5 As shown in the figure, the porosity of the Si bonding layer is increased by 449.60% compared with the original GaN / diamond integrated wafer.
[0060] The porosity test results of Example 1 of the present invention and Comparative Examples 1 and 2 show that the method of Example 1 of the present invention has the least impact on the Si bonding layer of the original GaN / diamond integrated chip, and the obtained GaN / diamond integrated chip has better performance and better quality.
[0061] The above embodiments merely illustrate several implementations of the present invention, and while their descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the present invention. It should be noted that a person skilled in the art would be able to make numerous modifications and improvements without departing from the spirit of the present invention, all of which fall within the scope of protection of the present invention. Therefore, the scope of protection of the present invention shall be determined by the appended claims.
Claims
1. A high-precision polishing method for a small-sized GaN / diamond integrated wafer, wherein the GaN / diamond integrated wafer comprises a Si bonding layer connected between a GaN layer and a diamond layer, characterized in that: The following steps are involved: S1, performing impurity removal pretreatment on the substrate layer of the GaN / diamond integrated chip; S2, performing a first stereolithography process on the GaN / diamond integrated chip to form a first photocurable resin protective layer on four sides of the GaN / diamond integrated chip; S3, performing chemical mechanical polishing on the substrate layer of the GaN / diamond integrated wafer to partially remove the substrate layer; S4, performing a second stereolithography process on the GaN / diamond integrated chip to form a second photocurable resin protective layer on the surface of the diamond layer of the GaN / diamond integrated chip; S5, etching the GaN / diamond integrated wafer to completely remove the substrate layer; S6. Performing a heat treatment on the GaN / diamond integrated wafer to remove the first photocurable resin protective layer and the second photocurable resin protective layer.
2. The high-precision polishing method for a small-sized GaN / diamond integrated wafer according to claim 1, characterized in that: The first photocurable resin protective layer and the second photocurable resin protective layer each contain the following components: 50-60 wt % hydroxyethyl methacrylate, 6-16 wt % polyethylene glycol diacrylate, 21.5-23.5 wt % diphenoxyethanol, 10-12 wt % 2,4,6-trimethylbenzoyl, and 0.4-0.6 wt % Sudan Red G.
3. The high-precision polishing method for a small-sized GaN / diamond integrated wafer according to claim 1, wherein: The scanning rate during the first stereolithography molding and the second stereolithography molding is 2000-4000 mm / s, and the printing power is 75-85%.
4. The high-precision polishing method for a small-sized GaN / diamond integrated wafer according to claim 2, wherein: The thickness of the first photocurable resin protective layer and the second photocurable resin protective layer is 50 to 100 μm respectively.
5. The high-precision polishing method for a small-sized GaN / diamond integrated wafer according to claim 1, wherein: The pretreatment comprises the following steps: The substrate layer of the GaN / diamond integrated chip is placed in an aqueous solution containing ammonia and hydrogen peroxide for ultrasonic cleaning, and then rinsed with clean water and ethanol in sequence and blown dry; The substrate layer of the GaN / diamond integrated chip is placed in an aqueous solution containing hydrochloric acid and hydrogen peroxide for ultrasonic cleaning, and then rinsed with clean water and ethanol in sequence and blown dry.
6. The high-precision polishing method for a small-sized GaN / diamond integrated wafer according to claim 1, characterized in that: The polishing liquid for chemical mechanical polishing is an aqueous solution containing potassium hydroxide and hydrogen peroxide.
7. The high-precision polishing method for a small-sized GaN / diamond integrated wafer according to claim 1, characterized in that: The etching solution for the etching process is tetramethylammonium hydroxide solution.
8. The high-precision polishing method for a small-sized GaN / diamond integrated wafer according to claim 1, characterized in that: The heat treatment is carried out in air at a temperature of 50-150°C.
9. A high-precision polishing method for a small-sized GaN / diamond integrated wafer according to any one of claims 1 to 8, characterized in that: The substrate layer is any one of sapphire, SiC, and Si.
10. The high-precision polishing method for a small-sized GaN / diamond integrated wafer according to claim 9, characterized in that: A buffer layer is provided between the substrate layer and the GaN layer.
Citation Information
Patent Citations
Transverse diamond / GaN / diamond substrate for manufacturing GaN HEMT (High Electron Mobility Transistor) and preparation method
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Gallium nitride semiconductor structure on diamond substrate and process for fabricating thereof
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CMP polishing solution and polishing method using same
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GaN / DIAMOND WAFERS
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Method for preparing GAN single crystal substrate
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