GaN-HEMT epitaxial structure, integrated chip of GaN device wafer and driving wafer and preparation method

Abstract

The invention provides a GaN-HEMT epitaxial structure, an integrated chip of a GaN device wafer and a driving wafer and a preparation method, the GaN-HEMT epitaxial structure comprises a functional substrate, a dielectric layer and a first epitaxial layer, the dielectric layer and the first epitaxial layer are sequentially arranged on the functional substrate, the first epitaxial layer comprises a GaN channel layer and an AlGaN barrier layer, the GaN channel layer and the AlGaN barrier layer are sequentially arranged on the dielectric layer, and the GaN channel layer and the AlGaN barrier layer are sequentially arranged on the functional substrate. And the dielectric layer is used for bonding the GaN channel layer and the functional substrate. According to the invention, the long-term stability and reliability of a GaN device prepared based on the GaN-HEMT epitaxial structure can be improved.

Description

Technical Field

[0001] The present invention belongs to the technical field of semiconductor devices, and in particular relates to a GaN-HEMT epitaxial structure, an integrated chip of a GaN device wafer and a driver wafer, and a preparation method thereof. Background Art

[0002] As a representative of third-generation compound semiconductors, gallium nitride (GaN) offers broad application prospects in electronics and optoelectronic devices due to its advantages over silicon, including a wide bandgap, high electron saturation mobility, and high critical breakdown field strength. However, for both electronic and optoelectronic devices, the crystal quality of the material is a key factor in determining device performance.

[0003] Because GaN bulk single crystals are expensive and available in small sizes, the current growth of GaN-based materials all uses heteroepitaxial growth, and the substrates for heteroepitaxial growth include silicon, sapphire, silicon carbide, etc. Existing heteroepitaxial substrates all have large lattice mismatches and thermal expansion coefficient mismatches with GaN-based materials. When growing Group III nitride films on these substrates, there are high levels of crystal defects, which seriously affect the quality of the film crystals and, in turn, the performance of the device. Moreover, the closer to the substrate interface, the higher the dislocation density. Specifically, in the early stages of epitaxial growth, a large number of threading dislocations exist in the substrate interface, nucleation layer, and buffer layer. During the epitaxial growth process, the dislocations will turn, merge, or annihilate under the influence of stress and other factors. Therefore, as the thickness of the GaN epitaxial layer increases, the dislocation density decreases. Although the core functional layer of the GaN device is located far away from the substrate interface, its defects such as dislocation density will be greatly reduced. However, considering that dislocations will climb / slip under the action of electric / thermal fields, the high-density dislocations at the substrate interface may move toward the core functional layer during the long-term operation of the device, thereby affecting the long-term stability and reliability of the device. Summary of the Invention

[0004] In view of this, the present invention provides a GaN-HEMT epitaxial structure, an integrated chip of a GaN device wafer and a driver wafer, and a preparation method, which can improve the long-term stability and reliability of GaN devices made based on the GaN-HEMT epitaxial structure.

[0005] In order to achieve the above object, the present invention adopts the following technical solutions: In a first aspect, the present invention provides a GaN-HEMT epitaxial structure, comprising a functional substrate, and a dielectric layer and a first epitaxial layer sequentially arranged on the functional substrate, wherein the first epitaxial layer comprises a GaN channel layer and an AlGaN barrier layer sequentially arranged on the dielectric layer, and the dielectric layer is used to bond the GaN channel layer to the functional substrate.

[0006] Preferably, the material of the functional substrate includes at least one of Si, SiC, AlN and diamond; and / or, The material of the dielectric layer includes SiO2, SiN x , at least one of SiON, SiCN, AlN and Al2O3; and / or, The first epitaxial layer further includes a P-GaN layer, and the P-GaN layer is disposed on a side of the AlGaN barrier layer away from the GaN channel layer.

[0007] In a second aspect, the present invention provides a method for preparing the GaN-HEMT epitaxial structure, comprising the following steps: S1. Providing an initial GaN-HEMT epitaxial wafer; wherein the GaN-HEMT epitaxial wafer includes a growth substrate and a second epitaxial layer epitaxially grown on the growth substrate, wherein the second epitaxial layer includes a nucleation layer, a buffer layer, a GaN channel layer, and an AlGaN barrier layer sequentially disposed on the growth substrate; S2. Applying a temporary bonding adhesive on a side of the GaN-HEMT epitaxial wafer away from the growth substrate; S3, temporarily bonding the GaN-HEMT epitaxial wafer to the first temporary substrate using temporary bonding glue; S4, removing the growth substrate, nucleation layer, and buffer layer until the GaN channel layer is exposed; S5. Forming a first dielectric layer and a second dielectric layer on the GaN channel layer and the functional substrate respectively, permanently bonding the GaN-HEMT epitaxial wafer to the functional substrate, and forming a dielectric layer between the GaN channel layer and the functional substrate; S6. Remove the first temporary substrate to obtain a GaN-HEMT epitaxial structure.

[0008] Preferably, in step S1, the second epitaxial layer further includes a C-doped high-resistance layer, and the C-doped high-resistance layer is arranged between the buffer layer and the GaN channel layer; In step S4 , after removing the buffer layer, the C-doped high-resistance layer is also removed until the GaN channel layer is exposed.

[0009] Preferably, in step S1, a growth substrate is provided, and a second epitaxial layer is epitaxially grown on the growth substrate to obtain an initial GaN-HEMT epitaxial wafer; and / or, In step S3, the GaN-HEMT epitaxial wafer is flipped over and then temporarily bonded to a first temporary substrate; and / or, In step S5, the thickness of the first dielectric layer is 1 nm to 100 nm, and the thickness of the second dielectric layer is 1 nm to 500 nm; and / or, In step S5, after forming a first dielectric layer and a second dielectric layer on the GaN channel layer and the functional substrate respectively, the GaN-HEMT epitaxial wafer is flipped over and then permanently bonded to the functional substrate; and / or, In step S5 , the permanent bonding includes hydrophilic bonding.

[0010] In a third aspect, the present invention provides an integrated chip of a GaN device wafer and a driver wafer, comprising: A driving wafer comprising a silicon substrate having a first side and a second side opposite to each other, wherein a driving circuit is formed on the first side of the silicon substrate; and A GaN device wafer is located on a first side of the driver wafer, wherein the GaN device includes a first epitaxial layer, wherein the first epitaxial layer includes an AlGaN barrier layer and a GaN channel layer sequentially arranged in a direction away from the driver wafer; The GaN device wafer is bonded to the driver wafer so that the GaN device is electrically connected to the driver wafer.

[0011] Preferably, the first epitaxial layer further includes a P-GaN layer, and the P-GaN layer is arranged between the AlGaN barrier layer and the driver wafer; and / or, The integrated chip of the GaN device wafer and the driver wafer further includes a passivation layer, wherein the passivation layer is disposed on a side of the GaN channel layer away from the AlGaN barrier layer; and / or, The GaN device wafer further includes a source and a drain. A first pin, a second pin, and a third pin are formed on the second side of the driver wafer for respectively leading out the source, gate, and drain of the GaN device wafer.

[0012] In a fourth aspect, the present invention provides a method for preparing an integrated chip of the GaN device wafer and the driver wafer, comprising the following steps: A1. Providing an initial GaN-HEMT epitaxial wafer; wherein the GaN-HEMT epitaxial wafer includes a growth substrate and a second epitaxial layer epitaxially grown on the growth substrate, wherein the second epitaxial layer includes a nucleation layer, a buffer layer, a GaN channel layer, and an AlGaN barrier layer sequentially disposed on the growth substrate; A2. Device fabrication is performed on the GaN-HEMT epitaxial wafer and corresponding electrodes are derived to obtain an initial GaN device wafer; A3. Design a gate drive circuit and prepare electrodes on the first side of the silicon substrate according to the size of the device on the GaN device wafer to obtain a driver wafer; A4. Permanently bond the GaN device wafer to the driver wafer and connect their corresponding electrodes. A5. Remove the growth substrate, nucleation layer, and buffer layer on the GaN device wafer until the GaN channel layer is exposed, thereby obtaining an integrated chip of the GaN device wafer and the driver wafer.

[0013] Preferably, in step A4, the GaN device wafer is flipped over and then permanently bonded to the driver wafer, and the corresponding electrodes of the two are connected; step A5 includes: A511, remove the growth substrate, nucleation layer and buffer layer on the GaN device wafer until the GaN channel layer is exposed; A512, forming a passivation layer on the GaN channel layer; A513. Thin the silicon substrate from the back, perform TSV etching at the corresponding electrodes, fill with metal to lead the electrodes out from the second side of the driver wafer, and obtain an integrated chip of the GaN device wafer and the driver wafer.

[0014] Preferably, in step A4, the driver wafer is flipped over and then permanently bonded to the GaN device wafer, and the corresponding electrodes of the two are connected; step A5 includes: A521, thin the silicon substrate from the front side, perform TSV etching at the corresponding electrodes, and fill metal to lead the electrodes out from the second side of the driver wafer; A522. Apply temporary bonding glue to the second side of the driver wafer, flip the driver wafer over, and then temporarily bond it to the second temporary substrate. A523, remove the growth substrate, nucleation layer and buffer layer on the GaN device wafer until the GaN channel layer is exposed; A524, forming a passivation layer on the GaN channel layer; A525. Remove the second temporary substrate to obtain an integrated chip of the GaN device wafer and the driver wafer.

[0015] Compared with the prior art, the present invention has the following beneficial effects: (1) The GaN-HEMT epitaxial structure provided by the present invention bonds the GaN channel layer to the functional substrate through a dielectric layer, transfers the first epitaxial layer (core functional layer) to the functional substrate, removes the nucleation layer and the buffer layer with high dislocation density, and can prevent the high-density dislocations in the nucleation layer and the buffer layer from climbing / slipping toward the core functional layer under the action of the electric / thermal field, thereby improving the long-term stability and reliability of the GaN device made based on the GaN-HEMT epitaxial structure; in addition, the core functional layer is transferred to the functional substrate through the dielectric layer, which can realize the heterogeneous integration of the GaN-HEMT epitaxial structure, and the performance of the GaN device can be improved by selecting the functional substrate.

[0016] (2) In the preparation method of the GaN-HEMT epitaxial structure of the present invention, the second epitaxial layer is epitaxially grown on the growth substrate, and the quality of the second epitaxial layer is good. By temporarily bonding the first temporary substrate, removing the growth substrate, the nucleation layer and the buffer layer, and permanently bonding the functional substrate, and removing the first temporary substrate, the substrate peeling and epitaxial layer transfer technology are used to remove the nucleation layer and the buffer layer with a high dislocation density, and the core functional layer is transferred to the functional substrate, the performance of the GaN device prepared based on the GaN-HEMT epitaxial structure 10 can be guaranteed.

[0017] (3) The present invention heterogeneously integrates the GaN device wafer on top of the silicon driving circuit and adopts a mature silicon-based driving design, which can improve the stability of the driving circuit, reduce the loss of the driving circuit, reduce parasitics, and improve the reliability of the circuit system; at the same time, the substrate of the GaN device wafer, the nucleation layer with high dislocation density and the buffer layer are removed. On the one hand, the heat dissipation of the GaN device wafer can be improved and the influence of its temperature rise on the driving wafer can be reduced. On the other hand, the high-density dislocations in the nucleation layer and the buffer layer can be prevented from climbing / slipping toward the core functional layer under the action of the electric / thermal field, thereby improving the long-term stability and reliability of the GaN device wafer, thereby improving the long-term stability and reliability of the integrated chip.

[0018] (4) In the method for preparing an integrated chip of a GaN device wafer and a driver wafer of the present invention, the initial GaN device wafer is flipped over and then permanently bonded to the driver wafer so that the growth substrate of the GaN device wafer faces upward. Then, the growth substrate, the nucleation layer, and the buffer layer are removed from top to bottom to expose the GaN channel layer. Thereafter, a passivation layer is formed on the GaN channel layer, and the silicon substrate is thinned from the back to lead out the electrode. Only one permanent bonding is required, and no other temporary bonding or debonding process is required. The GaN device wafer and the driver wafer can be heterogeneously integrated to obtain an integrated chip.

[0019] (5) In the method for preparing the integrated chip of the GaN device wafer and the driver wafer of the present invention, the driver wafer is flipped over and then permanently bonded to the initial GaN device wafer so that the second side of the silicon substrate of the driver wafer faces upward. Although there is an extra process of temporary bonding of the substrate and debonding and removing the substrate, the silicon substrate is allowed to be thinned to a thinner degree, which can reduce the aspect ratio of the TSV process and make the subsequent TSV and metal filling and interconnection processes easier to implement.

[0020] (6) The present invention removes the high-concentration C-doped high-resistance layer, which can prevent the deep energy level defects introduced by carbon impurities in the high-resistance layer from capturing electrons, thereby improving the dynamic characteristics of the GaN device. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1A schematic structural diagram of an embodiment of a GaN-HEMT epitaxial structure provided by the present invention; Figure 2 This is a flow chart of steps 1 to 4 of an embodiment of a method for preparing a GaN-HEMT epitaxial structure provided by the present invention; Figure 3 This is a flow chart of steps 5 to 7 of an embodiment of the method for preparing a GaN-HEMT epitaxial structure provided by the present invention; Figure 4 This is a schematic structural diagram of an embodiment of an integrated chip of a GaN device wafer and a driver wafer provided by the present invention; Figure 5 This is a flow chart of steps 1 to 3 of an embodiment of a method for preparing an integrated chip of a GaN device wafer and a driver wafer provided by the present invention; Figure 6 This is a flow chart of steps 4 to 6 of an embodiment of a method for preparing an integrated chip of a GaN device wafer and a driver wafer provided by the present invention; Figure 7 This is a flow chart of steps 1 to 3 of another embodiment of the method for preparing an integrated chip of a GaN device wafer and a driver wafer provided by the present invention; Figure 8 This is a flow chart of steps 4 to 5 of another embodiment of the method for preparing an integrated chip of a GaN device wafer and a driver wafer provided by the present invention; Figure 9 This is a flow chart of steps 6 to 8 of another embodiment of the method for preparing an integrated chip of a GaN device wafer and a driver wafer provided by the present invention.

[0022] Description of reference numerals: GaN-HEMT epitaxial structure 10; functional substrate 1; dielectric layer 2; first epitaxial layer 3; GaN channel layer 31; AlGaN barrier layer 32; P-GaN layer 33; driver wafer 20; silicon substrate 201; passivation layer 30. DETAILED DESCRIPTION

[0023] The present invention will be further described in detail below with reference to specific embodiments so that those skilled in the art can understand the present invention more clearly.

[0024] First, see Figure 1 The present invention provides a GaN-HEMT epitaxial structure 10, comprising a functional substrate 1, and a dielectric layer 2 and a first epitaxial layer 3 sequentially arranged on the functional substrate 1, wherein the first epitaxial layer 3 comprises a GaN channel layer 31 and an AlGaN barrier layer 32 sequentially arranged on the dielectric layer 2, and the dielectric layer 2 is used to bond the GaN channel layer 31 to the functional substrate 1.

[0025] The GaN-HEMT epitaxial structure 10 provided by the present invention bonds the GaN channel layer 31 to the functional substrate 1 via the dielectric layer 2, transfers the first epitaxial layer 3 (core functional layer) onto the functional substrate 1, and removes the nucleation layer and buffer layer with high dislocation density. This can prevent high-density dislocations in the nucleation layer and buffer layer from climbing or sliding toward the core functional layer under the action of electric or thermal fields, thereby improving the long-term stability and reliability of GaN devices manufactured based on the GaN-HEMT epitaxial structure 10. In addition, the core functional layer is transferred to the functional substrate 1 via the dielectric layer 2, enabling heterogeneous integration of the GaN-HEMT epitaxial structure 10. The performance of the GaN device can be improved by selecting the functional substrate 1.

[0026] Furthermore, the material of the functional substrate 1 includes at least one of Si, SiC, AlN and diamond. The functional substrate 1 can be a Si substrate, a SiC substrate, an AlN substrate or a diamond substrate.

[0027] Furthermore, the material of the dielectric layer 2 includes SiO2, SiN x , at least one of SiON, SiCN, AlN and Al2O3.

[0028] Furthermore, the first epitaxial layer 3 further includes a P-GaN layer 33, which is disposed on a side of the AlGaN barrier layer 32 away from the GaN channel layer 31. Providing the P-GaN layer 33 can form an enhancement mode device.

[0029] In a second aspect, the present invention provides a method for preparing the GaN device 10, comprising the following steps: S1. Providing an initial GaN-HEMT epitaxial wafer; wherein the GaN-HEMT epitaxial wafer includes a growth substrate and a second epitaxial layer epitaxially grown on the growth substrate, wherein the second epitaxial layer includes a nucleation layer, a buffer layer, a GaN channel layer 31, and an AlGaN barrier layer 32 sequentially disposed on the growth substrate; S2. Applying a temporary bonding adhesive on a side of the GaN-HEMT epitaxial wafer away from the growth substrate; S3, temporarily bonding the GaN-HEMT epitaxial wafer to the first temporary substrate using temporary bonding glue; S4, removing the growth substrate, the nucleation layer, and the buffer layer until the GaN channel layer 31 is exposed; S5. Forming a first dielectric layer 2 and a second dielectric layer 2 on the GaN channel layer 31 and the functional substrate 1 respectively, permanently bonding the GaN-HEMT epitaxial wafer to the functional substrate 1, and forming a dielectric layer 2 between the GaN channel layer 31 and the functional substrate 1; S6 , removing the first temporary substrate to obtain the GaN-HEMT epitaxial structure 10 .

[0030] In the method for preparing the GaN-HEMT epitaxial structure 10 of the present invention, the second epitaxial layer is epitaxially grown on the growth substrate. The second epitaxial layer has good quality. The steps of temporarily bonding the first temporary substrate, removing the growth substrate, nucleation layer, and buffer layer, and permanently bonding the functional substrate 1, and removing the first temporary substrate, utilize substrate peeling and epitaxial layer transfer technology to remove the nucleation layer and buffer layer with a high dislocation density, and transfer the core functional layer to the functional substrate 1. This can ensure the performance of the GaN device prepared based on the GaN-HEMT epitaxial structure 10.

[0031] It should be noted that the method for applying the temporary bonding glue can be spin coating; the first temporary substrate can be a silicon wafer or quartz glass; the method for removing the growth substrate can be selected according to the material of the growth substrate. For the silicon substrate 201, grinding + dry etching can be used, and for the sapphire substrate, laser stripping can be used; the method for removing the nucleation layer and the buffer layer can be to place the GaN-HEMT epitaxial wafer in an ICP machine and use gases such as Cl2 / BCl3 to dry-etch the nucleation layer and the buffer layer, or to place the GaN-HEMT epitaxial wafer in a CMP device and use SiO2 abrasives in a KOH alkaline solution to remove the nucleation layer and the buffer layer by chemical mechanical grinding and polishing; the method for removing the first temporary substrate can be to debond the temporary bonded substrate by heating (the heating temperature is 150~250℃) and then remove the first temporary substrate; after removing the first temporary substrate, it can be cleaned to obtain an epitaxial structure with a clean surface and only the core functional layer placed on the functional substrate 1.

[0032] Furthermore, in step S1, the second epitaxial layer further includes a C-doped high-resistance layer, which is disposed between the buffer layer and the GaN channel layer 31. In step S4, after removing the buffer layer, the C-doped high-resistance layer is also removed until the GaN channel layer 31 is exposed. Removing the high-concentration C-doped high-resistance layer can prevent electron capture due to deep energy level defects introduced by carbon impurities in the high-resistance layer, thereby improving the dynamic characteristics of the GaN device fabricated based on the GaN-HEMT epitaxial structure 10. It should be noted that the C-doped high-resistance layer can be removed by placing the GaN-HEMT epitaxial wafer in an ICP machine and dry-etching the C-doped high-resistance layer using gases such as Cl2 / BCl3, or by placing the GaN-HEMT epitaxial wafer in a CMP machine and removing the C-doped high-resistance layer by chemical mechanical polishing using SiO2 abrasive in a KOH alkaline solution.

[0033] Furthermore, in step S1, a growth substrate is provided, and a second epitaxial layer is epitaxially grown on the growth substrate to obtain an initial GaN-HEMT epitaxial wafer. This preparation provides an initial GaN-HEMT epitaxial wafer, which facilitates quality control of the initial GaN-HEMT epitaxial wafer. It should be noted that the growth substrate may be a sapphire substrate.

[0034] Furthermore, in step S3, the GaN-HEMT epitaxial wafer is flipped over and temporarily bonded to the first temporary substrate. After flipping the GaN-HEMT epitaxial wafer, the growth substrate is facing upward, facilitating the removal of the growth substrate, nucleation layer, and buffer layer until the GaN channel layer 31 is exposed.

[0035] Furthermore, in step S5, the thickness of the first dielectric layer is 1 nm to 100 nm, and the thickness of the second dielectric layer is 1 nm to 500 nm.

[0036] Furthermore, in step S5, after forming the first dielectric layer and the second dielectric layer on the GaN channel layer 31 and the functional substrate 1, respectively, the GaN-HEMT epitaxial wafer is flipped over and permanently bonded to the functional substrate 1. The GaN-HEMT epitaxial wafer is flipped over and permanently bonded with the first temporary substrate facing upward to facilitate removal of the first temporary substrate.

[0037] Furthermore, in step S5, the permanent bonding includes hydrophilic bonding. The core functional layer is permanently bonded to the functional substrate 1 by hydrophilic bonding to realize a GaN-on-SOI-like substrate. On the one hand, the vertical withstand voltage of different voltage levels can be achieved by adjusting the thickness of the bonding interface dielectric layer 2. On the other hand, it is beneficial to the horizontal isolation of the GaN device prepared based on the subsequent GaN-HEMT epitaxial structure 10. It should be noted that the materials of the first dielectric layer and the second dielectric layer 2 can be SiO2, SiN x , at least one of SiON, SiCN, AlN and Al2O3, and the first dielectric layer and the second dielectric layer both form a hydrophilic bonding interface.

[0038] See also Figure 2 and Figure 3 The steps of an embodiment of the method for preparing the GaN-HEMT epitaxial structure 10 of the present invention include: Step 1: Prepare a GaN-HEMT epitaxial wafer and epitaxially grow the second epitaxial layer on a heterogeneous substrate (growth substrate) (sequentially growing a nucleation layer, a buffer layer, a C-doped high-resistance layer, a GaN channel layer 31, an AlGaN barrier layer 32, and a P-GaN layer 33); Step 2: Spin-coat a temporary bonding adhesive on the surface of the P-GaN layer 33 as a protective layer; Step 3: Flip the GaN HEMT epitaxial wafer 180° and temporarily bond it to another substrate (first temporary substrate) through a protective layer. Step 4: removing the initial heterogeneous substrate (growth substrate) to expose the nucleation layer in the second epitaxial layer; Step 5: sequentially remove the nucleation layer, the buffer layer, and the C-doped high-resistance layer until the GaN channel layer 31 is exposed; Step 6: depositing a dielectric (first dielectric layer) on the surface of the GaN channel layer 31 to form a hydrophilic bonding interface; Step 7: Deposit a dielectric (second dielectric layer) on the surface of the functional substrate 1, flip the GaN HEMT epitaxial wafer with the temporary bonding substrate (first temporary substrate) 180°, and permanently bond it to the functional substrate 1; Step 8: After permanent bonding is completed, the temporary bonded substrate (first temporary substrate) is debonded by heating, the temporary bonded substrate (first temporary substrate) is removed, and the epitaxial wafer is cleaned to obtain an epitaxial structure with a clean surface and only the core functional layer placed on the functional substrate 1, thereby obtaining a GaN-HEMT epitaxial structure 10.

[0039] Thirdly, please refer to Figure 4 The present invention provides an integrated chip of a GaN device wafer and a driver wafer 20, comprising: A driving wafer 20 includes a silicon substrate 201 having a first side and a second side opposite to each other, wherein a driving circuit is formed on the first side of the silicon substrate 201; and A GaN device wafer is located on a first side of the driver wafer 20 , wherein the GaN device wafer includes a first epitaxial layer 3 , wherein the first epitaxial layer 3 includes an AlGaN barrier layer 32 and a GaN channel layer 31 sequentially arranged in a direction away from the driver wafer 20 ; The GaN device wafer is bonded to the driver wafer 20 , so that the GaN device wafer is electrically connected to the driver wafer 20 .

[0040] The present invention heterogeneously integrates the GaN device wafer above the silicon drive circuit and adopts a mature silicon-based drive design, which can improve the stability of the drive circuit, reduce the loss of the drive circuit, reduce parasitics, and improve the reliability of the circuit system. At the same time, the substrate of the GaN device wafer and the high dislocation density nucleation layer and buffer layer are removed. On the one hand, the heat dissipation of the GaN device wafer can be improved and the impact of its temperature rise on the driver wafer 20 can be reduced. On the other hand, the high-density dislocations in the nucleation layer and the buffer layer can be prevented from climbing / slipping toward the core functional layer under the action of the electric / thermal field, thereby improving the long-term stability and reliability of the GaN device wafer, thereby improving the long-term stability and reliability of the integrated chip.

[0041] It should be noted that the GaN device wafer is used as a switching tube, and the integrated chip of the GaN device wafer and the driver wafer 20 can be used in the RF PA envelope tracking power supply, which can improve the efficiency of the radio frequency amplifier (RF PA) under a large average-peak ratio, and can also solve the problems of large drive circuit loss and switching waveform oscillation caused by gate parasitic inductance under high-frequency switching of GaN devices.

[0042] It can be understood that the first side of the driver wafer 20 and the first side of the silicon substrate 201 are located on the same side, and the second side of the driver wafer 20 and the second side of the silicon substrate 201 are located on the same side.

[0043] Furthermore, the first epitaxial layer 3 further includes a P-GaN layer 33, and the P-GaN layer 33 is disposed between the AlGaN barrier layer 32 and the driver wafer 20. Providing the P-GaN layer 33 can form an enhancement-mode device.

[0044] Furthermore, the integrated chip of the GaN device wafer and the driver wafer 20 further includes a passivation layer 30, which is disposed on a side of the GaN channel layer 31 away from the AlGaN barrier layer 32. Providing the passivation layer 30 can reduce surface defects, inhibit surface charge accumulation, increase breakdown voltage, reduce leakage current, and enhance the thermal stability of the device, thereby improving the performance, long-term stability, and reliability of the integrated chip.

[0045] Furthermore, the material of the passivation layer 30 includes SiO2, SiN x , at least one of SiON, Al2O3, AlN, diamond and SiC.

[0046] Furthermore, the passivation layer 30 has a thickness of 1 nm to 500 nm.

[0047] Furthermore, the GaN device wafer also includes a source, a gate, and a drain. A first pin, a second pin, and a third pin are formed on the second side of the driver wafer 20 to lead out the source, gate, and drain of the GaN device wafer, respectively. Providing pins on the surface facilitates the use of the integrated chip.

[0048] In a fourth aspect, the present invention provides a method for preparing an integrated chip of the GaN device wafer 10 and the driver wafer 20, comprising the following steps: A1. Providing an initial GaN-HEMT epitaxial wafer; wherein the GaN-HEMT epitaxial wafer includes a growth substrate and a second epitaxial layer disposed on the growth substrate, wherein the second epitaxial layer includes a nucleation layer, a buffer layer, a GaN channel layer 31, and an AlGaN barrier layer 32 sequentially disposed on the growth substrate; A2. Device fabrication is performed on the GaN-HEMT epitaxial wafer and corresponding electrodes are derived to obtain an initial GaN device wafer; A3. Design a gate drive circuit and prepare electrodes on the first side of the silicon substrate 201 according to the size of the device on the GaN device wafer to obtain a driver wafer 20; A4. Permanently bond the GaN device wafer to the driver wafer 20 and connect the corresponding electrodes of the two. A5. Remove the growth substrate, nucleation layer, and buffer layer on the GaN device wafer until the GaN channel layer 31 is exposed, thereby obtaining an integrated chip of the GaN device wafer and the driver wafer 20 .

[0049] Through the above steps, the substrate, the nucleation layer with high dislocation density and the buffer layer of the GaN device wafer can be removed, thereby obtaining an integrated chip with high long-term stability and reliability.

[0050] It should be noted that the method of removing the growth substrate can be selected according to the material of the growth substrate. For the silicon substrate 201, grinding + dry etching can be used, and for the sapphire substrate, laser stripping can be used; the method of removing the nucleation layer and the buffer layer can be to place the GaN device wafer bonded to the driver wafer 20 in an ICP machine, and use gases such as Cl2 / BCl3 to dry-etch the nucleation layer and the buffer layer, or to place the GaN device wafer bonded to the driver wafer 20 in a CMP device, and use SiO2 abrasives in a KOH alkaline solution to remove the nucleation layer and the buffer layer by chemical mechanical grinding and polishing.

[0051] Furthermore, in step A1, the second epitaxial layer further includes a C-doped high-resistance layer, which is disposed between the buffer layer and the GaN channel layer 31. In step A5, after removing the buffer layer, the C-doped high-resistance layer is also removed until the GaN channel layer 31 is exposed. Removing the high-concentration C-doped high-resistance layer can prevent electron capture due to deep energy level defects introduced by carbon impurities in the high-resistance layer, thereby improving the dynamic characteristics of the GaN device wafer. It should be noted that the C-doped high-resistance layer can be removed by placing the GaN device wafer bonded to the driver wafer 20 in an ICP machine and dry-etching the C-doped high-resistance layer using gases such as Cl2 / BCl3. Alternatively, the C-doped high-resistance layer can be removed by placing the GaN device wafer bonded to the driver wafer 20 in a CMP machine and removing the C-doped high-resistance layer by chemical mechanical polishing using SiO2 abrasive in a KOH alkaline solution.

[0052] Further, in step A4, the permanent bonding includes hybrid bonding.

[0053] Furthermore, step A5 also includes: thinning the silicon substrate 201, performing TSV etching at the corresponding electrodes, and filling metal to lead the electrodes out from the second side of the driver wafer 20. Leading the electrodes out of the driver wafer 20 facilitates the use of the integrated chip. It should be noted that the method of thinning the silicon substrate 201, performing TSV etching (through silicon via) etching at the corresponding electrodes, and filling metal to lead the electrodes out from the second side of the driver wafer 20 can be to thin the Si wafer by grinding, and then use a deep silicon etching process to etch the corresponding area of ​​the silicon substrate 201 until the corresponding electrode at the bonding interface to form a TSV (through silicon via). The via is filled with seed metal such as Ti / Ti, and then filled with metal such as W and Cu, and then PAD metal (pad metal) such as Al, Cu, etc. is deposited to lead the relevant electrodes to the Si wafer; the silicon substrate 201 can be thinned by 100-250μm.

[0054] Furthermore, step A5 further includes: forming a passivation layer 30 on the GaN channel layer 31 .

[0055] Furthermore, in step A4, the GaN device wafer is flipped over and permanently bonded to the driver wafer 20, and the corresponding electrodes of the two are connected; step A5 includes: A511, removing the growth substrate, nucleation layer, and buffer layer on the GaN device wafer until the GaN channel layer 31 is exposed; A512, forming a passivation layer 30 on the GaN channel layer 31; A513 , thinning the silicon substrate 201 from the back, performing TSV etching at the corresponding electrodes, filling metal to lead the electrodes out from the second side of the driver wafer 20 , and obtaining an integrated chip of the GaN device wafer and the driver wafer 20 .

[0056] In step A4, the GaN device wafer is flipped over and then permanently bonded to the driver wafer 20, with the growth substrate of the GaN device wafer facing upward. Then, the growth substrate, nucleation layer and buffer layer are removed from top to bottom in sequence until the GaN channel layer 31 is exposed. Thereafter, a passivation layer 30 is formed on the GaN channel layer 31, and the silicon substrate 201 is thinned from the back to lead out the electrode. Only one permanent bonding is required, and no other temporary bonding or debonding process is required. The GaN device wafer 10 and the driver wafer 20 can be heterogeneously integrated to obtain an integrated chip.

[0057] Furthermore, in step A4, the driver wafer 20 is flipped over and permanently bonded to the GaN device wafer, and the corresponding electrodes of the two are connected; step A5 includes: A521, thinning the silicon substrate 201 from the front side, performing TSV etching at the corresponding electrodes, and filling metal to lead the electrodes out from the second side of the driver wafer 20; A522. Apply temporary bonding glue to the second side of the driver wafer 20, flip the driver wafer 20 over, and then temporarily bond it to the second temporary substrate. A523, removing the growth substrate, nucleation layer, and buffer layer on the GaN device wafer until the GaN channel layer 31 is exposed; A524, forming a passivation layer 30 on the GaN channel layer 31; A525 . Remove the second temporary substrate to obtain an integrated chip of the GaN device wafer and the driver wafer 20 .

[0058] In step A4, the driver wafer 20 is flipped over and then permanently bonded to the GaN device wafer, with the second side of the silicon substrate 201 of the driver wafer 20 facing upward. Although there is an additional process of temporary substrate bonding and debonding and removing the substrate, the silicon substrate 201 can be thinned to a thinner degree, which can reduce the aspect ratio of the TSV process and make subsequent TSV and metal filling and interconnection processes easier to implement.

[0059] See also Figure 5 and Figure 6 The steps of an embodiment of a method for preparing an integrated chip of a GaN device wafer and a driver wafer 20 of the present invention include: Step 1: Prepare a GaN-HEMT epitaxial wafer and epitaxially grow the second epitaxial layer on a heterogeneous substrate (growth substrate) (sequentially growing a nucleation layer, a buffer layer, a C-doped high-resistance layer, a GaN channel layer 31, an AlGaN barrier layer 32, and a P-GaN layer 33); Step 2: Complete the fabrication of the P-GaN e-HEMT device and lead out the corresponding electrodes. Design the gate drive circuit and complete the electrode fabrication on the Si wafer (silicon substrate 201) based on the size of the GaN HEMT device. Step 3: Flip the GaN HEMT device 180° and then permanently bond it to the wafer containing the silicon-based driver circuit (driver wafer 20) so that the corresponding electrodes of the two are connected together (the connection relationship of the electrodes in the figure is only schematic and does not represent the actual connection relationship); Step 4: sequentially remove the initial heterogeneous substrate (growth substrate), nucleation layer, buffer layer, and C-doped high-resistance layer until the GaN channel layer 31 is exposed; Step 5: depositing a passivation layer 30 material on the surface of the GaN channel layer 31 to form a passivation layer 30; Step 6: Thin the silicon substrate 201 from the back, perform TSV etching at the corresponding electrodes, fill with metal and lead the electrodes to the bottom of the silicon substrate 201 to obtain an integrated chip of the GaN device wafer and the driver wafer 20.

[0060] See also Figure 7 and Figure 9Another embodiment of the method for preparing an integrated chip of a GaN device wafer and a driver wafer 20 of the present invention includes the following steps: Step 1: Prepare a GaN-HEMT epitaxial wafer and epitaxially grow the second epitaxial layer on a heterogeneous substrate (growth substrate) (sequentially growing a nucleation layer, a buffer layer, a C-doped high-resistance layer, a GaN channel layer 31, an AlGaN barrier layer 32, and a P-GaN layer 33); Step 2: Complete the fabrication of the P-GaN e-HEMT device and lead out the corresponding electrodes. Design the gate drive circuit and complete the electrode fabrication on the Si wafer (silicon substrate 201) based on the size of the GaN HEMT device. Step 3: Flip the silicon-based driver circuit wafer (driver wafer 20) 180 degrees and then permanently bond it to the GaN HEMT device, connecting the corresponding electrodes of the two together (the connection relationship of the electrodes in the figure is only schematic and does not represent the actual connection relationship); Step 4: Thin the silicon substrate 201 from the front side, perform TSV etching at the corresponding electrodes, fill with metal, and lead the electrodes to the surface of the silicon substrate 201; Step 5: Spin-coat a temporary bonding adhesive on the surface of the driver wafer 20 as a protective layer, and flip the driver wafer 20 180° to perform temporary bonding with another substrate (second temporary substrate); Step 6: sequentially remove the initial heterogeneous substrate (growth substrate), nucleation layer, buffer layer, and C-doped high-resistance layer until the GaN channel layer 31 is exposed; Step 7: depositing a passivation layer material on the surface of the GaN channel layer 31 to form a passivation layer 30; Step 8: Debonding the driver wafer 20 from the temporary bonding substrate (second temporary substrate) to obtain an integrated chip of the GaN device wafer and the driver wafer 20 .

[0061] The raw materials not specifically described in the present invention are all existing materials that can be directly purchased from the market.

[0062] The above is only a preferred embodiment of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. A GaN-HEMT epitaxial structure, characterized in that: It includes a functional substrate, a dielectric layer and a first epitaxial layer sequentially arranged on the functional substrate, the first epitaxial layer includes a GaN channel layer and an AlGaN barrier layer sequentially arranged on the dielectric layer, and the dielectric layer is used to bond the GaN channel layer to the functional substrate.

2. The GaN-HEMT epitaxial structure according to claim 1, wherein: The material of the functional substrate includes at least one of Si, SiC, AlN and diamond; and / or, The material of the dielectric layer includes SiO2, SiN x , at least one of SiON, SiCN, AlN and Al2O3; and / or, The first epitaxial layer further includes a P-GaN layer, and the P-GaN layer is disposed on a side of the AlGaN barrier layer away from the GaN channel layer.

3. The method for preparing a GaN-HEMT epitaxial structure according to claim 1 or 2, characterized in that: The following steps are involved: S1. Providing an initial GaN-HEMT epitaxial wafer; wherein the GaN-HEMT epitaxial wafer includes a growth substrate and a second epitaxial layer epitaxially grown on the growth substrate, wherein the second epitaxial layer includes a nucleation layer, a buffer layer, a GaN channel layer, and an AlGaN barrier layer sequentially disposed on the growth substrate; S2. Applying a temporary bonding adhesive on a side of the GaN-HEMT epitaxial wafer away from the growth substrate; S3, temporarily bonding the GaN-HEMT epitaxial wafer to the first temporary substrate using temporary bonding glue; S4, removing the growth substrate, nucleation layer, and buffer layer until the GaN channel layer is exposed; S5. Forming a first dielectric layer and a second dielectric layer on the GaN channel layer and the functional substrate respectively, permanently bonding the GaN-HEMT epitaxial wafer to the functional substrate, and forming a dielectric layer between the GaN channel layer and the functional substrate; S6. Remove the first temporary substrate to obtain a GaN-HEMT epitaxial structure.

4. The method for preparing a GaN-HEMT epitaxial structure according to claim 3, wherein: In step S1, the second epitaxial layer further includes a C-doped high-resistance layer, and the C-doped high-resistance layer is arranged between the buffer layer and the GaN channel layer; In step S4 , after removing the buffer layer, the C-doped high-resistance layer is also removed until the GaN channel layer is exposed.

5. The method for preparing a GaN-HEMT epitaxial structure according to claim 3, wherein: In step S1, a growth substrate is provided, and a second epitaxial layer is epitaxially grown on the growth substrate to obtain an initial GaN-HEMT epitaxial wafer; and / or, In step S3, the GaN-HEMT epitaxial wafer is flipped over and then temporarily bonded to a first temporary substrate; and / or, In step S5, the thickness of the first dielectric layer is 1 nm to 100 nm, and the thickness of the second dielectric layer is 1 nm to 500 nm; and / or, In step S5, after forming a first dielectric layer and a second dielectric layer on the GaN channel layer and the functional substrate respectively, the GaN-HEMT epitaxial wafer is flipped over and then permanently bonded to the functional substrate; and / or, In step S5 , the permanent bonding includes hydrophilic bonding.

6. An integrated chip of a GaN device wafer and a driver wafer, characterized in that: include: A driving wafer comprising a silicon substrate having a first side and a second side opposite to each other, wherein a driving circuit is formed on the first side of the silicon substrate; as well as, A GaN device wafer is located on a first side of the driver wafer, wherein the GaN device wafer includes a first epitaxial layer, wherein the first epitaxial layer includes an AlGaN barrier layer and a GaN channel layer sequentially arranged in a direction away from the driver wafer; The GaN device wafer is bonded to the driver wafer so that the GaN device wafer is electrically connected to the driver wafer.

7. The integrated chip of the GaN device wafer and the driver wafer according to claim 6, characterized in that: The first epitaxial layer further includes a P-GaN layer, and the P-GaN layer is arranged between the AlGaN barrier layer and the driver wafer; and / or, The integrated chip of the GaN device wafer and the driver wafer further includes a passivation layer, which is arranged on a side of the GaN channel layer away from the AlGaN barrier layer; and / or, The GaN device wafer further includes a source and a drain. A first pin, a second pin, and a third pin are formed on the second side of the driver wafer for respectively leading out the source, gate, and drain of the GaN device wafer.

8. The method for preparing an integrated chip of a GaN device wafer and a driver wafer according to claim 6 or 7, characterized in that: The following steps are involved: A1. Providing an initial GaN-HEMT epitaxial wafer; wherein the GaN-HEMT epitaxial wafer includes a growth substrate and a second epitaxial layer epitaxially grown on the growth substrate, wherein the second epitaxial layer includes a nucleation layer, a buffer layer, a GaN channel layer, and an AlGaN barrier layer sequentially disposed on the growth substrate; A2. Device fabrication is performed on the GaN-HEMT epitaxial wafer and corresponding electrodes are derived to obtain an initial GaN device wafer; A3. Design a gate drive circuit and prepare electrodes on the first side of the silicon substrate according to the size of the device on the GaN device wafer to obtain a driver wafer; A4. Permanently bond the GaN device wafer to the driver wafer and connect their corresponding electrodes. A5. Remove the growth substrate, nucleation layer, and buffer layer on the GaN device wafer until the GaN channel layer is exposed, thereby obtaining an integrated chip of the GaN device wafer and the driver wafer.

9. The method for preparing an integrated chip of a GaN device wafer and a driver wafer according to claim 8, characterized in that: In step A4, the GaN device wafer is flipped over and permanently bonded to the driver wafer, and the corresponding electrodes of the two are connected; step A5 includes: A511, remove the growth substrate, nucleation layer and buffer layer on the GaN device wafer until the GaN channel layer is exposed; A512, forming a passivation layer on the GaN channel layer; A513. Thin the silicon substrate from the back, perform TSV etching at the corresponding electrodes, fill metal to lead the electrodes out from the second side of the driver wafer, and obtain an integrated chip of the GaN device wafer and the driver wafer.

10. The method for preparing an integrated chip of a GaN device wafer and a driver wafer according to claim 8, characterized in that: In step A4, the driver wafer is flipped over and permanently bonded to the GaN device wafer, and the corresponding electrodes of the two are connected; Step A5 includes: A521, thin the silicon substrate from the front side, perform TSV etching at the corresponding electrodes, and fill metal to lead the electrodes out from the second side of the driver wafer; A522. Apply temporary bonding glue to the second side of the driver wafer, flip the driver wafer over, and then temporarily bond it to the second temporary substrate. A523, remove the growth substrate, nucleation layer and buffer layer on the GaN device wafer until the GaN channel layer is exposed; A524, forming a passivation layer on the GaN channel layer; A525. Remove the second temporary substrate to obtain an integrated chip of the GaN device wafer and the driver wafer.

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