Silicon-based germanium photoelectric detector and manufacturing method

Abstract

According to the silicon-based germanium photoelectric detector and the manufacturing method provided by the invention, when the V-shaped groove is formed in the silicon substrate and the germanium epitaxial layer is deposited, the dislocation can slide outwards along the inclined surface of the V-shaped groove, so that the dislocation is far away from the active light absorption region, the dark current of the photoelectric detector can be reduced, and the performance of the photoelectric detector is improved; moreover, the bottom of the tip of the V-shaped groove is arc-shaped, thereby preventing the bottom of the tip from generating an adverse effect on a high-temperature reliability test, and greatly improving the reliability of the photoelectric detector.

Description

Technical Field

[0001] The present invention belongs to the technical field of photoelectric detection and relates to a silicon-based germanium photoelectric detector and a manufacturing method thereof. Background Art

[0002] High-performance photodetectors should possess high responsivity, wide bandwidth, and low dark current (noise) across their wavelength range. At room temperature, silicon has a cutoff wavelength of 1.1μm, limiting its application to the near-infrared range of 1.3-1.5μm. Germanium extends the detector's wavelength to over 1.55μm, making it the ideal material for silicon-based long-wavelength photodetectors.

[0003] The quality of germanium crystals in silicon-based germanium photodetectors has a crucial impact on dark current. Due to the huge lattice mismatch between silicon and germanium, a high density of dislocation defects will be generated. Dislocation defects act as additional carrier generation and recombination centers, significantly increasing the current generated by thermal excitation under non-illumination conditions (i.e., dark current), reducing the sensitivity of the detector and even causing device failure.

[0004] Therefore, how to provide a silicon-based germanium photodetector and a manufacturing method to reduce dark current and improve detector performance has become a technical problem that needs to be urgently solved by those skilled in the art. Summary of the Invention

[0005] In view of the above-mentioned shortcomings of the prior art, the object of the present invention is to provide a silicon-based germanium photodetector and a manufacturing method thereof, so as to solve the problems of large dark current and low device reliability of the silicon-based germanium photodetector in the prior art.

[0006] To achieve the above-mentioned and other related purposes, the present invention provides a method for manufacturing a silicon-based germanium photodetector, comprising the following steps: S1: providing a silicon substrate, and forming a stacked thermal silicon oxide layer and a deposited silicon oxide layer on the silicon substrate; S2: forming a vertical groove, wherein the vertical groove extends from the upper surface of the deposited silicon oxide layer to the silicon substrate; S3: placing the structure with the vertical grooves formed therein in a deposition chamber, introducing H2 into the deposition chamber, and baking the structure in an H2 atmosphere for a first preset time; S4: introducing H2 and HCl into the deposition chamber, and baking for a second predetermined time under the H2 atmosphere and the HCl atmosphere to transform the vertical groove in the silicon substrate into a V-shaped groove; S5: introducing H2 into the deposition chamber and baking for a third preset time under the H2 atmosphere to round the V-shaped groove, wherein the rounded V-shaped groove and the vertical groove above the V-shaped groove together constitute a deposition groove; S6: forming a germanium epitaxial layer in the deposition groove.

[0007] Optionally, in step S6, a selective epitaxial growth method is used to form the germanium epitaxial layer in the deposition groove, and the upper surface of the germanium epitaxial layer is an arc-shaped surface.

[0008] Optionally, in step S1, before forming the thermal silicon oxide layer and the deposited silicon oxide layer on the silicon substrate, the step of forming a first conductive type doped region and a second conductive type doped region in the silicon substrate is also included, one side of the germanium epitaxial layer is electrically connected to the first conductive type doped region, and the other side of the germanium epitaxial layer is electrically connected to the second conductive type doped region.

[0009] Optionally, after forming the germanium epitaxial layer, the following steps are further included: S7: forming a dielectric layer on the deposited silicon oxide layer, wherein the dielectric layer covers the germanium epitaxial layer; S8: forming a first contact hole penetrating the dielectric layer, the deposited silicon oxide layer, and the thermal silicon oxide layer, wherein the first contact hole exposes the first conductive type doped region; and forming a second contact hole penetrating the dielectric layer, the deposited silicon oxide layer, and the thermal silicon oxide layer, wherein the second contact hole exposes the second conductive type doped region. S9: Filling metal into the first contact hole to form a first metal layer, filling metal into the second contact hole to form a second metal layer, the first metal layer is electrically connected to the first conductive type doping region, and the second metal layer is electrically connected to the second conductive type doping region.

[0010] Optionally, in step S3, the flow rate of H2 is 40-80 slm, the temperature of the deposition chamber is 850-950° C., the pressure is 10-50 Torr, and the first preset time is 5-8 minutes; In step S4, the flow rate of H2 is 40-80 slm, the flow rate of HCl is 100-300 sccm, the temperature of the deposition chamber is 850-950°C, the pressure is 10-50 Torr, and the second preset time is 3-5 minutes; In step S5 , the flow rate of H 2 is 40-80 slm, the temperature of the deposition chamber is 750-800° C., the pressure is 80-100 Torr, and the third preset time is 3-5 minutes.

[0011] Optionally, the silicon substrate is a top silicon layer in a SOI wafer.

[0012] The present invention also provides a silicon-based germanium photodetector, comprising: Silicon substrate; a thermal silicon oxide layer located above the silicon substrate; depositing a silicon oxide layer over the thermal silicon oxide layer; a vertical groove extending through the deposited silicon oxide layer and the thermal silicon oxide layer; A circular V-shaped groove extends from the upper surface of the silicon substrate to the interior of the silicon substrate, and the bottom end of the vertical groove is connected to the top end of the V-shaped groove; The germanium epitaxial layer is located in the V-shaped groove and the vertical groove.

[0013] Optionally, the upper surface of the germanium epitaxial layer is an arc-shaped surface.

[0014] Optionally, it also includes: A first conductive type doped region located in the silicon substrate; A second conductive type doped region is located in the silicon substrate; One side of the germanium epitaxial layer is electrically connected to the first conductive type doping region, and the other side of the germanium epitaxial layer is electrically connected to the second conductive type doping region.

[0015] Optionally, it also includes: a dielectric layer, located above the deposited silicon oxide layer, the dielectric layer covering the germanium epitaxial layer; a first metal layer, penetrating the dielectric layer, the deposited silicon oxide layer, and the thermal silicon oxide layer to be electrically connected to the first conductive type doped region; The second metal layer penetrates the dielectric layer, the deposited silicon oxide layer and the thermal silicon oxide layer to be electrically connected to the second conductive type doped region.

[0016] As described above, in the silicon-based germanium photodetector and its manufacturing method of the present invention, a V-groove is formed in the silicon substrate. When the germanium epitaxial layer is deposited, dislocations can slide outward along the inclined surface of the V-groove, so that the dislocations are away from the active light absorption area, which can reduce the dark current of the photodetector and improve the performance of the photodetector; and, the rounding of the tip and bottom of the V-groove can prevent the tip and bottom from having an adverse effect on high-temperature reliability testing, thereby greatly improving the reliability of the photodetector. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 Shown is a flow chart of a method for manufacturing a silicon-based germanium photodetector according to an embodiment of the present invention.

[0018] Figure 2 Schematic diagram showing providing a silicon substrate, forming a thermal silicon oxide layer and depositing a silicon oxide layer on the silicon substrate according to an embodiment of the present invention.

[0019] Figure 3 Schematic diagram showing the formation of vertical grooves in an embodiment of the present invention.

[0020] Figure 4 Schematic diagram showing the formation of a V-shaped groove according to an embodiment of the present invention.

[0021] Figure 5 It is a schematic diagram showing the rounding of the V-groove in an embodiment of the present invention.

[0022] Figure 6 Schematic diagram of forming a germanium epitaxial layer according to an embodiment of the present invention.

[0023] Figure 7 Shown is an electron microscope image of a germanium epitaxial layer in an embodiment of the present invention.

[0024] Figure 8 It is a schematic diagram showing the formation of a dielectric layer according to an embodiment of the present invention.

[0025] Figure 9 Schematic diagram showing the formation of the first contact hole and the second contact hole according to an embodiment of the present invention.

[0026] Figure 10 Schematic diagram showing the formation of a first metal layer and a second metal layer according to an embodiment of the present invention.

[0027] Figure 11 Shown is a graph of dark current data without high-temperature storage in an embodiment of the present invention.

[0028] Figure 12 Shown is a graph of dark current data after high-temperature storage in an embodiment of the present invention.

[0029] Figure 13 Shown is a graph showing the change in dark current data after high-temperature storage compared to before high-temperature storage in an embodiment of the present invention.

[0030] Figure 14 Shown is an electron microscope image of the germanium epitaxial layer in Comparative Example 1.

[0031] Figure 15 The graph shows the dark current data in Comparative Example 1 without high-temperature storage.

[0032] Figure 16 Shown is an electron microscope image of the germanium epitaxial layer in Comparative Example 2.

[0033] Figure 17 The graph shows the dark current data in Comparative Example 2 without high-temperature storage.

[0034] Figure 18 The graph shows the dark current data after high-temperature storage in Comparative Example 2.

[0035] Figure 19 The graph shows the change in dark current data after high-temperature storage compared to before high-temperature storage in Comparative Example 2.

[0036] Component number explanation: 1-SOI wafer, 100-base silicon layer, 101-buried oxide layer, 102-top silicon layer; 2-first conductivity type doped region; 3-second conductivity type doped region; 4-thermal silicon oxide layer; 5-deposited silicon oxide layer; 6-vertical groove; 7-V-shaped groove; 8-germanium epitaxial layer; 9-dielectric layer; 10-first contact hole; 11-second contact hole; 12-first metal layer; 13-second metal layer. DETAILED DESCRIPTION

[0037] The following describes the embodiments of the present invention through specific examples. Those skilled in the art will readily understand the other advantages and benefits of the present invention from the disclosure herein. The present invention may also be implemented or applied through various other specific embodiments, and the details in this specification may be modified or altered based on different viewpoints and applications without departing from the spirit of the present invention.

[0038] See also Figures 1 to 19 It should be noted that the diagrams provided in this embodiment are merely schematic illustrations of the basic concept of the present invention. Therefore, the diagrams only show components related to the present invention and are not drawn according to the number, shape, and size of components in actual implementation. In actual implementation, the type, quantity, and proportion of each component may be changed arbitrarily, and the component layout may also be more complex.

[0039] This embodiment provides a method for manufacturing a silicon-based germanium photodetector. Figure 1 The method for manufacturing the silicon-based germanium photodetector comprises the following steps: S1: providing a silicon substrate, and forming a stacked thermal silicon oxide layer and a deposited silicon oxide layer on the silicon substrate; S2: forming a vertical groove, wherein the vertical groove extends from the upper surface of the deposited silicon oxide layer to the silicon substrate; S3: placing the structure with the vertical grooves formed therein in a deposition chamber, introducing H2 into the deposition chamber, and baking the structure in an H2 atmosphere for a first preset time; S4: introducing H2 and HCl into the deposition chamber, and baking for a second predetermined time under the H2 atmosphere and the HCl atmosphere to transform the vertical groove in the silicon substrate into a V-shaped groove; S5: introducing H2 into the deposition chamber and baking for a third preset time under the H2 atmosphere to round the V-shaped groove, wherein the rounded V-shaped groove and the vertical groove above the V-shaped groove together constitute a deposition groove; S6: forming a germanium epitaxial layer in the deposition groove.

[0040] The method for manufacturing the silicon-germanium photodetector in this embodiment is described in detail below with reference to the specific drawings.

[0041] First, see Figure 2 , performing step S1: providing a silicon substrate, and forming a stacked thermal silicon oxide layer 4 and a deposited silicon oxide layer 5 on the silicon substrate.

[0042] As an example, in this embodiment, the silicon substrate is the top silicon layer 102 of an SOI wafer 1. The SOI wafer 1 includes a base silicon layer 100, a buried oxide layer 101, and the top silicon layer 102 arranged from bottom to top. The SOI wafer 1 serves as the supporting substrate for the detector. The buried oxide layer 101 provides good electrical isolation, effectively reducing parasitic capacitance and leakage current between the device and the base silicon layer 100, thereby improving the detector's response speed and sensitivity. Furthermore, the SOI wafer supports the integration of multiple passive devices (such as waveguides, gratings, and couplers) and active devices (such as modulators and detectors) on the same substrate, facilitating the realization of complex photonic integrated circuits. In another example, the silicon substrate can also be a silicon wafer, not limited to this embodiment.

[0043] As an example, before forming the thermal silicon oxide layer 4 and the deposited silicon oxide layer 5 on the top silicon layer 102, the step of forming a first conductivity type doped region 2 and a second conductivity type doped region 3 in the top silicon layer 102 is also included, wherein the first conductivity type and the second conductivity type are opposite. Specifically, in this embodiment, the first conductivity type doped region 2 is a P-type doped region, and the second conductivity type doped region 3 is an N-type doped region.

[0044] As an example, a thermal oxidation process is used to oxidize the upper surface of the top silicon layer 102 to form the thermal silicon oxide layer 4, and then a chemical vapor deposition process is used to form the deposited silicon oxide layer 5 on the thermal silicon oxide layer 4. By thermally oxidizing the upper surface of the top silicon layer 102, the interface state density between the thermal silicon oxide layer 4 and the top silicon layer 102 is extremely low, which can significantly reduce surface defects in the top silicon layer 102 and significantly reduce dark current (especially edge leakage) from the top silicon layer / thermal silicon oxide layer interface. In addition, the thermal silicon oxide layer 4 has excellent density, uniformity, and stability, providing a smooth and clean platform for the deposited silicon oxide layer 5, thereby improving the quality of the deposited silicon oxide layer 5.

[0045] Next, see Figure 3 , performing step S2: forming a vertical groove 6, wherein the vertical groove 6 extends from the upper surface of the deposited silicon oxide layer 5 to the silicon substrate.

[0046] As an example, a photoresist layer is formed on the upper surface of the deposited silicon oxide layer 5 and patterned, and the patterned photoresist layer defines the position of the vertical groove 6. Then, using the patterned photoresist layer as a mask, the deposited silicon oxide layer 5, the thermal silicon oxide layer 4 and the top silicon layer 102 are etched to form the vertical groove 6.

[0047] As an example, the vertical groove 6 is formed by a dry etching process, and the anisotropy of the dry etching is utilized to make the sidewalls of the vertical groove 6 relatively vertical.

[0048] As an example, after the vertical groove 6 is formed by a dry etching process, a wet cleaning process is used to remove etching byproducts.

[0049] As an example, after forming the vertical groove 6 , the method further includes a step of removing the photoresist layer.

[0050] As an example, in this embodiment, the opening dimension CD of the vertical groove 6 is 300-800 nm, and the depth of the vertical groove 6 in the top silicon layer 102 is 100-120 nm, which facilitates the subsequent formation of a V-shaped groove in the top silicon layer 102. If the opening dimension CD of the vertical groove 6 is too large, the V-shaped groove cannot be effectively formed subsequently because the morphology structure formed through process optimization is limited.

[0051] Next, step S3 is performed: placing the structure after the vertical grooves 6 are formed in a deposition chamber, introducing H2 into the deposition chamber, and baking the structure in the H2 atmosphere for a first preset time.

[0052] As an example, the deposition chamber is an epitaxial process chamber. The H2 flow rate in the deposition chamber is 40-80 slm (standard liters per minute), the temperature of the deposition chamber is 850-950°C (degrees Celsius), the pressure is 10-50 Torr (Torr), and the baking time is 5-8 minutes. The H2 bake removes impurities such as carbon and oxygen from the surface of the top silicon layer 102.

[0053] Next, see Figure 4 , executing step S4: introducing H2 and HCl into the deposition chamber, and baking for a second preset time under the H2 atmosphere and HCl atmosphere to transform the vertical groove 6 located in the silicon substrate into a V-shaped groove 7.

[0054] As an example, the H2 flow rate into the deposition chamber is 40-80 slm, the HCl flow rate is 100-300 sccm (standard cubic centimeters per minute), the deposition chamber temperature is 850-950°C, the pressure is 10-50 Torr, and the second preset time is 3-5 minutes. That is, based on step S3, the temperature and pressure of the deposition chamber remain unchanged, and HCl gas is simultaneously introduced in addition to the H2 flow for baking. In the hydrogen environment, the exposed silicon atoms in the vertical groove 6 are subjected to energy migration (Si Move), and the silicon surface tends to have a low surface potential energy morphology, tending to be rounded. Simultaneously, due to the etching effect of HCl on the silicon, the V-shaped groove 7 is formed in the top silicon layer 102.

[0055] Next, see Figure 5 , execute step S5: introduce H2 into the deposition chamber, and bake for a third preset time under the H2 atmosphere to make the V-shaped groove 7 circular. The circular V-shaped groove 7 and the vertical groove 6 located above the V-shaped groove 7 together constitute a deposition groove.

[0056] As an example, the flow rate of H2 introduced into the deposition chamber is 40-80 slm, the temperature of the deposition chamber is 750-800°C, the pressure is 80-100 Torr, and the third preset time is 3-5 minutes. Since the bottom of the V-groove 7 formed in step S4 is a tip structure, the tip structure will cause the following problems: (1) through-hole defects caused by tip stress and lattice mismatch between silicon and germanium; (2) the curvature radius of the tip is extremely small, and the local electric field will increase sharply; (3) local high-temperature hot spots cause heat accumulation at the tip. Through hydrogen baking in step S5, the V-groove 7 is rounded by silicon migration, and the tip bottom of the V-groove 7 can be converted into an arc bottom, which can improve the reliability of the device and prevent the tip bottom from having an adverse effect on subsequent high-temperature reliability testing.

[0057] Next, see Figure 6 , executing step S6: forming the germanium epitaxial layer 8 in the deposition groove.

[0058] As an example, the germanium epitaxial layer 8 is formed in the deposition groove by a selective epitaxial growth method. The upper surface of the germanium epitaxial layer 8 is an arc-shaped surface, which can increase the light absorption area and ensure the responsiveness of the device.

[0059] As an example, when forming the germanium epitaxial layer 8, the lattice mismatch between silicon and germanium will produce dislocations. Silicon and germanium have a diamond cubic structure, and the (111) crystal plane is the first crystal plane for dislocation slip. In this application, because the bottom of the deposition groove is a V-groove, dislocations can slip outward along the (111) crystal plane of the inclined surface of the V-groove 7, moving the dislocations away from the active light absorption region, that is, pushing the dislocations to the edge of the groove or deep into the top silicon layer 102, reducing the dark current of the photodetector and improving the performance of the photodetector.

[0060] As an example, see Figure 7 , which is an electron microscope image of the germanium epitaxial layer formed in an embodiment of the present invention. The bottom of the formed germanium epitaxial layer 8 falls on the V-shaped groove, and the top surface of the formed germanium epitaxial layer 8 is an arc surface.

[0061] As an example, after forming the germanium epitaxial layer 8, the following steps are further included: S7: As Figure 8 As shown, a dielectric layer 9 is formed on the surface of the deposited silicon oxide layer 5, and the dielectric layer 9 covers the germanium epitaxial layer 8; S8: Figure 9 As shown, a first contact hole 10 is formed through the dielectric layer 9, the deposited silicon oxide layer 5 and the thermal silicon oxide layer 4, the first contact hole 10 exposes the first conductive type doped region 2, and a second contact hole 11 is formed through the dielectric layer 9, the deposited silicon oxide layer 5 and the thermal silicon oxide layer 4, the second contact hole 11 exposes the second conductive type doped region 3; S9: As Figure 10 As shown, metal is filled in the first contact hole 10 to form a first metal layer 12, and metal is filled in the second contact hole 11 to form a second metal layer 13. The first metal layer 12 is electrically connected to the first conductive type doping region 2, and the second metal layer 13 is electrically connected to the second conductive type doping region 3.

[0062] As an example, after forming the first metal layer 12 and the second metal layer 13 , a reliability test step is further included.

[0063] As an example, see Figure 11 , showing the dark current data of the embodiment of the present invention without high temperature storage, wherein the reverse bias voltage tested is -1V, the dark current unit is ampere (A), and multiple photodetector units are formed on a SOI wafer. The width of the germanium absorption module in each photodetector unit is 0.5μm and the length is 20μm. Figure 11 It can be seen that under the reverse bias condition of -1V, the dark current is less than 40nA.

[0064] As an example, see Figure 12, shows the dark current data after high temperature storage in an embodiment of the present invention, wherein the dark current test is performed at 150°C for 500 hours, and the reverse bias voltage of the test is -1V. Figure 13 , which shows the change of dark current data after high temperature storage compared with before high temperature storage in the embodiment of the present invention. Figure 13 It can be seen that under the reverse bias condition of -1V, the dark current data changes by less than 5% after 500 hours of high-temperature storage. The qualified standard recognized by the industry is less than 15%, that is, the silicon-based germanium photodetector of this application has extremely high reliability.

[0065] As an example, see Figure 14 , which shows an electron microscope image of the germanium epitaxial layer in Comparative Example 1. In Comparative Example 1, the bottom surface of the groove in the silicon substrate is a conventional plane; please refer to Figure 15 , which shows the dark current data diagram of comparative example 1 without high-temperature storage. Under the reverse bias condition of -1V, the dark current is greater than 50nA, indicating that the photodetector of the present application has a smaller dark current.

[0066] As an example, see Figure 16 , shows an electron microscope image of the germanium epitaxial layer in comparative example 2. In comparative example 2, the V-groove of the silicon substrate is not rounded, that is, the bottom of the V-groove is a pointed structure. Figure 17 , which shows the dark current data of the comparative example 2 without high temperature storage; please refer to Figure 18 , showing the dark current data after high temperature storage in comparative example 2, the dark current test was performed at 150°C for 168 hours, and the reverse bias voltage of the test was -1V; please refer to Figure 19 , showing the change in dark current data after high-temperature storage compared to before high-temperature storage in Comparative Example 2, the dark current changes of more photodetectors exceed the qualified value (15%), that is, in Comparative Example 2, the photodetector fails after being stored at 150°C for 168 hours, while in this application, the dark current data change is less than 5% after being stored at 150°C for 500 hours, indicating that the photodetector of this application has extremely high reliability.

[0067] As described above, in the method for manufacturing the silicon-based germanium photodetector of this embodiment, a V-groove is formed in the silicon substrate. When the germanium epitaxial layer is deposited, dislocations can slide outward along the inclined surface of the V-groove, so that the dislocations are away from the active light absorption area, which can reduce the dark current of the photodetector and improve the performance of the photodetector; and, the rounding of the tip and bottom of the V-groove can prevent the tip and bottom from having an adverse effect on high-temperature reliability testing, thereby greatly improving the reliability of the photodetector.

[0068] At this point, a silicon-based germanium photodetector was obtained. Figure 10The silicon-based germanium photodetector includes a silicon substrate, a thermal silicon oxide layer 4, a deposited silicon oxide layer 5, a vertical groove, a rounded V-groove and a germanium epitaxial layer 8, wherein the thermal silicon oxide layer 4 is located above the silicon substrate; the deposited silicon oxide layer 5 is located above the thermal silicon oxide layer 4; the vertical groove passes through the deposited silicon oxide layer 5 and the thermal silicon oxide layer 4; the rounded V-groove extends from the upper surface of the silicon substrate to the inside of the silicon substrate, and the bottom end of the vertical groove is connected to the top end of the V-groove; the germanium epitaxial layer 8 is located in the V-groove and the vertical groove.

[0069] As an example, in this embodiment, the silicon substrate is the top silicon layer 102 of an SOI wafer 1. The SOI wafer 1 includes a base silicon layer 100, a buried oxide layer 101, and the top silicon layer 102 arranged from bottom to top. The SOI wafer 1 serves as the supporting substrate for the detector. The buried oxide layer 101 provides good electrical isolation, effectively reducing parasitic capacitance and leakage current between the device and the base silicon layer 100, thereby improving the detector's response speed and sensitivity. Furthermore, the SOI wafer supports the integration of multiple passive devices (such as waveguides, gratings, and couplers) and active devices (such as modulators and detectors) on the same substrate, facilitating the realization of complex photonic integrated circuits. In another example, the silicon substrate can also be a silicon wafer, not limited to this embodiment.

[0070] As an example, a first conductivity type doping region 2 and a second conductivity type doping region 3 are further included, both of which are located in the silicon substrate, one side of the germanium epitaxial layer 8 is electrically connected to the first conductivity type doping region 2, and the other side of the germanium epitaxial layer 8 is electrically connected to the second conductivity type doping region 3. The first conductivity type and the second conductivity type are opposite. Specifically, in this embodiment, the first conductivity type doping region 2 is a P-type doping region, and the second conductivity type doping region 3 is an N-type doping region.

[0071] As an example, the upper surface of the germanium epitaxial layer 8 is an arc-shaped surface, which can increase the light absorption area and ensure the responsiveness of the device.

[0072] As examples, this also includes: a dielectric layer 9 located above the deposited silicon oxide layer 5 and covering the germanium epitaxial layer 8; a first metal layer 12, penetrating the dielectric layer 9, the deposited silicon oxide layer 5 and the thermal silicon oxide layer 4 to be electrically connected to the first conductive type doped region 2; The second metal layer 13 penetrates the dielectric layer 9 , the deposited silicon oxide layer 5 and the thermal silicon oxide layer 4 to be electrically connected to the second conductive type doping region 3 .

[0073] In summary, the silicon-based germanium photodetector and its fabrication method of the present invention form V-shaped grooves in the silicon substrate. During the deposition of the germanium epitaxial layer, dislocations can slide outward along the inclined surfaces of the V-shaped grooves, moving them away from the active light absorption region. This reduces the dark current of the photodetector and improves its performance. Furthermore, the rounded bottom and tip of the V-shaped grooves prevents them from adversely affecting high-temperature reliability testing, significantly improving the reliability of the photodetector. Therefore, the present invention effectively overcomes the shortcomings of the prior art and possesses high industrial value.

[0074] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the present invention. Anyone skilled in the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by one of ordinary skill in the art without departing from the spirit and technical principles disclosed herein are intended to be covered by the claims of the present invention.

Claims

1. A method for manufacturing a silicon-based germanium photodetector, characterized in that: The following steps are involved: S1: providing a silicon substrate, and forming a stacked thermal silicon oxide layer and a deposited silicon oxide layer on the silicon substrate; S2: forming a vertical groove, wherein the vertical groove extends from the upper surface of the deposited silicon oxide layer to the silicon substrate; S3: placing the structure with the vertical grooves formed therein in a deposition chamber, introducing H2 into the deposition chamber, and baking the structure in an H2 atmosphere for a first preset time; S4: introducing H2 and HCl into the deposition chamber, and baking for a second predetermined time under the H2 atmosphere and the HCl atmosphere to transform the vertical groove in the silicon substrate into a V-shaped groove; S5: introducing H2 into the deposition chamber and baking for a third preset time under the H2 atmosphere to round the V-shaped groove, wherein the rounded V-shaped groove and the vertical groove above the V-shaped groove together constitute a deposition groove; S6: forming a germanium epitaxial layer in the deposition groove.

2. The method for manufacturing a silicon-based germanium photodetector according to claim 1, wherein: In step S6 , a selective epitaxial growth method is used to form the germanium epitaxial layer in the deposition groove, and the upper surface of the germanium epitaxial layer is an arc-shaped surface.

3. The method for manufacturing a silicon-based germanium photodetector according to claim 1, wherein: In step S1, before forming the thermal silicon oxide layer and the deposited silicon oxide layer on the silicon substrate, the step of forming a first conductive type doped region and a second conductive type doped region in the silicon substrate is also included, one side of the germanium epitaxial layer is electrically connected to the first conductive type doped region, and the other side of the germanium epitaxial layer is electrically connected to the second conductive type doped region.

4. The method for manufacturing a silicon-based germanium photodetector according to claim 3, wherein: After forming the germanium epitaxial layer, the method further includes the following steps: S7: forming a dielectric layer on the deposited silicon oxide layer, wherein the dielectric layer covers the germanium epitaxial layer; S8: forming a first contact hole penetrating the dielectric layer, the deposited silicon oxide layer, and the thermal silicon oxide layer, wherein the first contact hole exposes the first conductive type doped region; and forming a second contact hole penetrating the dielectric layer, the deposited silicon oxide layer, and the thermal silicon oxide layer, wherein the second contact hole exposes the second conductive type doped region. S9: Filling metal into the first contact hole to form a first metal layer, filling metal into the second contact hole to form a second metal layer, the first metal layer is electrically connected to the first conductive type doping region, and the second metal layer is electrically connected to the second conductive type doping region.

5. The method for manufacturing a silicon-based germanium photodetector according to claim 1, wherein: In step S3, the flow rate of H2 is 40-80 slm, the temperature of the deposition chamber is 850-950°C, the pressure is 10-50 Torr, and the first preset time is 5-8 minutes; In step S4, the flow rate of H2 is 40-80 slm, the flow rate of HCl is 100-300 sccm, the temperature of the deposition chamber is 850-950°C, the pressure is 10-50 Torr, and the second preset time is 3-5 minutes; In step S5 , the flow rate of H 2 is 40-80 slm, the temperature of the deposition chamber is 750-800° C., the pressure is 80-100 Torr, and the third preset time is 3-5 minutes.

6. The method for manufacturing a silicon-based germanium photodetector according to claim 1, wherein: The silicon substrate is the top silicon layer in the SOI wafer.

7. A silicon-based germanium photodetector, characterized in that: include: Silicon substrate; a thermal silicon oxide layer located above the silicon substrate; depositing a silicon oxide layer over the thermal silicon oxide layer; a vertical groove extending through the deposited silicon oxide layer and the thermal silicon oxide layer; A circular V-shaped groove extends from the upper surface of the silicon substrate to the interior of the silicon substrate, and the bottom end of the vertical groove is connected to the top end of the V-shaped groove; The germanium epitaxial layer is located in the V-shaped groove and the vertical groove.

8. The silicon-based germanium photodetector according to claim 7, wherein: The upper surface of the germanium epitaxial layer is an arc-shaped surface.

9. The silicon-germanium photodetector according to claim 7, wherein: Also includes: A first conductive type doped region is located in the silicon substrate; A second conductive type doped region is located in the silicon substrate; One side of the germanium epitaxial layer is electrically connected to the first conductive type doping region, and the other side of the germanium epitaxial layer is electrically connected to the second conductive type doping region.

10. The silicon-based germanium photodetector according to claim 9, characterized in that: Also includes: a dielectric layer, located above the deposited silicon oxide layer, the dielectric layer covering the germanium epitaxial layer; a first metal layer, penetrating the dielectric layer, the deposited silicon oxide layer, and the thermal silicon oxide layer to be electrically connected to the first conductive type doped region; The second metal layer penetrates the dielectric layer, the deposited silicon oxide layer and the thermal silicon oxide layer to be electrically connected to the second conductive type doped region.

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