Semiconductor device, electronic apparatus and method for producing semiconductor device

Abstract

Provided are: a semiconductor device which achieves a reduction in the height and size of the device configuration while having good heat dissipation characteristics; an electronic device; and a method for producing the semiconductor device. This semiconductor device is provided with: a substrate part having a flat first plate surface and a flat second plate surface; a semiconductor element having a front surface and a rear surface, and embedded in the substrate portion such that the front surface faces the first plate surface; and a wiring section electrically connected to the semiconductor element.

Description

Technical Field

[0001] The present disclosure relates to a semiconductor device, an electronic apparatus, and a method for producing a semiconductor device. Background Art

[0002] As is well known, for a semiconductor device including a semiconductor element (semiconductor chip) (such as an imaging element including a CMOS image sensor or a light-emitting element including a semiconductor laser), for example, a so-called chip-on-board (CoB) configuration is applied, in which the semiconductor chip is mounted on a substrate and the semiconductor chip and the substrate are electrically connected by a plurality of wirings (see, for example, Patent Document 1).

[0003] In addition, as a semiconductor device configuration, for example, as disclosed in Patent Document 2, there is known a configuration in which a recess is provided on a circuit board on which an imaging element is mounted, the imaging element is disposed within the recess, and the circuit board and the imaging element are electrically connected via bonding wires. Furthermore, as another configuration, for example, as disclosed in Patent Document 3, there is known a configuration in which a light-transmitting member is positioned so as to cover a through-opening provided in a substrate from one side, and a semiconductor chip (optical element chip) is positioned so as to cover the opening from the other side. Furthermore, as yet another configuration, for example, as disclosed in Patent Document 4, there is known a configuration in which a plurality of semiconductor elements are arranged on the surface of a central region of a substrate, a peripheral region of the substrate is a thin plate portion thinner than the central region, and a wiring board is placed on this thin plate portion.

[0004] Reference List

[0005] Patent Literature

[0006] Patent Document 1: WO 2021 / 241053 A

[0007] Patent Document 2: Japanese Patent Application Publication No. 2008-187554

[0008] Patent Document 3: Japanese Patent Application Publication No. 2006-147916

[0009] Patent Document 4: Japanese Patent Application Publication No. 2020-88066 Summary of the Invention

[0010] Technical Problems to be Solved by the Invention

[0011] The aforementioned known semiconductor device configurations present the following problems. First, according to the CoB configuration disclosed in Patent Document 1, a frame for mounting sealing glass that protects the semiconductor chip and a lens that forms an optical system for the semiconductor chip is provided on a substrate. However, this configuration increases the overall thickness of the semiconductor device package structure. Furthermore, with the CoB configuration, the heat dissipation path from the semiconductor chip, which serves as a heat generating element, is limited to a downward direction corresponding to the side of the semiconductor chip attached to the substrate, making it difficult to achieve excellent heat dissipation.

[0012] Furthermore, the configuration disclosed in Patent Document 2 requires ensuring an area on the substrate for forming a recessed portion to accommodate the imaging element, making it difficult to miniaturize the substrate. Furthermore, the configuration disclosed in Patent Document 3 places the semiconductor chip and the light-transmitting member on both sides of the substrate having an opening, increasing the overall thickness of the package structure. Furthermore, the configuration disclosed in Patent Document 4 includes a thin plate portion for accommodating a wiring board in the peripheral area of ​​the substrate, making it difficult to simultaneously miniaturize the substrate and secure a sufficient mounting area for the semiconductor element.

[0013] Therefore, an object of the present technology is to provide a semiconductor device, an electronic apparatus, and a method for producing a semiconductor device, aiming to achieve a low-profile and miniaturized device configuration while ensuring excellent heat dissipation.

[0014] Technical solutions to technical problems

[0015] A semiconductor device according to the present technology includes: a substrate portion having a first plate surface and a second plate surface, both of which are flat; a semiconductor element having a front surface and a rear surface, the semiconductor element being embedded in the substrate portion with the front surface facing the first plate surface; and a wiring portion electrically connected to the semiconductor element.

[0016] In another aspect of the semiconductor device according to the present technology, the semiconductor device further includes a protection portion provided to cover a front surface of the semiconductor element.

[0017] In another aspect of the semiconductor device according to the present technology, the wiring portion includes: a front surface side wiring portion, which is arranged along the first board surface; a rear surface side wiring portion, which is arranged along the second board surface; and a through wiring portion, which is formed to extend through the substrate portion in the board thickness direction and electrically connect the front surface side wiring portion and the rear surface side wiring portion.

[0018] In another aspect of the semiconductor device according to the present technology, the substrate portion includes: a substrate main body, which has a plate shape and serves as a forming portion for forming a wiring portion; a first covering portion, which has an insulating property and forms a first plate surface by covering the plate surface of the substrate main body on the front surface side and the front surface side wiring portion; and a second covering portion, which has an insulating property and forms a second plate surface by covering the plate surface of the substrate main body on the rear surface side and the rear surface side wiring portion.

[0019] In another aspect of the semiconductor device according to the present technology, the through-wiring portion forms a hole extending through the substrate main body in the board thickness direction, and the resin portion including a resin material filling the hole is provided in the hole.

[0020] In another aspect of the semiconductor device according to the present technology, the semiconductor device further includes a heat dissipation portion provided in the substrate portion in a state of being in contact with the semiconductor element, the heat dissipation portion including a material having higher thermal conductivity than that of the substrate portion.

[0021] In another aspect of the semiconductor device according to the present technology, the through hole is formed to extend through the base plate portion in the board thickness direction.

[0022] In another aspect of the semiconductor device according to the present technology, the external connection terminals are provided on the second board surface of the substrate portion.

[0023] An electronic device according to the present technology includes a semiconductor device, which includes: a substrate portion having a first board surface and a second board surface, both of which are flat; a semiconductor element having a front surface and a rear surface, the semiconductor element being embedded in the substrate portion with the front surface facing the first board surface; and a wiring portion electrically connected to the semiconductor element.

[0024] A method for producing a semiconductor device according to the present technology includes: forming a protective portion arranged on the front surface side of a semiconductor element; electrically connecting the semiconductor element to a wiring film including a wiring material, wherein the front surface side faces the wiring film; forming a substrate body while ensuring that the semiconductor element is embedded in the substrate body with respect to the wiring film and the semiconductor element; forming a rear surface side wiring film covering the rear surface side of the substrate body; forming a front surface side wiring portion using the wiring film, forming a rear surface side wiring portion using the rear surface side wiring film, and forming a through wiring portion that electrically connects the front surface side wiring portion and the rear surface side wiring portion; and covering each of the board surface of the substrate body on the front surface side and the front surface side wiring portion, as well as each of the board surface of the substrate body on the rear surface side and the rear surface side wiring portion, with an insulating material. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 It is a side sectional view of the configuration of the solid-state imaging device according to the first embodiment of the present technology.

[0026] Figure 2 yes Figure 1 Enlarged view of block A in the middle.

[0027] Figure 3 It is a diagram for describing a method for producing the solid-state imaging device according to the first embodiment of the present technology.

[0028] Figure 4 It is a diagram for describing a method for producing the solid-state imaging device according to the first embodiment of the present technology.

[0029] Figure 5 It is a diagram for describing a method for producing the solid-state imaging device according to the first embodiment of the present technology.

[0030] Figure 6 It is a diagram for describing another example of the method for producing the solid-state imaging device according to the first embodiment of the present technology.

[0031] Figure 7 It is a diagram for describing another example of the method for producing the solid-state imaging device according to the first embodiment of the present technology.

[0032] Figure 8 It is a side sectional view of an application example of the solid-state imaging device according to the first embodiment of the present technology.

[0033] Figure 9 It is a side sectional view of the configuration of the solid-state imaging device according to the second embodiment of the present technology.

[0034] Figure 10 It is a side sectional view of the configuration of a solid-state imaging device according to a third embodiment of the present technology.

[0035] Figure 11 It is a side sectional view of the configuration of a solid-state imaging device according to a fourth embodiment of the present technology.

[0036] Figure 12 It is a side sectional view of an application example of the solid-state imaging device according to the fourth embodiment of the present technology.

[0037] Figure 13 It is a block diagram showing a configuration example of an electronic apparatus including a solid-state imaging device according to an embodiment of the present technology. DETAILED DESCRIPTION

[0038] The present technology aims to realize a low-profile, miniaturized semiconductor module using a configuration in which a semiconductor element is embedded in a substrate portion and the front and rear surfaces of the substrate portion are flat, while ensuring excellent heat dissipation.

[0039] Hereinafter, a mode for carrying out the present technology (hereinafter referred to as an "embodiment") will be described with reference to the accompanying drawings. Note that the drawings are schematic, and the dimensional ratios of the components and the like do not necessarily correspond to the dimensional ratios of the actual components. Furthermore, it goes without saying that the dimensional relationships and ratios between the drawings may differ in part. In the embodiments described below, an imaging device (solid-state imaging device) including a solid-state imaging element as an example of a semiconductor element will be described as an example of a semiconductor device. Note that the embodiments will be described in the following order.

[0040] 1. Configuration Example of Solid-State Imaging Device According to First Embodiment

[0041] 2. Method for producing the solid-state imaging device according to the first embodiment

[0042] 3. Another Example of the Method for Producing the Solid-State Imaging Device According to the First Embodiment

[0043] 4. Application Examples of the Solid-State Imaging Device According to the First Embodiment

[0044] 5. Configuration Example of Solid-State Imaging Device According to Second Embodiment

[0045] 6. Configuration Example of Solid-State Imaging Device According to Third Embodiment

[0046] 7. Configuration Example of Solid-State Imaging Device According to Fourth Embodiment

[0047] 8. Application Examples of the Solid-State Imaging Device According to the Fourth Embodiment

[0048] 9. Example of electronic device configuration

[0049] <1. Configuration Example of Solid-State Imaging Device According to First Embodiment>

[0050] Will refer to Figure 1 and Figure 2 A configuration example of a solid-state imaging device according to a first embodiment of the present technology will be described. Note that Figure 1 The upper and lower sides of correspond to the upper and lower sides of the solid-state imaging device 1 .

[0051] like Figure 1 As shown, the solid-state imaging device 1 includes a substrate portion 2, an image sensor 3 as a solid-state imaging element provided in the substrate portion 2, and a wiring portion 4 electrically connected to the image sensor 3. The solid-state imaging device 1 also includes a protective portion 5 provided on the image sensor 3. The solid-state imaging device 1 has an overall rectangular plate-shaped outline. However, the outline of the solid-state imaging device 1 is not particularly limited.

[0052] The substrate portion 2 is a base that forms the majority of the outline of the solid-state imaging device 1 and has a substrate front surface 2a serving as a first plate surface and a substrate rear surface 2b serving as a second plate surface. Both the substrate front surface 2a and the substrate rear surface 2b are flat. The plate thickness direction of the substrate portion 2 corresponds to the vertical direction of the solid-state imaging device 1, the substrate front surface 2a corresponds to the upper surface of the substrate portion 2, and the substrate rear surface 2b corresponds to the lower surface. Furthermore, the substrate portion 2 has four side surfaces 2c. The substrate front surface 2a, substrate rear surface 2b, and side surfaces 2c correspond to the upper surface, lower surface, and side surfaces of the solid-state imaging device 1, respectively.

[0053] The substrate unit 2 has the following configuration: both plate surfaces of a plate-like substrate body 10 are covered by a front surface-side cover 11 and a rear surface-side cover 12, each of which serves as an insulating portion. Specifically, the substrate unit 2 includes the plate-like substrate body 10, the front surface-side cover 11, which is a first cover formed on the upper surface 10a of the substrate body 10 and serves as the substrate front surface 2a, and the rear surface-side cover 12, which is a second cover formed on the lower surface 10b of the substrate body 10 and serves as the substrate rear surface 2b.

[0054] The substrate body 10 is a plate-shaped portion that forms the wiring portion 4. That is, the wiring portion 4 is formed in the substrate body 10 of the substrate portion 2. The substrate body 10 has four side surfaces 10c perpendicular to both the upper surface 10a and the lower surface 10b.

[0055] For example, the substrate body 10 is a portion formed by laminating a prepreg, which is a sheet-like member obtained by impregnating a fiber material (such as carbon fiber) with a matrix resin (such as epoxy resin); a portion including an organic material (such as glass epoxy resin), which is a fiber-reinforced plastic; etc. Alternatively, the substrate body 10 may be a portion including other types of substrates, such as a ceramic substrate including ceramics (such as aluminum oxide (Al2O3), aluminum nitride (AlN), or silicon nitride (Si3N4)) as a base material, or a glass substrate using glass.

[0056] Image sensor 3 is a semiconductor element including a semiconductor substrate including silicon (Si) as an example of a semiconductor. Image sensor 3 is a rectangular plate-shaped semiconductor chip. A front surface 3a (one of the plate surfaces) of image sensor 3 serves as a light-receiving surface, and the other plate surface on the other side of image sensor 3 serves as a rear surface 3b. Image sensor 3 has four side surfaces 3c.

[0057] A plurality of light receiving elements (photoelectric conversion elements) are formed on the front surface 3a of the image sensor 3. The image sensor 3 is a complementary metal oxide semiconductor (CMOS) image sensor. Alternatively, the image sensor 3 may be another imaging element such as a charge coupled device (CCD) image sensor.

[0058] The image sensor 3 includes a pixel region 15 on the front surface 3a, which is a light-receiving area formed with a large number of pixels, and a peripheral region 16, which is the area surrounding the pixel region 15. In the pixel region 15, a large number of pixels are formed in a predetermined arrangement pattern, such as a Bayer arrangement, and form a light-receiving portion of the image sensor 3. Each pixel in the pixel region 15 includes a photodiode, which is a photoelectric converter having a photoelectric conversion function, and a plurality of pixel transistors. Predetermined peripheral circuits are formed in the peripheral region 16. Signals processed by the peripheral circuits are output via the wiring section 4.

[0059] On the front surface 3a of the image sensor 3, a color filter and an on-chip lens are formed individually for each pixel. An antireflection film (e.g., an oxide film) and a planarization film (e.g., an organic material) are interposed between the semiconductor substrate and the color filter and on-chip lens. Light incident on the on-chip lens is received by the photodiode through the color filter, planarization film, etc.

[0060] On the front surface 3a of the image sensor 3, a plurality of connection pads 17 are formed, each of which serves as an electrode for receiving an electrical connection with the substrate section 2. The connection pads 17 are electrodes provided on the front surface 3a of the image sensor 3 and receiving an electrical connection from the wiring section 4. The connection pads 17 are formed so as to be exposed on the front surface 3a.

[0061] A plurality of connection pads 17 are formed in a predetermined arrangement in the peripheral area 16 on the front surface 3 a of the image sensor 3. For example, the plurality of connection pads 17 are provided in the peripheral edge portion of the front surface 3 a of the image sensor 3 so as to be arranged along the four sides of the image sensor 3. However, the arrangement of the connection pads 17 is not particularly limited. For example, the plurality of connection pads 17 may be arranged along a pair of opposing sides of the image sensor 3.

[0062] Note that the configuration of the image sensor 3 according to the present technology is not particularly limited. Examples of the configuration of the image sensor 3 include a front-illuminated type in which the pixel region 15 is formed on the front surface side of the semiconductor substrate, a back-illuminated type in which photodiodes and the like are arranged on the opposite side and the rear surface side of the semiconductor substrate is used as a light receiving surface to increase light transmittance, and the like.

[0063] The image sensor 3 described above has a front surface 3a and a rear surface 3b, and is embedded in the substrate section 2 with the front surface 3a facing the substrate front surface 2a of the substrate section 2. The image sensor 3 is provided so as to be fitted into the recess 20 provided in the substrate main body 10. The image sensor 3 is embedded in the substrate section 2 with the portion of the front surface 3a other than the peripheral edge portion exposed. The front surface 3a of the image sensor 3 is positioned lower than the substrate front surface 2a of the substrate section 2.

[0064] The recess 20 has a shape and size that matches the outline of the image sensor 3. The recess 20 is formed in a space open on the upper surface 10a of the substrate body 10, and has a rectangular opening shape corresponding to the outline of the image sensor 3. For example, when viewed from above, the recess 20 is formed in the center portion of the substrate portion 2.

[0065] The recess 20 has a bottom surface 20a extending along the plate surface of the substrate body 10 and four inner side surfaces 20b perpendicular to the bottom surface 20a. In this recess 20, the image sensor 3 is provided with a rear surface 3b and four side surfaces 3c that are in full contact with the bottom surface 20a and the four inner side surfaces 20b, respectively. That is, the image sensor 3 is provided with surfaces other than the front surface 3a that are in full contact with the substrate body 10, leaving no gaps relative to the bottom surface 20a and the four inner side surfaces 20b of the recess 20.

[0066] The depth of the recess 20 (i.e., the vertical dimension of the inner surface 20b) is approximately the same as the thickness of the image sensor 3. Specifically, the depth of the recess 20 is slightly greater than the thickness of the image sensor 3, and the front surface 3a of the image sensor 3 is positioned slightly lower than the upper surface 10a of the substrate body 10.

[0067] Wiring section 4 includes a front wiring section 31 disposed along substrate front surface 2a; a rear wiring section 32 disposed along substrate rear surface 2b; and a through wiring section 33 formed to extend through substrate section 2 in the board thickness direction and electrically connect front wiring section 31 and rear wiring section 32. Front wiring section 31, rear wiring section 32, and through wiring section 33 form wiring section 4, which is a continuous, integrated wiring section.

[0068] The wiring portion 4 is formed of a metal film including a metal material such as copper (Cu), aluminum (Al), gold (Au), silver (Ag), tungsten (W), molybdenum (Pt), or nickel (Ni). The wiring portion 4 is formed by, for example, electroplating, sputtering, or the like.

[0069] The front surface side wiring portion 31 is formed on and along the upper surface 10a of the substrate body 10 in a predetermined wiring pattern. One end of the front surface side wiring portion 31 is electrically connected to the connection pad 17 of the image sensor 3 via a bump 35. The front surface side wiring portion 31 has a plurality of end portions, each of which is connected to a corresponding one of the plurality of connection pads 17 via a bump 35.

[0070] The bump 35 is a connection terminal for electrically connecting the wiring portion 4 to the image sensor 3, and has a disk-like or rectangular outline, for example. The bump 35 is a metal portion made of, for example, copper, an alloy containing copper, gold, or the like. The bump 35 is formed by electroplating, sputtering, vapor deposition, or the like. Note that the bump 35 may be a portion including, for example, a solder ball, or may have a layered structure including a metal layer (such as copper) and a solder layer.

[0071] The lower side of the bump 35 is electrically connected to the corresponding connection pad 17 of the image sensor 3, and the upper side thereof is electrically connected to the corresponding inner end of the front surface side wiring portion 31. The vertical dimension of the bump 35 corresponds to the dimension of the step (the difference in height position) between the front surface 3a (peripheral area 16) of the image sensor 3 and the upper surface 10a of the substrate body 10.

[0072] Specifically, the front surface side wiring portion 31 is formed as a film-like portion having a predetermined thickness and includes a pad connection portion 31a that is a portion extending inward relative to the inner side surface 20b of the recess 20 provided in the substrate body 10 (see FIG. Figure 2 The pad connection portion 31a is located inwardly (in a plane direction perpendicular to the vertical direction) relative to the position B1 of the inner side surface 20b of the recess 20. Figure 2 A portion of the front surface side wiring portion 31 protruding (leftward in the middle).

[0073] A pad connection portion 31a is formed separately for each connection pad 17. Therefore, the front surface side wiring portion 31 includes a plurality of pad connection portions 31a. For example, depending on the arrangement of the connection pads 17, the plurality of pad connection portions 31a are formed into a sawtooth or comb-like shape (concave-convex shape) when viewed from above. Each pad connection portion 31a is located above the corresponding connection pad 17 and is aligned with the connection pad 17 when viewed from above. Then, a bump 35 is interposed between the connection pad 17 and the pad connection portion 31a, and the connection pad 17 and the pad connection portion 31a are electrically connected via the bump 35.

[0074] The rear surface side wiring portion 32 is formed in a predetermined wiring pattern on and along the lower surface 10b of the substrate body 10. Components such as capacitors and resistors, external connection terminals such as solder balls, etc. are provided so as to be electrically connected to the rear surface side wiring portion 32.

[0075] The through-wiring portion 33 is a wiring portion formed to cover the entire inner circumference of the through-hole 10d, which is formed to extend vertically (thickness-wise) through the substrate body 10. The through-wiring portion 33 is a cylindrical wiring portion formed with a predetermined thickness (film thickness) on the inner circumference of the through-hole 10d. Therefore, the hole 33a formed by the through-wiring portion 33 has a hole shape corresponding to the hole shape of the through-hole 10d. The through-hole 10d is, for example, a straight hole with a hole shape such as a circle or a rectangle when viewed from above.

[0076] The upper side of the through-wiring portion 33 is connected to the front-side wiring portion 31, and the lower side thereof is connected to the rear-side wiring portion 32. In the through-wiring portion 33, a hole 33a extends through the front-surface-side wiring portion 31 and the rear-surface-side wiring portion 32. That is, the front-surface-side wiring portion 31 and the rear-surface-side wiring portion 32 include portions that are continuous with the upper and lower open ends of the hole 33a of the through-wiring portion 33, respectively.

[0077] As described above, the through-wiring portion 33 forms a hole 33a extending through the substrate body 10 in the board thickness direction. Then, a resin portion 36 comprising a resin material that fills the hole 33a is disposed in the hole 33a. That is, in the wiring portion 4, the hole 33a formed by the through-wiring portion 33 is completely filled with the resin portion 36.

[0078] The resin portion 36 is a straight portion having a cross-sectional shape such as a circle or a rectangle according to the hole shape of the through hole 10d. The resin portion 36 has an upper end surface 36a flush with the upper surface 31b of the front wiring portion 31 and a lower end surface 36b flush with the lower surface 32b of the rear wiring portion 32 as the upper and lower end surfaces.

[0079] The resin portion 36 includes an insulating material. The resin material of the resin portion 36 is not particularly limited, but is, for example, a thermosetting resin (such as an acrylic resin, an epoxy resin, or a polyurethane resin) or a photosensitive resin (such as a UV curable resin). Note that the through-wiring portion 33 may be a hollow portion in the hole 33a, or may be a portion including a metal material that fills the through hole 10d of the substrate body 10 without the hole 33a.

[0080] In the configuration in which the wiring portion 4 is provided in the substrate main body 10 as described above, the front surface side cover portion 11 and the rear surface side cover portion 12 are provided on the upper surface side and the lower surface side of the substrate main body 10, respectively. The front surface side cover portion 11 covers the upper surface 10a, which is the board surface on the front surface side (upper side) of the substrate main body 10, and the front surface side wiring portion 31 to form a flat substrate front surface 2a. The rear surface side cover portion 12 covers the lower surface 10b, which is the board surface on the lower surface side (lower side) of the substrate main body 10, and the rear surface side wiring portion 32 to form a flat substrate rear surface 2b.

[0081] The front surface side cover 11 and the rear surface side cover 12 are formed as insulating portions using an insulating material. The front surface side cover 11 and the rear surface side cover 12 are formed, for example, by applying a resist material mainly containing a resin or the like. Note that the material of the front surface side cover 11 and the rear surface side cover 12 is not particularly limited as long as it is an insulating material. Examples of the material of the cover include thermosetting resins (such as acrylic resins, epoxy resins, or polyurethane resins) or photosensitive resins (such as UV curable resins).

[0082] The front surface side cover portion 11 is formed on the substrate front surface 2a of the substrate portion 2 to ensure that the entire pixel region 15, including the front surface 3a of the image sensor 3, is partially exposed. That is, the front surface side cover portion 11 has an opening 11a that extends across the pixel region 15 and its peripheral area when viewed from above. The opening 11a has, for example, a rectangular shape corresponding to the outline of the pixel region 15 when viewed from above, and is formed by four wall surfaces 11b.

[0083] The front surface side cover 11 includes a peripheral area cover 11d, which is a portion covering the peripheral area 16 of the front surface 3a of the image sensor 3. The peripheral area cover 11d is a portion of the front surface side cover 11 that extends inward relative to the portion on the upper surface 10a of the substrate body 10 on the front surface 3a of the image sensor 3, and covers the portion of the pad connection portion 31a connected to the connection pad 17 via the bump 35. The peripheral area cover 11d is a portion of the front surface side cover 11 that extends inward (in a plane direction perpendicular to the vertical direction) relative to the position B1 of the inner side surface 20b of the recess 20. Figure 2 The inner end surface of the peripheral area covering portion 11d serves as the wall surface 11b of the opening 11a. As described above, the front surface side covering portion 11 includes the peripheral area covering portion 11d, which overlaps with the peripheral area 16 of the image sensor 3 when viewed from above and covers the connection portion where the wiring portion 4 connects to the image sensor 3.

[0084] In the substrate portion 2 including the substrate body 10 provided with the front surface side cover 11 and the rear surface side cover 12 as described above, the four side surfaces 11 c and 12 c of the covers form flush side surfaces 2 c with the side surfaces 10 c of the substrate body 10 .

[0085] The protective portion 5 is provided to cover the front surface 3a of the image sensor 3. The protective portion 5 is a portion provided on the front surface 3a of the image sensor 3 to cover and protect the pixel region 15, and is formed to cover the pixel region 15 and its peripheral area. The protective portion 5 is provided to form a common layer with the surface layer on the upper surface 10a side of the substrate body 10 in the solid-state imaging device 1.

[0086] The protective portion 5 has a flat upper surface 5a and is configured to completely close the opening 11a of the front surface-side cover portion 11 that exposes the pixel area 15. The protective portion 5 is configured to ensure that the upper surface 5a is positioned flush or nearly flush with the upper surface 10a of the substrate body 10. Therefore, the upper surface 5a of the protective portion 5 is located below the substrate front surface 2a.

[0087] exist Figure 1 In the illustrated example, the protective portion 5 is arranged to substantially fill the lower half of the recess formed by the front surface 3a of the image sensor 3 and the four wall surfaces 11b of the front surface side cover 11. The protective portion 5 can be arranged to ensure that the upper surface 5a is positioned flush with the substrate front surface 2a, or it can be arranged to ensure that the upper surface 5a is positioned higher than the substrate front surface 2a. However, from the perspective of suppressing damage to the protective portion 5, for example, the protective portion 5 is preferably arranged to ensure that the upper surface 5a is positioned flush with or lower than the substrate front surface 2a.

[0088] The protective portion 5 is configured as a transparent portion or a light-transmitting portion so as not to obstruct light reception in the pixel area 15 of the image sensor 3. For example, the protective portion 5 is a portion comprising a transparent resin material such as acrylic resin, epoxy resin, polycarbonate resin, polyimide resin, or liquid silicone rubber, or a transparent inorganic material such as SiO2. Alternatively, the protective portion 5 may be a plate-like transparent member or a light-transmitting member bonded with a transparent or light-transmitting adhesive (transparent resin). Note that as the transparent member or light-transmitting member, for example, glass, a plastic plate, a silicon plate, or the like can be used.

[0089] <2. Method for Producing Solid-State Imaging Device According to First Embodiment>

[0090] Will refer to Figures 3 to 5 An example of a method for producing the solid-state imaging device 1 according to the first embodiment of the present technology is described.

[0091] First, if Figure 3 As shown in FIG. 1A , a silicon wafer 40 having a pixel region 15 corresponding to each image sensor 3 and a plurality of connection pads 17 formed on a front surface 40 a is prepared. The silicon wafer 40 has undergone various processes for forming the image sensor 3. That is, the silicon wafer 40 is a semiconductor wafer in which a plurality of sensor element portions 3X to be used as image sensors 3 are formed in a predetermined arrangement, each image sensor having a pixel group formed on one plate surface. Note that a back grinding (BG) process is performed on the silicon wafer 40 to grind (polish) the silicon wafer 40 from the rear surface 40 b in order to adjust the silicon wafer 40 to a desired thickness that does not affect the device characteristics.

[0092] Then, if Figure 3As shown in FIG. 1B , a process for forming the protective portion 5 covering the pixel region 15 is performed on each sensor element portion 3X. In this process, for example, a transparent resin material forming the protective portion 5 is applied to a predetermined area including the entire pixel region 15 and cured to form the protective portion 5. Alternatively, for example, the protective portion 5 can be formed by attaching a transparent member such as a glass plate using a transparent adhesive so as to cover the entire pixel region 15. The process of forming the protective portion 5 on each sensor element portion 3X of the silicon wafer 40 as described above corresponds to the process of forming the protective portion 5 provided on the front surface 3 a of the image sensor 3.

[0093] Then, if Figure 3 As shown in FIG. 3C , a process of forming bumps 35 on the plurality of connection pads 17 of each sensor element portion 3X is performed. Each bump 35 includes a metal material such as copper or a copper alloy and is formed by electroplating, sputtering, vapor deposition, etc. In addition, the bump 35 may be a stud bump formed using, for example, a wire bonding device.

[0094] Next, the silicon wafer 40 is cut along a predetermined cutting line using a dicing blade. That is, a process of cutting the silicon wafer 40 into chips each corresponding to the image sensor 3 along a predetermined arrangement is performed. As a result, as shown in FIG. Figure 3 As shown in FIG. 4 , a plurality of image sensors 3 are obtained, each of which has a pixel region 15 covered by a protective portion 5 .

[0095] Then, if Figure 4 As shown in FIG. 1A , a copper foil 45 is prepared, and a process of connecting the image sensors 3 to the copper foil 45 in a face-down orientation is performed. In this process, as the plurality of image sensors 3 are flipped upside down so that the bumps 35 face the copper foil 45, the image sensors 3 are rearranged on the copper foil 45 to connect the bumps 35 to the copper foil 45.

[0096] The copper foil 45 has a layered structure comprising a wiring copper foil that forms the front surface-side wiring portion 31 in the solid-state imaging device 1, and a support copper foil thicker than the wiring copper foil. Note that instead of using the copper foil 45, for example, a structure obtained by attaching the copper foil to the plate surface of a support substrate such as glass may be used. The process of rearranging the image sensor 3 on the copper foil 45 corresponds to the process of connecting the image sensor 3 to the copper foil 45, which is a wiring film including a wiring material, with the front surface 3a facing the copper foil 45.

[0097] Then, if Figure 4As shown in FIG. 1B , a process is performed to form a substrate body 10X while ensuring that each image sensor 3 is embedded in the copper foil 45 and the image sensor 3. The substrate body 10X is a portion to be used as the substrate body 10 in the solid-state imaging device 1. The substrate body 10X is formed by, for example, laminating a plurality of prepregs by pressure lamination, including a prepreg having through-holes corresponding to the image sensors 3.

[0098] Note that the method for forming the substrate body 10X is not particularly limited. For example, injection molding using a predetermined resin material can be used to form the substrate body 10X. Furthermore, by using a substrate member having the recess 20 and fitting the image sensor 3 into the recess 20, a substrate body 10X for the image sensor 3 can also be provided. In this case, the copper foil 45 is bonded to the substrate member using an adhesive or the like.

[0099] Then, if Figure 4 As shown in FIG. 1B , a process of providing copper foil 46 on substrate body 10X is performed. In this process, board surface 10z on the side of substrate body 10X away from copper foil 45 is flattened, and then copper foil 46 is laminated onto board surface 10z. The process of forming copper foil 46 on substrate body 10X as described above corresponds to the process of forming copper foil 46 as a wiring film on the rear surface side covering board surface 10z, which is the rear surface side of substrate body 10X.

[0100] Next, the front wiring portion 31 is formed using the copper foil 45 , the rear wiring portion 32 is formed using the copper foil 46 , and the through wiring portion 33 electrically connecting the front wiring portion 31 and the rear wiring portion 32 is formed.

[0101] Specifically, first, Figure 4 As shown in FIG. 3C , a process is performed to form a through hole 47, which is a via hole extending through the substrate body 10X and the upper copper foil 45 and the lower copper foil 46. The portion of the through hole 47 formed in the substrate body 10X corresponds to the through hole 10d in the solid-state imaging device 1. Note that when forming the through hole 47, a process of removing the supporting copper foil from the copper foil 45 is performed in advance.

[0102] Then, if Figure 5 As shown in FIG. 1A , a wiring pattern serving as the front wiring portion 31 is formed on copper foil 45 by patterning using photolithography techniques or the like. When forming the front wiring portion 31, openings 45 a are formed in copper foil 45 to expose the protective portion 5 covering the pixel region 15 of the image sensor 3 . The openings 45 a are formed throughout the protective portion 5 . The openings 45 a expose the pixel region 15 through the protective portion 5 .

[0103] like Figure 5As shown in FIG. 1A , the inner peripheral surface of the through hole 47 , the copper foil 45 , etc. are plated with a metal material (such as copper) forming the wiring portion 4 , thereby forming the front surface side wiring portion 31 and the through wiring portion 33 . Figure 5 In the example shown in FIG. 1A , the through wiring portion 33 is formed with a hole 33 a. Note that other methods such as sputtering may be used to form these wiring portions.

[0104] Then, if Figure 5 As shown in FIG. 1A , a process of forming the resin portion 36 in the hole 33a of the through-wiring portion 33 is performed. The resin portion 36 is formed by, for example, filling the hole 33a with a predetermined resin material and curing the resin material.

[0105] Then, if Figure 5 As shown in FIG. 2B , a wiring pattern serving as the rear surface wiring portion 32 is formed by patterning copper foil 46 using a photolithography technique or the like. Through the above-described process, the wiring portion 4 including the front surface wiring portion 31, the rear surface wiring portion 32, and the through-wiring portion 33 is formed, and the resin portion 36 is formed in the hole 33a of the through-wiring portion 33. Note that if the resin portion 36 is not provided, it is not necessary to form the hole 33a in the through-wiring portion 33, eliminating the need for a process to form the resin portion 36.

[0106] Then, a process of covering the front surface side board surface 10y of the substrate body 10X, the front surface side wiring portion 31, the rear surface side board surface 10z of the substrate body 10X, and the rear surface side wiring portion 32 with an insulating material is performed. Figure 5 As shown in FIG. 3C , the front surface side cover 11 and the rear surface side cover 12 are formed by applying an insulating material such as acrylic resin to the plate surface 10 y and the plate surface 10 z of the substrate body 10X and curing the insulating material.

[0107] In the structure obtained by the above treatment (see Figure 5 C), a dicing blade is used to cut along a predetermined cutting line. That is, a process is performed to cut the structure into chips corresponding to the image sensor 3 and the component parts including the substrate part 2, the wiring part 4, and the protection part 5 provided for the image sensor 3. As a result, the following is obtained: Figure 1 The solid-state imaging device 1 is shown.

[0108] <3. Another Example of the Method for Producing the Solid-State Imaging Device According to the First Embodiment>

[0109] Will refer to Figure 6 and Figure 7 Another example of the method for producing the solid-state imaging device 1 according to the first embodiment of the present technology is described.

[0110] In the production method of this example, first, as Figure 6 As shown in FIG. 1A , a plurality of image sensors 3 are produced by a process similar to the above-described production method. Each image sensor includes a pixel region 15 covered by a protective portion 5 and a bump 35 formed individually for each connection pad 17 .

[0111] In the production method of this example, Figure 6 As shown in FIG. 1B , a wiring substrate 50 is used. The wiring substrate 50 includes a support substrate 51 as a flat plate member and a copper foil 52 as an example of a wiring material that is detachably provided on the support substrate 51. The support substrate 51 is a member that is temporarily used during production and is ultimately separated and removed. The material of the support substrate 51 is not particularly limited, as long as it has the required support strength. The support substrate 51 is, for example, a plate member made of an inorganic material such as glass, ceramic, metal, or silicon, or a plastic.

[0112] The wiring substrate 50 has a structure in which, for example, a copper foil 52 is laminated onto a support substrate 51, with a release layer (not shown) interposed between the copper foil 52 and the support substrate 51. When exposed to external energy such as light or heat, the release layer has the property of deteriorating the adhesive strength by being destroyed and decomposed. The release layer is formed by applying a release material, attaching a sheet member such as a release tape, or the like.

[0113] Then, if Figure 6 As shown in FIG. 3C , a wiring pattern serving as wiring portion 31X is formed by patterning copper foil 52 of wiring substrate 50 using a photolithography technique or the like. This wiring portion is to be used as front-surface wiring portion 31. In forming wiring portion 31X, opening 52a is formed in copper foil 52 to expose protective portion 5 covering pixel region 15 of image sensor 3.

[0114] Then, if Figure 6 As shown in FIG. 2D , a process is performed to connect the image sensors 3 in a face-down orientation to the wiring portion 31X formed on the wiring substrate 50. In this process, as the plurality of image sensors 3 are flipped upside down so that the bumps 35 face the wiring portion 31X, the image sensors 3 are rearranged on the wiring substrate 50 to connect the bumps 35 to the wiring portion 31X. The process of rearranging the image sensors 3 on the wiring substrate 50 corresponds to the process of connecting the image sensors 3 to the wiring portion 31X, which is a wiring film including a wiring material, with the front surface 3a facing the wiring portion 31X.

[0115] Subsequently, a process of forming the substrate body 10X while ensuring that each image sensor 3 is embedded and a process of forming the copper foil 46 covering the board surface 10z of the substrate body 10X are performed in a manner similar to the above-described production method for the wiring portion 31X and the image sensor 3 (see FIG. Figure 7 A).

[0116] Afterwards, if Figure 7 As shown in A of , a process of releasing the support substrate 51 is performed. That is, in this process, the support substrate 51 is removed from the front surface side wiring portion 31 and then discarded (see arrow C1). In this process, for example, by irradiating the release layer with light of a predetermined wavelength such as UV light or heating the release layer, the release layer is converted into a state that is easy to remove, and thus the support substrate 51 is removed from the front surface side wiring portion 31. In the case of irradiating the release layer with light, as the support substrate 51, a substrate including a material that transmits light (such as glass or a transparent plastic plate) is used. Note that as a method for removing the support substrate 51, in addition to light and heat, physical force can also be used.

[0117] Next, in a manner similar to the above-mentioned production method, Figure 7 As shown in FIG. 1B , a process is performed to form the front surface side wiring portion 31 using the wiring portion 31X, to form the rear surface side wiring portion 32 using the copper foil 46, and to form the through wiring portion 33 that electrically connects the front surface side wiring portion 31 and the rear surface side wiring portion 32, and a process is performed to form the resin portion 36. Note that the production method of this example differs from the above-described production method in that the wiring portion 31X formed on the substrate main body 10X is used to form the front surface side wiring portion 31.

[0118] Then, if Figure 7 As shown in FIG. 3 , the process of forming the front surface side cover 11 and the rear surface side cover 12 is performed in a manner similar to the above-mentioned production method. The structure obtained by the above-mentioned process is cut into chips, thereby obtaining Figure 1 The solid-state imaging device 1 is shown.

[0119] The solid-state imaging device 1 according to the present embodiment as described above can achieve a low-profile and miniaturized device configuration while ensuring excellent heat dissipation.

[0120] The solid-state imaging device 1 does not require glass for protecting the image sensor 3 , a frame for holding the glass, or the like; therefore, it is possible to suppress an increase in thickness of the solid-state imaging device 1 and achieve a compact device configuration, particularly a low-profile device configuration.

[0121] Furthermore, in the solid-state imaging device 1, the image sensor 3 is provided with a rear surface 3b and four side surfaces 3c that are in full contact with the substrate body 10 forming the substrate portion 2. With this configuration, the heat dissipation path from the image sensor 3, which serves as a heat generating element, is not limited to the downward direction; therefore, a heat dissipation path is easily secured and excellent heat dissipation is achieved. Consequently, it is possible to maintain proper operating conditions of the solid-state imaging device 1 and achieve desired characteristics.

[0122] Furthermore, in the solid-state imaging device 1, a flat substrate front surface 2a exists around the image sensor 3 on the upper side, which is the light-receiving side, of the image sensor 3. With this configuration, when the solid-state imaging device 1 is used as a camera module substrate including the image sensor 3, the substrate front surface 2a can be used as a mounting surface for a lens mounting frame for mounting the lens forming the optical system of the image sensor 3. As a result, the entire camera module system can be made low-profile.

[0123] Furthermore, the configuration in which the image sensor 3 is embedded in the substrate portion 2 and the substrate front surface 2a is flat makes it possible to place the lens frame closer to the pixel area 15 of the image sensor 3 while ensuring a mounting area for components and the like on the substrate front surface 2a. This allows the size of the substrate portion 2 to be reduced relative to the image sensor 3, achieving device miniaturization and high-density mounting.

[0124] Specifically, the front surface side covering portion 11 forming the substrate front surface 2a has a peripheral region covering portion 11d extending over the peripheral region 16 of the image sensor 3 to cover the connection portion formed by the bumps 35 (see FIG. Figure 2 This configuration enables the substrate front surface 2 a to be brought as close as possible to the pixel region 15 of the image sensor 3 , allowing for efficient miniaturization of the substrate portion 2 .

[0125] Furthermore, the solid-state imaging device 1 includes a protective portion 5 that covers the front surface 3a of the image sensor 3. This configuration can prevent chemicals or external loads from contaminating or damaging the pixel region 15 and other devices on the chip surface of the image sensor 3 during the production process of the solid-state imaging device 1.

[0126] The wiring section 4 includes a front surface side wiring section 31, a rear surface side wiring section 32, and a through wiring section 33. This configuration enables a wiring structure that follows the contour of the substrate section 2 for the connection section that electrically connects the image sensor 3 to the substrate section 2, effectively achieving miniaturization and a low-profile device configuration.

[0127] In addition, the configuration of the wiring portion 4 can realize a wireless bonding connection structure that does not require bonding wires for electrical connection to the image sensor 3. Therefore, compared with a configuration using wiring, it is possible to shorten the wiring length while reducing the spacing between the plurality of connection pads 17. These aspects are advantageous for achieving a miniaturized and low-profile device configuration. In addition, in a configuration using wiring, the lead arrangement portion protrudes from the substrate surface, and therefore it is necessary to expand the substrate to ensure the mounting area of ​​the lens mounting frame. In this regard, according to the configuration of the solid-state imaging device 1 of the present embodiment, utilizing a wireless bonding connection structure, it is possible to easily ensure the mounting area of ​​the lens mounting frame on the front surface 2a of the substrate without expanding the substrate portion 2.

[0128] Furthermore, regarding the wiring structure of wiring portion 4, resin portion 36 is provided to fill holes 33a extending through wiring portion 33. Compared to, for example, a configuration in which holes 33a have a hollow interior, this configuration can increase the rigidity of substrate body 10, which in turn can suppress deformation such as warping of substrate portion 2. Furthermore, according to the configuration in which resin portion 36 is provided, the amount of metal material in wiring portion 4 can be reduced compared to a configuration in which holes 33a are filled with metal material extending through wiring portion 33.

[0129] Furthermore, the substrate portion 2 includes a substrate body 10, and a front surface side cover portion 11 and a rear surface side cover portion 12 provided on both plate surfaces of the substrate body 10. According to this configuration, in a configuration in which the front surface side wiring portion 31 and the rear surface side wiring portion 32 are provided on the upper plate surface and the lower plate surface of the substrate body 10, respectively, it is possible to easily form the flat substrate front surface 2a and substrate rear surface 2b as surfaces to receive the mounting of a lens frame, components, etc.

[0130] <4. Application Examples of Solid-State Imaging Device According to First Embodiment>

[0131] Will refer to Figure 8 An application example of the solid-state imaging device 1 according to the first embodiment of the present technology will be described. This application example is an example of a case where the solid-state imaging device 1 is applied as a camera module substrate including the image sensor 3 .

[0132] like Figure 8 As shown, the solid-state imaging device 1 as a camera module substrate has a lens unit 61 mounted on the substrate front surface 2a to constitute a camera module 60. The lens unit 61 forms an image on the image sensor 3 by focusing light from a subject via one or more lenses 62. The lens unit 61 includes a lens mounting frame 63 having a tubular structure, and supports the lens 62 in the frame 63 so that the optical axis of the lens 62 is aligned with the axial direction of the tubular frame 63.

[0133] The lens unit 61 is mounted on the solid-state imaging device 1, wherein the attachment surface 64 on the lower side of the frame 63 is attached to the substrate front surface 2a of the solid-state imaging device 1 using an adhesive or the like. In the configuration in which the lens unit 61 is provided on the solid-state imaging device 1, light collected by the lens 62 is incident on the light receiving surface formed by the pixel area 15 of the image sensor 3. In addition, Figure 8 In the illustrated example, a plurality of surface mount components 65 such as capacitors and resistors are mounted at predetermined positions on the substrate front surface 2 a and the substrate rear surface 2 b of the substrate portion 2 .

[0134] According to this application example, since the frame 63 of the lens unit 61 can be mounted on the substrate front surface 2a, the entire camera module 60 can be made low-profile compared to, for example, a known CoB configuration. In addition, while ensuring a mounting area for surface-mounted components 65 and the like on the substrate front surface 2a, the mounting position of the frame 63 (the contact position of the attachment surface 64) can be made closer to the pixel area 15 of the image sensor 3. Specifically, in this embodiment, since the front surface side cover 11 forming the substrate front surface 2a has a peripheral area cover 11d that overlaps with the image sensor 3, the mounting position of the frame 63 can be made as close to the pixel area 15 as possible. This allows the size of the substrate unit 2 to be reduced relative to the image sensor 3, achieving device miniaturization and high-density mounting.

[0135] <5. Configuration Example of Solid-State Imaging Device According to Second Embodiment>

[0136] Will refer to Figure 9 In each embodiment described below, the same reference numerals are used for components common to or corresponding to those of the first embodiment, and descriptions thereof will be omitted as appropriate.

[0137] like Figure 9 As shown, the solid-state imaging device 70 according to the present embodiment includes heat dissipation portions (71, 72) made of a material having a higher thermal conductivity than that of the substrate portion 2. In the present embodiment, the heat dissipation portions (71, 72) are made of a material having a higher thermal conductivity than that of the substrate body 10, the front surface side cover portion 11, and the rear surface side cover portion 12 constituting the substrate portion 2. The heat dissipation portions (71, 72) are provided in the substrate portion 2 in a state of contact with the image sensor 3.

[0138] The solid-state imaging device 70 includes a first heat dissipation portion 71 provided below the image sensor 3 and in contact with the rear surface 3 b of the image sensor 3, and a second heat dissipation portion 72 provided beside the image sensor 3 and in contact with the side surface 3 c of the image sensor 3 as heat dissipation portions. The first heat dissipation portion 71 and the second heat dissipation portion 72 are provided so as to be embedded in the substrate portion 2. The first heat dissipation portion 71 and the second heat dissipation portion 72 are provided by, for example, embedding a heat dissipation member made of a metal material in the substrate body 10.

[0139] The materials of the first heat dissipation portion 71 and the second heat dissipation portion 72 are not particularly limited, but a material having high thermal conductivity is preferred from the perspective of heat dissipation, and a material having a low linear expansion coefficient is preferred from the perspective of suppressing deformation caused by heat. Examples of materials of the first heat dissipation portion 71 and the second heat dissipation portion 72 include copper (Cu), copper alloys, tungsten (W), aluminum (Al), stainless steel (SUS), Fe-Ni-Co alloy, 42 alloy, etc. Note that the first heat dissipation portion 71 and the second heat dissipation portion 72 may be portions including materials other than metal materials such as ceramics or resins. In addition, the first heat dissipation portion 71 and the second heat dissipation portion 72 may be portions including the same material or portions including different materials. In addition, the first heat dissipation portion 71 and the second heat dissipation portion 72 may include the same material as the material of the wiring portion 4.

[0140] The first heat dissipation portion 71 is configured by placing a rectangular plate-shaped member below the image sensor 3 and has an upper surface 71a, a lower surface 71b, and four side surfaces 71c, all of which are flat. The first heat dissipation portion 71 is arranged so that the upper surface 71a contacts the rear surface 3b of the image sensor 3 and the lower surface 71b is flush with the lower surface 10b of the substrate body 10. Thus, the lower surface 71b of the first heat dissipation portion 71, together with the lower surface 10b of the substrate body 10, forms the surface on which the rear surface side cover 12 is formed. The side surfaces 71c of the first heat dissipation portion 71 contact the substrate body 10.

[0141] exist Figure 9 In the illustrated example, the first heat dissipation portion 71 is positioned so that its upper surface 71a contacts the center portion of the rear surface 3b of the image sensor 3 and partially contacts the rear surface 3b. However, the first heat dissipation portion 71 may have outer dimensions that are approximately the same as or larger than the outer dimensions of the image sensor 3 as viewed from above, and may be positioned so as to completely contact the rear surface 3b of the image sensor 3. Furthermore, by positioning the lower surface 71b higher than the lower surface 10b of the substrate body 10 and covering the lower surface 71b with the substrate body 10, the first heat dissipation portion 71 may be positioned so as to be completely embedded in the substrate body 10. Furthermore, the shape of the first heat dissipation portion 71 is not particularly limited.

[0142] The second heat dissipation portion 72 is configured by placing a rectangular plate-shaped member next to the image sensor 3 and has an upper surface 72a, a lower surface 72b, an inner surface 72c, and an outer surface 72d, all of which are flat. The second heat dissipation portion 72 is arranged so that the inner surface 72c contacts the side surface 3c of the image sensor 3 and the outer surface 72d is positioned flush with the side surface 10c of the substrate body 10. Therefore, the outer surface 72d of the second heat dissipation portion 72, together with the side surface 10c of the substrate body 10 and the like, forms the side surface 2c of the substrate unit 2.

[0143] exist Figure 9In the illustrated example, the second heat dissipation member 72 is positioned so that the inner surface 72c contacts a portion of the side surface 3c, specifically, the inner surface 72c contacts the lower portion of the side surface 3c of the image sensor 3, with the through-wiring portion 33 extending through the second heat dissipation member 72. With this configuration, the second heat dissipation member 72 is interposed between the upper portion 10e, which forms the upper surface 10a of the substrate body 10, and the lower portion 10f, which forms the lower surface 10b of the substrate body 10. However, the second heat dissipation member 72 may have a vertical dimension (thickness) that is substantially the same as or greater than the vertical dimension (thickness) of the image sensor 3 and be positioned to fully contact the side surface 3c of the image sensor 3. Furthermore, by positioning the outer surface 72d inward relative to the side surface 10c of the substrate body 10 and covering the outer surface 72d with the substrate body 10, the second heat dissipation member 72 may be positioned to be completely embedded in the substrate body 10.

[0144] In addition, the shape of the second heat dissipation part 72 is not particularly limited. For example, the second heat dissipation part 72 may be arranged at a plurality of positions, that is, for each side surface 3c of the image sensor 3, and may be provided as a continuous integral portion having a frame-shaped outline viewed from above to surround the image sensor 3. Figure 9 In the illustrated example, the second heat dissipation portion 72 is provided in contact with the through-wiring portion 33 , but may be provided as a portion not in contact with the through-wiring portion 33 .

[0145] The process of forming the substrate main body 10X in the above-described method for producing the solid-state imaging device 1 (see Figure 4 In B), the first and second heat dissipating portions 71 and 72 are provided by, for example, laminating a plate-shaped heat dissipating body forming the first and second heat dissipating portions 71 and 72 with a plurality of prepregs as one of the plurality of laminates forming the substrate body 10X. Alternatively, the first and second heat dissipating portions 71 and 72 may be provided by, for example, forming a space such as a recess in the substrate body 10X during the process of forming the substrate body 10X and fitting the heat dissipating body forming the first and second heat dissipating portions 71 and 72 into the space.

[0146] Since the solid-state imaging device 70 according to this embodiment includes a first heat dissipation portion 71 and a second heat dissipation portion 72, compared with a case where the contact portion that contacts the rear surface 3b and the side surface 3c of the image sensor 3 only includes the substrate body 10, it is possible to effectively dissipate the heat generated from the image sensor 3 as a heating element and enhance the heat dissipation characteristics.

[0147] From the perspective of achieving high heat dissipation through the first heat dissipation portion 71 and the second heat dissipation portion 72, the second heat dissipation portion 72 is preferably provided in contact with the through-wiring portion 33. With this configuration, the wiring portion 4 can be used as a heat dissipation path from the image sensor 3. In addition, by using a material having higher rigidity than the substrate body 10 as the material of the first heat dissipation portion 71 and the second heat dissipation portion 72, it becomes easier to ensure the rigidity of the substrate portion 2, thereby suppressing deformation of the solid-state imaging device 1. In addition, it is only necessary to provide at least one of the first heat dissipation portion 71 and the second heat dissipation portion 72. In addition, it is only necessary that the material of the first heat dissipation portion 71 and the second heat dissipation portion 72 be a material having higher thermal conductivity than the material of at least the substrate body 10 among the substrate body 10, the front surface side cover portion 11, and the rear surface side cover portion 12 constituting the substrate portion 2.

[0148] <6. Configuration Example of Solid-State Imaging Device According to Third Embodiment>

[0149] Will refer to Figure 10 A configuration example of a solid-state imaging device 80 according to a third embodiment of the present technology will be described.

[0150] like Figure 10 As shown, in the solid-state imaging device 80 according to this embodiment, a through hole 81 is formed to extend through the substrate portion 2 in the board thickness direction. The through hole 81 is a straight hole extending in the vertical direction and has a circular hole shape defined by a cylindrical inner peripheral surface 81a when viewed from above. The through hole 81 is formed to open on the substrate front surface 2a and the substrate rear surface 2b. In other words, the through hole 81 is formed in the substrate body 10, the front surface side cover 11, and the rear surface side cover 12 and extends through the substrate portion 2.

[0151] In the substrate portion 2, a plurality of through holes 81 are formed in a region outside (on the outer peripheral side) of a region where the wiring portion 4 is formed so as not to interfere with the wiring portion 4. For example, the plurality of through holes 81 are formed in an arrangement that is line-symmetrical or point-symmetrical with respect to the outline of the solid-state imaging device 1 when viewed from above.

[0152] The through hole 81 is formed by processing the substrate portion 2 after the process of forming the front surface side cover portion 11 and the rear surface side cover portion 12. For the formation of the through hole 81, processing techniques such as machining including drilling and perforating, laser processing, and hole making processing such as etching are appropriately used.

[0153] The solid-state imaging device 80 according to this embodiment allows the through-hole 81 to be used for attaching the solid-state imaging device 80 to an external device. For example, in a camera, when the solid-state imaging device 80 is attached to a frame constituting a lens unit forming an optical system, a housing supporting the lens unit, or the like (hereinafter referred to as the "frame"), the through-hole 81 serves as a fastening hole through which a fixing screw is passed. For example, a screw is inserted through the through-hole 81 to engage with a threaded hole formed on the frame side.

[0154] Then, when the solid-state imaging device 80 is attached to an external device, the flat front surface 2a of the substrate is used as a reference surface, and the solid-state imaging device 80 is tightened and fixed using the through-hole 81 to achieve alignment with the optical axis of the lens unit. That is, as the solid-state imaging device 80 is tightened and fixed to the frame using a screw, the front surface 2a of the substrate serving as the reference surface contacts the attachment surface serving as the frame side reference surface to position the solid-state imaging device 80 relative to the frame. Here, the solid-state imaging device 80 is positioned so that the front surface 3a of the image sensor 3 is perpendicular to the optical axis of the lens unit. In addition, according to the configuration in which the through-hole 81 is provided at multiple positions, the positioning of the solid-state imaging device 80 relative to the frame (optical axis alignment) can be performed in a planar direction perpendicular to the optical axis of the lens unit.

[0155] <7. Configuration Example of Solid-State Imaging Device According to Fourth Embodiment>

[0156] Will refer to Figure 11 A configuration example of a solid-state imaging device 90 according to a fourth embodiment of the present technology will be described.

[0157] like Figure 11 As shown, in the solid-state imaging device 90 according to this embodiment, a plurality of solder balls 91 serving as external connection terminals are provided on the substrate rear surface 2b of the substrate unit 2. Each solder ball 91 is provided corresponding to a terminal electrode formed on the substrate rear surface 2b. The terminal electrode on which the solder ball 91 is placed is electrically connected to a predetermined wiring portion formed in the substrate unit 2.

[0158] A plurality of solder balls 91 are two-dimensionally arranged in a grid pattern along the rectangular outline of the image sensor 3 to form a ball grid array (BGA). The solid-state imaging device 90 is reflow-mounted on a mounting substrate as a circuit board having a predetermined circuit using the solder balls 91 .

[0159] The plurality of solder balls 91 are provided by forming the plurality of solder balls 91 on the substrate rear surface 2b after the process of forming the front surface side cover 11 and the rear surface side cover 12. Here, ball mounting is performed to place a solder ball on each of the plurality of terminal electrodes formed on the substrate rear surface 2b.

[0160] The solid-state imaging device 90 according to this embodiment can be secondarily mounted on a substrate, allowing the solid-state imaging device 90 to be used as an image sensor package. Note that as external connection terminals, in addition to the solder balls 91, external leads, connectors (plugs), pins, etc. can also be provided.

[0161] <8. Application Examples of Solid-State Imaging Device According to Fourth Embodiment>

[0162] Will refer to Figure 12An application example of the solid-state imaging device 90 according to the fourth embodiment of the present technology will be described. This application example is an example of a case where the solid-state imaging device 90 is used as an image sensor package and applied to a camera apparatus.

[0163] like Figure 12 As shown, in the camera device, a solid-state imaging device 90 is reflow-mounted on a set substrate 95 using a plurality of solder balls 91 arranged at a predetermined area on the substrate rear surface 2b of the substrate unit 2. The set substrate 95 is a circuit board made of an organic material such as plastic or ceramic. The set substrate 95 has a structure in which, for example, copper wiring is coated on glass epoxy resin.

[0164] The setting substrate 95 has a front surface 95a and a rear surface 95b, and the solid-state imaging device 90 is mounted on the front surface 95a. In addition, on the rear surface 95b of the setting substrate 95, a plurality of surface mounting components 96 such as capacitors and resistors are mounted at predetermined positions. Note that the lens unit 61 is formed in a manner similar to Figure 8 The camera module 60 is mounted on the substrate front surface 2 a of the solid-state imaging device 90 in the manner shown.

[0165] As in this application example, by providing external connection terminals such as solder balls 91, the solid-state imaging device 90 can be secondarily mounted on another substrate such as the substrate 95, allowing the solid-state imaging device 90 to be used in a packaged manner (in a packaged form). Therefore, compared to package mounting using a known CoB configuration, device miniaturization, low-profile design, and high-density mounting can be achieved.

[0166] <9. Configuration Example of Electronic Devices>

[0167] Will refer to Figure 13 An example of application of the semiconductor device according to the above-described embodiment to an electronic device will be described.

[0168] For example, the semiconductor device (solid-state imaging device) according to the present technology can be used as various types of devices for sensing light such as visible light, infrared light, ultraviolet light, and X-rays. The solid-state imaging device according to the present technology can be applied to all electronic devices that use a solid-state imaging element as an image capture unit (photoelectric converter), such as camera equipment (such as a digital still camera or video camera), a mobile terminal device with an imaging function, a copier using a solid-state imaging element as an image reading unit, an on-vehicle sensor that captures images of the front, rear, surroundings, interior, etc. of a car, and a distance measuring sensor that measures the distance between vehicles, etc. In addition, the solid-state imaging device can be formed as a chip, or can be in the form of a module with an imaging function in which an imaging unit and a signal processing unit or an optical system are packaged together.

[0169] like Figure 13As shown, a camera apparatus 200 as an electronic device includes an optical unit 202, a solid-state imaging device 201, a digital signal processor (DSP) circuit 203 as a camera signal processing circuit, a frame memory 204, a display unit 205, a recording unit 206, an operation unit 207, and a power supply unit 208. The DSP circuit 203, the frame memory 204, the display unit 205, the recording unit 206, the operation unit 207, and the power supply unit 208 are appropriately connected via a connection line 209 such as a bus. The solid-state imaging device 201 is any of the solid-state imaging devices 1, 70, 80, and 90 according to the above-described embodiments.

[0170] The optical unit 202 includes a plurality of lenses and captures incident light (image light) from a subject to form an image on the imaging surface of the solid-state imaging device 201. The solid-state imaging device 201 converts the amount of incident light imaged on the imaging surface by the optical unit 202 into an electrical signal for each pixel and outputs the electrical signal as a pixel signal.

[0171] The display unit 205 includes, for example, a panel-type display device such as a liquid crystal panel or an organic electroluminescence (EL) panel, and displays a moving image or a still image captured by the solid-state imaging device 201. The recording unit 206 records the moving image or the still image captured by the solid-state imaging device 201 on a recording medium such as a hard disk or a semiconductor memory.

[0172] The operation unit 207 issues operation commands for various functions of the camera apparatus 200 under user operation. The power supply unit 208 appropriately supplies various power sources used as operation power sources for the DSP circuit 203, frame memory 204, display unit 205, recording unit 206, and operation unit 207 to these supply targets.

[0173] According to the camera device 200 described above, the solid-state imaging device 201 can achieve a low-profile, miniaturized device configuration while ensuring excellent heat dissipation. Furthermore, from the perspective of miniaturization of the camera device 200, achieving a miniaturized and low-profile solid-state imaging device 201 is beneficial. Furthermore, achieving excellent heat dissipation in the solid-state imaging device 201 is advantageous from the perspective of maintaining the proper operating state of the camera device 200 and achieving desired characteristics.

[0174] The description of the above-mentioned embodiment is an example of the present technology, and the present technology is not limited to the above-mentioned embodiment. Therefore, it goes without saying that various modifications other than the above-mentioned embodiment can be made according to design, etc. without departing from the technical concept of the present disclosure. In addition, the effects described in the present disclosure are merely examples and are not intended to be restrictive, and other effects may also exist. In addition, the configurations of the above-mentioned various embodiments and the configurations of the various modifications can be appropriately combined.

[0175] In the above embodiment, the semiconductor element is the image sensor 3 as a light-receiving element. However, the semiconductor element according to the present technology is not limited to image sensors. For example, the semiconductor element according to the present technology may be a light-emitting element such as a vertical-cavity surface-emitting laser (VCSEL), a laser diode, or a light-emitting diode (LED). In addition, the imaging device as a semiconductor device may have a configuration in which multiple semiconductor elements are provided in a single chip or a configuration in which multiple semiconductor elements are provided as multiple chips.

[0176] Note that the present technology can have the following configurations. (1)

[0178] A semiconductor device comprising:

[0179] A base plate portion having a first plate surface and a second plate surface, wherein the first plate surface and the second plate surface are both flat;

[0180] a semiconductor element having a front surface and a rear surface, the semiconductor element being embedded in the base plate portion with the front surface facing the first board surface; and

[0181] The wiring portion is electrically connected to the semiconductor element. (2)

[0183] The semiconductor device according to (1) above, further comprising:

[0184] The protection portion is provided to cover the front surface of the semiconductor element. (3)

[0186] The semiconductor device according to (1) or (2) above, wherein:

[0187] The wiring department includes:

[0188] a front surface side wiring portion provided along the first board surface;

[0189] a rear surface side wiring portion provided along the second board surface; and

[0190] The through wiring portion is formed to extend through the base portion in the board thickness direction and electrically connects the front surface side wiring portion and the rear surface side wiring portion. (4)

[0192] The semiconductor device according to (3) above, wherein

[0193] The substrate section includes:

[0194] a substrate main body having a plate shape and serving as a forming portion for forming a wiring portion;

[0195] a first covering portion having an insulating property and forming a first board surface by covering the board surface of the substrate main body on the front surface side and the front surface side wiring portion; and

[0196] The second cover portion has an insulating property and forms a second board surface by covering the board surface of the substrate main body on the rear surface side and the rear surface side wiring portion. (5)

[0198] The semiconductor device according to (4) above, wherein

[0199] The through wiring portion forms a hole extending through the substrate body in the board thickness direction, and

[0200] A resin portion including a resin material that fills the hole is provided in the hole. (6)

[0202] The semiconductor device according to any one of (1) to (5) above, further comprising:

[0203] The heat dissipation portion is provided on the substrate portion in a state of being in contact with the semiconductor element, and the heat dissipation portion includes a material having a higher thermal conductivity than a material of the substrate portion. (7)

[0205] The semiconductor device according to any one of (1) to (6) above, wherein:

[0206] The through hole is formed to extend through the base plate portion in the board thickness direction. (8)

[0208] The semiconductor device according to any one of (1) to (7) above, wherein

[0209] The external connection terminals are provided on the second board surface of the substrate portion. (9)

[0211] An electronic device, comprising:

[0212] Semiconductor devices, including:

[0213] A base plate portion having a first plate surface and a second plate surface, wherein the first plate surface and the second plate surface are both flat;

[0214] a semiconductor element having a front surface and a rear surface, the semiconductor element being embedded in the base plate portion with the front surface facing the first board surface; and

[0215] The wiring portion is electrically connected to the semiconductor element. (10)

[0217] A method for producing a semiconductor device, comprising:

[0218] forming a protection portion provided on the front surface side of the semiconductor element;

[0219] electrically connecting the semiconductor element to a wiring film including a wiring material, wherein the front surface side faces the wiring film;

[0220] forming the substrate body while ensuring that the semiconductor element is embedded in the substrate body with respect to the wiring film and the semiconductor element;

[0221] forming a rear surface side wiring film covering the rear surface side of the substrate main body;

[0222] forming a front-surface-side wiring portion using a wiring film, forming a rear-surface-side wiring portion using a rear-surface-side wiring film, and forming a through-wiring portion electrically connecting the front-surface-side wiring portion and the rear-surface-side wiring portion; and

[0223] Each of the board surface of the substrate main body on the front surface side and the front surface side wiring portion, and each of the board surface of the substrate main body on the rear surface side and the rear surface side wiring portion are covered with an insulating material.

[0224] Reference Symbol List

[0225] 1Solid-state imaging devices (semiconductor devices)

[0226] 2Substrate part

[0227] 2a: Front surface of substrate (first plate surface)

[0228] 2b rear surface of substrate (second board surface)

[0229] 3Image sensor (semiconductor device)

[0230] 3a Front surface

[0231] 3b rear surface

[0232] 4 Wiring Department

[0233] 5. Conservation Department

[0234] 10 substrate main body

[0235] 10a Upper surface

[0236] 10b Lower surface

[0237] 10y board surface

[0238] 10z board surface

[0239] 10X base plate body

[0240] 11 Front cover (first cover)

[0241] 12 Rear surface side cover (second cover)

[0242] 20 concavity

[0243] 31 Front surface side wiring portion

[0244] 31X Wiring section (wiring film)

[0245] 32 Rear surface side wiring portion

[0246] 33 Through-wiring section

[0247] 33a hole

[0248] 35 convex points

[0249] 36 Resin Department

[0250] 45 Copper foil (wiring film)

[0251] 46 Copper foil (rear surface side wiring film)

[0252] 70 Solid-state imaging devices

[0253] 71 First heat dissipation unit (heat dissipation unit)

[0254] 72 Second heat dissipation unit (heat dissipation unit)

[0255] 80 Solid-state imaging devices

[0256] 81 through holes

[0257] 90 Solid-state imaging devices

[0258] 91 solder balls (external connection terminals)

[0259] 200 Camera equipment (electronic devices)

[0260] 201 Solid-state imaging device (semiconductor device).

Claims

1. A semiconductor device comprising: a substrate portion having a first plate surface and a second plate surface, wherein the first plate surface and the second plate surface are both flat; a semiconductor element having a front surface and a rear surface, the semiconductor element being embedded in the substrate portion with the front surface facing the first board surface; as well as The wiring portion is electrically connected to the semiconductor element.

2. The semiconductor device according to claim 1, further comprising: The protection portion is provided to cover the front surface of the semiconductor element.

3. The semiconductor device according to claim 1, wherein The wiring portion includes: a front surface side wiring portion provided along the first board surface; a rear surface side wiring portion provided along the second board surface; and The through wiring portion is formed to extend through the base portion in the board thickness direction and electrically connect the front surface side wiring portion and the rear surface side wiring portion.

4. The semiconductor device according to claim 3, wherein The substrate portion includes: a substrate main body having a plate shape and serving as a forming portion for forming a wiring portion; a first covering portion having an insulating property and forming the first board surface by covering a board surface of the substrate main body on the front surface side and the front surface side wiring portion; and The second covering portion has an insulating property and forms the second board surface by covering the board surface of the substrate main body on the rear surface side and the rear surface side wiring portion.

5. The semiconductor device according to claim 4, wherein The through-wiring portion forms a hole extending through the substrate body in a board thickness direction, and A resin portion including a resin material filling the hole is provided in the hole.

6. The semiconductor device according to claim 1, further comprising: A heat dissipation portion is provided on the substrate portion in a state of being in contact with the semiconductor element, and the heat dissipation portion includes a material having a higher thermal conductivity than a material of the substrate portion.

7. The semiconductor device according to claim 1, wherein A through hole is formed to extend through the base plate portion in a board thickness direction.

8. The semiconductor device according to claim 1, wherein External connection terminals are provided on the second board surface of the base plate portion.

9. An electronic device comprising: A semiconductor device, comprising: a substrate portion having a first plate surface and a second plate surface, wherein the first plate surface and the second plate surface are both flat; a semiconductor element having a front surface and a rear surface, the semiconductor element being embedded in the base plate portion with the front surface facing the first board surface; and The wiring portion is electrically connected to the semiconductor element.

10. A method for producing a semiconductor device, comprising: forming a protection portion provided on the front surface side of the semiconductor element; electrically connecting the semiconductor element to a wiring film including a wiring material, wherein the front surface side faces the wiring film; forming the substrate body while ensuring that the semiconductor element is embedded in the substrate body with respect to the wiring film and the semiconductor element; forming a rear surface side wiring film covering the rear surface side of the substrate main body; forming a front-surface-side wiring portion using the wiring film, forming a rear-surface-side wiring portion using the rear-surface-side wiring film, and forming a through-wiring portion electrically connecting the front-surface-side wiring portion and the rear-surface-side wiring portion; and Each of the board surface of the substrate main body on the front surface side and the front surface side wiring portion, and each of the board surface of the substrate main body on the rear surface side and the rear surface side wiring portion are covered with an insulating material.

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