Optical proximity correction method, semiconductor structure forming method, storage medium and terminal

Abstract

An optical proximity correction method, a semiconductor structure forming method, a storage medium and a terminal wherein the optical proximity correction method comprises: providing a target pattern, the target pattern comprising a first target portion and a second target portion; performing deviation compensation processing on the target graph to obtain a compensation graph; performing expansion processing on the compensation graph to obtain an expanded graph; and performing optical proximity correction processing on the extended graph for a plurality of times until the edge placement error is within a preset range. Deviation compensation processing is carried out on a target graph, connection of a compensation graph at a corner position is increased, expansion processing is carried out on the compensation graph, connection of corner positions in an expansion graph is increased, and therefore in the process of carrying out optical proximity correction on the expansion graph, correction limitation of mask rule checking on the corner position is reduced, and the correction accuracy is improved. And meanwhile, the edge placement error between the exposure pattern and the compensation pattern can be effectively improved, and the morphology difference of cutting off different fin parts can be reduced, so that the reliability of a semiconductor manufacturing process is improved.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor manufacturing technology, and in particular to an optical proximity correction method, a method for forming a semiconductor structure, a storage medium, and a terminal. Background Art

[0002] Photolithography is a crucial technology in semiconductor manufacturing. It enables the transfer of patterns from a mask onto the surface of a silicon wafer, creating semiconductor products that meet design requirements. The photolithography process consists of an exposure step, a development step following the exposure step, and an etching step following the development step. During the exposure step, light passes through the light-transmitting areas of the mask onto a silicon wafer coated with photoresist, causing the photoresist to undergo a chemical reaction under the irradiation of light. During the development step, the different solubility of the developer in the photosensitive and unsensitive photoresists is exploited to form a photoresist pattern, enabling the transfer of the mask pattern to the photoresist. During the etching step, the silicon wafer is etched based on the photoresist pattern formed in the photoresist layer, further transferring the mask pattern to the wafer.

[0003] In semiconductor manufacturing, as design dimensions continue to shrink, approaching the limits of photolithography imaging systems, the diffraction effect of light becomes increasingly pronounced, ultimately leading to optical image degradation of the designed pattern. The actual photolithography pattern formed is severely distorted relative to the pattern on the mask, and the actual pattern formed by photolithography on the silicon wafer is ultimately different from the designed pattern. This phenomenon is called the Optical Proximity Effect (OPE).

[0004] Optical Proximity Correction (OPC) was developed to correct for the optical proximity effect. The core concept of OPC is to establish an OPC model based on the consideration of offsetting the optical proximity effect. The photomask pattern is designed based on the OPC model. This allows the photomask pattern to be closer to the target pattern desired by the user, even though the optical proximity effect may occur in the photolithography pattern relative to the mask pattern after photolithography. This offset has been taken into account when designing the photomask pattern based on the OPC model.

[0005] However, there are still many problems with optical proximity correction in the prior art. Summary of the Invention

[0006] The technical problem solved by the present invention is to provide an optical proximity correction method, a method for forming a semiconductor structure, a storage medium and a terminal, so as to reduce the morphological differences of different fins that are cut off and improve the reliability of the semiconductor process.

[0007] To solve the above-mentioned problem, the technical solution of the present invention provides an optical proximity correction method, comprising: providing a target pattern, the target pattern comprising a first target portion and a second target portion, the first target portion having a first vertex, the second target portion having a second vertex, and the first vertex and the second vertex coinciding with each other; performing deviation compensation processing on the target pattern to obtain a compensation pattern, the compensation pattern comprising a first compensation portion corresponding to the first target portion and a second compensation portion corresponding to the second target portion, the first compensation portion having a first compensation side, the second compensation portion having a second compensation side, and the first compensation side and the second compensation side partially coinciding with each other; performing expansion processing on the compensation pattern to obtain an extended pattern, the extended pattern comprising the first compensation portion, the second compensation portion, a first expansion portion, and a second expansion portion, the first expansion portion having a first expansion side, the second expansion portion having a second expansion side, the first expansion side coinciding with a portion of the first compensation side that does not coinciding with the second compensation side, and the second expansion side coinciding with a portion of the second compensation side that does not coinciding with the first compensation side; performing optical proximity correction processing on the extended pattern several times until the edge placement error is within a preset range, thereby obtaining a corrected pattern.

[0008] Optionally, the shapes of the first target portion and the second target portion include: rectangles.

[0009] Optionally, the shapes of the first extension portion and the second extension portion include: rectangle.

[0010] Optionally, the modified pattern is used to make a mask, and the mask is used as a mask to etch a plurality of parallel arranged fins.

[0011] Optionally, the first extension portion has a third extension side, and the third extension side is perpendicular to the first extension side; the length of the third extension side is 1 / 12 to 1 / 6 of the spacing between adjacent fins.

[0012] Optionally, the second extension portion has a fourth extension side, and the fourth extension side is perpendicular to the second extension side; the length of the fourth extension side is 1 / 12 to 1 / 6 of the spacing between adjacent fins.

[0013] Optionally, the deviation compensation processing method includes: obtaining historical deviation compensation data, where the historical deviation compensation data is the difference between the graphic size after exposure and development and the graphic size after etching; compensating the target graphic according to the historical deviation compensation data to obtain the compensated graphic.

[0014] Optionally, each optical proximity correction process includes: performing optical proximity correction on the extended pattern to obtain an initial correction pattern; performing exposure processing on the initial correction pattern to obtain an exposure pattern; and comparing the exposure pattern with the compensation pattern to obtain the edge placement error.

[0015] Optionally, the initial correction pattern when the edge placement error is within a preset range is used as the correction pattern.

[0016] Correspondingly, the technical solution of the present invention also provides a method for forming a semiconductor structure, obtaining a corrected pattern based on the optical proximity correction method described in any of the above technical solutions; making a mask plate according to the corrected pattern; providing a substrate, the substrate including a base and several parallelly arranged fins located on the base; and performing cutting and etching processing on several of the fins based on the mask plate as a mask.

[0017] Optionally, the method for performing a cut-off etching process on the plurality of fins based on the mask plate as a mask includes: forming a mask layer on the substrate; forming a photoresist layer on the mask layer; performing an exposure and development process on the photoresist layer based on the mask plate, forming a photoresist opening corresponding to the correction pattern on the photoresist layer; etching the mask layer using the photoresist layer as a mask, forming a mask opening corresponding to the photoresist opening in the mask layer; performing a cut-off etching process on the plurality of fins using the mask layer as a mask

[0018] Optionally, the cut-off opening of the fin corresponds to the mask opening.

[0019] Correspondingly, the technical solution of the present invention further provides a storage medium on which computer instructions are stored. When the computer instructions are executed, the steps of the optical proximity correction method described in any one of the above technical solutions are executed.

[0020] Correspondingly, the technical solution of the present invention also provides a terminal, including a memory and a processor, wherein the memory stores computer instructions that can be run on the processor, and when the processor runs the computer instructions, it executes the steps of the optical proximity correction method described in any one of the above technical solutions.

[0021] Compared with the prior art, the technical solution of the present invention has the following advantages:

[0022] In the optical proximity correction method of the technical solution of the present invention, deviation compensation processing is performed on the target pattern, thereby increasing the connection between the first compensation part and the second compensation part at the corner position in the compensation pattern, and then the compensation pattern is expanded to further increase the connection between the first compensation part and the first expansion part and the second compensation part and the second expansion part at the corner position in the expanded pattern. In the process of performing optical proximity correction on the expanded pattern, the correction limit of the mask rule check on the corner position is reduced, and at the same time, the edge placement error between the exposure pattern and the compensation pattern can be effectively improved.

[0023] Furthermore, a mask made with the corrected pattern is used to cut through a plurality of parallel fins. Because the edge placement error between the exposure pattern obtained with the corrected pattern and the compensation pattern is smaller, when the mask made with the corrected pattern is used to cut through a plurality of parallel fin layers, the difference in the morphology of the cut fins is reduced, thereby improving the reliability of subsequent semiconductor processes.

[0024] Furthermore, the first extension portion has a third extension side that is perpendicular to the first extension side; the length of the third extension side is 1 / 12 to 1 / 6 of the spacing between the corresponding adjacent fins. When the length of the third extension side is less than 1 / 12 of the spacing between the corresponding adjacent fins, the area of ​​the added first extension portion is small, resulting in a small connection between the first compensation portion, the first extension portion, the second compensation portion, and the second extension portion in the extended pattern at the corner position, which is still susceptible to mask rule checks and has very limited improvement in edge placement errors at the connection corners. When the length of the third extension side is greater than 1 / 6 of the spacing between the corresponding adjacent fins, the area of ​​the added first extension portion is large, resulting in the acquired exposure pattern deviating from the original design requirements, and thus deviating from the original designed fin cut-off position, affecting the reliability of subsequent semiconductor processes.

[0025] Furthermore, the second extension portion has a fourth extension side that is perpendicular to the second extension side; the length of the fourth extension side is 1 / 12 to 1 / 6 of the spacing between the corresponding adjacent fins. When the length of the fourth extension side is less than 1 / 12 of the spacing between the corresponding adjacent fins, the area of ​​the added second extension portion is small, resulting in a small connection between the first compensation portion, the first extension portion, the second compensation portion, and the second extension portion in the extended pattern at the corner position, which is still susceptible to mask rule checks and has very limited improvement in edge placement errors at the connection corners. When the length of the fourth extension side is greater than 1 / 6 of the spacing between the corresponding adjacent fins, the area of ​​the added second extension portion is large, causing the acquired exposure pattern to deviate from the original design requirements, and thus deviate from the original designed fin cut-off position, affecting the reliability of subsequent semiconductor processes.

[0026] In the method for forming a semiconductor structure according to the technical solution of the present invention, deviation compensation processing is performed on the target pattern to increase the connection between the first compensation portion and the second compensation portion in the compensation pattern at the corner position. Then, the compensation pattern is expanded to further increase the connection between the first compensation portion and the first expansion portion and the second compensation portion and the second expansion portion in the expanded pattern at the corner position. Therefore, during the optical proximity correction process of the expanded pattern, the correction restrictions of the mask rule check on the corner position are reduced, and the edge placement error between the exposure pattern and the compensation pattern can be effectively improved. Because the edge placement error between the exposure pattern obtained using the correction pattern and the compensation pattern is small, when a mask is made using the correction pattern for cutting multiple parallel fin layers, the morphological differences between the cut fins are reduced, thereby improving the reliability of subsequent semiconductor processes. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figures 1 to 3 It is a schematic structural diagram of each step of an optical proximity correction method;

[0028] Figures 4 to 7 1 is a schematic diagram of the structure of each step of another optical proximity correction method;

[0029] Figure 8 is a flow chart of an optical proximity correction method according to an embodiment of the present invention;

[0030] Figures 9 to 12 1 is a schematic structural diagram of each step of an optical proximity correction method according to an embodiment of the present invention;

[0031] Figures 13 to 16 It is a schematic structural diagram of each step of a method for forming a semiconductor structure in an embodiment of the present invention. DETAILED DESCRIPTION

[0032] As described in the background art, there are still many problems with optical proximity correction in the prior art, which will be described in detail below with reference to the accompanying drawings.

[0033] Figures 1 to 3 It is a schematic structural diagram of each step of an optical proximity correction method.

[0034] Please refer to Figure 1 , providing a target graphic 100, the target graphic 100 includes a first target portion 1001 and a second target portion 1002, the first target portion 1001 has a first vertex 100a, the second target portion 1002 has a second vertex 100b, and only the first vertex 100a and the second vertex 100b overlap between the first target portion 1001 and the second target portion 1002.

[0035] Please refer to Figure 2 , perform optical proximity correction on the target pattern 100 several times to obtain a corrected pattern 101.

[0036] Please refer to Figure 3 , exposure processing is performed on the correction pattern 101 to obtain the exposure pattern 102.

[0037] In this embodiment, because the first target portion 1001 and the second target portion 1002 in the target pattern 100 are connected at one and only one vertex, this location is easily constrained by the Mask Rule Check (MRC) during the optical proximity correction process of the target pattern 100. This results in a large edge placement error (EPE) at the corner connecting the first target portion 1001 and the second target portion 1002 between the acquired exposure pattern 102 and the target pattern 100. When a mask is made using the corrected pattern 101 and used to cut a plurality of parallel fins 103, the cut morphologies of different fins 103 will vary significantly, thereby affecting the reliability of subsequent semiconductor processes.

[0038] In order to solve the above problems, an optical proximity correction method is also provided in the prior art. Figures 4 to 7 .

[0039] Figures 4 to 7 This is a schematic diagram of the structure of each step of another optical proximity correction method.

[0040] Please refer to Figure 4 , providing a target graphic 200, the target graphic 200 includes a first target portion 2001 and a second target portion 2002, the first target portion 2001 has a first vertex 200a, the second target portion 2002 has a second vertex 200b, and only the first vertex 200a and the second vertex 200b overlap between the first target portion 2001 and the second target portion 2002.

[0041] Please refer to Figure 5 , the target graphic 200 is subjected to deviation compensation processing to obtain a compensation graphic 201, the compensation graphic 201 includes a first compensation portion 2011 corresponding to the first target portion 2001, and a second compensation portion 2012 corresponding to the second target portion 2002, the first compensation portion 2011 has a first compensation edge 201a, the second compensation portion 2012 has a second compensation edge 201b, and the first compensation edge 201a and the second compensation edge 201b partially overlap.

[0042] Please refer to Figure 6 , performing optical proximity correction on the compensation pattern 201 several times to obtain the correction pattern 202.

[0043] Please refer to Figure 7 , exposure processing is performed on the correction pattern 202 to obtain the exposure pattern 203.

[0044] In this embodiment, a deviation compensation process is performed on the target pattern 200. The deviation compensation process obtains the deviation value between the pattern size after exposure and development (ADI) and the pattern size after etching (AEI) from a previously processed wafer of the same process, and reversely compensates the deviation value to the target pattern 200, thereby obtaining a compensated pattern 201. However, although the connection area between the first compensation portion 2011 and the second compensation portion 2012 in the compensated pattern 201 obtained through the deviation compensation process is enlarged, it is still susceptible to the constraints of the mask rule check, and the improvement of the edge placement error at the connection corner is also very limited.

[0045] On this basis, the present invention provides an optical proximity correction method, a method for forming a semiconductor structure, a storage medium, and a terminal. By performing deviation compensation processing on a target pattern, the connection between the first compensation portion and the second compensation portion in the compensation pattern at the corner position is increased. Furthermore, by performing expansion processing on the compensation pattern, the connection between the first compensation portion and the first expansion portion and the second compensation portion and the second expansion portion in the expanded pattern at the corner position is further increased. Consequently, during the optical proximity correction process on the expanded pattern, the correction restrictions imposed by the mask rule check on the corner position are reduced, while effectively improving the edge placement error between the exposure pattern and the compensation pattern. Because the edge placement error between the exposure pattern obtained using the correction pattern and the compensation pattern is small, when a mask is made using the correction pattern and used to cut through a plurality of parallel fin layers, the morphological differences between the cut fins are reduced, thereby improving the reliability of subsequent semiconductor manufacturing processes.

[0046] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0047] Figure 8 : is a flow chart of an optical proximity correction method according to an embodiment of the present invention, comprising:

[0048] Step S101, providing a target graphic, the target graphic including a first target portion and a second target portion, the first target portion having a first vertex, the second target portion having a second vertex, and the first vertex and the second vertex coincide with each other;

[0049] Step S102: performing deviation compensation processing on the target pattern to obtain a compensation pattern, the compensation pattern including a first compensation portion corresponding to the first target portion and a second compensation portion corresponding to the second target portion, the first compensation portion having a first compensation side, the second compensation portion having a second compensation side, and the first compensation side and the second compensation side partially overlapping;

[0050] Step S103: Expanding the compensation pattern to obtain an expanded pattern, the expanded pattern including a first compensation portion, a second compensation portion, a first expansion portion, and a second expansion portion, wherein the first expansion portion has a first expansion side, the second expansion portion has a second expansion side, the first expansion side overlaps with a portion of the first compensation side that does not overlap with the second compensation side, and the second expansion side overlaps with a portion of the second compensation side that does not overlap with the first compensation side.

[0051] Step S104 , performing optical proximity correction processing on the extended pattern several times until the edge placement error is within a preset range, thereby obtaining a corrected pattern.

[0052] The steps of the optical proximity correction method are described in detail below with reference to the accompanying drawings.

[0053] Figures 9 to 12 1 is a schematic structural diagram of each step of the optical proximity correction method in an embodiment of the present invention.

[0054] Please refer to Figure 9 , providing a target graphic 300, the target graphic 300 includes a first target portion 3001 and a second target portion 3002, the first target portion 3001 has a first vertex 300a, the second target portion 3002 has a second vertex 300b, and the first vertex 300a and the second vertex 300b coincide.

[0055] It should be noted that the target pattern 300 is an ideal pattern (i.e., without the optical proximity effect). However, during the actual exposure process, due to the presence of the optical proximity effect, light interference and diffraction occur during exposure. Therefore, there is a difference between the pattern obtained after the final exposure process and the target pattern 300. For example, if the target pattern 300 is a regular rectangle, the pattern obtained after the exposure process is similar to an ellipse, that is, the corners of the rectangle are rounded.

[0056] In this embodiment, the first target portion 3001 and the second target portion 3002 are both rectangular, and the first target portion 3001 and the second target portion 3002 are staggered along the first direction X. Only the first vertex 300a and the second vertex 300b of the first target portion 3001 and the second target portion 3002 overlap, and this figure is called a kiss corner.

[0057] In other embodiments, the first target portion and the second target portion may not be rectangular, and as long as there is only one vertex overlapped between the first target portion and the second target portion, it can be called a kiss corner.

[0058] Please refer to Figure 10, the target graphic 300 is subjected to deviation compensation processing to obtain a compensation graphic 301, the compensation graphic 301 includes a first compensation portion 3011 corresponding to the first target portion 3001, and a second compensation portion 3012 corresponding to the second target portion 3002, the first compensation portion 3011 has a first compensation edge 301a, the second compensation portion 3012 has a second compensation edge 301b, and the first compensation edge 301a and the second compensation edge 301b partially overlap.

[0059] In this embodiment, the deviation compensation processing method includes: obtaining historical deviation compensation data, where the historical deviation compensation data is the difference between the graphic size after exposure and development (ADI) and the graphic size after etching (AEI); compensating the target graphic 300 according to the historical deviation compensation data to obtain a compensated graphic 301.

[0060] It should be noted that the historical deviation compensation data is the deviation between the pattern size after exposure and development and the pattern size after etching, obtained from wafers of the same process that have been processed in the past. The historical deviation compensation data is reversely compensated to the target pattern 300 to obtain the compensated pattern 301.

[0061] Please refer to Figure 11 , the compensation graphic 301 is expanded to obtain the extended graphic 302, the extended graphic 302 includes a first compensation part 3011, a second compensation part 3012, a first extension part 3021 and a second extension part 3022, the first extension part 3021 has a first extension side 302a, the second extension part 3022 has a second extension side 302b, the first extension side 302a overlaps with a portion of the first compensation side 301a that does not overlap with the second compensation side 301b, and the second extension side 302b overlaps with a portion of the second compensation side 301b that does not overlap with the first compensation side 301a.

[0062] In this embodiment, the first extension portion 3021 and the second extension portion 3022 are rectangular in shape.

[0063] Please refer to Figure 12 , performing optical proximity correction processing on the extended pattern 302 several times until the edge placement error is within a preset range, and obtaining the corrected pattern 303.

[0064] In this embodiment, each optical proximity correction process includes: performing optical proximity correction on the extended pattern 302 to obtain an initial correction pattern; performing exposure processing on the initial correction pattern to obtain an exposure pattern 304; and comparing the exposure pattern 304 with the compensation pattern 301 to obtain an edge placement error.

[0065] In this embodiment, the initial correction pattern when the edge placement error is within a preset range is used as the correction pattern 303 .

[0066] By performing deviation compensation processing on the target pattern 300, the connection between the first compensation portion 3011 and the second compensation portion 3012 at the corner position in the compensation pattern 301 is increased. Then, by performing expansion processing on the compensation pattern 301, the connection between the first compensation portion 3011 and the first expansion portion 3021 and the second compensation portion 3012 and the second expansion portion 3022 at the corner position in the expanded pattern 302 is further increased. Therefore, in the process of performing optical proximity correction on the expanded pattern 302, the correction limit of the mask rule check on the corner position is reduced, and at the same time, the edge placement error between the exposure pattern 304 and the compensation pattern 301 can be effectively improved.

[0067] In this embodiment, a mask made using the correction pattern 303 is used to cut through a plurality of parallel fins 401. Because the edge placement error between the exposure pattern 304 obtained using the correction pattern 303 and the compensation pattern 301 is relatively small, when a mask made using the correction pattern 303 is used to cut through a plurality of parallel fins 401 layers, the difference in the morphology of the cut fins 401 is reduced, thereby improving the reliability of subsequent semiconductor manufacturing processes.

[0068] Please continue to refer to Figure 11 In this embodiment, the first extension portion 3021 has a third extension side 302c, which is perpendicular to the first extension side 302a; the side length d1 of the third extension side 302c is 1 / 12 to 1 / 6 of the spacing d2 between adjacent fins 401. When the side length dimension d1 of the third extended edge 302c is less than 1 / 12 of the spacing dimension d2 between the corresponding adjacent fins 401, the area of ​​the added first extended portion 3021 is smaller, so that the connection between the first compensation portion 3011 and the first extended portion 3021 and the second compensation portion 3012 and the second extended portion 3022 at the corner position in the extended pattern 302 is still small, and thus it is still easily constrained by the mask rule check, and the improvement of the edge placement error at the connection corner is also very limited; when the side length dimension d1 of the third extended edge 302c is greater than 1 / 6 of the spacing dimension d2 between the corresponding adjacent fins 401, the area of ​​the added first extended portion 3021 is larger, so that the acquired exposure pattern 304 deviates from the original design requirements, and thus deviates from the original design of the fin 401 cut-off position, affecting the reliability of subsequent semiconductor processes.

[0069] Please continue to refer to Figure 11In this embodiment, the second extension portion 3022 has a fourth extension side 302d, which is perpendicular to the second extension side 302b; the side length d3 of the fourth extension side 302d is 1 / 12 to 1 / 6 of the spacing d2 between the corresponding adjacent fins 401. When the side length dimension d3 of the fourth extended edge 302d is less than 1 / 12 of the spacing dimension d2 between the corresponding adjacent fins 401, the area of ​​the added second extended portion 3022 is smaller, so that the connection between the first compensation portion 3011 and the first extended portion 3021 and the second compensation portion 3012 and the second extended portion 3022 at the corner position in the extended pattern 302 is still small, and thus it is still easily constrained by the mask rule check, and the improvement of the edge placement error at the connection corner is also very limited; when the side length dimension d3 of the fourth extended edge 302d is greater than 1 / 6 of the spacing dimension d2 between the corresponding adjacent fins 401, the area of ​​the added second extended portion 3022 is larger, so that the acquired exposure pattern 304 deviates from the original design requirements, and thus deviates from the original design of the fin 401 cut-off position, affecting the reliability of subsequent semiconductor processes.

[0070] Figures 13 to 16 It is a schematic structural diagram of each step of a method for forming a semiconductor structure in an embodiment of the present invention.

[0071] Accordingly, the present invention also provides a method for forming a semiconductor structure. Figure 9 middle Figure 12 , including: obtaining a correction graphic 303 based on the optical proximity correction method described in any one of the above embodiments.

[0072] By performing deviation compensation processing on the target pattern 300, the connection between the first compensation portion 3011 and the second compensation portion 3012 at the corner position in the compensation pattern 301 is increased. Then, by performing expansion processing on the compensation pattern 301, the connection between the first compensation portion 3011 and the first expansion portion 3021 and the second compensation portion 3012 and the second expansion portion 3022 at the corner position in the expanded pattern 302 is further increased. Therefore, in the process of performing optical proximity correction on the expanded pattern 302, the correction limit of the mask rule check on the corner position is reduced, and at the same time, the edge placement error between the exposure pattern 304 and the compensation pattern 301 can be effectively improved.

[0073] Please refer to Figure 13 and Figure 14 , Figure 14 yes Figure 13 In the cross-sectional view along line AA, a mask (not shown) is manufactured according to the modified pattern 303 ; a substrate is provided, which includes a base 400 and a plurality of fins 401 arranged in parallel on the base 400 .

[0074] It should be noted that the plurality of fins 401 on the substrate 400 are initially in an uncut state at this time, and the plurality of fins 401 need to be cut in subsequent processes.

[0075] After making the mask, the fins 401 are cut and etched using the mask as a mask. Figures 15 and 16 .

[0076] Please refer to Figure 15 , Figure 15 and Figure 14 A mask layer 402 is formed on the substrate in the same viewing direction; a photoresist layer 403 is formed on the mask layer 402; the photoresist layer 403 is exposed and developed based on the mask, and a photoresist opening 404 corresponding to the correction pattern 303 is formed on the photoresist layer 403.

[0077] It should be noted that the morphology of the photoresist opening 404 formed on the photoresist layer 403 at this time is consistent with the morphology of the exposure pattern 304 in the optical proximity correction stage.

[0078] Please refer to Figure 16 , Figure 16 and Figure 13 The viewing direction is consistent, and Figure 16 The mask layer 402 and the photoresist layer 403 are omitted, and the mask layer 402 is etched using the photoresist layer 403 as a mask to form a mask opening (not shown) corresponding to the photoresist opening 404 in the mask layer 402; and the plurality of fins 401 are cut and etched using the mask layer 402 as a mask.

[0079] The topography of the photoresist openings 404 on the photoresist layer 403 is transferred layer by layer downward, ultimately cutting off the plurality of fins 401. Because the edge placement error between the exposure pattern 304 obtained using the correction pattern 303 and the compensation pattern 301 is relatively small, when a mask is made using the correction pattern 303 for cutting off the plurality of parallel fins 401 layers, the difference in topography between the cut fins 401 is reduced, thereby improving the reliability of subsequent semiconductor processes.

[0080] In this embodiment, the cutout opening 405 of the fin 401 corresponds to the mask opening.

[0081] Correspondingly, the technical solution of the present invention further provides a storage medium on which computer instructions are stored, characterized in that when the computer instructions are executed, the steps of the optical proximity correction method of any one of the above embodiments are executed.

[0082] Correspondingly, the technical solution of the present invention also provides a terminal, including a memory and a processor, wherein the memory stores computer instructions that can be run on the processor, and when the processor runs the computer instructions, the steps of the optical proximity correction method of any one of the above embodiments are executed.

[0083] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention should be based on the scope defined by the claims.

Claims

1. An optical proximity correction method, characterized in that: include: Providing a target pattern, the target pattern comprising a first target portion and a second target portion, the first target portion having a first vertex, the second target portion having a second vertex, the first vertex and the second vertex coinciding with each other; performing deviation compensation processing on the target pattern to obtain a compensation pattern, the compensation pattern comprising a first compensation portion corresponding to the first target portion and a second compensation portion corresponding to the second target portion, the first compensation portion having a first compensation side, the second compensation portion having a second compensation side, the first compensation side and the second compensation side partially overlapping; performing an expansion process on the compensation pattern to obtain an extended pattern, the extended pattern comprising the first compensation portion, the second compensation portion, a first extension portion, and a second extension portion, the first extension portion having a first extension side, the second extension portion having a second extension side, the first extension side overlapping with a portion of the first compensation side that does not overlap with the second compensation side, and the second extension side overlapping with a portion of the second compensation side that does not overlap with the first compensation side; The extended pattern is subjected to optical proximity correction processing several times until the edge placement error is within a preset range, thereby obtaining a corrected pattern.

2. The optical proximity correction method according to claim 1, wherein: The shapes of the first target portion and the second target portion include: rectangles.

3. The optical proximity correction method according to claim 1, wherein: The shapes of the first extension portion and the second extension portion include: a rectangle.

4. The optical proximity correction method according to claim 1, wherein: The modified pattern is used to make a mask, and the mask is used as a mask to etch a plurality of parallel arranged fins.

5. The optical proximity correction method according to claim 4, wherein: The first extension portion has a third extension side, and the third extension side is perpendicular to the first extension side; the length of the third extension side is 1 / 12 to 1 / 6 of the spacing between adjacent fins.

6. The optical proximity correction method according to claim 4, wherein: The second extension portion has a fourth extension side, and the fourth extension side is perpendicular to the second extension side; the length of the fourth extension side is 1 / 12 to 1 / 6 of the spacing between adjacent fins.

7. The optical proximity correction method according to claim 1, wherein: The deviation compensation processing method includes: obtaining historical deviation compensation data, wherein the historical deviation compensation data is the difference between the size of the pattern after exposure and development and the size of the pattern after etching; compensating the target pattern according to the historical deviation compensation data to obtain the compensated pattern.

8. The optical proximity correction method according to claim 1, wherein: Each optical proximity correction process includes: performing optical proximity correction on the extended pattern to obtain an initial correction pattern; performing exposure processing on the initial correction pattern to obtain an exposure pattern; and comparing the exposure pattern with the compensation pattern to obtain the edge placement error.

9. The optical proximity correction method according to claim 8, wherein: The initial correction pattern when the edge placement error is within a preset range is used as the correction pattern.

10. A method for forming a semiconductor structure, characterized in that: Acquire a correction pattern based on the optical proximity correction method according to any one of claims 1 to 9; making a mask according to the corrected pattern; Providing a substrate, the substrate comprising a base and a plurality of fins arranged in parallel on the base; A cutting and etching process is performed on the plurality of fins using the mask plate as a mask.

11. The method for forming a semiconductor structure according to claim 10, wherein: The method for performing a cutting and etching process on several of the fins based on the mask plate as a mask includes: forming a mask layer on the substrate; forming a photoresist layer on the mask layer; performing an exposure and development process on the photoresist layer based on the mask plate, and forming a photoresist opening corresponding to the corrected pattern on the photoresist layer; etching the mask layer using the photoresist layer as a mask, and forming a mask opening corresponding to the photoresist opening in the mask layer; and performing a cutting and etching process on several of the fins using the mask layer as a mask.

12. The method for forming a semiconductor structure according to claim 11, wherein: The cut-off opening of the fin portion corresponds to the mask opening.

13. A storage medium having computer instructions stored thereon, characterized in that: When the computer instructions are executed, the steps of the method according to any one of claims 1 to 9 are executed.

14. A terminal comprising a memory and a processor, wherein the memory stores computer instructions that can be executed on the processor, characterized in that: When the processor runs the computer instructions, the steps of the method according to any one of claims 1 to 9 are performed.

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