Monitoring method and device of graphics processor, baseboard management controller and medium

Abstract

The invention discloses a graphics processor monitoring method and device, a baseboard management controller and a medium, relates to the technical field of computers, and aims to solve the problems of low monitoring efficiency and high resource overhead of a BMC (baseboard management controller), the method is applied to the BMC, the BMC comprises a DMA (direct memory access) controller, a USB (universal serial bus) controller and a preset buffer area, the DMA controller is connected with the USB controller, and the USB controller is connected with the preset buffer area. The USB controller is used for being connected with at least one GPU through the hardware management console; the hardware management console is triggered through the DMA controller and the USB controller to acquire monitoring data of each GPU connected with the hardware management console, each acquired monitoring data is stored in the preset cache region through the DMA controller, the monitoring data is acquired from the preset cache region through the CPU to be analyzed, and the monitoring condition of the corresponding GPU is obtained. The monitoring efficiency of the GPU is improved, and the resource overhead of the BMC is reduced.

Description

Technical Field

[0001] The present application relates to the field of computer technology, and in particular to a monitoring method, device, baseboard management controller, and medium for a graphics processor. Background Art

[0002] Graphics Processing Units (GPUs) have powerful parallel computing capabilities and are widely used in gaming, scientific computing, artificial intelligence, and other fields. Effective monitoring of GPUs is crucial to ensuring stable system operation, optimizing resource utilization, and promptly detecting potential faults. Since the baseboard management controller (BMC) in the server is an independent management unit that undertakes important responsibilities such as server hardware status monitoring and remote management, the BMC is usually used to monitor the GPU. In related technologies, the processor in the BMC polls each GPU one by one to obtain data from each GPU, and then analyzes the data to monitor each GPU. However, the polling method results in long query times and low monitoring efficiency. In addition, obtaining a large amount of data through the CPU will also lead to high CPU usage and large BMC resource overhead.

[0003] In view of this, how to improve the monitoring efficiency of GPU and reduce the resource overhead of BMC has become a problem that needs to be solved by those skilled in the art. Summary of the Invention

[0004] The present application provides a method and apparatus for monitoring a graphics processor, a baseboard management controller, and a computer-readable storage medium, to at least address the problems of low GPU monitoring efficiency and high resource overhead of the BMC in related technologies.

[0005] The present application provides a method for monitoring a graphics processor, which is applied to a baseboard management controller. The baseboard management controller includes a direct memory access controller, a universal serial bus controller, and a preset buffer. The direct memory access controller is connected to the universal serial bus controller. The universal serial bus controller is used to connect to at least one graphics processor through a hardware management console. The method includes: Acquiring, through the direct memory access controller and the universal serial bus controller, monitoring data corresponding to each of the graphics processors collected by the hardware management console; storing each of the monitoring data into a preset buffer area through the direct memory access controller; The monitoring data is acquired from the preset buffer area by the central processing unit, and the monitoring data is analyzed to obtain the monitoring result of the corresponding graphics processor.

[0006] The present application also provides a graphics processor monitoring device, which is applied to a baseboard management controller. The baseboard management controller includes a direct memory access controller, a universal serial bus controller, and a preset buffer. The direct memory access controller is connected to the universal serial bus controller. The universal serial bus controller is used to connect to at least one graphics processor through a hardware management console. The device includes: an acquisition module, configured to acquire, through the direct memory access controller and the universal serial bus controller, monitoring data corresponding to each of the graphics processors collected by the hardware management console; A cache module, configured to store each of the monitoring data into a preset cache area through the direct memory access controller; The analysis module is used to obtain monitoring data from the preset buffer area through the central processing unit, and analyze the monitoring data to obtain monitoring results corresponding to the graphics processor.

[0007] The present application also provides an electronic device, comprising: a memory, a processor, a direct memory access controller, a universal serial bus controller, and a preset buffer, wherein the universal serial bus controller is used to connect to at least one graphics processor through a hardware management console; memory for storing computer programs; A processor is configured to implement the steps of any of the above-mentioned methods for monitoring a graphics processor when executing a computer program.

[0008] The present application also provides a computer-readable storage medium, in which a computer program is stored. When the computer program is executed by a processor, the steps of any of the above-mentioned methods for monitoring a graphics processor are implemented.

[0009] The present application also provides a computer program product, including a computer program, which implements the steps of any of the above-mentioned graphics processor monitoring methods when executed by a processor.

[0010] It can be seen from the above technical solution that the beneficial effects of the present invention are: The graphics processor monitoring method in the present application is applied to a baseboard management controller, which includes a direct memory access controller, a universal serial bus controller and a preset buffer. The direct memory access controller is connected to the universal serial bus controller. The universal serial bus controller is used to connect to at least one graphics processor through a hardware management console. When monitoring each graphics processor, the hardware management console is triggered by the direct memory access controller and the universal serial bus controller to collect monitoring data of each graphics processor connected to it, and the acquired monitoring data is stored in a preset buffer area through the direct memory access controller. Then, the monitoring data is obtained from the preset buffer area by the central processing unit (CPU) for analysis to obtain the monitoring status of the corresponding graphics processor. In the present application, the hardware management console is connected to the hardware management console through the interface of the universal serial bus controller, and the network interconnection between the hardware management console and each graphics processor is achieved through the hardware management console. The direct memory access controller is used to receive the monitoring data sent by the hardware management console through the universal serial bus controller. The data can be directly transmitted by bypassing the central processing unit and stored in the preset buffer. Therefore, the central processing unit can quickly obtain the monitoring data from the preset buffer for analysis to obtain the monitoring results, which is conducive to improving the monitoring efficiency of the graphics processor and reducing the resource overhead of the BMC.

[0011] In addition, the present invention also provides a corresponding implementation device, baseboard management controller and computer-readable storage medium for the monitoring method of the graphics processor, further making the method more practical. The device, baseboard management controller and computer-readable storage medium have corresponding advantages. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] In order to more clearly illustrate the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0013] Figure 1 A hardware architecture diagram of a graphics processor monitoring system provided in an embodiment of the present application; Figure 2 A flowchart of a method for monitoring a graphics processor provided in an embodiment of the present application; Figure 3 A flowchart of another method for monitoring a graphics processor provided in an embodiment of the present application; Figure 4 A data acquisition flow chart of a graphics processor provided in an embodiment of the present application; Figure 5A schematic diagram of the structure of a monitoring device for a graphics processor provided in an embodiment of the present application. DETAILED DESCRIPTION

[0014] The following will be combined with the accompanying drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0015] It should be noted that, in the description of this application, the terms "comprises," "includes," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or device. The terms "first," "second," etc., in this application are used to distinguish similar objects, and are not used to describe a particular order or sequence.

[0016] In order to enable those skilled in the art to better understand the present application, the present application is further described in detail below with reference to the accompanying drawings and specific implementation methods.

[0017] It should be noted that in related technologies, when monitoring GPUs, I2C / SMBus-based methods and polling monitoring methods are used. Monitoring GPUs based on I2C / SMBus: The BMC is often connected to the GPU via I2C (Inter-Integrated Circuit) or SMBus (System Management Bus), sending specific instructions to obtain GPU status information, such as temperature, power consumption, and usage rate. However, on the one hand, the I2C / SMBus bus bandwidth is low (for example, the standard I2C bus speed is usually 100kHz or 400kHz), the data transmission rate is limited, and the time consumption is long. On the other hand, with the continuous development of GPU technology, the frequent changes in the instruction set require the BMC to constantly update the instruction parsing logic, which greatly increases the complexity of subsequent maintenance.

[0018] Based on a polling monitoring method, the BMC sends a request to each GPU in turn and waits for a response to obtain its operating status data. When a server has a large number of GPUs, the BMC interacts with each GPU in turn, significantly increasing the total interaction time. If a server has multiple GPUs, the BMC queries the status of each GPU one by one, significantly increasing the overall query time. This prevents the BMC from timely and accurately monitoring the real-time operating status of the GPUs, affecting the stability and performance of the server system.

[0019] Based on this, an embodiment of the present application provides a graphics processor monitoring method that can improve the monitoring efficiency of the graphics processor and reduce the resource overhead of the BMC. Combined with the specific application environment architecture or specific hardware architecture on which the execution of the graphics processor monitoring method depends, the specific application environment architecture or specific hardware architecture is described here.

[0020] The graphics processor monitoring method is used for a baseboard management controller (BMC). The baseboard management controller includes a direct memory access (DMA) controller, a universal serial bus (USB) controller, and a preset buffer. The direct memory access controller is connected to the universal serial bus controller, and the universal serial bus controller is used to connect to at least one graphics processor (GPU) through a hardware management console (HMC).

[0021] It should be noted that the monitoring method of the graphics processor in the embodiment of the present application is based on the following Figure 1 The hardware architecture of the monitoring system of the graphics processor shown in the figure is implemented. The BMC system in the embodiment of the present application includes a DMA controller, a USB controller and a pre-divided preset buffer. The DMA controller is connected to the USB controller, and the USB controller is connected to the USB interface of the HMC via a USB line. The HMC is connected to each GPU. Among them, the USB controller can adopt a USB 3.0 / 3.1 Gen 2 controller, and the DMA controller can support multi-channel and burst transmission. The driver layer includes a USB network driver (such as a CDC-ETHERNET protocol stack) and a DMA device driver. The DMA device driver can be used to configure transmission parameters and perform interrupt processing. The application layer includes DMA buffer area data processing.

[0022] Please refer to Figure 2 The flowchart of the method for monitoring a graphics processor is shown in FIG. The method includes the following steps S110 to S130 .

[0023] S110: Obtaining monitoring data corresponding to each graphics processor GPU collected by the hardware management console through the direct memory access controller and the universal serial bus controller.

[0024] It is understandable that in the embodiment of the present application, when it is necessary to obtain monitoring data of each GPU, the BMC can trigger the hardware management console HMC to obtain monitoring data of each GPU connected thereto through the DMA controller and the USB controller.

[0025] S120: Storing each monitoring data into a preset buffer area through a direct memory access controller.

[0026] In the embodiment of the present application, after the DMA controller receives the monitoring data of each GPU sent by the HMC through the USB controller, the DMA controller stores the monitoring data of each GPU in a preset buffer for cache.

[0027] S130: Obtain monitoring data from a preset buffer area through the central processing unit (CPU), and analyze the monitoring data to obtain monitoring status of the corresponding graphics processor.

[0028] It is understandable that the CPU in the BMC system can obtain various monitoring data from the preset cache area to perform status analysis of each GPU and realize monitoring of each GPU. Since the CPU does not need to directly obtain the monitoring data of each GPU in this application, the CPU occupancy rate can be reduced. In addition, since the embodiment of this application is based on LAN (Local Area Network) over USB + DMA, a high-performance data transmission technology that integrates network communication and direct memory access, network interconnection between network devices (such as BMC, HMC, GPU) is realized through the USB interface, and then the DMA controller is used to bypass the CPU to directly transmit data. Therefore, the efficiency of monitoring data collection and the efficiency of monitoring each GPU can be greatly improved, and the CPU occupancy rate is reduced, which reduces the resource overhead of the BMC and is conducive to improving system performance. Among them, LAN over USB refers to using the USB port as a network card interface to connect to a switch to realize network communication. Its principle mainly relies on the USB Ethernet adapter.

[0029] Please refer to Figure 3 The flowchart of another graphics processor monitoring method in an embodiment of the present application initializes the system, samples the system status, allocates DMA channels to each data type, calculates channel priorities and allocates channel bandwidth, executes scheduling policies, and updates the system status. The following further illustrates and optimizes the technical solution based on the above embodiment.

[0030] In one embodiment, before acquiring the monitoring data corresponding to each graphics processor GPU collected by the hardware management console through the direct memory access controller and the universal serial bus (USB) controller in S110, the method may further include: During the boot process, the Direct Memory Access (DMA) controller and the Universal Serial Bus (USB) controller are identified.

[0031] It should be noted that in embodiments of the present application, system initialization and device enumeration can be performed in advance. During BMC startup, the physical addresses of the USB controller and DMA controller can be identified through the ACPI (Advanced Configuration and Power Management Interface) table or device tree, and device information and resource requirements for the USB controller and DMA controller can be obtained. Resources for the USB controller and DMA controller can then be configured based on these resource requirements. For example, certain BMC models initialize a dedicated management network stack to prepare for subsequent LAN over USB communication.

[0032] Initialize and configure the direct memory access (DMA) controller and the universal serial bus (USB) controller respectively.

[0033] In actual applications, after configuring resources for the USB controller and DMA controller, each controller is initialized and configured separately. During DMA controller initialization, the DMA controller clock can be enabled, performing a soft reset, and basic DMA controller parameters can be configured, such as bus width (e.g., 32-bit data width) and burst transfer length (e.g., maximum burst length of 16 bytes). During USB controller initialization, the USB network interface can be initialized, creating a virtual Ethernet interface (e.g., usb0) through the BMC and assigning a MAC (Media Access Control Address) address (typically a variant of the BMC management address) to the HMC. The USB CDC-ETHERNET (virtual Ethernet interface) driver is then registered and a USB communication channel with the HMC is established. The network protocol stack (e.g., TCP / IP) is then configured, along with default routing and firewall rules.

[0034] The connection establishment and parameter negotiation are performed with the hardware management console connected to the universal serial bus USB controller through the direct memory access (DMA) controller and the universal serial bus USB controller.

[0035] It is understandable that in the embodiment of the present application, HMC connection establishment and parameter negotiation can also be performed, including USB physical connection detection, USB device enumeration, network parameter negotiation and IP address allocation.

[0036] During the USB physical connection detection process, the HMC can be connected to the USB interface of the BMC through a USB cable, thereby triggering a hot plug event. When the BMC USB controller detects a connection change of the USB interface, it can notify the system through an interrupt, thereby realizing USB physical connection detection.

[0037] During USB device enumeration, the HMC sends a USB enumeration request (e.g., a GET_DESCRIPTOR request) to the BMC. The USB enumeration request includes a first vendor ID, a first product ID, and first device class information. The BMC obtains the BMC's device descriptor based on the USB enumeration request. The device descriptor also includes a second vendor ID, a second product ID, and second device class information. The BMC determines whether it is a network device by comparing the first vendor ID, first product ID, and first device class information in the USB enumeration request with the second vendor ID, second product ID, and second device class information in the device descriptor. If the information is consistent, it indicates that it is a network device (e.g., Class = 02h).

[0038] During network parameter negotiation, the HMC and BMC exchange Ethernet parameters (such as MTU and supported protocol types) through the USB control endpoint. For example, the negotiated MTU (Maximum Transmission Unit) value is 1500 bytes, consistent with standard Ethernet.

[0039] During IP address allocation, DHCP (Dynamic Host Configuration Protocol) or static IP is used to assign addresses to virtual Ethernet interfaces. For example, the BMC is assigned IP 192.168.127.1 / 24, and the HMC is assigned IP 192.168.127.2 / 24.

[0040] In one embodiment, the method may further include: For each channel in the direct memory access controller, a corresponding channel is allocated for each data type.

[0041] It is understood that in embodiments of the present application, each channel in the DMA controller can be pre-assigned to each data type. A channel can correspond to one data type or multiple data types. For example, channel 0 can be used for GPU temperature monitoring, and channel 1 can be used for power consumption data. In actual applications, the BMC kernel can obtain available channels from the DMA controller and assign corresponding data types to these available channels.

[0042] It should also be noted that in actual applications, memory buffer allocation and transmission parameters can also be set. When allocating a memory buffer (also known as a preset buffer), a physically continuous memory buffer (usually 4KB or 8KB page) can be allocated to store DMA transferred data, and a memory protection mechanism can be enabled to ensure that DMA can only access the pre-allocated security area.

[0043] When setting the transfer parameters, you can configure a DMA channel function as follows. Its purpose is to set the data transfer parameters (source address (such as GPU register), destination address (such as BMC memory buffer), transfer length and configure the transfer direction (such as from peripheral to memory), etc.) for the specified DMA channel, so that when data is subsequently exchanged, a DMA data transfer is initiated for each data exchange, that is, completion interrupt is enabled when performing a read operation.

[0044] Based on each data type, the priority and bandwidth of the channel corresponding to the data type are determined.

[0045] After assigning a corresponding channel to each data type, the channel priority and bandwidth can also be determined based on the data type, ensuring that critical data (such as temperature) is transmitted first, improving monitoring efficiency and timeliness.

[0046] In one embodiment, the process of determining the priority and bandwidth of the channel corresponding to each data type may include: Determine the priority of the channel corresponding to each data type based on the data timeliness urgency value corresponding to each data type; The bandwidth of the channel corresponding to the data type can be determined based on the basic bandwidth, the data timeliness urgency value corresponding to each data type, the system status parameters, the data staleness value, and the priority scaling factor.

[0047] It should be noted that in the embodiment of the present application, the priority of the channel corresponding to the data type can be determined based on the data timeliness urgency value of the data type. For example, the data timeliness urgency value of temperature monitoring data is 7-8, and the priority of the corresponding channel is the highest priority; the data timeliness urgency value of power consumption data is 5-6, and the priority of the corresponding channel is medium-high priority; the data timeliness urgency value of utilization data is 3-4, and the priority of the corresponding channel is medium priority; the data timeliness urgency value of log data is 1-2, and the priority of the corresponding channel is low priority.

[0048] In addition, in the embodiment of the present application, when performing channel bandwidth allocation, the bandwidth relationship can be obtained by the following bandwidth relationship: Bandwidth_Allocation = Base_Bandwidth × (1 + ( (Urgency×α + System_Load_Impact×β + Data_Age×γ) / Normalization_Factor ) × Priority_Scale ).

[0049] Bandwidth_Allocation represents the bandwidth (bytes / second) ultimately allocated to the DMA channel, a dynamically adjusted core output value. Base_Bandwidth represents the base bandwidth allocation, typically pre-set based on static priorities (e.g., critical channels receive 10% of the total bandwidth). Urgency represents the data timeliness urgency, a dimensionless parameter. For example, the data timeliness urgency for temperature monitoring data is 7-8, for power consumption data is 5-6, for utilization data is 3-4, and for log data is 1-2. System_Load_Impact represents the system state (or system status value), which measures the impact of data transfer on system load (a range of 0.0-1.0). For example, when GPU utilization exceeds 80%, the system status value for monitoring channels is 1.5, and for other channels is 0.5. When USB bandwidth utilization exceeds 70%, the system status value for non-critical channels is 0.3. Data_Age represents the data staleness (in milliseconds). For example, the data staleness of newly collected data is 0. The data staleness of data that exceeds the expected update interval increases linearly (for example, by 0.1 for every 10ms). α, β, and γ represent the weighting coefficients for Urgency, System_Load_Impact, and Data_Age, respectively (default values ​​are 0.6, 0.3, and 0.1). α controls the impact of Urgency, β controls the impact of System_Load_Impact, and γ controls the impact of Data_Age. Normalization_Factor is a normalization factor (typically 8.0). Ensure that the corresponding values ​​(in parentheses) are within a reasonable range (0.0-1.0) to avoid priority overflow. Priority_Scale represents the priority scaling factor, used to implement nonlinear bandwidth adjustment. For example, when the GPU is fully loaded, the priority scaling factor for critical channels is 0.5, and the priority scaling factor for monitoring channels is 1.5. When the system is idle, the priority scaling factor for non-critical channels is 0.3.

[0050] It is understood that in the embodiments of this application, priority is calculated comprehensively based on three dimensions: Urgency, System_Load_Impact, and Data_Age, enabling dynamic priority setting. This replaces a single static priority and allows dynamic adjustment of priorities based on actual needs, improving the timeliness of data monitoring. Furthermore, this application implements nonlinear bandwidth allocation based on comprehensive priority, automatically adjusting under different system states. For example, under high load, the bandwidth of critical channels is significantly increased, while under low load, non-critical channels fully utilize idle bandwidth.

[0051] In this embodiment, the Data_Age parameter is used to automatically prioritize older data, enabling rapid response to system state changes. By adjusting α, β, γ, and Priority_Scale, scheduling strategies can be optimized for different application scenarios, achieving greater adaptability.

[0052] In one embodiment, before obtaining the monitoring data of each graphics processor collected by the hardware management console through the direct memory access controller and the universal serial bus controller, the method may further include: Determine whether the collection time has been reached according to the preset collection frequency, and if it is determined that the collection time has been reached, execute the next step; Alternatively, it is determined whether a monitoring request sent by the hardware management console is received, and if the monitoring request sent by the hardware management console is received, the next step is executed.

[0053] It is understood that in embodiments of the present application, periodic data collection can be performed when performing monitoring data collection. For example, a collection frequency can be pre-set, and the BMC triggers the HMC to collect GPU monitoring data via the DMA controller and the USB controller based on the preset collection frequency (e.g., 100ms). In actual applications, data collection can also be invoked via a timer interrupt. A timer can be used to count, and when a preset duration is reached, an interrupt is generated, triggering the HMC to collect GPU monitoring data via the DMA controller and the USB controller.

[0054] Of course, the HMC can also send specific monitoring requests (such as real-time temperature query) to the BMC. The monitoring request can be passed to the BMC application layer through the network protocol stack and call the DMA start function. When the BMC receives the monitoring request (including the target data type) sent by the HMC through the DMA controller, the BMC immediately triggers the HMC to collect GPU monitoring data through the DMA controller and USB controller.

[0055] The data collection scope in the embodiment of the present application may include collecting data from GPU temperature registers (such as NVidia's THERMAL_TARGET register), collecting data from power consumption sensor data (such as the POWER_READINGS register), and collecting data from utilization statistics (such as the GPU_ACTIVE register), thereby collecting monitoring data of various data types to ensure comprehensive monitoring.

[0056] During data transmission, the HMC receives the data from the USB and returns the requested data. The entire process is based on LAN over USB. After the BMC DMA receives the data, it saves the data to the buffer area.

[0057] When the BMC receives and processes collected monitoring data, it can first receive monitoring data sent by the HMC through the USB controller. For example, the BMC's USB controller receives the data packet and transmits it to the DMA controller, which stores the packet in a preset buffer in the system memory and triggers a USB interrupt to notify the operating system of the new data arrival. The BMC's application layer parses the data, updates the monitoring interface, and analyzes the GPU temperature data to calculate the fan speed for further fan speed control.

[0058] In one embodiment, the process of obtaining monitoring data of each graphics processor collected by the hardware management console through the direct memory access controller and the universal serial bus controller may include: According to each target data type, using target channels corresponding to each target data type in the direct memory access controller in combination with the priority and bandwidth of each target channel, obtaining each target data corresponding to each graphics processor collected by the hardware management console through the universal serial bus controller; the data type of the target data is the target data type; The monitoring data is stored in the preset buffer area through the direct memory access controller, including: Each target data is stored in a preset buffer area according to the priority of each target channel through the target channels corresponding to each target data type in the direct memory access controller.

[0059] It should be noted that the BMC implemented in this application can determine the target channels corresponding to each target data type, as well as the priority and bandwidth corresponding to each target channel, from the DMA controller based on the target data types corresponding to the monitoring data to be acquired, and then further trigger the HMC through the USB controller to collect each target data of each GPU according to each target data type. The HMC sends the collected target data of each GPU to the DMA controller through the USB controller. The DMA controller receives each target data through the channels corresponding to each target data type in combination with the priority and bandwidth of each channel, and writes the received target data to the preset buffer area through the corresponding channel, thereby realizing the collection of GPU monitoring data. In the embodiment of this application, the corresponding target data is received in combination with the priority and bandwidth of the channel, which can effectively ensure that important data with high priority is obtained in a timely and rapid manner, thereby improving the timeliness of monitoring important data.

[0060] In practical applications, when acquiring data, the DMA controller can initiate a request (HOLD signal) to the BMC system bus. The CPU responds to this request by releasing bus control (HLDA signal), allowing the DMA to gain access. In this implementation, the data transmission mode is burst transfer, which transfers multiple data blocks continuously to reduce bus arbitration overhead. Data verification and error handling are performed during the data transmission process. For example, CRC checksums are calculated during transmission to ensure data integrity. A dual-buffer mechanism can also be configured, for example, using two alternating buffers (Buffer A and Buffer B). While the DMA is writing to Buffer A, the network stack reads data from Buffer B. After the transfer is complete, the active buffer is switched, achieving parallel operation.

[0061] In one embodiment, before acquiring, through a universal serial bus controller, target data corresponding to each graphics processor and collected by a hardware management console using target channels corresponding to each target data type in a direct memory access controller in combination with the priority of each target channel according to each target data type, the method may further include: Sending a target data collection request to a hardware management console via a direct memory access controller and a universal serial bus controller, wherein the target data collection request includes each target data type, so that the hardware management console collects each target data corresponding to each graphics processor according to each target data type; Alternatively, a monitoring request sent by a hardware management console is received through a direct memory access controller and a universal serial bus controller, where the monitoring request includes each target data type.

[0062] It should be noted that, in the embodiment of the present application, a target data acquisition request can be sent to the HMC through the DMA controller and the USB controller according to a preset acquisition cycle. The HMC can collect target data corresponding to each graphics processor and each target data type according to each target data type in the target data acquisition request. The HMC returns the collected target data to the USB controller, and the USB controller then sends the target data to the DMA controller. The DMA controller obtains the target data based on the channel corresponding to each target data type, combined with the priority and bandwidth, and stores the target data in a preset buffer area.

[0063] That is, please refer to Figure 4In the process of acquiring monitoring data in each cycle, the BMC can write data to the DMA controller, and send the data to the preset buffer area through the DMA controller. The DMA controller can send the data to the USB controller and its link. The HMC can return the data value to the DMA controller and store the data in the preset buffer area. The BMC can process the data received in the preset buffer area.

[0064] In addition, the HMC can also send a specific monitoring request to the BMC. After receiving the monitoring request through the DMA controller and the USB controller, the corresponding target data are determined according to the monitoring request. According to the type of each target data, the target channels corresponding to the target data types in the direct memory access controller are used in combination with the priority and bandwidth of each target channel. The target data corresponding to each graphics processor collected by the hardware management console are obtained through the universal serial bus controller. The target data are stored in the preset cache area according to the priority of each target channel through the target channels corresponding to the target data types in the direct memory access controller.

[0065] Of course, the method provided in this application can not only monitor the GPU, but also monitor other components (such as retimers, etc.) that require high CPU utilization and strong timeliness requirements.

[0066] It should be noted that the embodiments of the present application can reduce BMC resource overhead and increase BMC response speed during use, which is beneficial to improving user experience.

[0067] Through the description of the above implementation methods, those skilled in the art can clearly understand that the method according to the above embodiment can be implemented by means of software plus the necessary general hardware platform, and of course it can also be implemented by hardware, but in many cases the former is a better implementation method.

[0068] The embodiment of the present application also provides a monitoring device for a graphics processor. Figure 5 The graphics processor monitoring device is applied to a baseboard management controller, which includes a direct memory access controller, a universal serial bus controller, and a preset buffer. The direct memory access controller is connected to the universal serial bus controller, and the universal serial bus controller is used to connect to at least one graphics processor through a hardware management console. The device includes: An acquisition module 11 is configured to acquire monitoring data corresponding to each graphics processor collected by the hardware management console through a direct memory access controller and a universal serial bus controller; A cache module 12, configured to store each monitoring data into a preset cache area via a direct memory access controller; The analysis module 13 is used to obtain monitoring data from a preset buffer area through the central processing unit, and analyze the monitoring data to obtain the monitoring status of the corresponding graphics processor.

[0069] In one embodiment, the device further comprises: An allocation module, configured to allocate a corresponding channel to each data type for each channel in the direct memory access controller; The determination module is used to determine the priority and bandwidth of the channel corresponding to each data type according to the data type.

[0070] In one embodiment, the determination module includes: A first determining unit is configured to determine the priority of a channel corresponding to a data type according to a data timeliness urgency value corresponding to each data type; The second determining unit is configured to determine the bandwidth of the channel corresponding to the data type according to the basic bandwidth, the data timeliness urgency value corresponding to each data type, the system state parameter, and the data staleness value.

[0071] In one embodiment, the acquisition module 11 includes: a first acquiring unit, configured to acquire, based on each target data type, target data corresponding to each graphics processor collected by the hardware management console through a universal serial bus (USB) controller using target channels corresponding to each target data type in the direct memory access controller in combination with priorities and bandwidths of each target channel; the data type of the target data being the target data type; The cache module 12 is used to: Each target data is stored in a preset buffer area according to the priority of each target channel through the target channels corresponding to each target data type in the direct memory access controller.

[0072] In one embodiment, the device further comprises: a sending unit, configured to send a target data collection request to a hardware management console via a direct memory access controller and a universal serial bus (USB) controller, wherein the target data collection request includes each target data type, so that the hardware management console collects each target data corresponding to each graphics processor according to each target data type; Or, the receiving unit is configured to receive a monitoring request sent by the hardware management console through the direct memory access controller and the universal serial bus (USB) controller, where the monitoring request includes various target data types.

[0073] In one embodiment, the device further comprises: An identification module, used for identifying a direct memory access controller DMA and a universal serial bus USB controller during a startup process; An initialization module is used to initialize and configure the direct memory access controller DMA and the universal serial bus USB controller respectively; The establishment module is used for establishing a connection and negotiating parameters with a hardware management console connected to the universal serial bus USB controller through a direct memory access controller DMA and a universal serial bus USB controller.

[0074] In one embodiment, the device further comprises: A first judgment module is used to determine whether the collection time has arrived according to the preset collection frequency, and trigger the acquisition module if it is determined that the collection time has arrived; Alternatively, the first determining module is configured to determine whether a monitoring request sent by the hardware management console is received, and trigger the obtaining module if the monitoring request sent by the hardware management console is received.

[0075] For descriptions of features in the embodiments corresponding to the graphics processor monitoring device, reference can be made to the descriptions of the embodiments corresponding to the graphics processor monitoring method, which will not be detailed here.

[0076] An embodiment of the present application further provides a baseboard management controller, comprising a memory, a processor, a direct memory access controller, a universal serial bus controller, and a preset buffer, wherein the universal serial bus controller is used to connect to at least one graphics processor GPU through a hardware management console HMC; memory for storing computer programs; A processor is used to implement the steps of the above-mentioned graphics processor monitoring method when executing a computer program.

[0077] An embodiment of the present application further provides a computer-readable storage medium storing a computer program, wherein the computer program is configured to execute the steps of any of the above-mentioned graphics processor monitoring method embodiments when running.

[0078] In an exemplary embodiment, the computer-readable storage medium may include, but is not limited to, various media that can store computer programs, such as a USB flash drive, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk, or an optical disk.

[0079] An embodiment of the present application further provides a computer program product, which includes a computer program. When the computer program is executed by a processor, the steps of any of the above-mentioned graphics processor monitoring method embodiments are implemented.

[0080] An embodiment of the present application further provides another computer program product, including a non-volatile computer-readable storage medium, wherein the non-volatile computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of any of the above-mentioned graphics processor monitoring method embodiments are implemented.

[0081] Professionals may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the above description has generally described the components and steps of each example according to their functions. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0082] The above describes in detail the method, device, baseboard management controller, and computer-readable storage medium for monitoring a graphics processor provided by the present application. Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only intended to help understand the method and core concept of the present application. It should be noted that, for those skilled in the art, without departing from the principles of the present application, several improvements and modifications may be made to the present application, and such improvements and modifications also fall within the scope of protection of the claims of the present application.

Claims

1. A method for monitoring a graphics processor, characterized in that: The method is applied to a baseboard management controller, the baseboard management controller including a direct memory access controller, a universal serial bus controller, and a preset buffer, the direct memory access controller being connected to the universal serial bus controller, the universal serial bus controller being used to connect to at least one graphics processor through a hardware management console, and comprising: Acquiring, through the direct memory access controller and the universal serial bus controller, monitoring data corresponding to each of the graphics processors collected by the hardware management console; storing each of the monitoring data into a preset buffer area through the direct memory access controller; The monitoring data is acquired from the preset buffer area by the central processing unit, and the monitoring data is analyzed to obtain the monitoring result of the corresponding graphics processor.

2. The method for monitoring a graphics processor according to claim 1, wherein: Also includes: For each channel in the direct memory access controller, assign a corresponding channel to each data type; According to each of the data types, the priority and bandwidth of the channel corresponding to the data type are determined.

3. The method for monitoring a graphics processor according to claim 2, wherein: The step of determining, according to each data type, the priority and bandwidth of the channel corresponding to the data type, includes: Determining the priority of the channel corresponding to each data type according to the data timeliness urgency value corresponding to each data type; The bandwidth of the channel corresponding to the data type is determined according to the basic bandwidth, the data timeliness urgency value corresponding to each data type, the system state parameter, and the data obsolescence value.

4. The method for monitoring a graphics processor according to claim 2, wherein: Acquiring, through the direct memory access controller and the universal serial bus controller, monitoring data corresponding to each of the graphics processors collected by the hardware management console, including: According to each target data type, using target channels in the direct memory access controller corresponding to each target data type in combination with the priority and bandwidth of each target channel, obtaining, through the universal serial bus controller, each target data corresponding to each graphics processor and collected by the hardware management console; the data type of the target data is the target data type; The storing of each monitoring data into a preset buffer area through the direct memory access controller includes: Each target data is stored in a preset buffer area according to the priority of each target channel through the target channels corresponding to each target data type in the direct memory access controller.

5. The method for monitoring a graphics processor according to claim 4, wherein: Before acquiring, through the universal serial bus controller, the target data collected by the hardware management console and corresponding to the graphics processors, using the target channels in the direct memory access controller corresponding to the target data types in combination with the priority and bandwidth of the target channels according to the target data types, the method further includes: sending a target data collection request to the hardware management console via the direct memory access controller and the universal serial bus controller, wherein the target data collection request includes each target data type, so that the hardware management console collects each target data corresponding to each graphics processor according to each target data type; Alternatively, a monitoring request sent by the hardware management console is received through the direct memory access controller and the universal serial bus controller, where the monitoring request includes various target data types.

6. The method for monitoring a graphics processor according to any one of claims 1 to 5, wherein: Before acquiring the monitoring data corresponding to each of the graphics processors collected by the hardware management console through the direct memory access controller and the universal serial bus controller, the method further includes: During a boot process, identifying the direct memory access controller and the universal serial bus controller; Initializing and configuring the direct memory access controller and the universal serial bus controller respectively; A connection is established and parameters are negotiated with a hardware management console connected to the universal serial bus controller through the direct memory access controller and the universal serial bus controller.

7. The method for monitoring a graphics processor according to claim 6, wherein: Before acquiring the monitoring data corresponding to each of the graphics processors collected by the hardware management console through the direct memory access controller and the universal serial bus controller, the method further includes: Determine whether the collection time has been reached according to the preset collection frequency, and if it is determined that the collection time has been reached, execute the next step; Alternatively, it is determined whether a monitoring request sent by the hardware management console is received, and if the monitoring request sent by the hardware management console is received, the next step is executed.

8. A monitoring device for a graphics processor, characterized in that: Applied to a baseboard management controller, the baseboard management controller includes a direct memory access controller, a universal serial bus controller, and a preset buffer, the direct memory access controller is connected to the universal serial bus controller, and the universal serial bus controller is used to connect to at least one graphics processor through a hardware management console, the device includes: an acquisition module, configured to acquire, through the direct memory access controller and the universal serial bus controller, monitoring data corresponding to each of the graphics processors collected by the hardware management console; A cache module, configured to store each of the monitoring data into a preset cache area through the direct memory access controller; The analysis module is used to obtain monitoring data from the preset buffer area through the central processing unit, and analyze the monitoring data to obtain monitoring results corresponding to the graphics processor.

9. A baseboard management controller, characterized in that: The system comprises a memory, a processor, a direct memory access controller, a universal serial bus controller and a preset buffer, wherein the universal serial bus controller is used to connect to at least one graphics processor through a hardware management console; The memory is used to store computer programs; The processor is configured to implement the steps of the method for monitoring a graphics processor according to any one of claims 1 to 7 when executing the computer program.

10. A computer-readable storage medium, characterized in that The computer-readable storage medium stores a computer program, wherein when the computer program is executed by a processor, the steps of the method for monitoring a graphics processor according to any one of claims 1 to 7 are implemented.

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