Electron beam deflection controller

Abstract

The invention discloses an electron beam deflection controller which comprises a pattern generator module, a scanning deflection module, a power amplification and current sampling module and a linear acquisition and correction module. The pattern generator module is used for converting the exposure pattern file and the correction parameter into a digital coordinate file and sending the digital coordinate file to the scanning deflection module; the scanning deflection module is used for receiving the deflection coordinate data and the correction coefficient and converting the deflection coordinate data and the correction coefficient into analog differential signals; the power amplification and current sampling module is used for converting the analog differential signal into a linear current signal to act on a deflection coil and feeding back the current signal to an input end so as to realize accurate control of current output; and the linear acquisition and correction module is used for carrying out linear acquisition on the analog voltage output by the power amplification and current sampling module and controlling a digital-to-analog converter to carry out linearity correction so as to realize high-linearity output of the deflection voltage and current signals. The electron beam deflection precision and stability can be improved.

Description

Technical Field

[0001] The present invention mainly relates to the technical field of electron beams, and in particular to an electron beam deflection controller. Background Art

[0002] Electron beam lithography (EBLI) uses an electron beam to directly trace or project patterns onto a wafer coated with photoresist. It is a primary method for producing device patterns and masks, and is also a key tool in the research and fabrication of nanoscale devices. An EB deflection controller controls the focus and deflection of the EB. The EB exposure process requires extremely high resolution, patterning accuracy, and scanning speed. Therefore, a high-speed, high-precision EB deflection controller is needed to improve EB exposure quality.

[0003] During electron beam exposure, the exposure pattern is divided into multiple main fields, each of which is further divided into multiple sub-fields. Main fields are switched by moving the workpiece stage, while sub-field switching is achieved by main field deflection. Patterning is achieved through sub-field deflection. Therefore, main field deflection requires extremely high control precision, while sub-field deflection requires extremely high speed. Domestic research on high-speed, high-precision electron beam deflection controllers is limited. Existing electron beam deflection controllers suffer from low control accuracy, poor linearity, slow scanning speed, and narrow scanning range, making it difficult to achieve high-precision, small-scale exposure and high-speed, large-area scanning. Summary of the Invention

[0004] In view of the technical problems existing in the prior art, the present invention provides an electron beam deflection controller which improves the accuracy and stability of electron beam deflection.

[0005] In order to solve the above technical problems, the technical solution proposed by the present invention is: An electron beam deflection controller includes a pattern generator module, a scanning deflection module, a power amplification and current sampling module, and a linear acquisition and correction module; The pattern generator module is used to convert the exposure pattern file and the correction parameters into a digital coordinate file and send it to the scanning deflection module; The scanning deflection module is used to receive the deflection coordinate data and correction coefficients sent by the pattern generator, convert them into input signals for the digital-to-analog converter, and then convert them into corresponding analog voltage signals through the digital-to-analog converter, and output analog differential signals through signal processing; The power amplification and current sampling module is used to perform linear power amplification on the analog differential signal output by the scanning deflection module and convert it into a linear current signal to act on the deflection coil. At the same time, the current sampling module provides current feedback to achieve precise closed-loop control of the current output. The linear acquisition and correction module is used to linearly acquire the analog voltage output by the power amplification and current sampling module, and control the digital-to-analog converter to perform linearity correction to achieve high linearity output of the deflection voltage and current signals.

[0006] As a further improvement of the above technical solution: The scanning deflection module and the power amplification and current sampling module each have two groups, corresponding to the main field and sub-field respectively; wherein the scanning deflection module includes a main field deflection module and a sub-field deflection module; the power amplification and current sampling module includes a main field power amplification and current sampling module and a sub-field power amplification and current sampling module; the deflection coil includes a main field deflection coil and a sub-field deflection coil; wherein the pattern generator module is connected to the main field deflection module via a first FPGA bus communication module; and the pattern generator module is connected to the sub-field deflection module via a second FPGA bus communication module; After the pattern generator module converts the image file to be exposed and the correction coefficients into X- and Y-axis coordinate data for the scan deflection module, it sends the main-field scan coordinate data to the first FPGA bus communication module via the high-speed serial VPX bus and sends the sub-field scan coordinate data to the second FPGA bus communication module via the 16-bit LVDS parallel bus. Each FPGA bus communication module parses and processes the received scan coordinate data and converts it into a DAC input signal. The data is sent to the main-field deflection module via the high-speed SPI bus interface and to the sub-field deflection module via the LVDS interface. The main field deflection module and the sub-field deflection module convert the received scanning coordinate data into corresponding analog voltage signals, and perform signal processing to output differential signals. Different coordinate positions correspond to different analog voltages. The differential signal output by the main field deflection module is sent to the main field power amplifier and current sampling module, and after linear amplification, it is converted into a high-precision linear current that drives the main field deflection coil to control the main field scanning of the electron beam. The differential signal output by the sub-field deflection module is sent to the sub-field power amplifier and current sampling module, and after linear amplification, it is converted into a high-precision linear current that drives the sub-field deflection coil to control the sub-field scanning of the electron beam. The linear acquisition and correction module linearly acquires the deflection voltage output by the amplifier and feeds it back to each FPGA bus communication module. Each FPGA bus communication module corrects the DAC output to make the deflection voltage highly linear, and ultimately provides high-precision linear current to each deflection coil.

[0007] The main field deflection module includes a voltage reference source circuit, a voltage buffer circuit, a main field DAC deflection circuit, a main field correction circuit and a main field signal processing circuit; The voltage reference source circuit, the voltage buffer circuit and the main field DAC deflection circuit are connected in sequence; the voltage buffer circuit is used to convert the voltage output by the voltage reference source circuit into a reference voltage required for the main field DAC deflection circuit to work; The main field signal processing circuit is connected to the main field DAC deflection circuit and the main field correction circuit respectively, and is used to sum and amplify the analog signals output by the main field DAC deflection circuit and the main field correction circuit, and output an analog differential signal.

[0008] The main field deflection module also includes a first main field signal isolation circuit and a second main field signal isolation circuit; the first main field signal isolation circuit is located between the first FPGA bus communication module and the main field DAC deflection circuit, and is used to achieve isolation between the first FPGA bus communication module and the main field DAC deflection circuit; the second main field signal isolation circuit is located between the first FPGA bus communication module and the main field correction circuit, and is used to achieve isolation between the first FPGA bus communication module and the main field correction circuit.

[0009] The subfield deflection module includes a voltage reference source circuit, a DAC programmable voltage adjustable circuit, a subfield DAC deflection circuit, a subfield correction circuit and a subfield signal processing circuit; The voltage reference source circuit, the DAC programmable voltage adjustable circuit and the sub-field DAC deflection circuit are connected in sequence, and the DAC programmable voltage adjustable circuit is used to accurately control the voltage reference source circuit through the DAC to output the voltage required by the sub-field DAC deflection circuit; The subfield signal processing circuit is connected to the subfield DAC deflection circuit and the subfield correction circuit respectively, and is used to sum and amplify the analog signals output by the subfield DAC deflection circuit and the subfield correction circuit, and output an analog differential signal.

[0010] The sub-field deflection module also includes a first sub-field signal isolation circuit and a second sub-field signal isolation circuit; the first sub-field signal isolation circuit is located between the second FPGA bus communication module and the sub-field DAC deflection circuit, and is used to achieve isolation between the second FPGA bus communication module and the sub-field DAC deflection circuit; the second sub-field signal isolation circuit is located between the second FPGA bus communication module and the sub-field correction circuit, and is used to achieve isolation between the second FPGA bus communication module and the sub-field correction circuit.

[0011] The main field power amplification and current sampling module includes a main field differential buffer circuit, a main field linear power amplification circuit, a sampling resistor switching circuit and a main field current sampling circuit; The main field differential buffer circuit receives the differential analog voltage signal output from the main field deflection module and then converts it into a single-ended analog voltage signal input to the main field linear power amplifier circuit; The sampling resistor switching circuit controls the disconnection and connection of multiple sampling resistors through multiple signal relays to achieve the switching of sampling resistors in different gears; The main field current sampling circuit realizes high linear output from voltage to current. One end of the main field deflection coil is connected to the output end of the main field linear power amplifier circuit, and the other end is connected to the main field current sampling circuit; the main field current sampling circuit feeds back to the input end of the main field linear power amplifier circuit to realize precise current control.

[0012] The sub-field power amplification and current sampling module includes a sub-field differential buffer circuit, a sub-field linear power amplification circuit and a sub-field current sampling circuit; The sub-field differential buffer circuit receives the differential analog voltage signal output from the sub-field deflection module and then converts it into a single-ended analog voltage signal input by the sub-field linear power amplifier circuit; The sub-field linear power amplifier circuit is composed of a pre-amplifier + power amplifier; The sub-field current sampling circuit realizes high linear output from voltage to current. One end of the sub-field deflection coil is connected to the output end of the sub-field linear power amplifier circuit, and the other end is connected to the sub-field current sampling circuit. The current is fed back to the input end of the preamplifier through the sub-field current sampling circuit to form a deep negative feedback circuit to achieve precise current control.

[0013] The linear acquisition and correction module includes a multi-channel data acquisition instrument and host computer software. The data acquisition instrument linearly acquires the analog voltage output by each power amplifier and current sampling module, and compares it with the ideal analog voltage data to form a checkable linearity correction table; Each FPGA bus communication module calls the linearity correction table to control the DAC to perform linearity correction, achieving high linearity output of the analog signal, and ultimately achieving high linear current drive for the deflection coil.

[0014] The linearity correction table is obtained through static measurement or dynamic measurement; Static measurement refers to using the high-precision acquisition function of the data acquisition instrument to divide the output analog voltage into multiple steps according to LSB, measure the voltage average of each step over a period of time, compare it with the ideal voltage value, and generate a linearity correction table; Dynamic measurement refers to measuring the real-time output analog voltage curve through the high-speed acquisition function of the data acquisition instrument, fitting it with the ideal voltage curve, and generating a linearity correction table.

[0015] Compared with the prior art, the advantages of the present invention are: The high-speed and high-precision electron beam deflection controller of the present invention can drive the deflection coil to scan the electron beam with high precision, high linearity, high speed, and large range, achieving nanometer-level positioning accuracy, an exposure frequency of 100 MHz, an exposure size of less than 100 nm, and a scanning range of 1 mm*1 mm at an acceleration voltage of 20 kV to 100 kV. Through various correction measures, it compensates for the aberration, distortion, and deviation generated by the electron beam under high-speed deflection, further improving the accuracy and stability of the deflection system, which is of great significance to the small-batch manufacturing of third-generation semiconductor chips. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 This is a block diagram of an electron beam deflection controller according to an embodiment of the present invention.

[0017] Figure 2 FIG. 4 is a block diagram of a main field deflection module in an embodiment of the present invention.

[0018] Figure 3 FIG. 4 is a block diagram of a sub-field deflection module in an embodiment of the present invention.

[0019] Figure 4 This is a circuit diagram of an embodiment of the main field power amplification and current sampling module in the present invention.

[0020] Figure 5 This is a circuit diagram of an embodiment of the sub-field power amplification and current sampling module in the present invention.

[0021] Legend: 1. Pattern generator module; 2. First FPGA bus communication module; 3. Main field deflection module; 21. Voltage reference source circuit; 22. Voltage buffer circuit; 23. First main field signal isolation circuit; 24. Second main field signal isolation circuit; 25. Main field DAC deflection circuit; 26. Main field correction circuit; 27. Main field signal processing circuit; 4. Main field power amplifier and current sampling module; 41. Main field differential buffer circuit; 42. Main field linear power amplifier circuit; 43. Sampling resistor switching circuit; 44. Main field current sampling circuit; 5. Main field Deflection coil; 6. Second FPGA bus communication module; 7. Sub-field deflection module; 31. Voltage reference source circuit; 32. DAC programmable voltage adjustable circuit; 33. First sub-field signal isolation circuit; 34. Second sub-field signal isolation circuit; 35. Sub-field DAC deflection circuit; 36. Sub-field correction circuit; 37. Sub-field signal processing circuit; 8. Sub-field power amplification and current sampling module; 51. Sub-field differential buffer circuit; 52. Sub-field linear power amplification circuit; 53. Sub-field current sampling circuit; 9. Sub-field deflection coil; 10. Linear acquisition and correction module. DETAILED DESCRIPTION

[0022] The present invention will be further described below with reference to the accompanying drawings and specific embodiments.

[0023] like Figure 1 As shown, the high-speed and high-precision electron beam deflection controller provided by the embodiment of the present invention includes a pattern generator module, a scanning deflection module, a power amplification and current sampling module, and a linear acquisition and correction module; The pattern generator module is used to convert the exposure pattern file, correction parameters, etc. into a digital coordinate file and send it to the scanning deflection module; The scanning deflection module is used to receive the deflection coordinate data and correction coefficients sent by the pattern generator, convert them into input signals for the digital-to-analog converters (main DAC and correction DAC) through the FPGA, and then convert them into corresponding analog voltage signals through the DAC. After summing and amplification by the operational amplifier (signal processing), the analog differential signals are output. The power amplifier and current sampling module is used to linearly amplify the analog differential signal output by the scanning deflection module and convert it into a linear current signal, which acts on the deflection actuator (deflection coil). At the same time, the current sampling module provides current feedback to achieve precise closed-loop control of the current output. The linear acquisition and correction module is used to linearly acquire the analog voltage output by the power amplifier and current sampling module, and perform linearity correction through FPGA-controlled DAC to achieve high linearity output of deflection voltage and current signals.

[0024] Specifically, the scanning deflection module and the power amplification and current sampling module each have two groups, corresponding to the main field and sub-field respectively; the scanning deflection module includes a main field deflection module 3 and a sub-field deflection module 7; the power amplification and current sampling module includes a main field power amplification and current sampling module 4 and a sub-field power amplification and current sampling module 8; the deflection coil includes a main field deflection coil 5 and a sub-field deflection coil 9; the pattern generator module 1 is connected to the main field deflection module 3 via a first FPGA bus communication module 2; the pattern generator module 1 is connected to the sub-field deflection module 7 via a second FPGA bus communication module 6; the interconnection relationship between the modules is as follows: After converting the image file to be exposed and the correction coefficients into X- and Y-axis coordinate data for the scanning deflection module, the pattern generator module 1 transmits the main-field scanning coordinate data to the first FPGA bus communication module 2 via a high-speed serial VPX bus, and transmits the sub-field scanning coordinate data to the second FPGA bus communication module 6 via a 16-bit LVDS parallel bus. The FPGA model used is XC7K325T. The FPGA parses and processes the received scanning coordinate data and converts it into a DAC input signal. This data is then transmitted to the main-field deflection module 3 via a high-speed SPI bus interface and to the sub-field deflection module 7 via an LVDS interface. The main-field deflection module 3 and the sub-field deflection module 7 convert the received scanning coordinate data into corresponding analog voltage signals and perform signal processing to output differential signals. Different analog voltages correspond to different coordinate positions. The differential signal output by the main-field deflection module 3 is then transmitted to the main-field power amplification and current sampling module 4. After linear amplification, it is converted into a high-precision linear current that drives the main-field deflection coil 5 to control the main-field scanning of the electron beam. The differential signal output by the subfield deflection module 7 is sent to the subfield power amplifier and current sampling module 8. After linear amplification, it is converted into a high-precision linear current that drives the subfield deflection coil 9 to control electron beam subfield scanning. The linear acquisition and correction module 10 linearly samples the deflection voltage output by the amplifier and feeds it back to each FPGA. Each FPGA corrects the DAC output to ensure highly linear deflection voltage output, ultimately providing high-precision linear current to each deflection coil.

[0025] like Figure 2 As shown, the main field deflection module 3 includes a voltage reference source circuit 21, a voltage buffer circuit 22, a first main field signal isolation circuit 23, a second main field signal isolation circuit 24, a main field DAC deflection circuit 25, a main field correction circuit 26 and a main field signal processing circuit 27; The voltage reference source circuit 21 includes an ultra-precision voltage reference source LTZ1000A, which has a temperature drift of less than 0.05PPM / °C and excellent long-term stability of 2μV / √kHr, making it very suitable for use as a reference voltage for high-precision DAC control circuits.

[0026] The voltage buffer circuit 22 converts the voltage output by the voltage reference source circuit 21 into a reference voltage required for DAC operation.

[0027] The first main field signal isolation circuit 23 and the second main field signal isolation circuit 24 are used to isolate the FPGA digital circuit and the DAC analog circuit to prevent the fluctuation of the digital signal from causing noise interference to the DAC analog output.

[0028] The main field DAC deflection circuit 25 includes a high-precision DAC with a resolution of 20 bits, model AD5791, and a data update rate greater than 1Msps. For a 1mm*1mm scanning field, the resolution can reach 1mm / 2^20=1nm, and the integral and differential nonlinearity is less than 1LSB, which is very suitable for high-precision and high-linearity output of the main field scanning signal.

[0029] The main field correction circuit 26 is used to correct the linear gain error, rotation error, distortion, deviation of the deflection coordinates and the measurement coordinates of the X and Y axes, including gain correction, rotation correction, offset correction, and motion correction. The correction DAC model LTC1597 of the main field correction circuit 26 is a 16-bit high-precision four-quadrant multiplying DAC with integral nonlinearity (INL) and differential nonlinearity (DNL) errors less than 1LSB, which can achieve high-precision correction.

[0030] The main field signal processing circuit 27 is used to sum and amplify the analog signals outputted by the main field DAC deflection circuit 25 and the main field correction circuit 26, and output an analog differential signal.

[0031] like Figure 3 As shown, the subfield deflection module 7 includes a voltage reference source circuit 31, a DAC programmable voltage adjustable circuit 32, a first subfield signal isolation circuit 33, a second subfield signal isolation circuit 34, a subfield DAC deflection circuit 35, a subfield correction circuit 36 ​​and a subfield signal processing circuit 37; The voltage reference source circuit 31 includes an ultra-low noise, high-precision, high-reference voltage source chip ADR4525, with a maximum initial error of ±0.02% and an output reference voltage of 2.5V.

[0032] The DAC programmable voltage adjustable circuit 32 includes a 12-bit SPI type DAC, model DAC8420, which is used to accurately control the voltage reference source to output a 0-2.5V voltage through the DAC.

[0033] The first sub-field signal isolation circuit 33 and the second sub-field signal isolation circuit 34 are used to isolate the FPGA digital circuit and the DAC analog circuit, so as to prevent the fluctuation of the digital signal from causing noise interference to the DAC analog output.

[0034] The sub-field DAC deflection circuit 35 includes a LVDS high-speed DAC with a resolution of 14 bits, model MAX5890, a maximum data update rate of 600Msps, an integral nonlinearity (INL) of ±1LSB, and a differential nonlinearity (DNL) of ±0.5LSB, which is very suitable for fast sub-field scanning and exposure of 100 MHz.

[0035] The sub-field correction circuit 36 ​​is used to correct the linear gain error, rotation error, and distortion of the X and Y axes, including gain correction, rotation correction, and offset correction. The correction DAC model AD9742 of the sub-field correction circuit 36 ​​is a 12-bit high-precision four-quadrant multiplication DAC with a maximum data update rate of 210Msps, which can achieve fast and high-precision correction.

[0036] The subfield signal processing circuit 37 is used to sum and amplify the analog signals output by the subfield DAC deflection circuit 35 and the subfield correction circuit 36, and output an analog differential signal.

[0037] like Figure 4 As shown, the main field power amplification and current sampling module 4 includes a main field differential buffer circuit 41 , a main field linear power amplification circuit 42 , a sampling resistor switching circuit 43 and a main field current sampling circuit 44 .

[0038] The main field differential buffer circuit 41 receives the differential analog voltage signal output from the main field deflection module 3, and then converts it into a single-ended analog voltage signal input to the main field linear power amplifier circuit 42. By converting the differential input to a single-ended input, the analog voltage fluctuation caused by the common mode voltage and ground plane interference can be greatly eliminated, the noise error can be reduced, and the input analog voltage accuracy and linearity of the main field linear power amplifier circuit 42 can be improved.

[0039] The main field linear power amplifier circuit 42 is mainly composed of an integrated power amplifier, which can output a maximum current of 4.5A, a slew rate of 200V / us, and a Class A / B level linearity output, which can meet the requirements of high linearity and large range deflection of the main field.

[0040] The sampling resistor switching circuit 43 controls the disconnection and connection of multiple sampling resistors through multiple signal relays to achieve the switching of sampling resistors of different gears. The sampling resistors are high-precision, high-stability, low-temperature drift, and high-power metal platinum resistors with a minimum temperature drift of 0.05PPM / °C, an initial accuracy of 0.01%, a load stability of 0.01%, and a maximum power of 10W.

[0041] The main field current sampling circuit 44 realizes high linear output from voltage to current. One end of the deflection coil is connected to the output end of the power amplifier, and the other end is connected to the main field current sampling circuit 44, and fed back to the input end of the power amplifier to realize precise current control.

[0042] The main field power amplifier and current sampling module 6 can meet a scanning field range of 1mm*1mm at accelerating voltages from 20kV to 100kV. Because the amplifier outputs full voltage, a small sampling resistor can be selected for high accelerating voltages, while a large sampling resistor can be selected for low accelerating voltages. Compared with traditional voltage switching methods, switching the sampling resistor ensures lower current noise and a higher signal-to-noise ratio.

[0043] like Figure 5 As shown, the sub-field power amplification and current sampling module 8 includes a sub-field differential buffer circuit 51 , a sub-field linear power amplification circuit 52 and a sub-field current sampling circuit 53 .

[0044] The sub-field differential buffer circuit 51 receives the differential analog voltage signal output from the sub-field deflection module 7, and then converts it into a single-ended analog voltage signal input to the sub-field linear power amplifier circuit 52. By converting the differential input to a single-ended input, the analog voltage fluctuations caused by the common-mode voltage and ground plane interference can be greatly eliminated, the noise error can be reduced, and the input analog voltage accuracy and linearity of the sub-field linear power amplifier circuit 52 can be improved.

[0045] The sub-field linear power amplifier circuit 52 is composed of a preamplifier + a power amplifier. The preamplifier is a high-speed amplifier with a maximum slew rate of 2500V / us. The power amplifier can output a current of 1A and a maximum slew rate greater than 2500V / us, which can achieve high-speed deflection of the electron beam and 100MHz exposure.

[0046] The sub-field current sampling circuit 53 achieves highly linear output from voltage to current. One end of the sub-field deflection coil is connected to the output of the power amplifier, and the other end is connected to the sub-field current sampling circuit 53. Feedback is then fed back to the input of the preamplifier, forming a deep negative feedback circuit for precise current control. The sampling resistor in the sub-field current sampling circuit 53 is a high-precision, high-stability, low-temperature drift, high-power metal platinum resistor with a minimum temperature drift of 0.05 PPM / °C, an initial accuracy of 0.01%, a load stability of 0.01%, and a maximum power of 10W.

[0047] The linearity acquisition and correction module 10 includes a data acquisition unit (e.g., a data acquisition instrument) and host computer software. The data acquisition unit linearly acquires the analog voltage output by each power amplifier and current sampling module and compares it with the ideal analog voltage data to form a searchable linearity correction table. The FPGA uses this linearity correction table to control the DAC to perform linearity correction, achieving highly linear analog signal output and ultimately achieving highly linear current drive for the deflection coil. The linearity correction table can be obtained through static or dynamic measurement.

[0048] Static measurement involves using the data acquisition instrument's high-precision acquisition capabilities to divide the analog voltage output into multiple steps, measured by LSB. The average voltage of each step over a period of time is measured and compared with the ideal voltage value to generate a linearity correction table. The data acquisition instrument has a sampling accuracy of 16 bits and a maximum sampling rate of 1 MSa / s. It communicates with the host computer software via Ethernet, USB, or GPIB.

[0049] Dynamic measurement involves measuring the real-time analog voltage curve using the high-speed data acquisition function of a high-speed data logger. This is then fitted with the ideal voltage curve to generate a linearity correction table. The data logger has a sampling accuracy of 16 bits and a maximum sampling rate of 125 MSa / s. It communicates with the host computer software via Ethernet and USB.

[0050] The high-speed and high-precision electron beam deflection controller of the present invention can drive the deflection coil to scan the electron beam with high precision, high linearity, high speed, and large range, achieving nanometer-level positioning accuracy, an exposure frequency of 100 MHz, an exposure size of less than 100 nm, and a scanning range of 1 mm*1 mm at an acceleration voltage of 20 kV to 100 kV. Through various correction measures, it compensates for the aberration, distortion, and deviation generated by the electron beam under high-speed deflection, further improving the accuracy and stability of the deflection system, which is of great significance to the small-batch manufacturing of third-generation semiconductor chips.

[0051] The above are merely preferred embodiments of the present invention. The scope of protection of the present invention is not limited to the above embodiments. All technical solutions based on the principles of the present invention are within the scope of protection of the present invention. It should be noted that for those skilled in the art, various improvements and modifications that do not depart from the principles of the present invention should be considered within the scope of protection of the present invention.

Claims

1. An electron beam deflection controller, characterized in that: It includes a pattern generator module (1), a scanning deflection module, a power amplification and current sampling module, and a linear acquisition and correction module; The pattern generator module (1) is used to convert the exposure pattern file and the correction parameters into a digital coordinate file and send it to the scanning deflection module; The scanning deflection module is used to receive the deflection coordinate data and correction coefficients sent by the pattern generator, convert them into input signals for the digital-to-analog converter, and then convert them into corresponding analog voltage signals through the digital-to-analog converter, and output analog differential signals through signal processing; The power amplification and current sampling module is used to perform linear power amplification on the analog differential signal output by the scanning deflection module and convert it into a linear current signal to act on the deflection coil. At the same time, the current sampling module provides current feedback to achieve precise closed-loop control of the current output. The linear acquisition and correction module is used to linearly acquire the analog voltage output by the power amplification and current sampling module, and control the digital-to-analog converter to perform linearity correction to achieve high linearity output of the deflection voltage and current signals.

2. The electron beam deflection controller according to claim 1, wherein: The scanning deflection module and the power amplification and current sampling module each have two groups, corresponding to the main field and the sub-field respectively; wherein the scanning deflection module includes a main field deflection module (3) and a sub-field deflection module (7); the power amplification and current sampling module includes a main field power amplification and current sampling module (4) and a sub-field power amplification and current sampling module (8); the deflection coil includes a main field deflection coil (5) and a sub-field deflection coil (9); wherein the pattern generator module (1) is connected to the main field deflection module (3) via a first FPGA bus communication module (2); and the pattern generator module (1) is connected to the sub-field deflection module (7) via a second FPGA bus communication module (6); After the pattern generator module (1) converts the pattern file to be exposed and the correction coefficient into X-axis and Y-axis coordinate data of the scanning deflection module, the main field scanning coordinate data is sent to the first FPGA bus communication module (2) via a high-speed serial VPX bus, and the sub-field scanning coordinate data is sent to the second FPGA bus communication module (6) via a 16-bit LVDS parallel bus; each FPGA bus communication module analyzes and processes the received scanning coordinate data and converts it into an input signal of a DAC, sends the data to the main field deflection module (3) via a high-speed SPI bus interface, and sends the data to the sub-field deflection module (7) via an LVDS interface; The main field deflection module (3) and the sub-field deflection module (7) convert the received scanning coordinate data into corresponding analog voltage signals, and perform signal processing to output differential signals, wherein different coordinate positions correspond to different analog voltages; the differential signal output by the main field deflection module (3) is sent to the main field power amplification and current sampling module (4), and after linear amplification, is converted into a high-precision linear current for driving the main field deflection coil (5), thereby controlling the main field scanning of the electron beam; the differential signal output by the sub-field deflection module (7) is sent to the sub-field power amplification and current sampling module (8), and after linear amplification, is converted into a high-precision linear current for driving the sub-field deflection coil (9), thereby controlling the sub-field scanning of the electron beam; The linear acquisition and correction module linearly acquires the deflection voltage output by the amplifier and feeds it back to each FPGA bus communication module. Each FPGA bus communication module corrects the DAC output to make the deflection voltage highly linear, and ultimately provides high-precision linear current to each deflection coil.

3. The electron beam deflection controller according to claim 2, wherein: The main field deflection module (3) comprises a voltage reference source circuit (21), a voltage buffer circuit (22), a main field DAC deflection circuit (25), a main field correction circuit (26) and a main field signal processing circuit (27); The voltage reference source circuit (21), the voltage buffer circuit (22) and the main field DAC deflection circuit (25) are connected in sequence; the voltage buffer circuit (22) is used to convert the voltage output by the voltage reference source circuit (21) into a reference voltage required for the main field DAC deflection circuit (25) to work; The main field signal processing circuit (27) is connected to the main field DAC deflection circuit (25) and the main field correction circuit (26) respectively, and is used to sum and amplify the analog signals output by the main field DAC deflection circuit (25) and the main field correction circuit (26), and output an analog differential signal.

4. The electron beam deflection controller according to claim 3, wherein: The main field deflection module (3) further comprises a first main field signal isolation circuit (23) and a second main field signal isolation circuit (24); the first main field signal isolation circuit (23) is located between the first FPGA bus communication module (2) and the main field DAC deflection circuit (25), and is used to achieve isolation between the first FPGA bus communication module (2) and the main field DAC deflection circuit (25); the second main field signal isolation circuit (24) is located between the first FPGA bus communication module (2) and the main field correction circuit (26), and is used to achieve isolation between the first FPGA bus communication module (2) and the main field correction circuit (26).

5. The electron beam deflection controller according to claim 2, 3 or 4, characterized in that: The subfield deflection module (7) comprises a voltage reference source circuit (31), a DAC programmable voltage adjustable circuit (32), a subfield DAC deflection circuit (35), a subfield correction circuit (36) and a subfield signal processing circuit (37); The voltage reference source circuit (31), the DAC programmable voltage adjustable circuit (32) and the sub-field DAC deflection circuit (35) are connected in sequence, and the DAC programmable voltage adjustable circuit (32) is used to precisely control the voltage reference source circuit (31) to output the voltage required by the sub-field DAC deflection circuit (35) through the DAC; The subfield signal processing circuit (37) is connected to the subfield DAC deflection circuit (35) and the subfield correction circuit (36) respectively, and is used to sum and amplify the analog signals output by the subfield DAC deflection circuit (35) and the subfield correction circuit (36), and output an analog differential signal.

6. The electron beam deflection controller according to claim 5, characterized in that: The subfield deflection module (7) further comprises a first subfield signal isolation circuit (33) and a second subfield signal isolation circuit (34); the first subfield signal isolation circuit (33) is located between the second FPGA bus communication module (6) and the subfield DAC deflection circuit (35), and is used to achieve isolation between the second FPGA bus communication module (6) and the subfield DAC deflection circuit (35); the second subfield signal isolation circuit (34) is located between the second FPGA bus communication module (6) and the subfield correction circuit (36), and is used to achieve isolation between the second FPGA bus communication module (6) and the subfield correction circuit (36).

7. The electron beam deflection controller according to claim 2, 3 or 4, characterized in that: The main field power amplification and current sampling module (4) comprises a main field differential buffer circuit (41), a main field linear power amplification circuit (42), a sampling resistor switching circuit (43) and a main field current sampling circuit (44); The main field differential buffer circuit (41) receives the differential analog voltage signal output from the main field deflection module (3), and then converts it into a single-ended analog voltage signal input by the main field linear power amplifier circuit (42); The sampling resistor switching circuit (43) controls the disconnection and connection of multiple sampling resistors through multiple signal relays to achieve the switching of sampling resistors of different gears; The main field current sampling circuit (44) realizes high linear output from voltage to current. One end of the main field deflection coil (5) is connected to the output end of the main field linear power amplifier circuit (42), and the other end is connected to the main field current sampling circuit (44). The main field current sampling circuit (44) feeds back to the input end of the main field linear power amplifier circuit (42) to realize accurate current control.

8. The electron beam deflection controller according to claim 2, 3 or 4, characterized in that: The sub-field power amplification and current sampling module (8) comprises a sub-field differential buffer circuit (51), a sub-field linear power amplification circuit (52) and a sub-field current sampling circuit (53); The sub-field differential buffer circuit (51) receives the differential analog voltage signal output from the sub-field deflection module (7), and then converts it into a single-ended analog voltage signal input by the sub-field linear power amplifier circuit (52); The sub-field linear power amplifier circuit (52) is composed of a preamplifier + a power amplifier; The sub-field current sampling circuit (53) realizes high linear output from voltage to current. One end of the sub-field deflection coil (9) is connected to the output end of the sub-field linear power amplifier circuit (52), and the other end is connected to the sub-field current sampling circuit (53). The current is fed back to the input end of the preamplifier through the sub-field current sampling circuit (53), forming a deep negative feedback circuit to realize accurate current control.

9. The electron beam deflection controller according to claim 2, 3 or 4, characterized in that: The linear acquisition and correction module includes a multi-channel data acquisition instrument and host computer software. The data acquisition instrument linearly acquires the analog voltage output by each power amplifier and current sampling module, and compares it with the ideal analog voltage data to form a checkable linearity correction table; Each FPGA bus communication module calls the linearity correction table to control the DAC to perform linearity correction, achieving high linearity output of the analog signal, and ultimately achieving high linear current drive for the deflection coil.

10. The electron beam deflection controller according to claim 9, characterized in that: The linearity correction table is obtained through static measurement or dynamic measurement; Static measurement refers to using the high-precision acquisition function of the data acquisition instrument to divide the output analog voltage into multiple steps according to LSB, measure the voltage average of each step over a period of time, compare it with the ideal voltage value, and generate a linearity correction table; Dynamic measurement refers to measuring the real-time output analog voltage curve through the high-speed acquisition function of the data acquisition instrument, fitting it with the ideal voltage curve, and generating a linearity correction table.

Images