Simulation circuit driving state determination method, device and equipment and readable storage medium

Abstract

The invention discloses a simulation circuit driving state determination method, device and equipment and a readable storage medium, belongs to the field of chip verification, and aims to solve the problem that a hardware description language comprises various driving intensities with different priorities, and after a mapping relation between the driving intensities and driving sources is preset, the driving intensities are determined to be different from the driving intensities. Therefore, the method is applied to the hardware description language model, the driving source of the simulation circuit can be enabled firstly, and then the driving state of the simulation circuit is output under the action of the hardware description language model according to the driving source. In other words, the driving capability of the corresponding driving source can be described through the driving strength in the hardware description language, so that the driving state of the simulation circuit is finally determined, analog simulation of the simulation circuit is avoided, the correct driving behavior of the simulation circuit can be simulated in the digital simulation stage, and the working efficiency is improved.

Description

Technical Field

[0001] The present invention relates to the field of chip verification, and in particular to a method, device, equipment and readable storage medium for determining a driving state of a simulation circuit. Background Art

[0002] When performing functional verification on the simulation circuit of a data transmission chip, in order to determine the voltage level and driving capability in scenarios where multiple driving sources exist simultaneously, a mixed digital-analog simulation is usually performed using digital circuits plus analog schematics to observe the voltage level and driving capability in various simulation scenarios. However, the simulation work of the schematics constructed using analog circuits is relatively cumbersome, and both the initial simulation and subsequent modification and iteration of the simulation circuits are time-consuming.

[0003] Therefore, how to provide a solution to the above technical problems is a problem that those skilled in the art need to solve at present. Summary of the Invention

[0004] The purpose of the present invention is to provide a method, device, equipment and readable storage medium for determining the driving state of a simulation circuit. The present invention first enables the driving source of the simulation circuit, and then outputs the driving state of the simulation circuit according to the driving source and under the action of a hardware description language model. That is, the driving capability of the corresponding driving source can be described by the driving strength in the hardware description language, thereby finally determining the driving state of the simulation circuit, avoiding the simulation of the schematic diagram of the analog circuit, so that the correct driving behavior of the analog circuit can be simulated in the digital simulation stage, thereby improving work efficiency.

[0005] To solve the above technical problems, the present invention provides a method for determining a driving state of a simulation circuit, which is applied to a hardware description language model. The method comprises:

[0006] enabling a driving source of the simulation circuit;

[0007] The driving state of the simulation circuit is output according to the driving source and under the action of the model; wherein a mapping relationship exists between the driving strength supported by the model and the driving source.

[0008] On the other hand, outputting the driving state of the simulation circuit according to the driving source and under the action of the model includes:

[0009] Determining the corresponding driving strength according to the driving source and the mapping relationship;

[0010] The driving capability of the driving source with the strongest driving strength is defined as the driving state.

[0011] On the other hand, the mapping relationship is a one-to-one mapping relationship.

[0012] On the other hand, the driving source includes current source driving, voltage source driving, resistor pull-up driving and resistor pull-down driving.

[0013] On the other hand, the resistance pull-down driver includes a first resistance pull-down driver and a second resistance pull-down driver;

[0014] The resistance value of the first resistor pull-down driving is a first resistance value, the resistance value of the second resistor pull-down driving is a second resistance value, and the resistance value of the resistor pull-up driving is a third resistance value, and the third resistance value is greater than the first resistance value and less than the second resistance value.

[0015] On the other hand, the driving strength includes a first driving strength, a second driving strength, a third driving strength, a fourth driving strength, and a fifth driving strength. A mapping relationship exists between the driving strengths supported by the model and the driving sources, including:

[0016] The first driving strength is mapped to the current source driving;

[0017] The second driving strength is mapped to the voltage source driving;

[0018] The third driving strength is mapped to the current source driving, the voltage source driving and the first resistance pull-down driving;

[0019] The fourth driving strength is mapped to the resistive pull-up driving;

[0020] The fifth driving strength is mapped to the second resistive pull-down driving.

[0021] On the other hand, the driving strengths are arranged from high to low as follows: first driving strength, second driving strength, third driving strength, fourth driving strength, and fifth driving strength.

[0022] To solve the above technical problems, the present invention further provides a device for determining a driving state of a simulation circuit, comprising:

[0023] An enabling module, configured to enable a driving source of the simulation circuit;

[0024] A verification module outputs a driving state of the simulation circuit according to the driving source and under the action of the model; wherein a mapping relationship exists between the driving strength supported by the model and the driving source.

[0025] To solve the above technical problems, the present invention further provides a device for determining a driving state of a simulation circuit, comprising:

[0026] memory for storing computer programs;

[0027] The processor is configured to implement the steps of the above-mentioned method for determining the driving state of the simulation circuit when executing the computer program.

[0028] To solve the above technical problems, the present invention further provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the steps of the above-mentioned method for determining the driving state of the simulation circuit are implemented.

[0029] Beneficial effect: The present invention provides a method for determining the driving state of a simulation circuit. Taking into account that the hardware description language includes multiple driving strengths of different priorities, after pre-setting the mapping relationship between the driving strength and the driving source, the driving strength can be used to represent the driving capability of the corresponding driving source, and then the final driving state of the simulation circuit can be determined by the driving strength of the enabled driving source. Therefore, the method in the present invention is applied to the hardware description language model. The present invention can first enable the driving source of the simulation circuit, and then output the driving state of the simulation circuit according to the driving source and under the action of the hardware description language model, that is, the driving capability of the corresponding driving source can be described by the driving strength in the hardware description language, so as to finally determine the driving state of the simulation circuit, avoid analog simulation of the analog circuit, and make it possible to simulate the correct driving behavior of the analog circuit in the digital simulation stage, thereby improving work efficiency.

[0030] The present invention also provides a simulation circuit driving state determination device, equipment and readable storage medium, which have the same beneficial effects as the above simulation circuit driving state determination method. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the relevant technologies and the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0032] Figure 1 A schematic flow chart of a method for determining a driving state of a simulation circuit provided by the present invention;

[0033] Figure 2 A schematic structural diagram of a simulation circuit provided by the present invention;

[0034] Figure 3 A schematic structural diagram of a device for determining a driving state of a simulation circuit provided by the present invention;

[0035] Figure 4 This is a structural diagram of a simulation circuit driving state determination device provided by the present invention. DETAILED DESCRIPTION

[0036] The core of the present invention is to provide a method, device, equipment and readable storage medium for determining the driving state of a simulation circuit. The present invention first enables the driving source of the simulation circuit, and then outputs the driving state of the simulation circuit according to the driving source and under the action of the model. That is, the corresponding driving source can be described by the driving strength in the hardware description language, so as to finally determine the driving state of the simulation circuit, avoid simulating the analog circuit, and improve work efficiency.

[0037] To make the objectives, technical solutions, and advantages of the embodiments of the present invention more clear, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts shall fall within the scope of protection of the present invention.

[0038] Please refer to Figure 1 , Figure 1 This is a flow chart of a method for determining a driving state of a simulation circuit provided by the present invention. The driving state determination method is applied to a hardware description language model and includes:

[0039] S101: enabling the driving source of the simulation circuit;

[0040] Specifically, considering the technical issues in the above background technology and the fact that the hardware description language includes drive strengths that represent a variety of different drive capabilities, after pre-establishing a mapping relationship between drive strength and drive source in the hardware description language model, the drive strength can be used to represent the drive capability of the corresponding drive source, and the final drive state can be determined by the drive strength corresponding to the enabled drive source. Therefore, in the embodiment of the present invention, after enabling the drive source in the simulation circuit, the hardware description language model is used to output the drive state of the simulation circuit based on the "enabled drive source". That is, under the action of the hardware description language model, the drive state of the simulation circuit can be output based on the enabled drive source. There is no need to simulate the schematic diagram constructed to represent the analog circuit of the chip to be verified (e.g., a data transmission chip). Instead, the behavior of the analog circuit is directly represented using the hardware description language model, and then the model is directly digitally simulated. As a result, the correct drive state of the "analog circuit of the chip to be verified" can be simulated during the digital simulation stage. This allows for rapid modification and iteration using the model, greatly reducing reliance on mixed-analog and digital simulation. In actual engineering projects, this significantly reduces the time investment in chip verification and improves the quality of subsequent tape-out.

[0041] Specifically, based on the above considerations, in this step, the driving source of the simulation circuit can be enabled first. The simulation circuit is a simulation circuit described by the hardware description language in the hardware description language model. The simulation circuit can correctly characterize the behavior of the corresponding analog circuit. The hardware description language model enables the "driving source of the simulation circuit" to facilitate the subsequent determination of the driving state of the simulation circuit according to the enable signal of the driving source.

[0042] In addition to the data transmission chip, the chip to be verified may also be of other types, which is not limited in the embodiment of the present invention.

[0043] S102: Outputting a driving state of the simulation circuit according to the driving source and under the action of the model; wherein a mapping relationship exists between the driving strength supported by the model and the driving source.

[0044] Specifically, a mapping relationship between drive strength and drive source is established in advance in the hardware description language model. After the drive source is enabled, the drive strength corresponding to the drive capability of the drive source can be determined based on the enabled drive source and the mapping relationship between the drive strength supported by the model and the drive source under the action of the hardware description language model. Then, based on the relationship between the drive strengths of the drive sources, the drive state of the simulation circuit is output. The present invention establishes a model that characterizes the driving behavior of the analog circuit through the drive strength supported by the hardware description language, which can simulate the direct relationship of the drive capability of the real analog circuit to a certain extent, so that the circuit characteristics with different drive capabilities can be verified in the digital simulation stage, reducing the pressure of the mixed simulation stage in the chip simulation verification process.

[0045] The present invention provides a method for determining the driving state of a simulation circuit. Considering that the hardware description language includes driving strengths that characterize driving capabilities of various sizes, after pre-setting the mapping relationship between the driving strength and the driving source, the driving strength can be used to represent the driving capability of the corresponding driving source, and then the final driving state can be known through the driving strength corresponding to the enabled driving source. Therefore, in the present invention, the driving source of the simulation circuit can be first (selectively) enabled, and then the driving state of the simulation circuit can be output according to the driving source and under the action of the model. That is, the corresponding driving source can be described by the driving strength in the hardware description language, so as to finally determine the driving state of the simulation circuit, avoid analog simulation of the analog circuit, and make it possible to simulate the correct driving behavior of the analog circuit and output the final driving state of the simulation circuit in the digital simulation stage, thereby improving work efficiency.

[0046] Based on the above embodiment:

[0047] As an optional embodiment, outputting the driving state of the simulation circuit according to the driving source and under the action of the model includes:

[0048] Determine the corresponding driving strength according to the driving source and mapping relationship;

[0049] The driving capability of the driving source with the strongest driving strength is regarded as the driving state.

[0050] Specifically, since the hardware description language model pre-sets the mapping relationship between the driving strengths and driving sources supported by the model, "outputting the driving state of the simulation circuit according to the driving source and under the action of the model" includes: first, determining the corresponding driving strength according to the driving source and the mapping relationship. Since the driving strength has a priority, and the priority of the driving strength represents the driving capability of the corresponding driving source, the driving source with the strongest driving strength (that is, the highest priority) also represents the driving source with the strongest driving capability. The driving capability of the driving source with the strongest driving strength can be used as the driving state.

[0051] Among them, if the three driving sources ABC are currently enabled, the driving capability relationship of the three driving sources is A>B>C, the driving strengths corresponding to the three driving sources ABC are a, b and c respectively, and the strength relationship between the three driving strengths a, b and c is a>b>c, then the model can finally use the driving capability of the driving source A corresponding to the driving strength a as the driving state of the simulation circuit.

[0052] As an optional embodiment, the mapping relationship is a one-to-one mapping relationship.

[0053] Specifically, in order to accurately determine the driving state of the simulation circuit by "taking the driving capability of the driving source with the strongest driving strength as the driving state", the mapping relationship in the embodiment of the present invention is a one-to-one mapping relationship, that is, there is a one-to-one mapping relationship between the driving strengths supported by the model and the driving sources, and a single driving strength corresponds to a unique driving source.

[0054] Of course, in addition to this specific form, the mapping relationship can also be a one-to-many mapping relationship, that is, one driving strength corresponds to the driving capabilities of multiple driving sources in different scenarios, which is not limited in the embodiment of the present invention.

[0055] As an optional embodiment, the driving source includes current source driving, voltage source driving, resistor pull-up driving and resistor pull-down driving.

[0056] Specifically, considering that current source drive, voltage source drive, resistive pull-up drive, and resistive pull-down drive can comprehensively represent the types of drive sources in a data transmission chip, the drive sources in the embodiment of the present invention include current source drive, voltage source drive, resistive pull-up drive, and resistive pull-down drive. Among them, this type of drive source combination is used in various chips. For example, the circuit of a USB 2 (Universal Serial Bus 2.0, 2.0 version universal serial bus) chip includes this drive source combination. That is, the embodiment of the present invention can be verified for the simulation circuit in the USB 2 data transmission chip. In addition, the signal output lines in the simulation circuit of the second version universal serial bus chip can be differential signal output lines.

[0057] Of course, in addition to this specific driving source combination, the specific form of the driving source can also be other types, which is not limited in the embodiment of the present invention.

[0058] As an optional embodiment, the resistance pull-down driver includes a first resistance pull-down driver and a second resistance pull-down driver;

[0059] The resistance value in the first resistor pull-down driving is a first resistance value, the resistance value in the second resistor pull-down driving is a second resistance value, and the resistance value in the resistor pull-up driving is a third resistance value, which is greater than the first resistance value and less than the second resistance value.

[0060] Specifically, considering that the pull-down resistor with the first resistance value (e.g., 45 ohms) is quickly pulled down to a low level in specific circumstances (such as during AssertSE0), it provides a strong pull-down drive capability, ensuring the stability and accuracy of low-level transmission in signal transmission (in USB 2 communication, when the device needs to send a specific low-level signal). The drive state provided by the 45 ohm pull-down resistor can ensure that the signal reaches a low-level state quickly and stably, avoiding signal distortion or transmission errors. When the pull-up resistor with the third resistance value (e.g., 1.5K ohms) is pulled up to a high level, its resistance value determines the speed and strength of the pull-up. In high-speed mode and low-speed / full-speed mode, it cooperates with other drive sources to provide a stable high-level drive state for the signal. Although the pull-down resistor with the second resistance value (for example, 15K ohms) has a weaker driving capability, it also plays a role in assisting in stabilizing the level in the circuit. When the signal is idle or in a specific state, it helps maintain the level of the driving state within an appropriate range. In addition, these three types of resistors together with current source drive, voltage drive, etc. constitute different driving capability levels. Therefore, the resistor pull-down drive in the embodiment of the present invention includes a first resistor pull-down drive and a second resistor pull-down drive. The resistance value of the first resistor pull-down drive is a first resistance value, the resistance value of the second resistor pull-down drive is a second resistance value, and the resistance value of the resistor pull-up drive is a third resistance value. The third resistance value is greater than the first resistance value and less than the second resistance value.

[0061] In USB 2.0, 45-ohm pull-down resistors have stronger drive capability, ranking higher in the drive capability hierarchy; 1.5-ohm pull-up resistors have lower drive capability; and 15-ohm pull-down resistors have weaker drive capability. This hierarchical design enables the circuit to accurately control the output voltage and drive state of the simulation circuit's signal output lines based on the priority of the driver's drive capability and actual conditions, in different operating modes and signal transmission requirements. This meets the complex electrical requirements of the USB 2.0 protocol and ensures stable and reliable circuit operation under various conditions. The signal output lines can also be differential signal output lines.

[0062] Of course, in addition to this specific form, the resistive pull-down driving and the resistive pull-up driving may also be other specific forms, which are not limited in the embodiment of the present invention.

[0063] As an optional embodiment, the driving strength includes a first driving strength, a second driving strength, a third driving strength, a fourth driving strength, and a fifth driving strength. A mapping relationship exists between the driving strengths supported by the model and the driving sources, including:

[0064] A first driving strength and current source driving mapping;

[0065] Second driving strength and voltage source driving mapping;

[0066] The third driving strength is mapped to the current source driving, the voltage source driving and the first resistor pull-down driving;

[0067] Fourth drive strength and resistive pull-up drive mapping;

[0068] The fifth driving strength is mapped to the second resistive pull-down driving.

[0069] Specifically, the first driving strength is mapped to the driving capability when the current source driving output is a first level, the second driving strength is mapped to the driving capability when the voltage source driving output is a first level, the third driving strength is mapped to the driving capability when the current source driving and the voltage source driving output are a second level, the third driving strength is also mapped to the driving capability when the first resistive pull-down driver is pulled down to the second level, the fourth driving strength is mapped to the driving capability when the resistive pull-up driver is pulled up to the first level, and the fifth driving strength is mapped to the driving capability when the second resistive pull-down driver is pulled down to the second level.

[0070] Furthermore, the first driving strength is mapped to the driving capability when the current source drive output is in the first level state when the enable signal of the current source drive is in the enabled state; the second driving strength is mapped to the driving capability when the voltage source drive output is in the first level state when the enable signal of the voltage source drive is in the enabled state; the third driving strength is mapped to the driving capability when the first resistive pull-down drive is pulled down to the second level and the current source drive and voltage source drive outputs are the second level when the enable signals of the current source drive, the voltage source drive, and the first resistive pull-down drive are in the enabled state; the fourth driving strength is mapped to the driving capability when the resistive pull-up drive is pulled up to the first level when the enable signal of the resistive pull-up drive is in the enabled state; and the fifth driving strength is mapped to the driving capability when the second resistive pull-down drive is pulled down to the second level when the enable signal of the second resistive pull-down drive is in the enabled state. The above mapping relationships can accurately express the hierarchical relationship between the driving capabilities of each driving source using fewer driving strengths.

[0071] Of course, in addition to this specific form, the mapping relationship between the driving strength of the model and the driving source can also be in other specific forms, which is not limited in the embodiment of the present invention.

[0072] As an optional embodiment, the driving strengths are arranged from high to low as follows: first driving strength, second driving strength, third driving strength, fourth driving strength, and fifth driving strength.

[0073] Specifically, in order to correctly divide the driving capabilities of the driving sources and accurately reflect the output driving state of the simulation circuit through the corresponding driving strength, the embodiment of the present invention stipulates that the driving strength is sorted from high to low as follows: first driving strength, second driving strength, third driving strength, fourth driving strength, and fifth driving strength.

[0074] Specifically, in USB 2.0, considering that the driving capabilities of the five driving sources described above may be ranked as follows: current source driving > voltage source driving > resistor pull-down with a first resistance value > resistor pull-up with a third resistance value > resistor pull-down with a second resistance value, the first level in the embodiment of the present invention may be a high level and the second level may be a low level. Accordingly, the driving capability of the current source driving when outputting a high level is assigned a first driving strength, and the driving capability of the current source driving when outputting a low level is assigned a third driving strength; the driving capability of the voltage source driving when outputting a high level is assigned a second driving strength, and the driving capability of the voltage source driving when outputting a low level is assigned a third driving strength; the first resistor pull-down is assigned a third driving strength; the resistor pull-up is assigned a fourth driving strength; and the second resistor pull-down is assigned a fifth driving strength. The driving strengths are ranked from highest to lowest according to the driving strength priority as follows: first driving strength, second driving strength, third driving strength, fourth driving strength, and fifth driving strength. Thus, the driving strength logic can reflect the driving capability logic among the five driving sources.

[0075] In addition, as an optional embodiment, the driving strength further includes a sixth driving strength;

[0076] The sixth driving strength represents the driving capability when each driving source is turned off.

[0077] Specifically, when the driving source is turned off, it is equivalent to a high-impedance state in the circuit, and the driving capability at this time is characterized by the sixth driving strength. Considering that in an actual circuit, when the enable signal state of the driving source is disabled, it indicates that the driving source has no driving effect. In addition, considering that the driving state is in a "floating" state with no connection and no drive, the state will be unstable and easily affected by external factors such as electromagnetic interference. In particular, in a signal transmission chip, it is easy to cause noise and fluctuation in the signal, and it is impossible to meet the requirements of the data transmission protocol for signal stability and accuracy. Therefore, in this step, for any driving source, when the enable signal state of the driving source is disabled, the sixth driving strength (driving strength corresponding to the high-impedance state) can be driven to the data transmission line of the simulation circuit, indicating that the driving source is not driving.

[0078] In addition, as an optional embodiment, for any driving source, the driving state of the driving source is determined according to the driving strength of each driving source.

[0079] Specifically, since the final driving state is determined based on the driving capability of the driving source with the strongest driving strength, and considering that in some cases there is a need to determine the driving state of a specific single driving source, the driving source with a driving strength weaker than the strongest driving strength cannot be determined based solely on the final driving state of the simulation circuit. It is necessary to determine the driving state of each driving source by verifying the driving strength of the single driving source. Therefore, in the embodiment of the present invention, the driving state of any driving source can be determined based on the driving strength of each driving source, thereby meeting the verification requirement for the driving state of a single driving source.

[0080] In addition, as an optional embodiment, the specified hardware description language includes Verilog hardware description language.

[0081] Specifically, Verilog has a variety of different drive strengths, simple and easy-to-understand syntax, high design efficiency (supports multiple levels of abstraction and strong reusability), and high compatibility.

[0082] Verilog supports 10 types of drive strength: supply0, supply1, strong0, strong1, pull0, pull1, weak0, weak1, highz0, and highz1. Supply0: A strong low-level power driver. This represents an ideal low-level power driver, providing very strong drive capability and forcing a signal to a low state. It is often used to simulate a power ground. Supply1: A strong high-level power driver. This represents an ideal high-level power driver, providing strong drive capability and forcing a signal to a high state. It is often used to simulate a positive power supply. Strong0: A strong low-level driver. This driver has a strong ability to drive a signal to a low state, but is less ideal than supply0 and may be affected by external factors. Strong1: A strong high-level driver. This driver has a strong ability to drive a signal to a high state, but is less ideal than supply1 and may also be affected by external factors. Pull0: A weak low-level pull-up driver. This driver has a weaker drive capability and is mainly used to pull a signal to a low state. Typically, when multiple drive sources are present, the effects of a stronger drive source will be overridden. pull1: A weak high-level pull-up driver with a weak driving capability, used to pull the signal to a high level. When multiple drive sources are present, its effects can be overridden by a stronger drive source. weak0: A very weak low-level driver with very weak driving capability, having little impact on the signal, and only has some effect on the signal when no other stronger drive source is present. weak1: A very weak high-level driver with very weak driving capability, having little impact on the signal, and only has some effect on the signal when no other stronger drive source is present.

[0083] Of course, in addition to Verilog, the hardware description language may also be specified as other types, such as VHDL: Very-High-Speed ​​Integrated Circuit Hardware Description Language, etc., which is not limited in the embodiment of the present invention.

[0084] In addition, as an optional embodiment, the first driving strength is a strong high-level power supply drive supply1, the second driving strength is a strong high-level drive strong1, the third driving strength is a strong low-level drive strong0, the fourth driving strength is a weak high-level pull-up drive pull1, the fifth driving strength is an extremely weak low-level drive weak0, and the sixth driving strength is a high-impedance state.

[0085] Specifically, the above driving strength distribution scheme can stably and accurately reflect the size relationship between the driving capabilities of the driving sources through the size relationship between the driving strengths, so that the final driving state can be accurately reflected by the driving capability of the driving source with the strongest driving strength on the signal output line of the simulation circuit.

[0086] Of course, in addition to the above driving strength allocation scheme, the driving strength allocation scheme may also be of other types, which are not limited in the embodiment of the present invention.

[0087] Specifically, to better illustrate the embodiments of the present invention, please refer to Figure 2 , Figure 2 A schematic diagram of the structure of a simulation circuit provided by the present invention, Figure 2 The simulation circuit shown is a simulation circuit of the USB 2 chip simulation circuit, in which the driving sources are, in descending order of driving capability, as follows: a high-speed current source driver, which is a current source driver capable of driving a current of 17.8mA; a low-speed / full-speed driver, which is a voltage source driver capable of driving a voltage of 3.3V; a driver with a 45-ohm resistor Rs directly connected to ground (when the low-speed / full-speed driver initiates a single-ended zero reset, the driving voltage is zero, equivalent to the 45-ohm resistor Rs being grounded); a driver with a 1.5k-ohm resistor Rpu pulled up to 3.3V; a driver with a 15k-ohm resistor Rpd pulled down to ground; and finally, a driver with no pull-up or pull-down resistor and no driving source driving the differential signal output line. When the differential signal output line is floating, it is considered to be the weakest driver, i.e., in a high-impedance state.

[0088] Among them, the enable signal driven by the current source can be Figure 2 The high-speed current source enable and high-speed drive enable in the voltage source drive can be Figure 2 Low / full speed driver output enable in .

[0089] Of course, except Figure 2 In addition to the analog circuit of the USB 2 chip shown, the simulation circuit may also be other various digital circuits that represent the analog circuit of the chip to be verified, which is not limited in the embodiment of the present invention.

[0090] Please refer to Figure 3 , Figure 3 This is a schematic structural diagram of a device for determining a driving state of a simulation circuit provided by the present invention, wherein the device comprises:

[0091] An enabling module 31, used to enable a driving source of the simulation circuit;

[0092] The verification module 32 outputs the driving state of the simulation circuit according to the driving source and under the action of the model; wherein there is a mapping relationship between the driving strength supported by the model and the driving source.

[0093] For an introduction to the device for determining the driving state of a simulation circuit provided by an embodiment of the present invention, please refer to the aforementioned embodiment of the method for determining the driving state of a simulation circuit, and the embodiment of the present invention will not be described in detail here.

[0094] Please refer to Figure 4 , Figure 4 This is a structural diagram of a simulation circuit driving state determination device provided by the present invention, the driving state determination device comprising:

[0095] Memory 41, for storing computer programs;

[0096] The processor 42 is configured to implement the steps of the method for determining the driving state of the simulation circuit in the aforementioned embodiment when executing the computer program.

[0097] For an introduction to the device for determining the driving state of a simulation circuit provided by an embodiment of the present invention, please refer to the aforementioned embodiment of the method for determining the driving state of a simulation circuit, and the embodiment of the present invention will not be described in detail here.

[0098] To solve the above technical problems, the present invention further provides a computer-readable storage medium having a computer program stored thereon. When the computer program is executed by a processor, the steps of the method for determining the driving state of the simulation circuit in the above embodiment are implemented.

[0099] For an introduction to the computer-readable storage medium provided by an embodiment of the present invention, please refer to the aforementioned embodiment of the driving state determination method, and the embodiment of the present invention will not be described in detail here.

[0100] In this specification, the various embodiments are described in a progressive manner, with each embodiment focusing on the differences from the other embodiments. Similar or identical parts between the various embodiments may be referred to in conjunction with each other. For the devices disclosed in the embodiments, since they correspond to the methods disclosed in the embodiments, the description is relatively simple, and for relevant parts, reference may be made to the method description. It should also be noted that, in this specification, relational terms such as first and second, etc., are used solely to distinguish one entity or operation from another, and do not necessarily require or imply any actual relationship or order between these entities or operations. Furthermore, the terms "comprise," "include," or any other variations thereof are intended to encompass non-exclusive inclusion, such that a process, method, article, or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or device. In the absence of further limitations, an element defined by the phrase "comprises a..." does not exclude the presence of other identical elements in the process, method, article, or device comprising that element.

[0101] The above description of the disclosed embodiments is intended to enable one skilled in the art to implement or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention is not limited to the embodiments shown herein but is intended to conform to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A method for determining a driving state of a simulation circuit, characterized in that: Applied to a hardware description language model, the method includes: enabling a driving source of the simulation circuit; The driving state of the simulation circuit is output according to the driving source and under the action of the model; wherein a mapping relationship exists between the driving strength supported by the model and the driving source.

2. The method for determining the driving state of a simulation circuit according to claim 1, wherein: Outputting a driving state of the simulation circuit according to the driving source and under the action of the model includes: Determining the corresponding driving strength according to the driving source and the mapping relationship; The driving capability of the driving source with the strongest driving strength is defined as the driving state.

3. The method for determining the driving state of a simulation circuit according to claim 1, wherein: The mapping relationship is a one-to-one mapping relationship.

4. The method for determining the driving state of a simulation circuit according to claim 1, wherein: The driving source includes current source driving, voltage source driving, resistor pull-up driving and resistor pull-down driving.

5. The method for determining the driving state of a simulation circuit according to claim 4, wherein: The resistor pull-down driver includes a first resistor pull-down driver and a second resistor pull-down driver; The resistance value of the first resistor pull-down driving is a first resistance value, the resistance value of the second resistor pull-down driving is a second resistance value, and the resistance value of the resistor pull-up driving is a third resistance value, and the third resistance value is greater than the first resistance value and less than the second resistance value.

6. The method for determining the driving state of a simulation circuit according to claim 5, wherein: The driving strength includes a first driving strength, a second driving strength, a third driving strength, a fourth driving strength, and a fifth driving strength. A mapping relationship exists between the driving strengths supported by the model and the driving sources, including: The first driving strength is mapped to the current source driving; The second driving strength is mapped to the voltage source driving; The third driving strength is mapped to the current source driving, the voltage source driving and the first resistance pull-down driving; The fourth driving strength is mapped to the resistive pull-up driving; The fifth driving strength is mapped to the second resistive pull-down driving.

7. The method for determining the driving state of a simulation circuit according to claim 6, wherein: The driving strengths are arranged from high to low as follows: first driving strength, second driving strength, third driving strength, fourth driving strength, and fifth driving strength.

8. A device for determining a driving state of a simulation circuit, characterized in that: include: An enabling module, configured to enable a driving source of the simulation circuit; A verification module outputs a driving state of the simulation circuit according to the driving source and under the action of the model; wherein a mapping relationship exists between the driving strength supported by the model and the driving source.

9. A device for determining a driving state of a simulation circuit, characterized in that: include: memory for storing computer programs; A processor is configured to implement the steps of the method for determining the driving state of a simulation circuit according to any one of claims 1 to 7 when executing the computer program.

10. A computer-readable storage medium, characterized in that The computer-readable storage medium stores a computer program, which, when executed by a processor, implements the steps of the method for determining the driving state of a simulation circuit according to any one of claims 1 to 7.

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