Chip packaging method and chip packaging structure

Abstract

The invention provides a chip packaging method and a chip packaging structure. The method comprises the following steps: providing a first slide; arranging a local bridge chip on the first slide glass, arranging conductive terminals around and above the local bridge chip, and carrying out plastic package on the local bridge chip to obtain a plastic package body; carrying out overall thinning and grinding on the front surface of the plastic package body to expose the conductive terminals; a first rewiring layer and a second rewiring layer are formed on the back face and the front face of the plastic package body respectively, salient points are arranged on the first rewiring layer, a functional chip is arranged on the second rewiring layer, plastic package and thinning are carried out, and the functional chip is arranged after the first rewiring layer is formed; and performing single cutting to complete packaging. According to the invention, the chip packaging yield can be improved, and the chip packaging cost can be reduced.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor packaging technology, and in particular to a chip packaging method and a chip packaging structure. Background Art

[0002] Currently, traditional 2.5D packaging processes typically use an all-silicon interposer solution to achieve multi-chip integration. This approach involves placing all chips on a single silicon interposer, interconnecting them through silicon vias (TSVs) and redistribution layers (RDLs) within the interposer. However, this all-silicon interposer solution presents challenges such as high cost, inflexible design, and concentrated thermal stress.

[0003] To overcome the above problems, a local bridge solution can be adopted, that is, a small silicon bridge is only used between chips that require high-density interconnection. The silicon bridge integrates silicon through-vias and bumps to achieve ultra-short-distance interconnection; the chips outside the silicon bridge are interconnected through a redistribution layer.

[0004] The specific packaging process of the above-mentioned local bridging solution is as follows: first, the chip that needs to be locally bridged is processed and then embedded. After the embedding is completed, the terminals that need to be interconnected are exposed; then a front-side redistribution layer is set on the exposed terminals; then the logic chip, HBM (High Bandwidth Memory) chip and other functional chips are welded and plastic-sealed to the front-side redistribution layer to complete the interconnection; finally, the structure is flipped over, a back-side redistribution layer is set, and the terminals that need to be interconnected are brought out to facilitate welding with the substrate.

[0005] In the above packaging process, the functional chip is welded and packaged before the redistribution layer on the back is formed. If yield loss occurs in the process after the welding and packaging of the functional chip is completed, the packaged functional chip will be scrapped. Functional chips are usually more expensive, which will lead to an increase in the overall packaging cost. In addition, after the functional chip is packaged, the wafer warping of the entire chip packaging structure will be greatly affected, which will in turn affect the yield of the subsequent redistribution layer production process. Summary of the Invention

[0006] The chip packaging method and chip packaging structure provided by the present invention can improve the chip packaging yield and reduce the chip packaging cost.

[0007] In a first aspect, the present invention provides a chip packaging method, the method comprising:

[0008] providing a first slide;

[0009] Arranging a local bridge chip on the first carrier, and arranging conductive terminals around and above the local bridge chip, and plastic-sealing the local bridge chip to obtain a plastic-sealed body;

[0010] The front surface of the plastic package body is thinned and smoothed as a whole to expose the conductive terminals;

[0011] A first redistribution layer and a second redistribution layer are formed on the back and front of the plastic package body, respectively, and bumps are provided on the first redistribution layer, and a functional chip is provided on the second redistribution layer and then plastic-packaged and thinned, wherein the functional chip is provided after the first redistribution layer is formed;

[0012] Carry out order cutting and complete packaging.

[0013] Optionally, forming a first redistribution layer and a second redistribution layer on the back and front of the plastic package body respectively, providing bumps on the first redistribution layer, providing a functional chip on the second redistribution layer, and performing plastic packaging and thinning includes:

[0014] Bonding the front side of the plastic package body to the second carrier;

[0015] Removing the first carrier sheet, exposing and processing the back side of the plastic package to expose the first conductive terminals around the local bridge chip and the through silicon vias in the local bridge chip;

[0016] forming a first redistribution layer on the back side of the plastic package body;

[0017] Disposing bumps on the first redistribution layer;

[0018] Bonding the back side of the plastic package body to the third carrier;

[0019] Turning over the plastic package, removing the second carrier sheet, and exposing the first conductive terminals and the second conductive terminals around and above the local bridge chip;

[0020] forming a second redistribution layer on the front surface of the plastic package body, and providing welding terminals on the second redistribution layer;

[0021] Soldering the functional chip to the soldering terminal, and performing plastic sealing and thinning;

[0022] The plastic package body is turned over and the third carrier is removed.

[0023] Optionally, forming a first redistribution layer and a second redistribution layer on the back and front of the plastic package body respectively, providing bumps on the first redistribution layer, providing a functional chip on the second redistribution layer, and performing plastic packaging and thinning includes:

[0024] Bonding the front side of the plastic package body to the second carrier;

[0025] Removing the first carrier sheet, exposing and processing the back side of the plastic package to expose the first conductive terminals around the local bridge chip and the through silicon vias in the local bridge chip;

[0026] forming a first redistribution layer on the back side of the plastic package body;

[0027] bonding the first redistribution layer to a fourth carrier;

[0028] Turning over the plastic package, removing the second carrier sheet, and exposing the first conductive terminals and the second conductive terminals around and above the local bridge chip;

[0029] forming a second redistribution layer on the front surface of the plastic package body, and providing welding terminals on the second redistribution layer;

[0030] Soldering the functional chip to the soldering terminal, and performing plastic sealing and thinning;

[0031] Turning over the plastic package body and removing the fourth slide;

[0032] Bumps are provided on the first redistribution layer.

[0033] Optionally, bonding the first redistribution layer to the fourth carrier includes: coating an adhesion layer on the first redistribution layer, depositing a metal layer on the adhesion layer, and bonding the metal layer to the fourth carrier.

[0034] Optionally, forming a first redistribution layer and a second redistribution layer on the back and front of the plastic package body respectively, providing bumps on the first redistribution layer, providing a functional chip on the second redistribution layer, and performing plastic packaging and thinning includes:

[0035] forming a second redistribution layer on the front side of the plastic package body;

[0036] Arranging a fifth carrier sheet on the second redistribution layer, and bonding the front surface of the plastic package body to the fifth carrier sheet;

[0037] Removing the first carrier sheet, exposing and processing the back side of the plastic package to expose the first conductive terminals around the local bridge chip and the through silicon vias in the local bridge chip;

[0038] forming a first redistribution layer on the back side of the plastic package body;

[0039] Disposing bumps on the first redistribution layer;

[0040] Bonding the back side of the plastic package body to the third carrier;

[0041] Turning over the plastic package, removing the fifth carrier sheet, and exposing the second redistribution layer;

[0042] Disposing welding terminals on the second redistribution layer;

[0043] Soldering the functional chip to the soldering terminal, and performing plastic sealing and thinning;

[0044] The plastic package body is turned over and the third carrier is removed.

[0045] Optionally, forming the second redistribution layer on the front surface of the plastic package body includes: forming a partial layer of the second redistribution layer on the front surface of the plastic package body;

[0046] Before providing the welding terminal on the second redistribution layer, the method further includes: forming the remaining layer of the second redistribution layer.

[0047] Optionally, setting bumps on the first redistribution layer includes: setting bumps on the first redistribution layer after performing corresponding expansion and contraction compensation according to the expansion and contraction of the local bridge chip after plastic packaging, so that the position of the bumps matches the substrate pads of the subsequent package.

[0048] Optionally, the bumps include micro bumps and / or C4 bumps.

[0049] Optionally, the functional chip includes a logic chip and / or a high-bandwidth memory chip.

[0050] In a second aspect, the present invention provides a chip packaging structure, which is prepared using the above-mentioned chip packaging method.

[0051] The chip packaging method and chip packaging structure provided by the embodiments of the present invention place the setting of the functional chip after the redistribution layer process flow on the front and back sides of the plastic package, which can avoid the yield loss of other processes that may cause the functional chip to be scrapped, thereby reducing the chip packaging cost; in addition, since the redistribution layers on the front and back sides of the plastic package are formed before the functional chip is set, the yield of the redistribution layer will not be affected by the wafer warping caused by the setting of the functional chip, thereby improving the chip packaging yield. BRIEF DESCRIPTION OF THE DRAWINGS

[0052] Figure 1 This is a flow chart of a chip packaging method according to an embodiment of the present invention;

[0053] Figure 2-13 A schematic structural diagram corresponding to each step of the chip packaging method provided in Example 1 of the present invention;

[0054] Figure 14-19A schematic structural diagram corresponding to each step of the chip packaging method provided in Example 2 of the present invention;

[0055] Figure 20-29 This is a schematic structural diagram corresponding to each step of the chip packaging method provided in Example 3 of the present invention. DETAILED DESCRIPTION

[0056] To make the objectives, technical solutions, and advantages of the embodiments of the present invention more clear, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts shall fall within the scope of protection of the present invention.

[0057] The embodiment of the present invention provides a chip packaging method, such as Figure 1 As shown, the method includes:

[0058] L1. Provide the first slide.

[0059] L2. Disposing a local bridge chip on the first carrier, and disposing conductive terminals around and above the local bridge chip, and plastic-sealing the local bridge chip to obtain a plastic-sealed body.

[0060] L3. Thin and smooth the front surface of the plastic package body to expose the conductive terminals.

[0061] L4. Form a first redistribution layer and a second redistribution layer on the back and front sides of the plastic package body respectively, set bumps on the first redistribution layer, set a functional chip on the second redistribution layer and perform plastic packaging and thinning, wherein the functional chip is set after the first redistribution layer is formed.

[0062] L5, cut into pieces and complete packaging.

[0063] The chip packaging method provided by the embodiment of the present invention places the setting of the functional chip after the redistribution layer process flow on the front and back sides of the plastic package, which can avoid the yield loss of other processes that may cause the functional chip to be scrapped, thereby reducing the chip packaging cost; in addition, since the redistribution layers on the front and back sides of the plastic package are formed before the functional chip is set, the yield of the redistribution layer will not be affected by the wafer warping caused by the setting of the functional chip, thereby improving the chip packaging yield.

[0064] The chip packaging method of the present invention is described in detail below with reference to specific embodiments.

[0065] Example 1

[0066] In this embodiment, a first redistribution layer and bumps are first formed on the back side of the plastic package, and then a second redistribution layer is formed on the front side of the plastic package. Finally, a functional chip is disposed on the second redistribution layer.

[0067] like Figure 2-13 As shown, the chip packaging method provided in this embodiment includes the following steps:

[0068] S101 , providing a first carrier wafer 101 , and coating a bonding adhesive 102 on the first carrier wafer 101 .

[0069] The first carrier 101 can be a glass or metal carrier in the shape of a 12-inch wafer or a large plate, preferably a glass carrier.

[0070] S102 , attaching the local bridge chip 103 to the first carrier 101 , respectively arranging the first conductive terminal 104 and the second conductive terminal 105 around and above the local bridge chip 103 , and then plastic-sealing the local bridge chip 103 to obtain a plastic-sealed body.

[0071] Optionally, the first conductive terminal 104 is a copper pillar, and the second conductive terminal 105 is a micro copper pillar, or other metallic conductive materials.

[0072] A through silicon via (TSV) 106 is formed inside the local bridge chip 103 .

[0073] S103 , thinning and smoothing the front surface of the plastic package body as a whole to expose the first conductive terminal 104 and the second conductive terminal 105 .

[0074] S104 , bonding the front surface of the plastic package body to the second carrier 107 using a temporary bonding process.

[0075] S105 , removing the first carrier sheet 101 at the bottom of the plastic package body, exposing the back side of the plastic package body and processing the back side to expose the first conductive terminals 104 and the through silicon vias 106 .

[0076] S106 , forming a first redistribution layer 108 on the back side of the plastic package body.

[0077] S107 , providing bumps 109 on the first redistribution layer 108 .

[0078] Considering the expansion and contraction of the local bridge chip 103 after plastic packaging, corresponding expansion and contraction compensation needs to be performed first, and then bumps 109 are set on the first redistribution layer 108 so that the positions of the set bumps 109 match the substrate pads of the subsequent package.

[0079] The bumps 109 may be micro bumps and / or C4 bumps, but are not limited thereto.

[0080] S108 , bonding the plastic package body to the third carrier 110 using a temporary bonding process.

[0081] S109 , turning over the plastic package body, removing the second carrier sheet 107 on the front side of the plastic package body, and exposing the first conductive terminal 104 and the second conductive terminal 105 .

[0082] S110 , forming a second redistribution layer 111 on the front side of the plastic package body according to design requirements, and providing welding terminals 112 on the second redistribution layer 111 .

[0083] S111 , soldering the functional chip 113 to the soldering terminal 112 , and completing plastic sealing and thinning.

[0084] Among them, the functional chips include logic chips and HBM chips, but are not limited to them.

[0085] S112, turning over the plastic package body, removing the third carrier sheet 110, and cutting into pieces to complete the packaging.

[0086] The chip packaging method provided by the embodiment of the present invention first forms a first redistribution layer and bumps on the back side of the plastic package, then forms a second redistribution layer on the front side of the plastic package, and finally arranges a functional chip on the second redistribution layer. The arrangement of the functional chip is completed after the redistribution layer process flow on the front and back sides of the plastic package, which can avoid the yield loss of other processes that causes the functional chip to be scrapped, thereby reducing the chip packaging cost; in addition, since the redistribution layers on the front and back sides of the plastic package are formed before the functional chip is arranged, the yield of the redistribution layer will not be affected by the wafer warping caused by the arrangement of the functional chip, thereby improving the chip packaging yield.

[0087] Example 2

[0088] In this embodiment, different from Example 1, considering the difficulty of the temporary bonding process, after the first redistribution layer is formed on the back of the plastic package, no bumps are made temporarily, and then a second redistribution layer is formed on the front of the plastic package, and then a functional chip is set on the second redistribution layer, and finally bumps are set on the first redistribution layer.

[0089] like Figure 2-7 As shown in , 14-19, the chip packaging method provided in this embodiment includes the following steps:

[0090] S201-S206 are the same as steps S101-S106 and will not be repeated here.

[0091] S207 , coating an adhesion layer 201 on the first redistribution layer 108 , depositing a metal layer 202 on the adhesion layer 201 , and bonding the metal layer 202 to the fourth carrier 203 .

[0092] Considering that the adhesive will absorb some laser energy during debonding, an adhesive layer can be first coated on the first redistribution layer on the back of the plastic package, a metal layer can be deposited on the adhesive layer, and then a fourth carrier can be temporarily bonded to the metal layer. After completing the subsequent process flow, the fourth carrier can be debonded and removed, and finally the bumps can be set. The metal layer can be, for example, an aluminum metal layer, but is not limited thereto.

[0093] S208 , turning over the plastic package body, removing the second carrier sheet 107 on the front side of the plastic package body, and exposing the first conductive terminals 104 and the second conductive terminals 105 .

[0094] S209 , forming a second redistribution layer 111 on the front side of the plastic package body according to design requirements, and providing welding terminals 112 on the second redistribution layer 111 .

[0095] S210 , soldering the functional chip 113 to the soldering terminal 112 , and completing plastic packaging and thinning.

[0096] Among them, the functional chips include logic chips and HBM chips, but are not limited to them.

[0097] S211 , turning over the plastic package body, and removing the fourth carrier sheet 203 , the metal layer 202 and the adhesive layer 201 on the back side of the plastic package body.

[0098] S212 , setting bumps 109 on the first redistribution layer 108 and performing singulation to complete the packaging.

[0099] Considering the expansion and contraction of the local bridge chip 103 after plastic packaging, corresponding expansion and contraction compensation needs to be performed first, and then bumps 109 are set on the first redistribution layer 108 so that the positions of the set bumps 109 match the substrate pads of the subsequent package.

[0100] The bumps 109 may be micro bumps and / or C4 bumps, but are not limited thereto.

[0101] The chip packaging method provided by the embodiment of the present invention forms a first redistribution layer on the back side of the plastic package body without temporarily forming bumps, then forms a second redistribution layer on the front side of the plastic package body, then arranges a functional chip on the second redistribution layer, and finally arranges bumps on the first redistribution layer. The arrangement of the functional chip is completed after the redistribution layer process flow on the front and back sides of the plastic package body, which can avoid the yield loss of other processes that causes the functional chip to be scrapped, thereby reducing the chip packaging cost; in addition, since the redistribution layers on the front and back sides of the plastic package body are formed before the functional chip is arranged, the yield of the redistribution layer will not be affected by the wafer warping caused by the arrangement of the functional chip, thereby improving the chip packaging yield.

[0102] Example 3

[0103] In this embodiment, different from Example 1, a second redistribution layer is first formed on the front side of the plastic package, and then a first redistribution layer is formed on the back side of the plastic package. Then, bumps are set on the first redistribution layer, and finally a functional chip is set on the second redistribution layer.

[0104] After the local bridge chip is plastic-sealed, considering the balance of subsequent temporary bonding, a redistribution layer can be formed on the front side of the plastic package. After the number of layers is balanced with the redistribution layer on the back side of the plastic package, temporary bonding is performed on the front side of the plastic package, and then the process flow on the back side of the plastic package is started. This can solve the warping problem of the plastic-sealed wafer during the entire packaging process.

[0105] like Figure 2-4 As shown in , 20-29, the chip packaging method provided in this embodiment includes the following steps:

[0106] S301-S303 are the same as steps S101-S103 and will not be repeated here.

[0107] S304 , forming a second redistribution layer 111 on the front surface of the plastic package body.

[0108] Optionally, to consider the temporary bonding balance, only part of the second redistribution layer 111 may be made first. For example, the second redistribution layer 111 has three layers in total, and only one or two layers may be made in this step.

[0109] S305 , disposing a fifth carrier 301 on the second redistribution layer by using a temporary bonding process, and bonding the front surface of the plastic package body to the fifth carrier 301 .

[0110] S306 , removing the first carrier sheet 101 , exposing and processing the back side of the plastic package body, and exposing the first conductive terminals 104 and the through silicon vias 106 .

[0111] S307 , forming a first redistribution layer 108 on the back side of the plastic package body.

[0112] S308 , providing bumps 109 on the first redistribution layer 108 .

[0113] Considering the expansion and contraction of the local bridge chip 103 after plastic packaging, corresponding expansion and contraction compensation needs to be performed first, and then bumps 109 are set on the first redistribution layer 108 so that the positions of the set bumps 109 match the substrate pads of the subsequent package.

[0114] The bumps 109 may be micro bumps or C4 bumps, but are not limited thereto.

[0115] S309 , bonding the back side of the plastic package body to the third carrier 110 using a temporary bonding process.

[0116] S310 , turning over the plastic package body, removing the fifth carrier sheet 301 on the front side of the plastic package body, and exposing the second redistribution layer 111 .

[0117] S311 , disposing welding terminals 112 on the second redistribution layer 111 .

[0118] Optionally, corresponding to step S304, if only part of the layers of the second redistribution layer 111 are made in step S304, the remaining layers are made in this step. For example, if the second redistribution layer 111 has three layers in total and only one or two layers are made in step S304, the remaining two layers or one layer are made in this step.

[0119] S312 , soldering the functional chip 113 to the soldering terminal 112 , and performing plastic sealing and thinning.

[0120] Among them, the functional chips include logic chips and HBM chips, but are not limited to them.

[0121] S313, turning over the plastic package body, removing the third carrier sheet 110, and cutting into pieces to complete the packaging.

[0122] The chip packaging method provided by the embodiment of the present invention first forms a second redistribution layer on the front side of the plastic package body, then forms a first redistribution layer on the back side of the plastic package body, then sets bumps on the first redistribution layer, and finally sets a functional chip on the second redistribution layer. The setting of the functional chip is completed after the redistribution layer process flow on the front and back sides of the plastic package body, which can avoid the yield loss of other processes that causes the functional chip to be scrapped, thereby reducing the chip packaging cost; in addition, since the redistribution layers on the front and back sides of the plastic package body are formed before the functional chip is set, the yield of the redistribution layer will not be affected by the wafer warping caused by the setting of the functional chip, thereby improving the chip packaging yield.

[0123] An embodiment of the present invention further provides a chip packaging structure, which is prepared using the above chip packaging method.

[0124] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in the present invention should be included in the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be based on the scope of protection of the claims.

Claims

1. A chip packaging method, characterized in that: The method comprises: providing a first slide; Arranging a local bridge chip on the first carrier, and arranging conductive terminals around and above the local bridge chip, and plastic-sealing the local bridge chip to obtain a plastic-sealed body; The front surface of the plastic package body is thinned and smoothed as a whole to expose the conductive terminals; A first redistribution layer and a second redistribution layer are formed on the back and front of the plastic package body, respectively, and bumps are provided on the first redistribution layer, and a functional chip is provided on the second redistribution layer and then plastic-packaged and thinned, wherein the functional chip is provided after the first redistribution layer is formed; Carry out order cutting and complete packaging.

2. The method according to claim 1, characterized in that The steps of forming a first redistribution layer and a second redistribution layer on the back and front of the plastic package body respectively, arranging bumps on the first redistribution layer, arranging a functional chip on the second redistribution layer, and performing plastic packaging and thinning include: Bonding the front side of the plastic package body to the second carrier; Removing the first carrier sheet, exposing and processing the back side of the plastic package to expose the first conductive terminals around the local bridge chip and the through silicon vias in the local bridge chip; forming a first redistribution layer on the back side of the plastic package body; Disposing bumps on the first redistribution layer; Bonding the back side of the plastic package body to the third carrier; Turning over the plastic package, removing the second carrier sheet, and exposing the first conductive terminals and the second conductive terminals around and above the local bridge chip; forming a second redistribution layer on the front surface of the plastic package body, and providing welding terminals on the second redistribution layer; Soldering the functional chip to the soldering terminal, and performing plastic sealing and thinning; The plastic package body is turned over and the third carrier is removed.

3. The method according to claim 1, characterized in that The steps of forming a first redistribution layer and a second redistribution layer on the back and front of the plastic package body respectively, arranging bumps on the first redistribution layer, arranging a functional chip on the second redistribution layer, and performing plastic packaging and thinning include: Bonding the front side of the plastic package body to the second carrier; Removing the first carrier sheet, exposing and processing the back side of the plastic package to expose the first conductive terminals around the local bridge chip and the through silicon vias in the local bridge chip; forming a first redistribution layer on the back side of the plastic package body; bonding the first redistribution layer to a fourth carrier; Turning over the plastic package, removing the second carrier sheet, and exposing the first conductive terminals and the second conductive terminals around and above the local bridge chip; forming a second redistribution layer on the front surface of the plastic package body, and providing welding terminals on the second redistribution layer; Soldering the functional chip to the soldering terminal, and performing plastic sealing and thinning; Turning over the plastic package body and removing the fourth slide; Bumps are provided on the first redistribution layer.

4. The method according to claim 3, characterized in that The bonding of the first redistribution layer to the fourth carrier includes: coating an adhesion layer on the first redistribution layer, depositing a metal layer on the adhesion layer, and bonding the metal layer to the fourth carrier.

5. The method according to claim 1, wherein The steps of forming a first redistribution layer and a second redistribution layer on the back and front of the plastic package body respectively, arranging bumps on the first redistribution layer, arranging a functional chip on the second redistribution layer, and performing plastic packaging and thinning include: forming a second redistribution layer on the front side of the plastic package body; Arranging a fifth carrier sheet on the second redistribution layer, and bonding the front surface of the plastic package body to the fifth carrier sheet; Removing the first carrier sheet, exposing and processing the back side of the plastic package to expose the first conductive terminals around the local bridge chip and the through silicon vias in the local bridge chip; forming a first redistribution layer on the back side of the plastic package body; Disposing bumps on the first redistribution layer; Bonding the back side of the plastic package body to the third carrier; Turning over the plastic package, removing the fifth carrier sheet, and exposing the second redistribution layer; Disposing welding terminals on the second redistribution layer; Soldering the functional chip to the soldering terminal, and performing plastic sealing and thinning; The plastic package body is turned over and the third carrier is removed.

6. The method according to claim 5, characterized in that The forming of the second redistribution layer on the front surface of the plastic package body comprises: forming a partial layer of the second redistribution layer on the front surface of the plastic package body; Before providing the welding terminal on the second redistribution layer, the method further includes: forming the remaining layer of the second redistribution layer.

7. The method according to any one of claims 1 to 6, characterized in that The step of setting bumps on the first redistribution layer includes: providing bumps on the first redistribution layer after performing corresponding expansion and contraction compensation according to the expansion and contraction of the local bridge chip after plastic packaging, so that the positions of the bumps match the substrate pads of the subsequent package.

8. The method according to claim 7, characterized in that The bumps include micro bumps and / or C4 bumps.

9. The method according to any one of claims 1 to 6, characterized in that The functional chip includes a logic chip and / or a high-bandwidth memory chip.

10. A chip packaging structure, characterized in that: The chip packaging structure is prepared by the chip packaging method according to any one of claims 1 to 9.

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