A line resistance measuring circuit

Abstract

The application provides a line resistance measurement circuit, and belongs to the technical field of measurement of electrical variables, which comprises a first signal source, a first constant current generation unit, a second signal source, a second constant current generation unit and a standard resistance; the line resistance measurement circuit further comprises a constant current source positive terminal line and a measurement positive terminal line which are respectively connected with the positive terminal of a measured product and the input terminal of the standard resistance, and a constant current source negative terminal line and a measurement negative terminal line which are respectively connected with the negative terminal of the measured product and the output terminal of the standard resistance; a resistance is connected in each of the constant current source positive terminal line, the measurement positive terminal line, the constant current source negative terminal line and the measurement negative terminal line, and a switch is connected in parallel at both ends of the resistance. The line resistance measurement circuit measures the internal wiring resistance, the external wiring resistance and the impedance of the measured product by using a digital phase discrimination method.

Description

Technical Field

[0001] This invention belongs to the field of electrical variable measurement technology, specifically, it relates to a line resistance measurement circuit and a method for controlling the line resistance load capacity based on the measurement circuit. Background Technology

[0002] When installing battery impedance measurement equipment on a lithium battery production line, the four-terminal interface of the equipment is typically connected to different relay switches using four long wire harnesses. Simultaneously, another long wire harness with probes is connected to the other side of each relay switch, forming four long test leads L. Taking one of these leads as an example, the external long wire harness has resistance, the relay switch contacts have resistance, and the contact surface between the probe and the battery electrode also has resistance. Let's assume the sum of these resistances in series is RX. When RX exceeds 1Ω, the battery internal resistance measurement equipment will malfunction, leading to reduced measurement accuracy.

[0003] Based on this, a line resistance measurement circuit and a line resistance load capacity control method are invented to meet the user's need to know the resistance value of RX when setting up external test lines L, and to ensure that the battery internal resistance measuring instrument can still be used normally even if the resistance value of RX is too large. Summary of the Invention

[0004] In order to solve the problem that the existing battery impedance measurement is inaccurate or impossible due to the presence of resistance in the connection line and the uncertainty of the resistance value, the present invention proposes a line resistance measurement circuit that can solve the above problems.

[0005] To solve the above-mentioned technical problems, the present invention adopts the following technical solution:

[0006] A circuit for measuring line resistance, comprising:

[0007] The first signal source is used to output a digital signal with a first frequency fa, which is the first reference signal S1;

[0008] The first constant current generation unit is used to receive the first reference signal S1, generate a first alternating current IA and output it.

[0009] The second signal source is used to output a digital signal at a second frequency fb, which is a second reference signal S15. The second frequency fb is greater than the first frequency fa.

[0010] The second constant current generation unit is used to receive the second reference signal S15, generate the second alternating current IB and output it.

[0011] Standard resistor;

[0012] The circuit resistance measurement circuit further includes a constant current source positive terminal line and a measurement positive terminal line connected to the positive terminal of the test object and the input terminal of the standard resistor, respectively; and a constant current source negative terminal line and a measurement negative terminal line connected to the negative terminal of the test object and the output terminal of the standard resistor, respectively. Each of the constant current source positive terminal line, measurement positive terminal line, constant current source negative terminal line, and measurement negative terminal line is connected to a resistor, and a switch is connected in parallel across the two ends of each resistor. The resistance value in the circuit is controlled by controlling the on / off state of the switch.

[0013] The first AC current IA and the second AC current IB are controlled to be input to the test object or to a standard resistor via the positive terminal line of the constant current source and the positive terminal line of the measurement.

[0014] The positive terminal resistance detection circuit is used to detect and measure the positive terminal line voltage of the constant current source and calculate the corresponding equivalent line resistance.

[0015] The negative terminal resistance detection circuit is used to detect and measure the negative terminal line voltage of the constant current source and calculate the corresponding equivalent line resistance.

[0016] Compared with the prior art, the advantages and positive effects of the present invention are as follows: In order to test the resistance of the four external connection lines used to connect the load, the circuit of the present invention takes into account that the internal connection lines corresponding to the four external connection lines also have resistance. Therefore, this solution sets a standard resistor, which is connected inside the circuit. That is, the connection line of the standard resistor only has internal connection line resistance. By connecting the standard resistor and the test object to the signal loop through the corresponding connection lines respectively, and by collecting the voltage of the corresponding connection lines respectively, this solution utilizes the fact that the internal connection line resistances corresponding to the standard resistor and the test object are the same, and that the standard resistor does not have external connection line resistance. This solution also sets two signals of different frequencies. When the voltage and current are known, a system of equations containing multiple equations can be obtained according to Ohm's law. By solving the system of equations, the equivalent resistance of each line can be calculated.

[0017] Other features and advantages of the present invention will become clearer after reading the detailed description of the embodiments of the present invention in conjunction with the accompanying drawings. Attached Figure Description

[0018] Figure 1 This is a block diagram illustrating the principle of one embodiment of the line resistance measurement circuit proposed in this invention.

[0019] Figure 2 This is a circuit diagram of one embodiment of the line resistance measurement circuit proposed in this invention. Detailed Implementation

[0020] The specific embodiments of the present invention will be described in further detail below with reference to the accompanying drawings.

[0021] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0022] It should be noted that in the description of this invention, terms such as "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," indicating directional or positional relationships, are based on the directional or positional relationships shown in the accompanying drawings. These are merely for ease of description and do not indicate or imply that the device or element must have a specific orientation, or be constructed and operated in a specific orientation; therefore, they should not be construed as limitations on this invention. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance. In the description of this invention, "a plurality of" means two or more, unless otherwise explicitly specified.

[0023] In this invention, unless otherwise explicitly specified and limited, the terms "installation," "connection," "linking," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0024] Example 1: This example proposes a circuit for measuring line resistance, such as... Figure 1 The device includes a first signal source, a first constant current generation unit, a second signal source, a second constant current generation unit, a standard resistor, a positive terminal resistance detection circuit, and a negative terminal resistance detection circuit.

[0025] The first signal source is used to output a digital signal with a first frequency fa, which is the first reference signal S1.

[0026] The first constant current generation unit is used to receive the first reference signal S1, generate the first alternating current IA, and output it.

[0027] The second signal source is used to output a digital signal at a second frequency fb, which is the second reference signal S15. The second frequency fb is greater than the first frequency fa.

[0028] The second constant current generation unit is used to receive the second reference signal S15, generate the second AC current IB, and output it.

[0029] The circuit resistance measurement circuit also includes a constant current source positive terminal line and a measurement positive terminal line connected to the positive terminal of the test object and the input terminal of the standard resistor, respectively, as well as a constant current source negative terminal line and a measurement negative terminal line connected to the negative terminal of the test object and the output terminal of the standard resistor, respectively. Each of the constant current source positive terminal line, measurement positive terminal line, constant current source negative terminal line, and measurement negative terminal line is connected with a resistor, and a switch is connected in parallel across the two ends of the resistor. The resistance value in the circuit is controlled by controlling the on / off state of the switch.

[0030] The positive terminal resistance detection circuit is used to detect and measure the positive terminal line voltage of the constant current source and calculate the corresponding equivalent line resistance.

[0031] The negative terminal resistance detection circuit is used to detect and measure the negative terminal line voltage of the constant current source and calculate the corresponding equivalent line resistance.

[0032] In this embodiment, the line resistance measurement circuit is designed to test the resistance of the four external connection lines used to connect the load. Considering that the internal connection lines corresponding to these four external connection lines also have resistance, this solution uses a standard resistor connected internally. The standard resistor's connection line only has internal connection line resistance. By connecting the standard resistor and the test object to the signal loop through their respective connection lines and collecting the voltage of each connection line, this solution utilizes the fact that the standard resistor and the test object have the same internal connection line resistance, and that the standard resistor has no external connection line resistance. Furthermore, by setting two signals of different frequencies, and given the voltage and current, Ohm's law can be used to derive a system of equations containing multiple equations. Solving this system of equations allows for the calculation of the equivalent resistance of each line.

[0033] In some embodiments, such as Figure 2 As shown, the positive terminal circuit of the constant current source includes the internal circuit of the positive terminal of the constant current source and the external circuit of the positive terminal of the constant current source. The equivalent resistance of the internal circuit of the positive terminal of the constant current source is represented by r1, and the equivalent resistance of the external circuit of the positive terminal of the constant current source is represented by Δr1.

[0034] The negative terminal circuit of the constant current source includes the internal circuit of the negative terminal of the constant current source and the external circuit of the negative terminal of the constant current source. The equivalent resistance of the internal circuit of the negative terminal of the constant current source is represented by r3, and the equivalent resistance of the external circuit of the negative terminal of the constant current source is represented by Δr3.

[0035] The measurement of the positive terminal circuit includes the measurement of the internal positive terminal circuit and the measurement of the external positive terminal circuit. The equivalent resistance of the measurement of the internal positive terminal circuit is represented by r2, and the equivalent resistance of the measurement of the external positive terminal circuit is represented by Δr2.

[0036] The measurement negative terminal circuit includes the internal measurement negative terminal circuit and the external measurement negative terminal circuit. The equivalent resistance of the internal measurement negative terminal circuit is represented by r4, and the equivalent resistance of the external measurement negative terminal circuit is represented by Δr4.

[0037] In some embodiments, the test object can be a resistor or a battery, placed outside the system, and needs to be connected to the system via an external wiring harness.

[0038] In some embodiments, the standard resistor is composed of precision resistors with extremely low annual drift. The standard resistor is located inside the system and connected to the internal wiring harness via a switch.

[0039] Point A is defined as the connection point of the positive terminal of the constant current source to the common terminal of the test object and the standard resistor, respectively. Point B is defined as the connection point of the positive terminal of the measurement to the common terminal of the test object and the standard resistor, respectively. Point C is defined as the connection point of the negative terminal of the constant current source to the common terminal of the test object and the standard resistor, respectively. Point D is defined as the connection point of the negative terminal of the measurement to the common terminal of the test object and the standard resistor, respectively.

[0040] In some embodiments, the first constant current generation unit includes a sampling resistor, a reference signal unit, an operational amplifier unit, and a current amplifier.

[0041] One end of the sampling resistor is connected to the negative terminal of the constant current source, and the other end is connected to ground.

[0042] The reference signal unit is used to receive the first reference signal S1 and perform digital-to-analog conversion, generate an AC signal S7 and output it to the non-inverting input terminal of the operational amplifier unit.

[0043] The inverting input of the operational amplifier unit receives the sampling voltage output from the sampling resistor and outputs the operational amplifier signal S8.

[0044] The current amplifier receives the operational amplifier signal S8 and amplifies it before outputting the first AC current IA.

[0045] The first reference signal S1 serves as both the modulation signal for the phase detector unit and the reference signal for the output current IA. Signal S1 and its phase-shifted signal S21 serve as the modulation signals for the first positive phase detector unit 1A, the second phase detector unit 2A, the first negative phase detector unit 3A, and the fourth phase detector unit 4A.

[0046] Signal S1 outputs signal S2 through an isolator. Signal S2 is input to the input side of the reference signal unit. The reference signal unit consists of a digital-to-analog converter and a capacitive output coupler. The output AC signal S7 is connected to the non-inverting input of the operational amplifier unit and the input of the phase detector 1. The operational amplifier unit outputs signal S8. Signal S8 outputs current IA after passing through a current amplifier.

[0047] The current IA flows from point E through point A into the test object or standard resistor, then from point C through point G, and finally through the sampling resistor to the GND1 network. Since the voltage across the sampling resistor is the same as the voltage of signal S7, the current flowing through the sampling resistor is equal to the voltage of signal S7 divided by the resistance of the sampling resistor. Therefore, the current IA is also a constant AC current with an unchanged effective value.

[0048] In some embodiments, the second constant current generation unit includes a programmable attenuator and a constant current source circuit. The programmable attenuator is used to receive the second reference signal S15 and perform attenuation and digital-to-analog conversion processing.

[0049] The constant current source circuit is used to receive the signal output from the programmable attenuator and to generate a second AC current IB with a frequency of fb.

[0050] In some embodiments, the first signal source and the second signal source are each implemented using a wavetable generator.

[0051] Signal S15 serves as both the modulation signal for the phase detector units (the second positive terminal phase detector unit and the second negative terminal phase detector unit) and the reference signal for the constant current source output current IB. Signal S15 is converted from a digital-to-analog converter in the programmable attenuator to output an analog signal. Since the digital-to-analog converter has a capacitively coupled output, the programmable attenuator output signal S13 is an AC signal. Signal CTRL4 is connected to the gain control terminal of the programmable amplifier in the programmable attenuator. The control unit changes the attenuation factor of the programmable attenuator through the control signal CTRL4. The default attenuation factor of the programmable attenuator is 0dB. Signal S13 serves as the input signal for the constant current source circuit, driving the circuit to generate an AC power supply IB with a constant effective current value. The AC power supply IB flows from point F through point B into the test object or standard resistor, then from point D through point H back to the ground network GND2 of the constant current source circuit.

[0052] In some embodiments, the switch includes:

[0053] The first resistor RC1 is connected in the positive terminal of the constant current source circuit. The ninth switch K9 is connected in parallel across the two ends of the first resistor RC1. The input terminal of the positive terminal of the constant current source circuit is used to receive the first AC current IA.

[0054] The second resistor RC2 is connected in the positive terminal of the measurement circuit. The tenth switch K10 is connected in parallel across the two ends of the second resistor RC2. The input terminal of the positive terminal of the measurement circuit is used to receive the second AC current IB.

[0055] The third resistor RC3 is connected in the negative terminal of the constant current source circuit. The eleventh switch K11 is connected in parallel across the two ends of the third resistor RC3. The output terminal of the negative terminal of the constant current source circuit is connected to the non-inverting input terminal of the third differential amplifier.

[0056] The fourth resistor RC4 is connected in the negative terminal of the measurement circuit. The twelfth switch K12 is connected in parallel across the two ends of the fourth resistor RC4. The output terminal of the negative terminal of the measurement circuit is connected to the inverting input terminal of the third differential amplifier.

[0057] The on / off state of each switch is controlled by the control unit. By changing the on / off state of the switches, the total resistance in the connected line is changed.

[0058] The resistance values ​​of Rc1, Rc2, Rc3, and Rc4 are known. For ease of calculation, they can all be 1Ω resistors in this embodiment.

[0059] In some embodiments, one output of the positive terminal of the constant current source is used to connect to the positive terminal of the test object through the first switch K1, and the other output is connected to the input of the standard circuit through the fifth switch K5.

[0060] One input terminal of the constant current source negative terminal circuit is used to connect to the negative terminal of the test object through the third switch K3, and the other input terminal is connected to the output terminal of the standard circuit through the seventh switch K7.

[0061] One output of the positive terminal of the measurement circuit is used to connect to the positive terminal of the test object through the second switch K2, and the other output is connected to the input terminal of the standard circuit through the sixth switch K6.

[0062] One of the input and output terminals of the negative terminal measurement circuit is used to connect to the negative terminal of the test object through the fourth switch K4, and the other is connected to the output terminal of the standard circuit through the eighth switch K8.

[0063] In some embodiments, the second signal source further includes a second phase shifter, which is used to shift the second reference signal S15 by 90° and output the second phase-shifted signal S16.

[0064] The first signal source also includes a first phase shifter, which is used to shift the first reference signal S1 by 90° and output the first phase-shifted signal S21.

[0065] The positive terminal resistance detection circuit includes a first differential amplifier, a first bandpass amplifier, a first analog-to-digital converter, a first positive terminal phase detector unit, and a second positive terminal phase detector unit.

[0066] The non-inverting input of the first differential amplifier is connected to the positive terminal of the constant current source to receive the voltage of the positive terminal of the constant current source, and its inverting input is connected to the positive terminal of the measurement to receive the voltage of the positive terminal of the measurement. The first differential amplifier amplifies and outputs the differential voltage between the two input terminals.

[0067] The first bandpass amplifier receives the output signal from the first differential amplifier and amplifies it for output.

[0068] The first analog-to-digital converter receives the output signal of the first bandpass amplifier and performs analog-to-digital conversion to output a digital signal S20.

[0069] The first positive terminal phase detector unit receives the first reference signal S1, the first phase-shifting signal S21, and the digital signal S20, respectively, and calculates the output voltage amplitude as V. S24 DC signal, and V S24 The data is sent to the first data processor for processing, and the result is stored in the first memory.

[0070] The second positive terminal phase detector unit receives the second reference signal S15, the second phase-shifting signal S16, and the digital signal S20, respectively, and calculates the output voltage amplitude as V. S23 DC signal, and V S23 The data is sent to the first data processor for processing, and the result is stored in the first memory.

[0071] In some embodiments, the negative terminal resistance detection circuit includes:

[0072] The third differential amplifier has its non-inverting input connected to the negative terminal of the constant current source to receive the voltage of the negative terminal of the constant current source, and its inverting input connected to the negative terminal of the measurement to receive the voltage of the negative terminal of the measurement. The third differential amplifier amplifies and outputs the differential voltage between the two input terminals.

[0073] The third bandpass amplifier receives the output signal from the third differential amplifier and amplifies it for output.

[0074] The third analog-to-digital converter receives the output signal of the third bandpass amplifier and performs analog-to-digital conversion to output the digital signal S18;

[0075] The first negative terminal phase detector unit receives the first reference signal S1, the first phase-shifting signal S21, and the digital signal S18, respectively. The first negative terminal phase detector unit calculates the output voltage amplitude as V. S29 DC signal, and V S29 The data is sent to the second data processor for processing, and the result is stored in the second memory.

[0076] The second negative terminal phase detector unit receives the second reference signal S15, the second phase-shifting signal S16, and the digital signal S18, respectively. The second negative terminal phase detector unit calculates the output voltage amplitude as V. S28 DC signal, and V S28 The data is sent to a second data processor for processing, and the results are stored in a second memory.

[0077] Before measuring the line resistance of the external wiring harness of the device under test, the control unit first uses control signal CTRL1 to open switches K1, K2, K3, and K4. Control signal CTRL2 then opens switches K5, K6, K7, and K8. A standard resistor is connected to the system. Switches K5, K6, K7, and K8 form a Kelvin connection with the standard resistor. Points A and B are at the same potential, as are points C and D.

[0078] The control signal CTRL5 is used to put switches K9, K10, K11, and K12 into the energized state.

[0079] The second constant current generating unit generates and outputs the second AC current IB. The AC power supply IB flows from point F through point B into the standard resistor, then from point D through point H back to the ground network GND2 of the constant current source circuit.

[0080] The equivalent resistance Δr2 represents the equivalent resistance introduced by the external wiring harness resistance of the system at the positive terminal S+. At this time, a standard resistor is connected to the system, and the value of the equivalent resistance Δr2 is equal to 0. Switch K10 is energized; its on-resistance is extremely low, far below the resistance of the wiring harness, and can be ignored, thus Rc2 is short-circuited.

[0081] Let the equivalent resistor r2 represent the line resistance at the positive terminal S+ under this operating condition. The equivalent resistance at the positive terminal S+ is located between points F and B in the diagram. The equivalent resistor r2 represents the inherent equivalent resistance introduced by the internal wiring harness resistance at the positive terminal S+.

[0082] The equivalent resistance Δr4 represents the equivalent resistance introduced at the negative terminal S- of the system's external wiring harness. At this point, a standard resistor is connected to the system, and the value of the equivalent resistance Δr4 is equal to 0. Switch K12 is activated; its on-resistance is extremely low, far below the line resistance, and can be ignored, thus Rc4 is short-circuited.

[0083] Let the equivalent resistor r4 represent the line resistance at the negative terminal S- under this operating condition. The equivalent resistance at the negative terminal S- is located between points D and H in the diagram. The equivalent resistor r4 represents the inherent equivalent resistance introduced by the internal wiring harness resistance at the negative terminal S-.

[0084] The current IB flows through points F and B, and the voltage between the two points is IB*r2.

[0085] The current IB flows through points D and H, and the voltage between the two points is IB*r4.

[0086] The processor controls the first signal source to generate a digital signal S1 with a frequency of fa. Signal S1 passes through an isolator and outputs signal S2. Signal S2 is input to the input side of the reference signal unit, which consists of a digital-to-analog converter and a capacitive output coupler. The output AC signal S7 is connected to the non-inverting input of the operational amplifier unit and the input of the first phase detector. The operational amplifier unit outputs signal S8. Signal S8 passes through a current amplifier and outputs current IA. The output current IA from the second constant current generation unit flows from point E through point A into a standard resistor, then from point C through point G, and finally through a sampling resistor to the GND1 network. Since the voltage across the sampling resistor is equal to the voltage of signal S7, the current flowing through the sampling resistor is equal to the voltage of signal S7 divided by the resistance of the sampling resistor. Therefore, the current IA is also a constant AC current with an unchanged effective value.

[0087] The equivalent resistance Δr1 represents the equivalent resistance introduced by the external wiring harness resistance at the positive source terminal C+. At this time, a standard resistor is connected to the system, and the value of the equivalent resistance Δr1 is equal to 0. Switch K9 is energized; its on-resistance is extremely low, far below the resistance of the wiring harness, and can be ignored. Rc1 is short-circuited.

[0088] Let the equivalent resistor r1 represent the line resistance at the positive source terminal C+ under this operating condition. The equivalent resistance of the line resistance at the positive source terminal C+ is located between points E and A in the diagram. The equivalent resistor r1 represents the inherent equivalent resistance introduced by the internal wiring harness resistance at the positive source terminal C+.

[0089] The equivalent resistance Δr3 represents the equivalent resistance introduced at the negative source terminal C- of the system by the external wiring harness resistance. At this point, a standard resistor is connected to the system, and the value of the equivalent resistance Δr3 is equal to 0. Switch K11 is activated; its on-resistance is extremely low, far below the line resistance, and can be ignored, thus Rc3 is short-circuited.

[0090] Let the equivalent resistor r3 represent the line resistance at the negative source terminal C- under this operating condition. The equivalent resistance of the line resistance at the negative source terminal C- is located between points C and G in the diagram. The equivalent resistor r3 represents the inherent equivalent resistance introduced by the internal wiring harness resistance at the negative source terminal C-.

[0091] The current IA flows through points E and A, and the voltage between the two points is IA*r1.

[0092] The current IA flows through points C and G, and the voltage between the two points is IA*r3.

[0093] The non-inverting and inverting input terminals of the first differential amplifier are connected to points E and F, respectively. The input voltage value is equal to (IA*r1) - (IB*r2). The output signal S9 of the first differential amplifier is a signal containing the frequencies fa and fb. After being amplified by the first bandpass amplifier, the output signal S10 is output, and then after passing through the first analog-to-digital converter, the digital signal S20 is output.

[0094] Digital signal S20, modulation signal S15, and modulation signal S16 are input to the second positive terminal phase detector unit 1B, and the second positive terminal phase detector unit 1B outputs a DC signal S23. The voltage amplitude of the DC signal S23 is VS23, and the voltage value VS23 is stored in the first data processor or the first memory. VS23 = M1 * (IB * r2), where M1 is the link gain.

[0095] Digital signal S20, modulation signal S1, and modulation signal S21 are input to the first positive terminal phase detector unit 1A. The first positive terminal phase detector unit 1A outputs a DC signal S24, the voltage amplitude of which is VS24. The voltage value VS24 is stored in the first data processor or the first memory. VS24 = M1 * (IA * r1), where M1 is the link gain.

[0096] The non-inverting and inverting inputs of the third differential amplifier are connected to points G and H, respectively. The input voltage is equal to [(IB*r4) - (IA*r3)]. The output signal of the third differential amplifier contains the frequencies fa and fb. After being amplified by bandpass amplifier 3, the output signal S17 is output, and then after passing through the third analog-to-digital converter, the digital signal S18 is output.

[0097] Digital signal S18, modulation signal S15, and modulation signal S16 are input to the second negative terminal phase detector unit 3B, which outputs a DC signal S28. The voltage amplitude of the DC signal S28 is VS28, which is stored in the second data processor or the second memory. VS28 = M3 * (IB * r4), where M3 is the link gain.

[0098] Digital signal S18, modulation signal S1, and modulation signal S21 are input to the first negative terminal phase detector unit 3A. The first negative terminal phase detector unit 3A outputs a DC signal S29, the voltage amplitude of which is VS29. The voltage value VS29 is stored in the second data processor or the second memory. VS29 = M3 * (IA * r3), where M3 is the link gain.

[0099] The control signal CTRL5 is used to open switches K9, K10, K11, and K12. Resistors Rc1, Rc2, Rc3, and Rc4 are connected between equivalent resistors r1 and Δr1, r2 and Δr2, r3 and Δr3, and r4 and Δr4, respectively. The resistance values ​​of resistors Rc1, Rc2, Rc3, and Rc4 are known; in this embodiment, they can all be 1Ω.

[0100] At this point, the system is still connected to standard resistors, and the values ​​of equivalent resistors Δr1, Δr2, Δr3, and Δr4 are all equal to 0.

[0101] Under this operating condition, the current IB flows through points F and B, generating a voltage between them of (IB*r² + IB*Rc²). At this time, the voltage amplitude of the DC signal S23 becomes VS23', which is stored in the first data processor or the first memory. VS23' = M1*(IB*r² + IB*Rc²), where M1 is the link gain.

[0102] IB=(VS23'-VS23) / (M1*Rc2).

[0103] As mentioned above, the resistance of Rc2 is 1Ω, so IB = (VS23' - VS23) / (1Ω * M1).

[0104] Current IB flows through points D and H, generating a voltage between them of (IB*r4 + IB*Rc4). At this point, the voltage amplitude of DC signal S28 becomes VS28', which is stored in the second data processor or second memory. VS28' = M3*(IB*r4 + IB*Rc4), where M3 is the link gain.

[0105] IB=(VS28'-VS28) / (M3* Rc4).

[0106] As mentioned above, the resistance of Rc4 is 1Ω, so IB = (VS28' - VS28) / (1Ω * M3).

[0107] Current IA flows through points E and A, generating a voltage between them of (IA*r1 + IA*Rc1). In this case, the voltage amplitude of DC signal S24 becomes VS24', which is stored in the first data processor or the first memory. VS24' = M1*(IA*r1 + IA*Rc1), where M1 is the link gain.

[0108] IA=(VS24'-VS24) / (M1*Rc1).

[0109] As mentioned above, the resistance of Rc1 is 1Ω, so IA = (VS24' - VS24) / (1Ω * M1).

[0110] Current IA flows through points C and G, generating a voltage between them of (IA*r3 + IA*Rc3). In this case, the voltage amplitude of DC signal S29 becomes VS29', which is stored in the second data processor or second memory. VS29' = M3*(IA*r3 + IA*Rc3), where M3 is the link gain.

[0111] IA=(VS29'-VS29) / (M3*Rc3).

[0112] As mentioned above, the resistance of Rc3 is 1Ω, so IA = (VS29' - VS29) / (1Ω * M3).

[0113] Connecting the test object to the system includes: using control signal CTRL2 to put switches K5, K6, K7, and K8 in the off state.

[0114] The control signal CTRL1 puts switches K1, K2, K3, and K4 into the energized state.

[0115] The control signal CTRL5 puts switches K9, K10, K11, and K12 into the energized state.

[0116] Switches K1, K2, K3, and K4, along with a standard resistor, form a Kelvin connection. Points A and B are at the same potential, as are points C and D.

[0117] The processor controls wavetable generator 2 to generate a digital signal S15 with a frequency of fb. Control signal CTRL4 sets the gain of the programmable attenuator to 0dB. The programmable attenuator outputs an AC signal S13, which serves as the setpoint signal for the constant current source circuit, outputting a current IB. The AC power supply IB flows from point F through point B into the test object, then from point D through point H back to the ground network GND2 of the constant current source circuit.

[0118] The device under test (DUT) is connected to switches K1, K2, K3, and K4 via external wiring harnesses. Equivalent resistances Δr2 and Δr4 represent the equivalent resistance introduced by the external wiring harness at the positive and negative measurement terminals, respectively. At this point, the DUT is connected to the system, and the values ​​of equivalent resistances Δr2 and Δr4 are the values ​​to be measured. Switches K10 and K12 are energized. The on-resistance of switches K10 and K12 is extremely low, far below the line resistance, and can be ignored. Rc2 is short-circuited by switch K10, and Rc4 is short-circuited by switch K12.

[0119] The line resistance at the positive terminal S+ under this operating condition is represented by the equivalent resistance r2 + equivalent resistance Δr2. The equivalent resistance at the positive terminal S+ is located between points F and B in the diagram. The equivalent series resistance introduced at the positive terminal S+ by the internal wiring harness resistance and the external wiring harness resistance is represented by the equivalent resistance r2 + equivalent resistance Δr2.

[0120] The line resistance at the negative terminal S- under this operating condition is represented by the equivalent resistor r4 + equivalent resistor Δr4. The equivalent resistance at the negative terminal S- is located between points F and B in the diagram. The equivalent series resistance introduced at the negative terminal S- by the internal wiring harness resistance and the external wiring harness resistance is represented by the equivalent resistor r4 + equivalent resistor Δr4.

[0121] The current IB flows through points F and B, and the voltage generated between the two points is (IB*r2+IB*Δr2).

[0122] The current IB flows through points D and H, and the voltage generated between the two points is (IB*r4+IB*Δr4).

[0123] The processor controls wavetable generator 1 to generate a digital signal S1 with a frequency of fa. Signal S1 is output as signal S2 through an isolator. Signal S2 is input to the input side of a reference signal unit, which consists of a digital-to-analog converter and a capacitive output coupler. The output AC signal S7 is connected to the non-inverting input of the operational amplifier unit and the input of phase detector 1. The operational amplifier unit outputs signal S8. Signal S8 is amplified and outputs current IA. Current IA flows from point E through point A into a standard resistor, then from point C through point G, and finally through a sampling resistor to the GND1 network. Since the voltage across the sampling resistor is equal to the voltage of signal S7, the current flowing through the sampling resistor is equal to the voltage of signal S7 divided by the resistance of the sampling resistor. Therefore, current IA is also a constant AC current with an unchanged effective value.

[0124] The device under test (DUT) is connected to switches K1, K2, K3, and K4 via external wiring harnesses. Equivalent resistances Δr1 and Δr3 represent the equivalent resistances introduced by the external wiring harness at the positive source terminal C+ and the negative source terminal C-, respectively. At this point, the DUT is connected to the system, and the values ​​of equivalent resistances Δr1 and Δr3 are the values ​​to be measured. Switches K9 and K11 are energized. The on-resistance of switches K9 and K11 is extremely low, far lower than the line resistance, and can be ignored. Rc1 is short-circuited by switch K9, and Rc3 is short-circuited by switch K11.

[0125] The line resistance at the positive source terminal C+ under this operating condition is represented by the equivalent resistance r1 + equivalent resistance Δr1. The equivalent resistance of the line resistance at the positive source terminal C+ is located between points E and A in the diagram. The equivalent series resistance introduced at the positive source terminal C+ by the internal wiring harness resistance and the external wiring harness resistance is represented by the equivalent resistance r1 + equivalent resistance Δr1.

[0126] The line resistance at the negative source terminal C- under this operating condition is represented by the equivalent resistance r3 + equivalent resistance Δr3. The equivalent resistance of the line resistance at the negative source terminal C- is located between points C and G in the diagram. The equivalent series resistance introduced at the negative source terminal C- by the internal wiring harness resistance and the external wiring harness resistance is represented by the equivalent resistance r3 + equivalent resistance Δr3.

[0127] The current IA flows through points E and A, and the voltage generated between the two points is (IA*r1+IA*Δr1).

[0128] The current IA flows through points C and G, and the voltage generated between the two points is (IA*r3+IA*Δr3).

[0129] When the device under test is connected, the current IB flows through points F and B, and the voltage generated between the two points is (IB*r2+IB*Δr2). At this time, the voltage amplitude of the DC signal S23 becomes VS23'', VS23''= M1*( IB*r2+IB*Δr2), where M1 is the link gain.

[0130] The first data processor retrieves the voltage values ​​VS23 and VS23' from the first memory. As mentioned above, IB = (VS23' - VS23) / (1Ω * M1), so Δr2 = [VS23'' - VS23) / (VS23' - VS23)].

[0131] The current IA flows through points E and A, generating a voltage between them of (IA*r1 + IA*Δr1). At this point, the voltage amplitude of the DC signal S24 becomes VS24'', VS24'' = M1*(IA*r1 + IA*Δr1), where M1 is the link gain.

[0132] The first data processor retrieves the voltage values ​​VS24 and VS24' from the first memory. As mentioned above, IA = (VS24' - VS24) / (1Ω * M1), so Δr1 = [VS24'' - VS24) / (VS24' - VS24)].

[0133] The current IB flows through points D and H, generating a voltage between them of (IB*r4 + IB*Δr4). At this point, the voltage amplitude of the DC signal S18 becomes VS28'', VS28'' = M3*(IB*r4 + IB*Δr4), where M3 is the link gain.

[0134] The second data processor retrieves the voltage values ​​VS28 and VS28' from the second memory. As mentioned above, IA = (VS28' - VS28) / (1Ω * M3), so Δr4 = [VS28'' - VS28) / (VS28' - VS28)].

[0135] The current IA flows through points C and G, generating a voltage between them of (IA*r3 + IA*Δr3). At this point, the voltage amplitude of the DC signal S29 becomes VS29'', VS29'' = M3*(IA*r3 + IA*Δr3), where M3 is the link gain.

[0136] The second data processor retrieves the voltage values ​​VS29 and VS29' from the second memory. As mentioned above, IA = (VS29' - VS29) / (1Ω * M3), so Δr3 = [VS29'' - VS29) / (VS29' - VS29)].

[0137] In some embodiments, the line resistance measurement circuit further includes a comparator unit. Data processor A sends the calculated Δr1 and Δr2 result data signals S22 to the comparator unit, and the second data processor sends the calculated Δr3 and Δr4 result data signals S25 to the comparator unit. The result data of Δr1, Δr3, Δr2, and Δr4 are compared with the corresponding thresholds of the comparator unit. If the result data of Δr1 and Δr3 are both less than the threshold, the programmable power supply maintains the current output voltage. If the result data of Δr1 or Δr3 exceeds the threshold, the state of the signal S5 output by the comparator unit changes, and the control unit outputs the corresponding signal CTRL6. After isolation, the output signal S6 is input to the logic control pin of the programmable power supply to increase the amplitude of the output voltage of the programmable power supply, thereby improving the load-carrying capacity of the source-end line resistance. If both the results of Δr2 and Δr4 are less than the threshold, the programmable filter maintains its current cutoff frequency, and the programmable attenuator maintains its current attenuation coefficient. If either the result of Δr2 or Δr4 exceeds the threshold, the control unit controls the programmable filter to lower its current cutoff frequency and simultaneously controls the programmable attenuator to lower its attenuation coefficient. This effectively suppresses noise and line resistance signal voltage amplitude generated at the measurement input, ensuring the stability and accuracy of the system's impedance measurement results. Therefore, this improves the load-carrying capacity of the line resistance at the measurement end.

[0138] In some embodiments, the line resistance measurement circuit further includes:

[0139] The first phase detector receives the AC signal S7 and performs phase detection.

[0140] The fourth phase detector unit receives the first reference signal S1, the first phase shift signal S21 and the phase signal output by the first phase detector, detects the current angle φY of the phase signal and outputs it to the first data processor.

[0141] A programmable filter is connected to the positive terminal S+ of the measurement circuit to receive the voltage at the positive terminal S+.

[0142] The second bandpass amplifier is connected to the output of the programmable filter.

[0143] The second analog-to-digital converter is connected to the output of the second bandpass amplifier.

[0144] The second phase detector unit receives the first reference signal S1, the first phase shift signal S21, and the signal output by the second analog-to-digital converter, respectively, detects the voltage angle φX and voltage value VX of the signal output by the second analog-to-digital converter, and outputs them to the first data processor.

[0145] The first data processor calculates the impedance of the test object based on VX, φY, and φX.

[0146] In some embodiments, the line resistance measurement circuit further includes:

[0147] A programmable power supply, connected to a control unit, is used to provide drive voltage to the current amplifier in a controlled manner.

[0148] Signal S4, signal S1, and modulation signal S21 are input to the fourth phase detector unit 4A, and the fourth phase detector unit 4A outputs DC signal S27; signal S27 is input to the first data processor to participate in the calculation of the impedance of the measured object.

[0149] When the standard resistor is connected to the system, the processor controls the second signal source to generate a digital signal S15 with a frequency of fb, which is higher than the frequency fa. The control signal CTRL4 sets the gain of the programmable attenuator to 0dB. The programmable attenuator outputs an AC signal S13, which serves as the setpoint signal for the constant current source circuit, outputting a current IB. The AC power supply IB flows from point F through point B into the standard resistor, then from point D through point H back to the ground network GND2 of the constant current source circuit.

[0150] The negative input terminal of the operational amplifier unit is connected to the sampling resistor. According to the concept of virtual short in the operational amplifier circuit, the voltage at the negative input terminal is equal to the voltage at the positive input terminal. Therefore, the phase of signal S7 is the same as the phase of the voltage across the sampling resistor. Since the voltage across the resistor is in phase with the current, the phase of signal S7 is the same as the phase of the current flowing through the sampling resistor.

[0151] Signal S7 is input to the input terminal of the first phase detector, which is composed of a high-speed comparator. The output signal S3 is a square wave signal. Signal S3 passes through an isolator to output signal S4. The isolator is also a high-speed device, and the phase of signal S4 is equal to the phase of signal S7, which is also the same as the phase of the current flowing through the sampling resistor.

[0152] A current IA flows through the test object (DAMP), generating an AC voltage signal VBD with frequency fa across the DAMP's impedance. Looking from point B towards the input of the second bandpass amplifier, due to the very high input impedance of the second bandpass amplifier, its input is virtually open for the AC voltage signal VBD; therefore, the line resistance at the measurement end does not attenuate the amplitude of the AC voltage signal VBD. Since the current IB flows through points F, B, the DAMP, D, and H back to the GND2 network, the voltage generated on this link is also superimposed on the AC voltage signal VBD. The superimposed signal Vin contains both fa and fb frequency components. After being input to the programmable filter, signal Vin outputs signal S11. Signal S11 passes through bandpass amplifier 2 to generate signal S12. The center frequency of the second bandpass amplifier is fa, amplifying the fa-frequency input signal. Signal S12 passes through the second analog-to-digital converter and outputs the digital signal S19. Signals S19, S1, and S21 are input to the second phase detector unit 2A. The output signal S26 of the second phase detector unit 2A includes the voltage amplitude VX and the voltage angle φX. The voltage angle φX is the angle relative to the modulated signal. The voltage amplitude VX and voltage angle φX are the output results of the signal with frequency fa after phase detection, and the frequency fb is filtered out in the phase detector unit 2A.

[0153] The negative input terminal of the operational amplifier unit is connected to a sampling resistor. According to the concept of virtual short in operational amplifier circuits, the voltage at the negative input terminal is equal to the voltage at the positive input terminal. Therefore, the phase of signal S7 is the same as the phase of the voltage across the sampling resistor. Since the voltage across the resistor is in phase with the current flowing through it, the phase of signal S7 is also in phase with the current flowing through the sampling resistor. Signal S7 is input to the input terminal of phase detector 1, outputting a square wave signal S3. Phase detector 1 can be composed of a high-speed zero-crossing comparator. Signal S3 is output as signal S4 after passing through an isolator.

[0154] In some embodiments, the line resistance measurement circuit further includes an isolator with multiple isolation channels, and the first phase detector is connected to the fourth phase detection unit through one of the isolation channels of the isolator.

[0155] The isolator is also a high-speed device. The phase of signal S4 is equal to the phase of signal S7, which is also the same as the phase of the current flowing through the sampling resistor. Signals S4, S1, and S21 are input to the fourth phase detector unit 4A. The output signal S27 of the fourth phase detector unit 4A includes the current angle φY, which is the angle of the current phase signal with respect to the modulation signal S1. Therefore, the impedance of the tested object Z = VX * cos(φX - φY).

[0156] When the line impedance at the measurement end is too high, IB will generate a higher voltage across the line resistance. This voltage superimposed on the AC voltage VBD will present a high AC voltage at the input of the bandpass amplifier, causing the second bandpass amplifier to operate in the nonlinear region. Therefore, it is necessary to reduce the amplitude of the AC voltage across the line resistance by reducing the IB current, so that the second bandpass amplifier operates in the linear region. Excessive line resistance at the measurement end also increases the input noise density of the second bandpass amplifier, affecting the accuracy of the impedance measurement results. Therefore, it is necessary to reduce the noise bandwidth by lowering the cutoff frequency of the programmable filter, suppressing the noise introduced by the increased line resistance, and ensuring the measurement accuracy of the system. Therefore, combining the above, when the system detects that the result data of Δr2 or Δr4 exceeds the threshold, the control unit controls the programmable filter to lower the current cutoff frequency, and simultaneously controls the programmable attenuator to reduce the attenuation coefficient. This effectively suppresses the noise and voltage signal amplitude generated at the measurement input after the line resistance increases, ensuring the stability and accuracy of the impedance measurement of the device under test. Therefore, this is equivalent to improving the load-carrying capacity of the line resistance at the measurement end.

[0157] In this embodiment, it is not necessary to measure the amplitude of the current IB or IA when measuring the resistance of the external wiring harness.

[0158] Before measuring the resistance of the external wiring harness of the device under test, the voltage values ​​V and V' are measured under the two states of control (opening and closing) of switches K9, K10, K11, and K12, and these values ​​are stored in the memory. After the device under test is connected to the system via the external wiring harness, switches K9, K10, K11, and K12 are opened, and the DC voltage measured by the system at this time is V''.

[0159] The resistance of the external wiring harness is Δr = [(V'' - V) / (V' - V)].

[0160] The data processor sends the measurement result of the external wiring harness line resistance to the comparator unit and compares it with a pre-set threshold in the comparator unit. When the line resistance measurement result is less than the comparator threshold, the programmable power supply maintains the current output voltage, the programmable filter maintains the current cutoff frequency, and the programmable attenuator maintains the current attenuation rate. When the line resistance measurement result is greater than the comparator threshold, the controller unit controls the programmable power supply to increase the output voltage, controls the programmable filter to decrease the cutoff frequency, and controls the programmable attenuator to decrease the current attenuation rate.

[0161] The programmable power supply is a voltage source with multiple output voltage levels and a logic control input terminal. The output voltage level can be changed according to the input logic signal, thereby changing the output voltage value.

[0162] By configuring a programmable filter, the cutoff frequency can be changed through program control. A programmable filter can consist of digital resistors, digital inductors, and digital capacitors; or it can consist of several pre-configured RLC networks with different cutoff frequencies and a multi-select analog switch. For example, if a digital resistor scheme is used, the internal register of the digital resistor is changed through programming, thereby changing the position of the resistor taps and thus altering the resistance value. Changing the value of a component in the programmable filter will change the filter's cutoff frequency. Different cutoff frequencies require different R, L, C values, and these parameters and combinations can be pre-programmed. If a scheme using several RLC networks with different frequencies and a multi-select analog switch is used, the R, L, and C values ​​in the RLC networks are fixed, and the multiple RLC networks have different cutoff frequencies. The multi-select analog switch connects a specific RLC network to the system.

[0163] This embodiment uses a programmable attenuator, which consists of a digital-to-analog converter and a programmable operational amplifier circuit or a digital potentiometer. The attenuator's maximum gain is 0dB, and the attenuation rate can be changed to less than 0dB through programming.

[0164] This embodiment, unlike traditional methods that directly connect components in parallel with a sampling resistor to detect current phase, utilizes the concept that the inverting input voltage signal and the non-inverting input voltage signal are equal in operational amplifier negative feedback. It indirectly measures the current phase by measuring the phase of the output voltage signal from the reference signal unit. In traditional methods, components directly connected in parallel with the sampling resistor have leakage current, which varies with temperature. This negatively impacts the accuracy of the constant current source's output current, and the closer the leakage current magnitude is to the constant current source's output current magnitude, the more severe this impact. The advantage of this invention is that it does not directly measure the current phase, thus avoiding any impact on current accuracy.

[0165] This embodiment uses digital phase detection to measure the resistance of the internal wiring harness, the resistance of the external wiring harness, and the impedance of the tested object.

[0166] Of course, the above description is not intended to limit the present invention, and the present invention is not limited to the examples given above. Any changes, modifications, additions or substitutions made by those skilled in the art within the scope of the present invention should also fall within the protection scope of the present invention.

Claims

1. A circuit for measuring line resistance, characterized in that, include: The first signal source is used to output a digital signal with a first frequency fa, which is the first reference signal S1; The first constant current generation unit is used to receive the first reference signal S1, generate a first alternating current IA and output it. The second signal source is used to output a digital signal at a second frequency fb, which is a second reference signal S15. The second frequency fb is greater than the first frequency fa. The second constant current generation unit is used to receive the second reference signal S15, generate the second alternating current IB and output it. A standard resistor is connected inside the circuit, and the connection wires of a standard resistor only have internal connection line resistance. The circuit resistance measurement circuit further includes a constant current source positive terminal line and a measurement positive terminal line connected to the positive terminal of the test object and the input terminal of the standard resistor, respectively; and a constant current source negative terminal line and a measurement negative terminal line connected to the negative terminal of the test object and the output terminal of the standard resistor, respectively. Each of the constant current source positive terminal line, measurement positive terminal line, constant current source negative terminal line, and measurement negative terminal line is connected to a resistor, and a switch is connected in parallel across the two ends of each resistor. The resistance value in the circuit is controlled by controlling the on / off state of the switch. The first AC current IA and the second AC current IB are controlled to be input to the test object or to a standard resistor via the positive terminal line of the constant current source and the positive terminal line of the measurement. The positive terminal resistance detection circuit is used to detect and measure the positive terminal line voltage of the constant current source and calculate the corresponding equivalent line resistance. The negative terminal resistance detection circuit is used to detect and measure the negative terminal line voltage of the constant current source and calculate the corresponding equivalent line resistance. When measuring the equivalent resistance of the external wiring harness at the positive terminal of the constant current source of the test object, the standard resistor is connected to the system and the test object is not connected to the system. The switch is controlled to close, and the voltage of the line at the positive terminal of the constant current source is detected to obtain V. The switch is then controlled to open, and the voltage of the line at the positive terminal of the constant current source is detected again to obtain V'. After disconnecting the standard resistor and connecting the test object to the system via the external wiring harness, control the switch to close and then detect the voltage at the positive terminal of the constant current source to obtain V''. The equivalent resistance of the external circuit connected to the positive terminal of the corresponding constant current source is Δr = [(V'' - V) / (V' - V)]; Similarly, the equivalent resistance of the external line connected to the positive terminal is calculated based on the measured positive terminal line voltage, the equivalent resistance of the external line connected to the negative terminal of the constant current source is calculated based on the measured negative terminal line voltage, and the equivalent resistance of the external line connected to the negative terminal of the constant current source is calculated based on the measured negative terminal line voltage.

2. The circuit for measuring line resistance according to claim 1, characterized in that, The first constant current generation unit includes: The sampling resistor has one end connected to the negative terminal of the constant current source circuit and the other end connected to ground. The reference signal unit is used to receive the first reference signal S1 and perform digital-to-analog conversion, generate an AC signal S7 and output it to the non-inverting input terminal of the operational amplifier unit. The operational amplifier unit receives the sampled voltage output by the sampling resistor at its inverting input terminal and outputs the operational amplifier signal S8; The current amplifier receives the operational amplifier signal S8, amplifies it, and then outputs the first AC current IA.

3. The circuit for measuring line resistance according to claim 1, characterized in that, The second constant current generation unit includes: The programmable attenuator receives the second reference signal S15 and performs attenuation and digital-to-analog conversion processing. A constant current source circuit receives the signal output by the programmable attenuator and is used to generate a second AC current IB with a frequency of fb.

4. The circuit for measuring line resistance according to claim 1, characterized in that, The switch includes: The first resistor RC1 is connected in the positive terminal line of the constant current source. The ninth switch K9 is connected in parallel across the two ends of the first resistor RC1. The input terminal of the positive terminal line of the constant current source is used to receive the first AC current IA. The second resistor RC2 is connected in the positive terminal of the measurement circuit. The tenth switch K10 is connected in parallel across the two ends of the second resistor RC2. The input terminal of the positive terminal of the measurement circuit is used to receive the second AC current IB. The third resistor RC3 is connected in the negative terminal circuit of the constant current source. The eleventh switch K11 is connected in parallel across the two ends of the third resistor RC3. The output terminal of the negative terminal circuit of the constant current source is connected to the non-inverting input terminal of the third differential amplifier. The fourth resistor RC4 is connected in the negative terminal of the measurement circuit. The twelfth switch K12 is connected in parallel across the two ends of the fourth resistor RC4. The output terminal of the negative terminal of the measurement circuit is connected to the inverting input terminal of the third differential amplifier.

5. The circuit for measuring line resistance according to claim 1, characterized in that, One output of the positive terminal of the constant current source circuit is used to connect to the positive terminal of the test object through the first switch K1, and the other output is connected to the input terminal of the standard resistor through the fifth switch K5. One input terminal of the constant current source negative terminal circuit is used to connect to the negative terminal of the test object through the third switch K3, and the other input terminal is connected to the output terminal of the standard resistor through the seventh switch K7. One output of the positive terminal of the measurement circuit is used to connect to the positive terminal of the test object through the second switch K2, and the other output is connected to the input terminal of the standard resistor through the sixth switch K6. One input terminal of the measurement negative terminal circuit is used to connect to the negative terminal of the test object through the fourth switch K4, and the other input terminal is connected to the output terminal of the standard resistor through the eighth switch K8.

6. The circuit for measuring line resistance according to claim 2, characterized in that, The second signal source also includes a second phase shifter, which is used to shift the second reference signal S15 by 90° and output a second phase-shifted signal S16; The first signal source further includes a first phase shifter, which is used to shift the first reference signal S1 by 90° and output a first phase-shifted signal S21; The positive terminal resistance detection circuit includes: The first differential amplifier has its non-inverting input terminal connected to the positive terminal of the constant current source line to receive the voltage of the positive terminal of the constant current source line, and its inverting input terminal connected to the positive terminal of the measurement line to receive the voltage of the positive terminal of the measurement line. The first differential amplifier amplifies and outputs the differential voltage between the two input terminals. The first bandpass amplifier receives the output signal from the first differential amplifier and amplifies it for output. The first analog-to-digital converter receives the output signal of the first bandpass amplifier and performs analog-to-digital conversion to output a digital signal S20; The first positive terminal phase detector unit receives a first reference signal S1, a first phase-shifting signal S21, and a digital signal S20, respectively. The first positive terminal phase detector unit calculates the output voltage amplitude as V. S24 DC signal, and V S24 The data is sent to the first data processor for processing, and the result is stored in the first memory. The second positive terminal phase detector unit receives the second reference signal S15, the second phase-shifting signal S16, and the digital signal S20, respectively. The second positive terminal phase detector unit calculates the output voltage amplitude as V. S23 DC signal, and V S23 The data is sent to the first data processor for processing, and the result is stored in the first memory.

7. The line resistance measuring circuit according to claim 6, characterized in that, The negative terminal resistance detection circuit includes: The third differential amplifier has its non-inverting input terminal connected to the negative terminal of the constant current source line to receive the voltage of the negative terminal of the constant current source line, and its inverting input terminal connected to the negative terminal of the measurement line to receive the voltage of the negative terminal of the measurement line. The third differential amplifier amplifies and outputs the differential voltage between the two input terminals. The third bandpass amplifier receives the output signal from the third differential amplifier and amplifies it for output. The third analog-to-digital converter receives the output signal of the third bandpass amplifier and performs analog-to-digital conversion to output the digital signal S18; The first negative terminal phase detector unit receives the first reference signal S1, the first phase-shifting signal S21, and the digital signal S18, respectively. The first negative terminal phase detector unit calculates the output voltage amplitude as V. S29 DC signal, and V S29 The data is sent to the second data processor for processing, and the result is stored in the second memory. The second negative terminal phase detector unit receives the second reference signal S15, the second phase-shifting signal S16, and the digital signal S18, respectively. The second negative terminal phase detector unit calculates the output voltage amplitude as V. S28 DC signal, and V S28 The data is sent to a second data processor for processing, and the results are stored in a second memory.

8. The line resistance measuring circuit according to claim 6, characterized in that, The line resistance measurement circuit also includes: The first phase detector receives the AC signal S7 and performs phase detection; The fourth phase detection unit receives the first reference signal S1, the first phase shift signal S21 and the phase signal output by the first phase detector, respectively, detects the current angle φY of the phase signal, and outputs it to the first data processor. A programmable filter, which is connected to the positive terminal of the measurement, is used to receive the voltage at the positive terminal of the measurement; A second bandpass amplifier is connected to the output of the programmable filter; A second analog-to-digital converter is connected to the output of the second bandpass amplifier; The second phase detector unit receives the first reference signal S1, the first phase-shifting signal S21, and the signal output by the second analog-to-digital converter, respectively, detects the voltage angle φX and voltage value VX of the signal output by the second analog-to-digital converter, and outputs them to the first data processor; The first data processor calculates the impedance of the test object based on VX, φY, and φX.

9. The circuit for measuring line resistance according to claim 8, characterized in that, The line resistance measurement circuit also includes: A programmable power supply, connected to a control unit, is used to provide a controlled drive voltage to the current amplifier.

10. The line resistance measuring circuit according to claim 8, characterized in that, The line resistance measurement circuit also includes an isolator with multiple isolation channels, and the first phase detector is connected to the fourth phase detection unit through one of the isolation channels of the isolator.

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