Photoresist composition, lithography method and extreme ultraviolet lithography method

Abstract

The invention relates to a photoresist composition, a lithography method and an extreme ultraviolet lithography method. The photoresist composition comprises a first photoresist. The first photoresist has a chemical formula (a1) or a chemical formula (a2): (R1Sn) 6 (OH) mO4 + y chemical formula (a1); and (R1Sn) 6-x (R2Sn) x (OH) mO4 + y Chemical Formula (a2) wherein each R1, R1 and R2 is each one of Chemical Formulae (b) to (e): wherein R in Chemical Formulae (b) to (e) is H, n-CnH2n + 1, i-CnH2n + 1, or t-CnH2n + 1, each m in Chemical Formulae (a1) and (a2) is each greater than 8, y is (10-m) / 2, and n is 1 to 6.

Description

Technical Field

[0001] The present disclosure relates to a photoresist composition, a lithography method, and an extreme ultraviolet lithography method. Background Art

[0002] As the size of modern integrated circuits decreases, the size of related features also decreases. Lithography is a technology that projects a pattern on a mask onto a substrate such as a semiconductor wafer. In fields such as semiconductor lithography, the pattern is formed on a semiconductor wafer, which includes a minimum feature size under a resolution or critical dimension (CD). Semiconductor lithography generally includes the following steps: coating a layer of photoresist (photoresist / resist) on the top surface of the semiconductor wafer (such as a thin film stack), and exposing the photoresist to a pattern. The semiconductor wafer is then transferred to a developing chamber to remove the exposed photoresist, which is soluble in an aqueous developer solution. In this way, there is a patterned layer of photoresist on the top surface of the wafer. Summary of the Invention

[0003] In some embodiments, a photoresist composition includes a first photoresist having a chemical formula (a1) or a chemical formula (a2):

[0004] (R1Sn)6(OH) m O 4+y Chemical formula (a1); and

[0005] (R 1 Sn) 6-x (R 2 Sn) x (OH) m O 4+y Chemical formula (a2), wherein each R1, R 1 and R 2 Each is one of the chemical formulas (b) to (e):

[0006] Wherein R in chemical formulas (b) to (e) is H, nC n H 2n+1 、iC n H 2n+1 or tC n H 2n+1 , each m in chemical formulas (a1) and (a2) is independently greater than 8, y may be (10-m) / 2, and n may be 1 to 6.

[0007] In some embodiments, a lithography method includes the following steps: forming a target layer on a substrate; coating the target layer with a photoresist composition to form a photoresist layer; exposing the photoresist layer; developing the photoresist layer; and etching the target layer using the photoresist layer as an etching mask. The photoresist composition includes a first photoresist having a chemical formula (a1) or a chemical formula (a2):

[0008] (R1Sn)6(OH) m O 4+y Chemical formula (a1); and

[0009] (R 1 Sn) 6-x (R 2 Sn) x (OH) m O 4+y Chemical formula (a2), wherein each R1, R 1 and R 2 Each is one of the chemical formulas (b) to (e):

[0010] Wherein R in chemical formulas (b) to (e) is H, nC n H 2n+1 、iC n H 2n+1 or tC n H 2n+1 , each m in chemical formulas (a1) and (a2) is independently greater than 8, y is (10-m) / 2, and n is 1 to 6.

[0011] In some embodiments, an extreme ultraviolet lithography (EUVL) method includes the following steps. Turn on a droplet generator to shoot a metal droplet toward an excitation area in front of a collector. Turn on a laser source to emit a laser toward the excitation area so that the metal droplet is heated by the laser, thereby generating EUV radiation; by using one or more first optical elements, the EUV radiation is directed to a reflective mask in an exposure device. By using one or more second optical elements, the EUV radiation reflected from the reflective mask is directed to a substrate coated with a photoresist layer in the exposure device. The photoresist layer is formed by coating a photoresist composition including a first photoresist, the first photoresist having a chemical formula (a1) or a chemical formula (a2):

[0012] (R1Sn)6(OH) m O 4+y Chemical formula (a1); and

[0013] (R 1 Sn)6-x (R 2 Sn) x (OH) m O 4+y Chemical formula (a2), wherein each R1, R 1 and R 2 Each of the chemical formulas (b) to (e):

[0014] Wherein R in chemical formulas (b) to (e) is H, nC n H 2n+1 、iC n H 2n+1 or tC n H 2n+1 , each m in chemical formulas (a1) and (a2) is independently greater than 8, y is (10-m) / 2, and n is 1 to 6. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] The present disclosure is best understood when read in conjunction with the accompanying drawings. It should be emphasized that, in accordance with standard industry practice, various features are not drawn to scale and are used for illustrative purposes only. In fact, the dimensions of various features may be arbitrarily increased or decreased for ease of discussion.

[0016] Figure 1A is a schematic diagram of an EUV lithography tool having an LPP-based EUV radiation source according to some embodiments of the present disclosure;

[0017] Figure 1B is a simplified schematic diagram of details of an extreme ultraviolet lithography tool according to one embodiment of the present disclosure, showing exposure of a photoresist-coated substrate with a patterned EUV beam;

[0018] Figure 1C A cross-sectional view of an EUV mask constructed according to some embodiments of the present disclosure;

[0019] Figure 2 A flow chart of a method for manufacturing a semiconductor device using a photoresist layer according to various aspects of the present disclosure;

[0020] Figure 3 Description of various aspects of the present disclosure Figure 2 a fragmentary cross-sectional side view of a semiconductor device corresponding to the flowchart in FIG;

[0021] Figure 4 FIG1 is a graph showing EUV contrast as a function of exposure dose of a photoresist layer according to some embodiments;

[0022] Figure 5is an infrared (IR) spectrum of a first photoresist having chemical formula (a1) or (a2) and a second photoresist having chemical formula (g) according to some embodiments;

[0023] 6A to 6D EUV contrast curves as a function of exposure dose for four photoresist layers each formed using: a first photoresist having chemical formula (a1), a mixture of the first photoresist having chemical formula (a1) and a second photoresist having chemical formula (g), a mixture of the first photoresist having chemical formula (a1) and a second photoresist having chemical formula (h), and a mixture of the first photoresist having chemical formula (a1) and a second photoresist having chemical formula (j) according to some embodiments;

[0024] Figure 7 and Figure 8 Description of various aspects of the present disclosure Figure 2 a fragmentary cross-sectional side view of a semiconductor device corresponding to the flowchart in FIG;

[0025] Figure 9 、 Figure 10 、 Figure 11 、 Figure 12 、 Figure 13 、 Figure 14 、 Figure 15 、 Figure 16 and Figure 17A a perspective view illustrating additional fabrication processes for forming a semiconductor device according to some embodiments of the present disclosure;

[0026] Figure 17B 、 Figure 18 、 Figure 19 and Figure 20 Cross-sectional views illustrating additional fabrication processes for forming semiconductor devices according to some embodiments of the present disclosure.

[0027]

Explanation of symbols

[0028] 10: Extreme Ultraviolet (EUV) Lithography System

[0029] 12:Substrate

[0030] 14: Shallow Trench Isolation (STI) area

[0031] 16a: cushion layer

[0032] 16b: mask layer

[0033] 18: Photoresist layer

[0034] 18A: Photoresist layer

[0035] 20: Opening

[0036] 20A: Open

[0037] 22: Groove

[0038] 30:Substrate

[0039] 32: conductive layer

[0040] 34: Reflective multilayer (ML) structure

[0041] 36: Covering layer

[0042] 38: buffer layer

[0043] 40: Absorption layer

[0044] 45:Semiconductor device

[0045] 48:Substrate

[0046] 50: Material layer

[0047] 60: Photoresist layer

[0048] 60A: Patterned photoresist

[0049] 100: Radiation source / EUV radiation source

[0050] 102:Semiconductor strip

[0051] 104: Fins

[0052] 105: Chamber

[0053] 106: dummy gate structure

[0054] 108: dummy gate dielectric layer

[0055] 109: dummy gate electrode

[0056] 110: Collector

[0057] 112: Bottom mask

[0058] 114: Top mask

[0059] 115: Target droplet generator

[0060] 116: Gate spacer

[0061] 120: Nozzle

[0062] 122: Source / drain epitaxial structure

[0063] 123: Contact Etch Stop Layer (CESL)

[0064] 125: Droplet Catcher

[0065] 126: Interlayer dielectric (ILD) layer

[0066] 128: Replacement gate structure

[0067] 130: Gate dielectric layer

[0068] 132: Work function metal layer

[0069] 134: Filler Metal

[0070] 200: Exposure device

[0071] 205a: Optical parts

[0072] 205b: Optical parts

[0073] 205c: Patterned Optics / Reflective Masks / EUV Masks

[0074] 205d: Reduced projection optics

[0075] 205e: Reduced projection optics

[0076] 208: substrate stage

[0077] 210: Photoresist coated substrate

[0078] 215: Photoresist layer

[0079] 300: Excitation laser source

[0080] 310: Laser generator

[0081] 320: Laser guidance optics

[0082] 330: Focusing device

[0083] 400:Semiconductor device

[0084] 1000: Curve

[0085] 1002: Curve

[0086] 1004: Curve

[0087] 2000: Exposure process

[0088] BF: Grassroots

[0089] DP: Target droplet

[0090] DP1: Damper

[0091] DP2: Damper

[0092] E1~E4: Exposure dose

[0093] LR1: Laser

[0094] LR2: Excitation laser

[0095] MF: Main layer

[0096] PP1: Base plate

[0097] PP2: Base plate

[0098] S200: Method

[0099] S202: Block

[0100] S204: Block

[0101] S206: Block

[0102] t0: thickness

[0103] ZE: EUV light emitter / excitation zone DETAILED DESCRIPTION

[0104] The following disclosure provides many different embodiments or examples for implementing different features of the provided subject matter. Specific examples of components and configurations are described below to simplify the disclosure. Of course, these are merely examples and are not restrictive. For example, in the following description, a first feature formed on a second feature may include an embodiment in which the first feature and the second feature are directly in contact with each other, and may also include an embodiment in which an additional feature is formed between the first feature and the second feature so that the first feature and the second feature may not be in direct contact with each other. In addition, the disclosure may repeatedly reference numbers and / or letters in various examples. This repetition is for simplicity and clarity and does not, in itself, determine the relationship between the various embodiments and / or configurations discussed.

[0105] Furthermore, for ease of description, spatially relative terms, such as "below," "beneath," "lower," "above," and "upper," may be used herein to describe the relationship of one element or feature to another element or feature illustrated in the figures. Spatially relative terms encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The device may be otherwise oriented (rotated 90 degrees or at other orientations), and the spatially relative descriptors used herein interpreted accordingly.

[0106] Figure 1ASchematic diagram of an EUV lithography system 10 constructed according to some embodiments. The EUV lithography system 10, which may also be generally referred to as a scanner, is used to perform lithography exposure processes using a respective radiation source and exposure mode. The EUV lithography system 10 is designed to expose a photoresist layer using extreme EUV light or EUV radiation. The photoresist layer is a material that is sensitive to EUV light. The EUV lithography system 10 uses a radiation source 100 to generate EUV light, such as EUV light having a wavelength in the range of about 1 nm to about 100 nm. In one specific embodiment, the wavelength of the EUV light generated by the radiation source 100 is centered around about 13.5 nm. Therefore, the radiation source 100 is also referred to as an EUV radiation source 100.

[0107] Extreme ultraviolet (EUV) lithography has gained widespread application due to its ability to miniaturize semiconductor devices, such as those used in the 20-nanometer (nm) technology node. Metal oxide-based photoresists have good absorption of far ultraviolet light (193 nm) and extreme ultraviolet light (13.5 nm), making them more effective than organic polymers at absorbing EUV. While metal oxide-based photoresists have good absorption of these radiations, they can have poor surface roughness and include nanocrystalline solids.

[0108] The present disclosure provides a novel photoresist composition, comprising a first photoresist having a chemical formula (a1) or a chemical formula (a2). By coating the novel photoresist composition to form a photoresist layer, the photoresist layer can be formed into a thin film having a relatively smooth surface morphology and low roughness. The novel photoresist composition can achieve small half-pitch patterns, low EUV radiation exposure dose, and low line edge roughness / line width roughness (LER) / (line width roughness, LWR) characteristics. Figures 1A to 20 The various aspects of this disclosure are discussed in more detail. First, the following reference Figure 1A 、 Figure 1B and Figure 1C Next, we will refer to the EUV lithography system. Figures 2 to 20 The details of the new photoresist and the lithography process using this photoresist are discussed.

[0109] The advanced lithography processes, methods, and materials disclosed herein can be used in a variety of applications, including fin-type field effect transistors (FinFETs) and gate-all-around (GAA) FETs. For example, fins can be patterned to produce relatively close spacing between features, and the disclosure above is well suited for this purpose. In addition, the spacers used to form FinFET fins can also be processed according to the disclosure above. The fins can be patterned by any suitable method. For example, the fins can be patterned using one or more lithography processes, including double patterning or multiple patterning processes. Generally speaking, double patterning or multiple patterning processes combine lithography and self-alignment processes to produce patterns with smaller spacing than can be obtained using a single direct lithography process. For example, in one embodiment, a sacrificial layer is formed on a substrate using a lithography process and patterned. Spacers are formed next to the patterned sacrificial layer using a self-alignment process. The sacrificial layer is then removed, and the remaining spacers can be used for fin patterning.

[0110] To meet the Moore's Law trend of shrinking chip component size and the demand for higher computing power in mobile electronic devices (such as smartphones with computer functions, multitasking capabilities, or even workstation functions), lithography exposure systems with smaller wavelengths are needed. Extreme ultraviolet (EUV) lithography technology uses an EUV radiation source to emit EUV light rays with a wavelength of approximately 13.5nm. Because this wavelength also falls within the wavelength range of x-ray radiation, EUV radiation sources are also called soft x-ray radiation sources. The EUV light rays emitted from laser-produced plasma (LPP) are collected by a collector mirror and reflected onto a patterned mask.

[0111] Figure 1A FIG2 is a schematic diagram of an EUV lithography tool with an EUV radiation source based on LPP according to some embodiments of the present disclosure. The EUV lithography system includes an EUV radiation source 100 for generating EUV radiation, an exposure device 200 (such as a scanner), and an excitation laser source 300. Figure 1A As shown, in some embodiments, an EUV radiation source 100 and an exposure device 200 are mounted on a main layer MF in a clean room, while an excitation laser source 300 is mounted in a base layer BF located below the main layer MF. Each of the EUV radiation source 100 and the exposure device 200 is placed on base plates PP1 and PP2, respectively, via dampers DP1 and DP2. The EUV radiation source 100 and the exposure device 200 are coupled to each other via a coupling mechanism, which may include a focusing unit.

[0112] The EUV lithography tool is designed to expose a photoresist layer to EUV light (also interchangeably referred to herein as EUV radiation). The photoresist layer is a material that is sensitive to EUV light. The EUV lithography system uses an EUV radiation source 100 to generate EUV light, for example, EUV light having a wavelength in the range of about 1 nm to about 100 nm. In one specific embodiment, the EUV radiation source 100 generates EUV light with a wavelength centered around about 13.5 nm. In this embodiment, the EUV radiation source 100 generates EUV radiation using a laser-produced plasma (LPP) mechanism.

[0113] Exposure apparatus 200 includes various reflective optical components (e.g., convex / concave / plane mirrors), a reticle holding mechanism including a reticle stage, and a wafer holding mechanism. EUV radiation generated by EUV radiation source 100 is directed by the reflective optical components onto a reticle secured to the reticle stage. In some embodiments, the reticle stage includes an electrostatic chuck (e-chuck) for securing the reticle.

[0114] Figure 1B A simplified schematic diagram of details of an extreme ultraviolet lithography tool according to one embodiment of the present disclosure is shown exposing a photoresist-coated substrate 210 fixed on a substrate stage 208 of an exposure apparatus 200 with a patterned EUV beam. The exposure apparatus 200 is an integrated circuit lithography tool, such as a stepper, a scanner, a step and scan system, a direct write system, an apparatus using contact and / or proximity masks, etc., equipped with one or more optical elements 205a, 205b, for example, for irradiating a patterned optical element 205c (such as a reticle) with a beam of EUV light to produce a patterned beam; and equipped with one or more reduction projection optical elements 205d, 205e for projecting the patterned beam onto the photoresist-coated substrate 210. A mechanical assembly (not shown) may be provided for producing controlled relative movement between the photoresist-coated substrate 210 and the patterned optical element 205c. As Figure 1C As further shown, the EUVL tool includes an EUV radiation source 100 including an EUV light radiator ZE that emits EUV light in a chamber 105 , which is reflected by a collector 110 along a path into an exposure device 200 to irradiate a photoresist-coated substrate 210 .

[0115] As used herein, the term "optics" should be interpreted broadly to include, but not necessarily be limited to, one or more components that reflect and / or transmit and / or manipulate incident light, and includes, but is not limited to, one or more lenses, windows, filters, wedges, prisms, grisms, graders, transmission fibers, etalons, diffusers, homogenizers, detectors and other instrument components, apertures, axicons, and mirrors, including multilayer mirrors, near-normal-incidence mirrors, grazing-incidence mirrors, specular reflectors, diffuse reflectors, and combinations thereof. Furthermore, unless otherwise specified, the term "optics" as used herein refers to, but is not limited to, components that operate or have advantages only within one or more specific wavelength ranges, such as the EUV output wavelength, the irradiation laser wavelength, a wavelength suitable for metrology, or any other specific wavelength. In various embodiments of the present disclosure, the photoresist-coated substrate 210 is a semiconductor wafer, such as a silicon wafer or other type of wafer to be patterned. In some embodiments, the EUVL tool further includes other modules or is integrated (or coupled) with other modules.

[0116] like Figure 1A As shown, the EUV radiation source 100 includes a target droplet generator 115 and a collector 110 surrounded by a chamber 105. For example, the collector 110 is a laser-produced plasma (LPP) collector. In various embodiments, the target droplet generator 115 includes a reservoir for containing a source material and a nozzle 120. Target droplets DP of the source material are supplied into the chamber 105 through the nozzle 120.

[0117] In some embodiments, the target droplets DP are metal droplets of tin (Sn), lithium (Li), or an alloy of tin and lithium. In some embodiments, the diameter of the target droplets DP ranges from approximately 10 microns (μm) to approximately 100 μm. For example, in one embodiment, the target droplets DP are tin droplets with a diameter of approximately 10 μm to approximately 100 μm. In other embodiments, the target droplets DP are tin droplets with a diameter of approximately 25 μm to approximately 50 μm. In some embodiments, the target droplets DP are ejected through the nozzle 120 at a rate of approximately 50 droplets per second (i.e., an ejection frequency of approximately 50 Hz) to approximately 50,000 droplets per second (i.e., an ejection frequency of approximately 50 kHz).

[0118] Return Reference Figure 1AThe excitation laser LR2 generated by the excitation laser source 300 is a pulsed laser. The laser pulse LR2 is generated by the excitation laser source 300. The excitation laser source 300 may include a laser generator 310, laser guidance optics 320, and a focusing device 330. In some embodiments, the laser generator 310 includes a carbon dioxide (CO2) or neodymium-doped yttrium aluminum garnet (Nd:YAG) laser source, whose wavelength is in the infrared region of the electromagnetic spectrum. For example, in one embodiment, the wavelength of the laser generator 310 is approximately 9.4 μm or approximately 10.6 μm. The laser light LR1 generated by the laser generator 310 is guided by the laser guidance optics 320 and focused by the focusing device 330 into the excitation laser light LR2, which is then introduced into the EUV radiation source 100.

[0119] In some embodiments, the excitation laser LR2 includes a preheating laser and a main laser. In these embodiments, the preheating laser pulse (interchangeably referred to herein as a "pre-pulse") is used to heat (or preheat) a given target droplet to produce a low-density target plume with multiple smaller droplets, which is then heated (or reheated) by the main laser pulse, thereby generating more EUV light emission.

[0120] In various embodiments, the spot size of the preheating laser pulse is approximately 100 μm or less, while the spot size of the main laser pulse ranges from approximately 150 μm to approximately 300 μm. In some embodiments, the pulse duration of the preheating laser and the main laser pulses ranges from approximately 10 ns to approximately 50 ns, and the pulse frequency ranges from approximately 1 kHz to approximately 100 kHz. In various embodiments, the average power of the preheating laser and the main laser ranges from approximately 1 kilowatt (kW) to approximately 50 kW. In one embodiment, the pulse frequency of the excitation laser LR2 is matched (e.g., synchronized) to the ejection frequency of the target droplets DP.

[0121] Excitation laser light LR2 is injected through a window (or lens) into an excitation region ZE in front of the collector 110. The window is made of a suitable material and is substantially transparent to the laser beam. The droplet generator 115 is activated to eject target droplets DP toward the excitation region ZE in front of the collector 110. The generation of pulsed laser light is synchronized with the ejection of target droplets DP through the nozzle 120. As the target droplets move through the excitation region, a pre-pulse heats the target droplets and transforms them into a low-density target plume. The delay between the pre-pulse and the main pulse is controlled to allow the target plume to form and expand to an optimal size and geometry. In various embodiments, the pre-pulse and main pulse have the same pulse duration and peak power. When the main pulse heats the target plume, a high-temperature plasma is generated. The plasma emits EUV radiation (EUV), which is collected by the collector 110. The collector 110 further reflects and focuses the EUV radiation for use in the lithographic exposure process performed by the exposure apparatus 200. A droplet catcher 125 is used to capture excess target droplets. For example, some target droplets may be intentionally missed by the laser pulse.

[0122] In some embodiments, the collector 110 is designed to have an appropriate coating material and shape to act as a mirror for EUV collection, reflection and focusing. In some embodiments, the collector 110 is designed to be elliptical. In some embodiments, the coating material of the collector 110 is similar to the reflective multilayer of the EUV mask. In some instances, the coating material of the collector 110 includes ML (such as multiple pairs of Mo / S films) and may further include a capping layer (such as Ru) coated on the ML to significantly reflect EUV light. In some embodiments, the collector 110 may further include a grid structure designed to effectively scatter the laser beam directed to the collector 110. For example, a silicon nitride layer is coated on the collector 110 and patterned into a grid pattern.

[0123] In this disclosure, the terms mask, photomask, and reticle are used interchangeably. In this embodiment, the patterned optical element 205c is a reflective mask 205c. The reflective mask 205c also includes a reflective ML deposited on a substrate. The ML includes multiple film pairs, such as molybdenum-silicon (Mo / Si) film pairs (e.g., a molybdenum layer above or below a silicon layer in each film pair). Alternatively, the ML may include a molybdenum-beryllium (Mo / Be) film pair, or other suitable materials that are highly reflective of EUV light.

[0124] The mask 205c may further include a protective capping layer, such as ruthenium (Ru), disposed on the ML. The mask 205c further includes an absorber layer deposited on the ML. The absorber layer is patterned to define integrated circuit (IC) layers, as discussed in more detail below according to various aspects of the present disclosure. Alternatively, another reflective layer may be deposited on the ML and patterned to define IC layers, thereby forming an EUV phase-shifting mask.

[0125] According to some embodiments, the mask 205c and its manufacturing method will be further described. In some embodiments, the mask manufacturing process includes two operations: a blank mask manufacturing process and a mask patterning process. In the blank mask manufacturing process, a blank mask is formed by depositing a suitable layer (e.g., a reflective multilayer) on a suitable substrate. The blank mask is then patterned in a mask patterning process to achieve the desired design of the integrated circuit (IC) layer. The patterned mask is then used to transfer the circuit pattern (e.g., the design of the integrated circuit layer) to a semiconductor wafer. These patterns can be repeatedly transferred to multiple wafers through various lithography processes. A set of masks is used to build a complete IC.

[0126] Figure 1C An example of a reflective mask 205c is shown in FIG. The reflective mask 205c in the illustrated embodiment is an EUV mask and includes a substrate 30 made of LTEM. LTEM materials may include TiO2-doped SiO2 and / or other low thermal expansion materials known in the art. In some embodiments, a conductive layer 32 is additionally provided under the backside of the LTEM substrate 30 for electrostatic clamping purposes. In one example, the conductive layer 32 comprises chromium nitride (CrN), although other suitable compositions are possible.

[0127] Reflective mask 205c includes a reflective multilayer (ML) structure 34 disposed on LTEM substrate surface 30. ML structure 34 can be selected to provide high reflectivity for a selected radiation type / wavelength. ML structure 34 includes multiple film pairs, such as Mo / Si film pairs (e.g., a molybdenum layer above or below a silicon layer in each film pair). Alternatively, ML structure 34 can include Mo / Be film pairs, or any material with a refractive index difference that is highly reflective at EUV wavelengths.

[0128] Still refer to Figure 1CEUV mask 205c also includes a capping layer 36 disposed on ML structure 34 to prevent ML oxidation. EUV mask 205c may further include a buffer layer 38 disposed above capping layer 36 to serve as an etch stop layer during patterning or repairing of the absorber layer, as described later. The buffer layer 38 has different etching characteristics than the absorber layer disposed thereon. In various embodiments, buffer layer 38 includes ruthenium (Ru), a Ru compound such as RuB, RuSi, chromium (Cr), chromium oxide, and chromium nitride.

[0129] EUV reticle 205c also includes an absorber (or absorption layer) 40 formed on buffer layer 38. In some embodiments, absorber layer 40 absorbs EUV radiation directed onto the reticle. In various embodiments, the absorber layer can be made of tantalum boron nitride (TaBN), tantalum boron oxide (TaBO), chromium (Cr), radium (Ra), or a suitable oxide or nitride (or alloy) of one or more of the following materials: actinium, radium, tellurium, zinc, copper, and aluminum.

[0130] Figure 2 FIG. 4 is a flow chart of a method S200 for manufacturing a semiconductor device 45 using a photoresist layer according to various aspects of the present disclosure. Figure 3 、 Figure 7 and Figure 8 Description of various aspects of the present disclosure Figure 2 The flowchart in FIG. 4 corresponds to a fragmentary cross-sectional side view of a semiconductor device 45 . Figure 2 Block S202 and Figure 3 A photoresist composition is coated on the material layer 50 on the substrate 48 to form a photoresist layer 60. The semiconductor device 45 may include an integrated circuit (IC) chip, a system on chip (SoC), or a portion thereof, and may include various passive and active microelectronic devices, such as resistors, capacitors, inductors, diodes, metal-oxide semiconductor field effect transistors (MOSFETs), complementary metal-oxide semiconductor (CMOS) transistors, bipolar junction transistors (BJTs), laterally diffused MOS (LDMOS) transistors, high-power MOS transistors, or other types of transistors.

[0131] In some embodiments, substrate 48 is a silicon substrate doped with a p-type dopant such as boron (e.g., a p-type substrate). Alternatively, substrate 48 may be another suitable semiconductor material. For example, substrate 48 may be a silicon substrate doped with an n-type dopant such as phosphorus or arsenic (n-type substrate). Substrate 48 may include other basic semiconductors, such as germanium and diamond. Substrate 48 may preferably include a compound semiconductor and / or an alloy semiconductor. In addition, substrate 48 may include an epitaxial layer (epi layer), may be strained to improve performance, and may include a silicon-on-insulator (SOI) structure.

[0132] In some embodiments, substrate 48 is substantially conductive or semiconductive. The resistance may be less than about 103 ohm-meters. In some embodiments, substrate 48 comprises a metal, a metal alloy, or a metal nitride / sulfide / selenide / oxide / silicide having the chemical formula MX a , where m is a metal, and X is N, S, Se, O, Si, and where "a" ranges from about 0.4 to 2.5. For example, the substrate 48 may include Ti, Al, Co, Ru, TiN, WN2, or TaN.

[0133] In some other embodiments, the substrate 48 comprises a dielectric material having a dielectric constant ranging from about 1 to about 40. In some other embodiments, the substrate 48 comprises Si, a metal oxide, or a metal nitride, wherein the chemical formula is MX b , wherein M is a metal or Si, and X is N or O, and wherein "b" ranges from about 0.4 to 2.5. For example, the substrate 48 may include SiO2, silicon nitride, aluminum oxide, hafnium oxide, or lanthanum oxide.

[0134] The material layer 50 can be patterned via a lithography process and is therefore also referred to as a patternable layer or a target layer. In one embodiment, the material layer 50 comprises a dielectric material, such as silicon oxide or silicon nitride. In another embodiment, the material layer 50 comprises a metal. In another embodiment, the material layer 50 comprises a semiconductor material.

[0135] In some embodiments, material layer 50 has different optical properties than the photoresist. For example, material layer 50 has a different n value, k value, or T value than the photoresist. In some embodiments, material layer 50 and the overlying photoresist layer have different etch resistances. In some embodiments, material layer 50 includes etch-resistant molecules. It should be understood that in other embodiments, substrate 48 and material layer 50 may each include other suitable material compositions.

[0136] The photoresist layer 60 can be formed by a spin coating process. In some embodiments, the photoresist layer 60 can be spin-coated onto the material layer 50 on the substrate 48. In many cases, when the substrate 48 is in wafer form, its diameter can be, for example, 1 inch (25 mm); 2 inches (51 mm); 3 inches (76 mm); 4 inches (100 mm); 5 inches (130 mm); or 125 mm (4.9 inches); 150 mm (5.9 inches, commonly referred to as "6 inches"); 200 mm (7.9 inches, commonly referred to as "8 inches"); 300 mm (11.8 inches, commonly referred to as "12 inches"); or 450 mm (17.7 inches, commonly referred to as "18 inches"). For example, the composition of the photoresist layer 60 is placed (dispensed) on the substrate 48. The photoresist layer 60 is then baked. In some embodiments, the thickness t0 of the photoresist layer 60 ranges from 20 nm to 40 nm, for example, from about 20 nm to about 30 nm.

[0137] In some embodiments, the photoresist composition of the photoresist layer 60 is a highly hydroxylated tin cluster, which is used for negative tone photoresist in EUV lithography or electron beam lithography. In some embodiments, the photoresist composition has a first photoresist of chemical formula (a1):

[0138] (R1Sn)6(OH) m O 4+y Chemical formula (a1). In chemical formula (a1), m may be greater than 8, and y may be (10-m) / 2. For example, m is 10, and the chemical formula of the first photoresist is (a1'):

[0139] (R1Sn)6(OH) 10 O4 chemical formula (a1'). In chemical formulas (a1) and (a1'), each R1 can be one of chemical formulas (b) to (e):

[0140] Wherein R in chemical formulas (b) to (e) is H, nC n H 2n+1 、iC n H 2n+1 or tC n H 2n+1 , and n may be 1 to 6. In some embodiments, the photoresist composition has the chemical formula (a2):

[0141] (R 1 Sn) 6-x (R 2 Sn) x (OH) m O4 chemical formula (a2). In chemical formula (a2), m can be greater than 8. For example, m is 10, and the chemical formula of the first photoresist is (a2'):

[0142] (R 1 Sn) 6-x (R 2 Sn) x (OH) 10 O4 chemical formula (a2) '. In chemical formulas (a2) and (a2'), each R 1 and R 2 Each of the chemical formulas (b) to (e) discussed above may be one of them. In some embodiments, the chemical formula (a1′) may be (n-BuSn)6(OH) 10 In some embodiments, the photoresist composition of the photoresist layer 60 may include a solvent. The first photoresist is dissolved in the solvent. The solvent may include an appropriate organic solvent for adjusting the viscosity. Such organic solvents include, but are not limited to, 4-methyl-2-pentanol. In some embodiments, the first photoresist may be used in an amount ranging from about 1 weight percent (wt%) to about 3 weight percent, for example, about 1.75 weight percent, based on the total solid weight of the photoresist composition.

[0143] Figure 4 FIG. 1 is a graph showing EUV contrast as a function of exposure dose of the photoresist layer 60 according to some embodiments. The vertical axis indicates the thickness of the photoresist layer 60. Figure 3 and Figure 4 , using a first photoresist composition including a photoresist having the chemical formula (a1) to form a photoresist layer 60. The photoresist layer 60 can be formed to a relatively thick thickness, for example, in the range of about 25 nm to about 30 nm at a low exposure dose of EUV radiation, for example, at about 30 mJ / cm 2 Up to 40mJ / cm 2 At an exposure dose of, for example, about 31.2 mJ / cm 2 .

[0144] In some embodiments where the first photosensitizer is represented by chemical formula (a1′), the first photoresist may be synthesized by the reaction shown in the following general reaction scheme 1-1:

[0145] Reaction Scheme 1-1

[0146] In Reaction Scheme 1-1, the first compound is represented by chemical formula (f1):

[0147] (RSn)6(R'CO2)8O4Cl2 chemical formula (f1), wherein each R and R' in chemical formula (f1) can each have chemical formulas (b) to (e) as described above, and R of R4N can be an alkyl group having 1 to 4 carbon atoms.

[0148] In some embodiments where the first photosensitizer is represented by chemical formula (a2), the first photoresist can be synthesized by the reaction shown in the following general reaction scheme 1-2:

[0149] Reaction Scheme 1-2

[0150]

[0151] In Reaction Scheme 1-2, the second compound is represented by chemical formula (f2):

[0152] (R 1 Sn) 6-x (R 2 Sn) x (R'CO2)8O4Cl2 chemical formula (f2), where R 1 and R 2 The photoresist layer 60 may have the chemical formulas (b) to (e) described above, and R of R4N may be an alkyl group having 1 to 4 carbon atoms. The structures of the chemical formulas (a1') and (a2') can be determined using thermogravimetric analysis (TGA), elemental analysis (EA), and nuclear magnetic resonance (NMR). In some embodiments, the surface roughness root mean square (RMS) of the photoresist layer 60 made of a first photoresist having a thickness of approximately 27±2 nm is approximately 0.2 nm to 0.4 nm, for example, 0.36 nm. In some embodiments, the photoresist layer 60 can achieve a small half-pitch pattern, for example, in the range of approximately 17 nm to 50 nm, while having a lower EUV radiation exposure dose and lower LER / LWR characteristics.

[0153] In some embodiments, the photoresist composition of the photoresist layer 60 can be a mixture. In other words, the photoresist composition includes a plurality of photoresists, each of which has a different composition. For example, the photoresist composition can further include a second photoresist mixed with the first photoresist. In some embodiments, the second photoresist is a 12-Sn oxide cluster. For example, the second photoresist has the chemical formula (g):

[0154] In formula (g), X can be OH or BF4. The second photoresist in formula (g) helps reduce blurry images in the patterned material layer 50. In some embodiments, the ratio of the first photoresist to the second photoresist ranges from about 10 to about 0.1. In some embodiments, the surface root-mean-square (RMS) roughness of the photoresist layer 60 having a thickness of approximately 28±2 nm, formed from the first and second photoresists, is approximately 0.1 nm to 0.4 nm, such as approximately 0.21 nm.

[0155] In some embodiments, the second photoresist is a 6-Sn cluster. For example, the second photoresist has a chemical formula (h):

[0156] (RSn)6(R'CO2)8O4Cl2 Chemical formula (h). In chemical formula (h), each R and R' can be one of chemical formulas (i1) to (i8):

[0157] And n in the chemical formula (i8) is 0 to 2. In some embodiments, each R and R' in the chemical formula (h) and R in the chemical formula (a1') can each be one of the chemical formulas (i1) to (i8). The second photoresist having the chemical formula (h) can provide improved line, edge, and space characteristics with a low half-pitch (HP), for example, at a low exposure dose (e.g., about 20 to about 30 mJ / cm 2 ) is about 14nm under EUV radiation of , and the second photoresist cannot form a thick film after EUV exposure. For example, the second photoresist may form a film with a thickness of less than about 10nm after EUV exposure. By mixing a first photoresist having chemical formula (a) with a second photoresist having chemical formula (h) to form a photoresist composition, the photoresist layer may have improved line edge roughness (LER) and line width roughness (LWR), and the photoresist layer may have a larger thickness, for example, greater than 15nm. In some embodiments, the ratio of the first photoresist to the second photoresist ranges from about 10 to about 0.1. In some embodiments, the RMS of the photoresist layer 60 with a thickness of about 27±2nm made of the first photoresist and the second photoresist may be about 0.1nm to about 0.4nm, for example, about 0.24nm. In some embodiments, chemical formula (h) may be (vinyl)Sn 6( (i-BuCO2)8O4Cl2.

[0158] In some embodiments, the second photoresist is a partially decarboxylated 6-Hf cluster. For example, the chemical formula of the second photoresist is (j):

[0159] Hf6O4(OH)8(R'CO2)8 chemical formula (j). In chemical formula (j), R' can be one of the above-mentioned chemical formulas (i1) to (i8). The second photoresist of chemical formula (j) can form a high-resolution pattern with a half-pitch of about 16 nm under low exposure dose of EUV radiation. The second photoresist of chemical formula (j) can form a thin film with a larger thickness, for example, in the range of about 15 nm to about 25 nm, and the formed thin film image is blurred. By mixing the first photoresist of chemical formula (a) with the second photoresist of chemical formula (j) to obtain a photoresist composition, the photoresist layer can be patterned into a pattern with high resolution while the exposure dose of EUV radiation is low. In some embodiments, the ratio of the first photoresist to the second photoresist ranges from about 10 to about 0.1. In some embodiments, the root-mean-square (RMS) of the surface roughness of the photoresist layer 60 with a thickness of about 24±2 nm made of the first photoresist and the second photoresist is about 0.2 nm to 0.6 nm, such as 0.5 nm. In some embodiments, chemical formula (j) can be Hf6O4(OH)8(C4H5O2)1(C5H9O2)7.

[0160] Figure 5 IR spectra of a first photoresist having chemical formula (a1) or (a2) and a second photoresist having chemical formula (g) according to some embodiments. Figure 5 Curve 1000 represents the IR spectrum of the first photoresist. Curve 1002 represents the IR spectrum of the photoresist having the chemical formula (k):

[0161] Curve 1004 represents the IR spectrum of the second photoresist having the chemical formula (g). -1 to about 740cm -1 In the wavelength range of 1000 and 1002, curves 1000 and 1002 have two main bands, while curve 1004 has three bands. Due to the additional Sn-O2CMe group, the wavelength of curve 1002 is around 500 cm -1 to about 740cm -1 Compared with curve 1004, curve 1000 is more similar to curve 1002, which indicates that the first photoresist may include a structure similar to the structure of chemical formula (k), that is, a trapezoidal structure, but does not include the spherical structure of chemical formula (g).

[0162] The photoresist layer 60 can provide high resolution under EUV exposure with a small EUV radiation exposure dose and can remain stable in air. In some embodiments, by using about 50 mJ / cm 2 to about 60mJ / cm 2 , such as about 56mJ / cm 2The photoresist layer 60 may be patterned into a pattern having a small half pitch by using an EUV radiation exposure dose within a range of about 10 nm to about 18 nm, such as about 16 nm.

[0163] 6A to 6D Graphs of EUV contrast as a function of exposure dose for four photoresist layers, each formed using: a first photoresist having chemical formula (a1); a mixture of the first photoresist having chemical formula (a1) and a second photoresist having chemical formula (g); a mixture of the first photoresist having chemical formula (a1) and a second photoresist having chemical formula (h); and a mixture of the first photoresist having chemical formula (a1) and a second photoresist having chemical formula (j), according to some embodiments. 6A to 6D The vertical axis in the figure refers to the thickness of the photoresist layer. Figure 6A In the embodiment, the first photoresist may be (n-BuSn)6(OH) 10 O4. Figure 6B In the embodiment, the second photoresist may be 12SnBF4. Figure 6C In the embodiment, the second photoresist can be (vinyl) Sn6((i-BuCO2)8O4Cl2(C1). Figure 6D In the embodiment, the second photoresist may be Hf6O4(OH)8(C4H5O2)1(C5H9O2)7, wherein the ratio of the first photoresist to Hf6O4(OH)8(C4H5O2)1(C5H9O2)7 is about 1:1 to 4:1, such as about 2:1. Figure 6A In some embodiments, the exposure dose E1 of EUV radiation required to form the photoresist layer using the first photoresist is in the range of about 500 μC / cm 2 to about 600μC / cm 2 , such as about 560μC / cm 2 .exist Figure 6B In some embodiments, the exposure dose E2 of EUV radiation required to form the photoresist layer using the mixture is in the range of about 1000 μC / cm 2 to about 1500μC / cm 2 , such as about 1280μC / cm 2 .exist Figure 6C In some embodiments, the exposure dose E3 of EUV radiation required to form the photoresist layer is in the range of about 1000 μC / cm 2 Up to 1500μC / cm 2 , such as about 1120μC / cm 2 .exist Figure 6D In some embodiments, the exposure dose E4 of EUV radiation required to form the photoresist layer is in the range of about 400 μC / cm 2 to about 600μC / cm 2, such as about 480μC / cm 2 .

[0164] In some embodiments, after forming the photoresist layer 60, the photoresist layer 60 is soft-baked. For example, the photoresist layer is soft-baked at a temperature ranging from about 60°C to about 180°C to make the thickness of the photoresist layer 60 range from about 20 nm to about 30 nm.

[0165] refer to Figure 2 Block S204 and Figure 7 The photoresist layer 60 is exposed to an exposure process 2000. In some embodiments, the photoresist layer 60 is exposed to ultraviolet radiation. In some embodiments, the photoresist layer 60 is exposed to EUV radiation at an exposure dose in the range of about 30 mJ / cm 2 to about 100mJ / cm 2 , about 40mJ / cm 2 to about 70mJ / cm 2 , about 50mJ / cm 2 to about 70mJ / cm 2 , such as about 56mJ / cm 2 In some embodiments, when a photoresist composition including a first photoresist and a second photoresist having the chemical formula (h) is applied to form the photoresist layer 60, the photoresist layer 60 may include chlorine atoms after the exposure process 2000. For example, the photoresist layer 60 may include SnO x Cl y , where 2x+y=4, instead of SnO2. In some embodiments, when a photoresist composition including a first photoresist and a second photoresist having the chemical formula (j) is applied to form the photoresist layer 60, the photoresist layer 60 may include hafnium atoms after the exposure process 2000. For example, the photoresist layer 60 may include Hf x Sn y O z , where 2x+4y=2z, not SnO2.

[0166] After the photoresist layer 60 is exposed, a post-exposure bake process is performed on the photoresist layer 60. For example, the post-exposure bake is performed at a temperature range of about 100° C. to about 180° C., such as about 110° C., for about 60 seconds to about 80 seconds, such as 60 seconds.

[0167] refer to Figure 2 Block S206 and Figure 8 The photoresist layer 60 is developed to form patterned photoresist 60A separated by concave portions. In some embodiments, the exposed photoresist layer 60 is developed using a developer.

[0168] There are two types of development processes: positive tone development (PTD) and negative tone development (NTD). The positive tone development process uses a positive developer, which generally refers to a developer that selectively dissolves and removes the exposed portions of the photoresist layer 60. The negative tone development process uses a negative developer, which generally refers to a developer that selectively dissolves and removes the unexposed portions of the photoresist layer 60. In some embodiments, the positive tone developer is a water-based developer, such as tetraalkylammonium hydroxide (TMAH). In some embodiments, the negative tone developer is an organic-based developer, such as 2-heptanone, a mixture of acetone and hexane, n-butyl acetate (n-BA), acetone, or the like. In some embodiments, the ratio of the acetone to n-hexane mixture can range from about 1 to about 10, such as 6. In some embodiments, after developing the photoresist layer 60, the patterned photoresist 60A is baked at a temperature in a range from about 80°C to about 100°C, for example, about 90°C.

[0169] Figure 9 、 Figure 10 、 Figure 11 、 Figure 12 、 Figure 13 、 Figure 14 、 Figure 15 、 Figure 16 and Figure 17A A perspective view illustrating additional fabrication processes for forming a semiconductor device 400 according to some embodiments of the present disclosure. Figure 17B 、 Figure 18 、 Figure 19 and Figure 20 A cross-sectional view illustrating additional fabrication processes for forming a semiconductor device 400 according to some embodiments of the present disclosure. Figure 9 . Figure 9 The initial structure includes a substrate 12, which is a portion of a semiconductor wafer. The substrate 12 is similar in structure to the substrate 12 previously described. Figure 3The substrate 48 discussed in the previous section is omitted in detail. A pad layer 16a and a mask layer 16b may be formed on the substrate 12. The pad layer 16a may be a thin film including silicon oxide, for example, formed using a thermal oxidation process. The pad layer 16a may serve as an adhesive layer between the substrate 12 and the mask layer 16b. In some embodiments, the mask layer 16b is formed of silicon nitride, for example, using low-pressure chemical vapor deposition (LPCVD). In other embodiments, the mask layer 16b is formed by thermal nitridation of silicon, plasma enhanced chemical vapor deposition (PECVD) or plasma anodic nitridation. The mask layer 16b is used as a hard mask in subsequent lithography processes. A spin coating method may be used to form a photoresist layer 18 on the mask layer 16b. The composition and formation method of the photoresist layer 18 are similar to those previously described in the previous section. Figure 3 The photoresist layer 18 is similar to the photoresist layer 60 discussed in

[15] and will not be described in detail herein. The photoresist layer 18 can form a thin film with a smooth surface morphology and low roughness. The photoresist layer 18 can achieve small half-pitch patterns, low exposure dose, and low line edge roughness (LER) / line width roughness (LWR) characteristics.

[0170] refer to Figure 10 , the photoresist layer 18 is patterned to form an opening 20 on the photoresist layer 18. Therefore, the mask layer 16b is exposed by the opening 20. Figure 11 Then, the mask layer 16 b and the pad layer 16 a are etched through the opening 20 to expose the base substrate 12 .

[0171] In some other embodiments, before forming the photoresist layer 18A, the photoresist layer 18A is formed on the substrate 12 without forming the pad layer 16a and the mask layer 16b (see FIG. Figure 12 ). That is, the photoresist layer 18A is in direct contact with the substrate 12. Figure 13 , and then patterning the photoresist layer 18A to form an opening 20A in the photoresist layer 18A. In some other embodiments, the substrate 12 is etched by three layers of photoresist (not shown), for example, the three layers are composed of a bottom layer, an intermediate layer and a top layer. The composition of the top layer is substantially the same as that of the photoresist layer 18. In some embodiments, the bottom layer is a polymer, for example, a polymer suitable for forming a bottom anti-reflective coating that does not contain silicon (Si). The composition of the intermediate layer should be selected so that the intermediate layer can be selectively etched without causing substantial etching to the bottom layer. In other words, the intermediate layer and the bottom layer include materials with different etching sensitivities to a particular etchant. In some embodiments, the intermediate layer is a polymer having a higher silicon content than the bottom layer.

[0172] refer to Figure 14 The exposed substrate 12 is then etched to form trenches 22. The portions of the substrate 12 between adjacent trenches 22 form semiconductor strips 102. The trenches 22 can be parallel, closely connected strips (as viewed from the top of the substrate 12). After etching the substrate 12, the photoresist layer 18 is removed. A cleaning step can then be performed to remove native oxide formed on the surface of the substrate 12. For example, dilute hydrofluoric acid (HF) can be used for cleaning.

[0173] Next, a dielectric material is filled into the trench 22 using a spin coating method, flowable CVD (FCVD) or similar method. In some embodiments, before forming the dielectric material, a dielectric liner (not shown) is formed in the trench 22. The liner can be a conformal layer formed using a deposition technique such as atomic layer deposition (ALD). Figure 15 As shown, the dielectric material is then planarized by chemical mechanical polishing (CMP) or the like to form shallow trench isolation (STI) regions 14. In some embodiments, during the planarization process, the mask layer 16b and the pad layer 16a (if present) are removed.

[0174] refer to Figure 16 , the STI regions 14 are recessed, so that the top portions of the semiconductor strips 102 protrude above the top surfaces of the adjacent STI regions 14, forming protruding fins 104. The etching may be performed using a dry etching process or a wet etching process.

[0175] Reference Figure 17A and Figure 17B , forming a dummy gate structure 106 on the top surface and sidewalls of the fin 104 . Figure 17B Description self-included Figure 17AThe cross-sectional view is obtained from a plane perpendicular to line BB in FIG. The formation of the dummy gate structure 106 includes sequentially depositing a blank-formed gate dielectric layer and a blank-formed dummy gate electrode layer on the fin 104, and then patterning the blank-formed gate dielectric layer and the blank-formed dummy gate electrode layer. As a result of the patterning, the dummy gate structure 106 includes a dummy gate dielectric layer 108 and a dummy gate electrode 109 on the dummy gate dielectric layer 108. The dummy gate dielectric layer 108 can be any acceptable dielectric layer, such as silicon oxide, silicon nitride, etc., or a combination thereof, and can be formed using any acceptable process, such as thermal oxidation, spin-on pressing, CVD, etc. The dummy gate electrode 109 can be any acceptable electrode layer, for example, composed of polysilicon, metal, etc., or a combination thereof. The gate electrode layer can be deposited by any acceptable deposition process, such as CVD, plasma enhanced CVD (PECVD), or a similar process. Each dummy gate structure 106 intersects a single or multiple fins 104. The longitudinal direction of the dummy gate structure 106 may be perpendicular to the longitudinal direction of each fin 104 .

[0176] The blank dummy gate electrode layer and the blank gate dielectric layer can be patterned using a three-layer structure. A bottom mask 112, a top mask 114, and a photoresist layer 215 are sequentially formed on the blank dummy gate electrode layer. The photoresist layer 215 may be similar in composition and formation method to the patterned photoresist 60A, as previously described. Figure 3 、 Figure 7 and Figure 8 As stated. Figure 3 、 Figure 7 and Figure 8 The composition and formation method of the photoresist layer 215 may be similar to those of the patterned photoresist 60A, and a detailed description thereof is omitted herein.

[0177] In another embodiment, the bottom mask 112 and the top mask 114 are made of one or more layers of SiO2, SiCN, SiON, Al2O3, SiN, or other suitable materials. The bottom mask 112 may be an oxide layer (e.g., silicon oxide), and the top mask 114 may be a nitride layer (e.g., silicon nitride). The bottom mask 112 and the top mask 114 may be deposited by processes such as CVD or spin-on-glass deposition, but any other acceptable process may be used.

[0178] Next, if Figure 18As illustrated, gate spacers 116 are formed on the sidewalls of the dummy gate structure 106. In some embodiments of the gate spacer formation step, a spacer material layer is deposited on the substrate 12. The spacer material layer can be a conformal layer and is subsequently etched to form the gate spacers 116. The spacer material layer is made of a low-k dielectric material. The dielectric constant (k value) of the low-k dielectric material is less than about 3.5. Suitable materials for the low-k dielectric material may include silicon oxide, silicon nitride, silicon oxynitride, or the like. By way of example and not limitation, the spacer material layer may be formed using a process such as a CVD process, a subatmospheric CVD (SACVD) process, a flowable CVD process, an ALD process, a physical vapor deposition (PVD) process, or other suitable process. An anisotropic etching process is then performed on the deposited spacer material layer to expose portions of the fin 104 not covered by the dummy gate structure 106 (e.g., the source / drain regions of the fin 104). This anisotropic etching process completely removes the portion of the spacer material layer directly above the dummy gate structure 106. Portions of the spacer material layer on the sidewalls of the dummy gate structure 106 may remain, forming gate spacers, which for simplicity are represented as gate spacers 116. In some embodiments, the gate spacers 116 can be used to offset subsequently formed doped regions, such as source / drain regions. The gate spacers 116 can also be used to design or modify the source / drain region profile.

[0179] exist Figure 19 In the embodiment of the present invention, after the gate spacer 116 is formed, a source / drain epitaxial structure 122 is formed on the source / drain regions of the protruding fin 104 that are not covered by the dummy gate structure 106 and the gate spacer 116. In some embodiments, the formation of the source / drain epitaxial structure 122 includes recessing the source / drain regions of the fin 104 and then epitaxially growing a semiconductor material in the recessed source / drain regions of the fin 104. The source / drain epitaxial structure 122 is located on opposite sides of the dummy gate structure 106.

[0180] The source / drain regions of the fins 104 can be recessed using an appropriate selective etching process that causes damage to the fins 104 but causes minimal damage to the gate spacers 116 and the top mask 114 of the dummy gate structure 106. For example, the fins 104 can be recessed using a dry chemical etch using a plasma source and an etchant gas. The plasma source can be an inductively coupled plasma (ICR) etch, a transformer coupled plasma (TCP) etch, an electron cyclotron resonance (ECR) etch, a reactive ion etch (RIE), or the like. The etchant gas can be fluorine, chlorine, bromine, or a combination thereof, which etches the protruding fins 104 faster than etching the gate spacers 116 and the top mask 114 of the dummy gate structure 106. In some other embodiments, recessing the protruding fins 104 may be accomplished by wet chemical etching, which etches the fins 104 faster than etching the gate spacers 116 and the top mask 114 of the dummy gate structure 106. In some other embodiments, recessing the protruding fins 104 may be accomplished by a combination of dry chemical etching and wet chemical etching.

[0181] Once the recesses are created in the source / drain regions of the fins 104, one or more epitaxial materials may be deposited on the protruding fins 104 using one or more epitaxial growth or epitaxial (epi) processes, thereby forming source / drain epitaxial structures 122 in the source / drain recesses of the fins 104. During the epitaxial growth process, gate spacers 116 confine the one or more epitaxial materials to the source / drain regions of the fins 104. In some embodiments, the lattice constant of the source / drain epitaxial structures 122 is different from the lattice constant of the fins 104. Therefore, the channel regions in the fins 104 and between the source / drain epitaxial structures 122 may be strained or stressed by the source / drain epitaxial structures 122, thereby improving carrier mobility and enhancing device performance of the semiconductor device. Epitaxy processes include CVD deposition techniques (e.g., PECVD, vapor-phase epitaxy (VPE), and / or ultra-high vacuum CVD (UHV-CVD)), molecular beam epitaxy, and / or other suitable processes. Epitaxy processes may utilize gaseous and / or liquid precursors that interact with the composition of the fins 104.

[0182] In some embodiments, the source / drain epitaxial structure 122 may comprise Ge, Si, GaAs, AlGaAs, SiGe, GaAsP, SiP, or other suitable materials. The source / drain epitaxial structure 122 may be in-situ doped during the epitaxial process by introducing dopant species, including p-type dopants (e.g., boron or BF2), n-type dopants (e.g., phosphorus or arsenic), and / or other suitable dopants (including combinations thereof). If the source / drain epitaxial structure 122 is not in-situ doped, an implantation process (i.e., junction implantation) is required to dope the source / drain epitaxial structure 122. In some exemplary embodiments, the source / drain epitaxial structure 122 in an n-type transistor comprises SiP, while the source / drain epitaxial structure 122 in a p-type transistor comprises GeSnB and / or SiGeSnB. In embodiments with different device types, a mask (e.g., photoresist) may be formed over the n-type device region while simultaneously exposing the p-type device region. A p-type epitaxial structure is then formed over the exposed fins 104 in the p-type device region. The photomask can then be removed. Subsequently, a photomask (e.g., photoresist) can be formed on the p-type device region while simultaneously exposing the n-type device region and forming an n-type epitaxial structure on the exposed fins 104 in the n-type device region. The photomask can then be removed.

[0183] After the source / drain epitaxial structure 122 is formed, an annealing process may be performed to activate the p-type dopants or n-type dopants in the source / drain epitaxial structure 122. The annealing process may be rapid thermal annealing (RTA), laser annealing, millisecond thermal annealing (MSA), etc.

[0184] Next, in Figure 20In the embodiment of the present invention, a contact etch stop layer (CESL) 123 and an interlayer dielectric (ILD) layer 126 are sequentially formed on the substrate 12. In some examples, the CESL 123 includes a silicon nitride layer, a silicon oxide layer, a silicon oxynitride layer, and / or other suitable materials having different etch selectivities than the ILD layer 126. The CESL 123 can be formed by a plasma-enhanced CVD (PECVD) process and / or other suitable deposition or oxidation processes. In some embodiments, the ILD layer 126 includes a material such as tetraethylorthosilicate (TEOS), undoped silicate glass, or doped silicon oxide, such as borophosphosilicate glass (BPSG), fused silica glass (FSG), phosphosilicate glass (PSG), boron doped silicon glass (BSG), and / or other suitable dielectric materials having different etch selectivities than the CESL 123. The ILD layer 126 may be deposited by a PECVD process or other suitable deposition techniques. In some embodiments, after forming the ILD layer 126 , the wafer may be annealed using a high thermal budget process.

[0185] In some embodiments, after forming the ILD layer 126, a planarization process may be performed to remove excess material from the ILD layer 126 and the CESL 123. For example, the planarization process may include a chemical mechanical planarization (CMP) process, which may remove portions of the ILD layer 126 and the CESL 123 that overlie the dummy gate structure 106. In some embodiments, the CMP process may also remove the bottom mask 112 and the top mask 114 (e.g., Figure 17A As shown), the dummy gate electrode 109 is exposed.

[0186] An etching process is performed to remove the dummy gate electrodes 109 and the dummy gate dielectric layer 108, thereby forming gate trenches between corresponding gate spacers 116. The dummy gate structures 106 are removed using a selective etching process (e.g., selective dry etching, selective wet etching, or a combination thereof) that etches material in the dummy gate structures 106 faster than it etches other materials (e.g., the gate spacers 116 and / or the ILD layer 126).

[0187] Afterwards, replacement gate structures 128 are formed in the gate trenches. The gate structures 128 can be the final gates of the FinFETs. Each final gate can be a high-k / metal gate (HKMG) stack, but can also be other compositions. In some embodiments, each gate structure 128 forms a gate associated with three sides of the channel region provided by the fin 104. In other words, each gate structure 128 surrounds the fin 104 on three sides. In various embodiments, the high-k / metal gate structure 128 includes a gate dielectric layer 130 lining the gate channel, a work function metal layer 132 formed on the gate dielectric layer 130, and a fill metal 134 formed on the work function metal layer 132 and filling the remaining gate channel. The gate dielectric layer 130 includes an interface layer (such as a silicon oxide layer) and a high-k gate dielectric layer on the interface layer. The high-k gate dielectric used and described herein includes a dielectric material with a high dielectric constant, for example, a dielectric material with a dielectric constant greater than that of thermal silicon oxide (~3.9). The work function metal layer 132 and / or fill metal 134 used in the high-k / metal gate structure 128 may include a metal, a metal alloy, or a metal silicide. The formation of the high-k / metal gate structure 128 may include multiple deposition processes to form various gate materials, one or more liner layers, and one or more CMP processes to remove excess gate material.

[0188] In some embodiments, the interfacial layer of the gate dielectric layer 130 may include a dielectric material such as silicon oxide (SiO2), HfSiO, or silicon oxynitride (SiON). The interfacial layer may be formed by chemical oxidation, thermal oxidation, atomic layer deposition (ALD), CVD, and / or other suitable methods. The high-k dielectric layer of the gate dielectric layer 130 may include hafnium oxide (HfO2). Alternatively, the gate dielectric layer 130 may include other high-k dielectrics, such as hafnium silicon oxide (HfSiO), hafnium silicon oxide nitride (HfSiON), hafnium tantalum oxide (HfTaO), hafnium titanium oxide (HfTiO), hafnium zirconium oxide (HfZrO), lanthanum oxide (LaO), zirconium oxide (ZrO), titanium oxide (TiO), tantalum oxide (Ta2O5), yttrium oxide (Y2O3), strontium titanium oxide (SrTiO3, STO), barium titanium oxide (BaTiO3, BTO), barium zirconium oxide (BaZrO), hafnium lanthanum oxide (HfLaO), lanthanum silicon oxide (LaSiO), aluminum silicon oxide (AlSiO), aluminum oxide (Al2O3), silicon nitride (Si3N4), nitride oxide (SiON), and combinations thereof.

[0189] The work function metal layer 132 may include a work function metal to provide a suitable work function for the high-k / metal gate structure 128. For n-type FinFETs, the work function metal layer 132 may include one or more n-type work function metals (N-metals). N-type work function metals may exemplarily include, but are not limited to, titanium aluminide (TiAl), titanium aluminum nitride (TiAlN), tantalum carbonitride (TaCN), hafnium (Hf), zirconium (Zr), titanium (Ti), tantalum (Ta), aluminum (Al), metal carbides (e.g., hafnium carbide (HfC), zirconium carbide (ZrC), titanium carbide (TiC), aluminum carbide (AlC), aluminides, and / or other suitable materials). On the other hand, for p-type FinFETs, the work function metal layer 132 may include one or more p-type work function metals (P-metals). The p-type work function metal may illustratively include, but is not limited to, titanium nitride (TiN), tungsten nitride (WN), tungsten (W), ruthenium (Ru), palladium (Pd), platinum (Pt), cobalt (Co), nickel (Ni), conductive metal oxides, and / or other suitable materials.

[0190] In some embodiments, the fill metal 134 may include, but is not limited to, tungsten, aluminum, copper, nickel, cobalt, titanium, tantalum, titanium nitride, tantalum nitride, nickel silicide, cobalt silicide, TaC, TaSiN, TaCN, TiAl, TiAlN, or other suitable materials.

[0191] In some embodiments, semiconductor device 400 includes other layers or features not specifically described. In some embodiments, back-end of line (BEOL) processing is performed on semiconductor device 400. In some embodiments, semiconductor device 400 is formed using a non-replacement metal gate process or a gate-first process.

[0192] Based on the above discussion, it can be seen that the present disclosure has advantages over conventional methods. However, it should be understood that other embodiments may provide additional advantages, not all advantages are necessarily disclosed herein, and no specific advantage is required for all embodiments. One advantage is that by coating a new photoresist composition comprising a first photoresist having chemical formula (a1) or chemical formula (a2) to form a photoresist layer, the photoresist layer can be formed into a thin film with a large smooth surface morphology with low roughness. The new photoresist composition can achieve small half-pitch patterns, low EUV radiation exposure doses, and low line edge roughness / line width roughness (LER) / (line width roughness, LWR) characteristics. Another advantage is that the first photoresist can be blended (blend or mix) with the second photoresist comprising chemical formula (g) to reduce the blurred image of the patterned material layer. Another advantage is that the first photoresist can be blended or mixed with the second photoresist comprising formula (h) to provide improved line edge roughness (LER) and line width roughness (LWR), and the photoresist layer can have a greater thickness. However, another advantage is that the first photoresist can be blended or mixed with the second photoresist comprising formula (j), and the photoresist layer can be patterned into a pattern with high resolution while using a low exposure dose of EUV radiation.

[0193] In some embodiments, a photoresist composition includes a first photoresist having a chemical formula (a1) or a chemical formula (a2):

[0194] (R1Sn)6(OH) m O 4+y Chemical formula (a1); and

[0195] (R 1 Sn) 6-x (R 2 Sn) x (OH) m O 4+y Chemical formula (a2), wherein each R1, R 1 and R 2 Each is one of the chemical formulas (b) to (e):

[0196] Wherein R in the chemical formula (b) to (e) is H, nC n H 2n+1 、iC n H 2n+1 or tC n H 2n+1, each m in the chemical formulas (a1) and (a2) is greater than 8, y may be (10-m) / 2, and n may be 1 to 6. In some embodiments, the chemical formula (a1) is (R1Sn)6(OH) 10 O4, and the chemical formula (a2) is (R 1 Sn) 6-x (R 2 Sn) x (OH) 10 In some embodiments, the photoresist composition further comprises a second photoresist mixed with the first photoresist, wherein the second photoresist has a chemical formula (g):

[0197] In some embodiments, the photoresist composition further comprises a second photoresist mixed with the first photoresist, wherein the second photoresist has a chemical formula (h):

[0198] (RSn)6(R'CO2)8O4Cl2 chemical formula (h), each R and R' is independently one of chemical formulas (i1) to (i8):

[0199] and n in the chemical formula (i8) is 0 to 2. In some embodiments, the photoresist composition further comprises a second photoresist mixed with the first photoresist, wherein the second photoresist has a chemical formula (j):

[0200] Hf6O4(OH)8(R'CO2)8 chemical formula (j), R' is one of chemical formulas (i1) to (i8):

[0201] And n in the chemical formula (i8) is 0 to 2.

[0202] In some embodiments, a lithography method includes the following steps: forming a target layer on a substrate; coating the target layer with a photoresist composition to form a photoresist layer; exposing the photoresist layer; developing the photoresist layer; and etching the target layer using the photoresist layer as an etching mask. The photoresist composition includes a first photoresist having a chemical formula (a1) or a chemical formula (a2):

[0203] (R1Sn)6(OH) m O 4+y Chemical formula (a1); and

[0204] (R 1 Sn) 6-x (R 2 Sn) x(OH) m O 4+y Chemical formula (a2), wherein each R1, R 1 and R 2 Each is one of the chemical formulas (b) to (e):

[0205] Wherein R in the chemical formula (b) to (e) is H, nC n H 2n+1 、iC n H 2n+1 or tC n H 2n+1 , each m in the chemical formulas (a1) and (a2) is greater than 8, y is (10-m) / 2, and n is 1 to 6; in some embodiments, the chemical formula (a1) is (R1Sn)6(OH) 10 O4, and the chemical formula (a2) is (R 1 Sn) 6-x (R 2 Sn) x (OH) 10 In some embodiments, the photoresist composition further comprises a second photoresist mixed with the first photoresist, wherein the second photoresist has a chemical formula (g):

[0206] In some embodiments, the photoresist composition further comprises a second photoresist mixed with the first photoresist, wherein the second photoresist has a chemical formula (h):

[0207] (RSn)6(R'CO2)8O4Cl2 chemical formula (h), each R and R' is independently one of chemical formulas (i1) to (i8):

[0208] In the chemical formula (i8), n is 0 to 2. In some embodiments, the photoresist layer is exposed so that the photoresist layer includes chlorine atoms. In some embodiments, the photoresist layer is exposed so that the photoresist layer includes SnO x Cl y , wherein 2x+y=4. In some embodiments, the photoresist composition further comprises a second photoresist mixed with the first photoresist, wherein the second photoresist has a chemical formula (j):

[0209] Hf6O4(OH)8(R'CO2)8 chemical formula (j), R' is one of chemical formulas (i1) to (i8):

[0210] In the chemical formula (i8), n is 0 to 2. In some embodiments, the exposure of the photoresist layer is performed so that the photoresist layer includes hafnium atoms. In some embodiments, the exposure of the photoresist layer is performed so that the photoresist layer includes Hf atoms. x Sn y O z , where 2x+4y=2z.

[0211] In some embodiments, an extreme ultraviolet lithography (EUVL) method includes the following steps. Turn on a droplet generator to shoot a metal droplet toward an excitation area in front of a collector. Turn on a laser source to emit a laser toward the excitation area so that the metal droplet is heated by the laser, thereby generating EUV radiation; by using one or more first optical elements, the EUV radiation is directed to a reflective mask in an exposure device. By using one or more second optical elements, the EUV radiation reflected from the reflective mask is directed to a substrate coated with a photoresist layer in the exposure device. The photoresist layer is formed by coating a photoresist composition including a first photoresist, the first photoresist having a chemical formula (a1) or a chemical formula (a2):

[0212] (R1Sn)6(OH) m O 4+y Chemical formula (a1); and

[0213] (R 1 Sn) 6-x (R 2 Sn) x (OH) m O 4+y Chemical formula (a2), wherein each R1, R 1 and R 2 Each of the chemical formulas (b) to (e):

[0214] Wherein R in the chemical formula (b) to (e) is H, nC n H 2n+1 、iC n H 2n+1 or tC n H 2n+1 , each m in the chemical formulas (a1) and (a2) is greater than 8, y is (10-m) / 2, and n is 1 to 6. In some embodiments, the photoresist composition further includes a second photoresist mixed with the first photoresist, the second photoresist having a chemical formula (g):

[0215] and X is OH or BF4. In some embodiments, the photoresist composition further comprises a second photoresist mixed with the first photoresist, the second photoresist having a chemical formula (h):

[0216] (RSn)6(R'CO2)8O4Cl2 chemical formula (h), each R and R' is independently one of chemical formulas (i1) to (i8):

[0217] and n in the chemical formula (i8) is 0 to 2. In some embodiments, directing the EUV radiation reflected from the reflective mask to the photoresist-coated substrate in the exposure apparatus is performed such that the photoresist comprises SnO x Cl y , wherein 2x+y=4. In some embodiments, the photoresist composition further comprises a second photoresist mixed with the first photoresist, wherein the second photoresist has a chemical formula (j):

[0218] Hf6O4(OH)8(R'CO2)8 chemical formula (j), R' is one of chemical formulas (i1) to (i8):

[0219] and n in the chemical formula (i8) is 0 to 2. In some embodiments, directing the EUV radiation reflected from the reflective mask to the photoresist-coated substrate in the exposure apparatus is performed so that the photoresist includes Hf x Sn y O z , where 2x+4y=2z.

[0220] The above content summarizes the features of several embodiments or examples so that those skilled in the art can better understand the various aspects of the present disclosure. Those skilled in the art should understand that they can easily use this disclosure as a basis for designing or modifying other processes and structures to achieve the same purposes and / or obtain the same advantages of the embodiments or examples described herein. Those skilled in the art should also recognize that such equivalent structures do not depart from the spirit and scope of the present disclosure, and they can make various changes, substitutions, and modifications to the present disclosure without departing from the spirit and scope of the present disclosure.

Claims

1. A photoresist composition, characterized in that: include: A first photoresist, wherein the first photoresist has a chemical formula (a1) or a chemical formula (a2): (R1Sn)6(OH) m O 4+y Chemical formula (a1); and (R 1 Sn) 6-x (R 2 Sn) x (OH) m O 4+y Chemical formula (a2), wherein each R1, R 1 and R 2 Each is one of the chemical formulas (b) to (e): Wherein R in the chemical formula (b) to (e) is H, nC n H 2n+1 、iC n H 2n+1 or tC n H 2n+1 , each m in the chemical formulas (a1) and (a2) is greater than 8, y is (10-m) / 2, and n is 1 to 6.

2. The photoresist composition according to claim 1, wherein Wherein the chemical formula (a1) is (R1Sn)6(OH) 10 O4, and the chemical formula (a2) is (R 1 Sn) 6-x (R 2 Sn) x (OH) 10 O4.

3. The photoresist composition according to claim 1, wherein Further including: A second photoresist is mixed with the first photoresist, wherein the second photoresist has a chemical formula (g): And X in the chemical formula (g) is OH or BF4.

4. The photoresist composition according to claim 1, wherein Further including: A second photoresist mixed with the first photoresist, wherein the second photoresist has a chemical formula (h): (RSn)6(R'CO2)8O4Cl2 chemical formula (h), each R and R' is independently one of chemical formulas (i1) to (i8): And n in the chemical formula (i8) is 0 to 2.

5. A lithography method, characterized in that: The following steps are involved: forming a target layer on a substrate; A photoresist composition is coated on the target layer to form a photoresist layer, wherein the photoresist composition comprises a first photoresist having a chemical formula (a1) or a chemical formula (a2): (R1Sn)6(OH) m O 4+y Chemical formula (a1); and (R 1 Sn) 6-x (R 2 Sn) x (OH) m O 4+y Chemical formula (a2), wherein each R1, R 1 and R 2 Each is one of the chemical formulas (b) to (e): Wherein R in the chemical formula (b) to (e) is H, nC n H 2n+1 、iC n H 2n+1 or tC n H 2n+1 , each m in the chemical formulas (a1) and (a2) is independently greater than 8, y is (10-m) / 2, and n is 1 to 6; exposing the photoresist layer; developing the photoresist layer; and The target layer is etched using the photoresist layer as an etching mask.

6. The lithography method according to claim 5, wherein: Wherein the chemical formula (a1) is (R1Sn)6(OH) 10 O4, and the chemical formula (a2) is (R 1 Sn) 6-x (R 2 Sn) x (OH) 10 O4.

7. An extreme ultraviolet lithography method, characterized in that: The following steps are involved: Turning on a droplet generator to eject a metal droplet toward an excitation area in front of a collector; Turning on a laser source to emit a laser toward the excitation region so that the metal droplet is heated by the laser, thereby generating extreme ultraviolet radiation; directing the EUV radiation toward a reflective mask in an exposure apparatus using one or more first optical elements; and directing the EUV radiation reflected from the reflective mask toward a substrate coated with a photoresist layer in the exposure apparatus using one or more secondary optical elements, The photoresist layer is formed by coating a photoresist composition comprising a first photoresist having a chemical formula (a1) or a chemical formula (a2): (R1Sn)6(OH) m O 4+y Chemical formula (a1); and (R 1 Sn) 6-x (R 2 Sn) x (OH) m O 4+y Chemical formula (a2), wherein each R1, R 1 and R 2 Each of the chemical formulas (b) to (e): Wherein R in the chemical formula (b) to (e) is H, nC n H 2n+1 、iC n H 2n+1 or tC n H 2n+1 , each m in the chemical formulas (a1) and (a2) is greater than 8, y is (10-m) / 2, and n is 1 to 6.

8. The extreme ultraviolet lithography method according to claim 7, wherein: The photoresist composition further comprises a second photoresist mixed with the first photoresist, wherein the second photoresist has a chemical formula (g): And X is OH or BF4.

9. The extreme ultraviolet lithography method according to claim 7, wherein: The photoresist composition further comprises a second photoresist mixed with the first photoresist, wherein the second photoresist has a chemical formula (h): (RSn)6(R'CO2)8O4Cl2 chemical formula (h), each R and R' is independently one of chemical formulas (i1) to (i8): And n in the chemical formula (i8) is 0 to 2.

10. The extreme ultraviolet lithography method according to claim 9, wherein: The step of directing the extreme ultraviolet radiation reflected from the reflective mask to the photoresist-coated substrate in the exposure apparatus is performed so that the photoresist includes SnO x Cl y , where 2x+y=4.

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