Data communication task processing method and device, chip, network interface card, computer equipment, readable storage medium and program product

Abstract

The application relates to a data communication task processing method and device, computer equipment, a computer readable storage medium and a computer program product. The method comprises the following steps: receiving each data communication task notification sent by each driver, and distributing each data communication task to a corresponding CPU core based on each data communication task notification, wherein each CPU core is located in a data processing unit; and each data communication task is processed in parallel by each CPU core. In the method, the CPU cores in the data processing unit process the communication tasks, multiple CPU cores can send or receive data in parallel, the bandwidth for sending data to the DPE or receiving data from the DPE is improved, the utilization rate of the DPE bandwidth is increased, and the utilization rate of the DPU is also improved.

Description

Technical Field

[0001] This application relates to the field of communication technology, and in particular to a data communication task processing method, apparatus, chip, network interface card, computer equipment, computer-readable storage medium, and computer program product. Background Technology

[0002] RDMA (Remote Direct Memory Access) aims to solve the latency problem of end-to-end data processing in network transmission. It is a technology that bypasses the operating system of a remote host to access data in its memory. Because it does not go through the operating system, it not only saves a lot of CPU resources, but also improves system throughput and reduces network communication latency, making it particularly suitable for widespread use in large-scale parallel computer clusters.

[0003] In traditional technology, in the design of a DPU (Data Processing Unit), the communication bandwidth of the DPE (Dataplane Process Engine, a hardware architecture data path engine) is proportionally allocated to the VPE (Virtio Process Engine, a hardware architecture functional subsystem supporting network data processing, such as Ethernet data processing, for convenience, translated as virtual process engine) and the RPE (RDMA Process Engine, a hardware architecture functional subsystem supporting RDMA, for convenience, translated as RDMA process engine), usually in a 1:1 ratio. For example, the communication bandwidth of the DPE is 400G, and the communication bandwidth allocated to the RPE is 200G. The RPE is responsible for handling RDMA communication tasks, and the VPE is responsible for handling Ethernet communication tasks. Under this design, the bandwidth of the DPU used for RDMA communication will not exceed the bandwidth allocated to the RPE.

[0004] However, when RDMA has a high bandwidth requirement and Ethernet has a low bandwidth requirement, or vice versa, the bandwidth requirement of the high-bandwidth requirement cannot be met, resulting in a decrease in the utilization rate of the DPU. Summary of the Invention

[0005] Therefore, it is necessary to provide a data communication task processing method, apparatus, chip, network interface card, computer equipment, computer-readable storage medium, and computer program product that can improve the utilization of the DPU in order to address the above-mentioned technical problems.

[0006] In a first aspect, this application provides a data communication task processing method, the method comprising:

[0007] The system receives data communication task notifications from each driver and allocates each data communication task to a corresponding CPU core based on the data communication task notifications. Each CPU core is located in the data processing unit.

[0008] Each of the data communication tasks is processed in parallel by each of the CPU cores.

[0009] In one embodiment, before allocating each data communication task to a corresponding CPU core based on the notification of each data communication task, the method further includes:

[0010] Receive data traffic configuration instructions;

[0011] The proportion of CPU cores for each type of data communication task is configured based on the data traffic configuration instruction. The larger the traffic of the corresponding type of data communication task, the larger the proportion of the corresponding CPU cores.

[0012] In one embodiment, before allocating each data communication task to a corresponding CPU core based on the notification of each data communication task, the method further includes:

[0013] Get the traffic in the task queue corresponding to each driver, where different drivers correspond to different types of data communication tasks in their respective task queues.

[0014] Based on the traffic in the task queue corresponding to the driver, the proportion of CPU cores corresponding to each type of data communication task is adjusted, wherein the greater the traffic in the task queue corresponding to the driver, the greater the proportion of CPU cores corresponding to the data communication task.

[0015] In one embodiment, the parallel processing of each of the data communication tasks by each of the CPU cores includes:

[0016] Each of the CPU cores executes its corresponding data communication task in parallel based on the following steps:

[0017] Based on the data communication task, a corresponding subtask is generated, and the subtask is assigned to the corresponding direct data access hardware unit, wherein each direct data access hardware unit processes the subtask corresponding to the data communication task in parallel.

[0018] The subtask is processed by the direct data access hardware unit, and the processing result of the subtask is returned by the direct data access hardware unit.

[0019] Based on the processing results of the sub-tasks, the data communication task is processed.

[0020] In one embodiment, the subtask includes at least one of the following: a first task for reading task information of the data communication task, a second task for performing data read / write operations based on the data communication address, and a third task for informing the driver that the data communication task has been completed; the step of processing the subtask through the direct data access hardware unit and receiving the processing result of the subtask returned by the direct data access hardware unit includes at least one of the following:

[0021] The first task is assigned to the corresponding direct data access hardware unit, and each direct data access hardware unit is used to read the task information of the data communication task from the host memory in parallel; the task information of the data communication task is read through the direct data access hardware unit, and the processing result of the first task is returned to the corresponding CPU core;

[0022] The second task is assigned to the corresponding direct data access hardware unit; the direct data access hardware unit performs data read and write operations on the host memory based on the data communication task to obtain the communication data corresponding to the data communication task or write the communication data corresponding to the data communication task into the host memory, and returns the processing result of the second task to the corresponding CPU core.

[0023] The third task is assigned to the corresponding direct data access hardware unit. The direct data access hardware unit stores the information of the completed data communication task in the host memory and returns the processing result of the third task to the corresponding CPU core. The information of the completed data communication task in the host memory is used for each driver to read.

[0024] In one embodiment, when the data communication task is of type RDMA, the direct data access hardware unit includes at least one of the hardware unit supporting direct data access in the RDMA communication engine and the hardware unit supporting direct data access in the data processing unit.

[0025] When the data communication task is of Ethernet type, the direct data access hardware unit includes at least one of the hardware unit in the Ethernet communication engine that supports direct data access and the hardware unit in the data processing unit that supports direct data access.

[0026] In one embodiment, the method further includes:

[0027] The CPU core sends communication data to the data path engine or receives communication data sent by the data path engine.

[0028] Secondly, this application also provides a data communication task processing apparatus, the apparatus comprising:

[0029] The receiving module is used to receive data communication task notifications sent by each driver, and allocate each data communication task to the corresponding CPU core based on each data communication task notification, wherein each CPU core is located in the data processing unit.

[0030] The processing module is used to process each of the data communication tasks in parallel through each of the CPU cores.

[0031] Thirdly, this application also provides a chip including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the steps of the above-described method.

[0032] Fourthly, this application also provides a network interface card, including the chip described above and multiple interfaces.

[0033] The chip processes data or communicates with the outside world through the interface.

[0034] Fifthly, this application also provides a computer device including the aforementioned network interface card, which is used for processing data or external communication.

[0035] Sixthly, this application also provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps of the above-described method.

[0036] In a seventh aspect, this application also provides a computer program product, including a computer program that, when executed by a processor, implements the steps of the above-described method.

[0037] The aforementioned data communication task processing method, apparatus, chip, network interface card, computer equipment, computer-readable storage medium, and computer program product receive data communication task notifications sent by various drivers, and allocate each data communication task to a corresponding CPU core based on each data communication task notification. Each CPU core is located in a data processing unit. The data communication tasks are processed in parallel by each CPU core. The CPU cores in the data processing unit process the communication tasks, and multiple CPU cores can send or receive data in parallel, thereby increasing the bandwidth for sending data to or receiving data from the DPE, increasing the utilization rate of the DPE bandwidth, and also improving the utilization rate of the DPU. Attached Figure Description

[0038] To more clearly illustrate the technical solutions in the embodiments of this application or related technologies, the drawings used in the description of the embodiments of this application or related technologies will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0039] Figure 1 A schematic diagram illustrating the process of sending data for application services in RDMA using a DPU in traditional technology;

[0040] Figure 2 A schematic diagram illustrating the process of receiving data for application services in RDMA using a DPU in traditional technology;

[0041] Figure 3 This is a topology diagram of a GPU cluster in traditional technology;

[0042] Figure 4 This is an application environment diagram of a data communication task processing method in one embodiment;

[0043] Figure 5 This is a flowchart illustrating a data communication task processing method in one embodiment;

[0044] Figure 6 This is a schematic diagram of the data sending process of an application service in one embodiment;

[0045] Figure 7 This is a schematic diagram of the application service receiving data process in one embodiment;

[0046] Figure 8 This is a structural block diagram of a data communication task processing device in one embodiment;

[0047] Figure 9 This is an internal structural diagram of a computer device in one embodiment. Detailed Implementation

[0048] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0049] Combination Figure 1 As shown, Figure 1 This is a schematic diagram illustrating the process of application service sending data in RDMA using a DPU in traditional technology. In this embodiment, the process of application service sending data includes:

[0050] 1) The application service writes the data to be sent, send-data, to the host memory, HOST-MEM, and records the address, host-mem-send-addr.

[0051] 2) The application service sends a sending task rdma-send-wqe through the RDMA driver, and the sending task rdma-send-wqe specifies the data sent in the sending address host-mem-send-addr as send-data; the RDMA driver writes the sending task rdma-send-wqe into the host memory HOST-MEM.

[0052] 3) The RDMA driver notifies the RPE that there is a new task.

[0053] 4) RPE generates the first read data task dma-task1 and distributes it to its internal first direct data access hardware unit DMA. The first read data task dma-task1 is used to read the send task rdma-send-wqe.

[0054] 5) The first direct data access hardware unit (DMA) inside the RPE executes the first read data task dma-task1 to read the task information of the send task rdma-send-wqe; the first direct data access hardware unit (DMA) inside the RPE notifies the RPE that the read data task dma-task1 is complete.

[0055] 6) RPE parses the send task rdma-send-wqe, finds that it needs to read data send-data from the address host-mem-send-addr, and RPE generates a second read data task dma-task2 to distribute to its internal DMA.

[0056] 7) The DMA inside the RPE executes the second read data task dma-task2, which reads the data send-data from the address host-mem-send-addr. The first direct data access hardware unit DMA inside the RPE notifies the RPE that the second read data task dma-task2 has been completed.

[0057] 8) RPE continues to execute the send task rdma-send-wqe, sending the data to be sent to DPE.

[0058] 9) RPE generates the completion status CQE corresponding to the sending task rdma-send-wqe. RPE generates the first write data task dma-task3 and distributes it to the first direct data access hardware unit DMA inside it. The first write data task dma-task3 is used to write the completion status CQE to the host memory HOST-MEM.

[0059] 10) The first direct data access hardware unit (DMA) inside the RPE executes the first write data task dma-task3, writing CQE to the host memory HOST-MEM; the first direct data access hardware unit (DMA) inside the RPE notifies the RPE that the first write data task dma-task3 has been completed.

[0060] 11) The RMDA driver reads the completion status CQE from the host memory HOST-MEM and sends the task rdma-send-wqe to end.

[0061] Combination Figure 2 As shown, Figure 2 This is a schematic diagram illustrating the process of application service receiving data in RDMA implemented by the DPU in traditional technology. In this embodiment, the process of application service receiving data includes:

[0062] 1) The application service requests a space from the host memory HOST-MEM to store the received data and records its address host-mem-recv-addr.

[0063] 2) The application service issues a receive task rdma-recv-wqe through the RDMA driver. The receive task rdma-recv-wqe specifies that the received data should be placed in host-mem-recv-addr. The RDMA driver writes the receive task rdma-recv-wqe into the host memory HOST-MEM.

[0064] 3) The RDMA driver notifies the RPE that there is a new task.

[0065] 4) The RPE receives the receive data recv-data from the DPE.

[0066] 5) RPE generates the third read data task dma-task4 and distributes it to its internal first direct data access hardware unit DMA to read the task information of the receive task rdma-recv-wqe.

[0067] 6) The first direct data access hardware unit (DMA) inside the RPE executes the third read data task dma-task4 to read the task information of the receive task rdma-recv-wqe; the first direct data access hardware unit (DMA) inside the RPE notifies the RPE that the third read data task dma-task4 has been completed.

[0068] 7) RPE parses the receive task rdma-recv-wqe and finds that the received data recv-data needs to be written to the address host-mem-recv-addr. RPE generates a second write data task dma-task5 and distributes it to its internal first direct data access hardware unit DMA.

[0069] 8) The first direct data access hardware unit (DMA) inside the RPE executes the second write data task dma-task5, writing the received data recv-data to the address host-mem-recv-addr; the first direct data access hardware unit (DMA) inside the RPE notifies the RPE that the second write data task dma-task5 has been completed.

[0070] 9) RPE generates the completion status CQE corresponding to the receive task rdma-recv-wqe, and RPE generates the third write data task dma-task6 and distributes it to the first direct data access hardware unit DMA inside it, and writes the completion status CQE to the host memory HOST-MEM.

[0071] 10) The first direct data access hardware unit (DMA) inside the RPE executes the third write data task dma-task6 and writes the completion status CQE to the host memory (HOST-MEM); the first direct data access hardware unit (DMA) inside the RPE notifies the RPE dma-task6 that it is complete.

[0072] 11) The RMDA driver reads the completion status CQE from the host memory HOST-MEM, and the receive task rdma-recv-wqe ends.

[0073] Among them, the combination Figure 3 As shown, Figure 3This is a traditional GPU cluster topology diagram. In current DPU designs, the communication bandwidth of the DPE is proportionally allocated to the VPE and RPE, typically in a 1:1 ratio. For example, the DPE has a communication bandwidth of 400G, and the communication bandwidth allocated to the RPE is 200G. The RPE is responsible for handling RDMA communication tasks, while the VPE is responsible for handling Ethernet communication tasks. In this design, the bandwidth used by the DPU for RDMA communication will not exceed the bandwidth allocated to the RPE. GPUs directly connected via a switch (e.g., GPU1 in Server #1 and GPU1 in Server #2) require significant bandwidth for communication. Data exchange is typically accomplished via RDMA communication. In this scenario, there is a high bandwidth requirement for RDMA communication and a lower requirement for Ethernet communication bandwidth. For example, if 300G of RDMA traffic is needed and 100G of Ethernet traffic is required, the RDMA bandwidth cannot be met, and vice versa. If the resources in the existing DPU (each GPU includes at least one DPU for data transmission) can be fully utilized to provide greater communication bandwidth for this application scenario, the utilization efficiency of the current DPU can be improved, the cost of building the GPU cluster can be reduced, and there is no need to purchase new hardware to expand RDMA or Ethernet traffic.

[0074] The data communication task processing method provided in this application embodiment can be applied to, for example, Figure 4 In the application environment shown, the host communicates with the outside world through the data processing unit (DPU). The host can use at least one communication method, each corresponding to a different type of data communication task. For example, the communication method may include at least one of RDMA and Ethernet communication methods. In other embodiments, other communication methods may also be included, which are not specifically limited here. RDMA communication corresponds to RDMA type data communication tasks, and Ethernet communication corresponds to Ethernet type data communication tasks. The host includes drivers corresponding to each communication method; for example, RDMA communication corresponds to an RDMA driver, and Ethernet communication corresponds to a network driver. The DPU includes a large number of high-performance CPU cores; for example, a certain DPU chip may have as many as 18 ARM N2 cores. Therefore, this application adds an expansion service, which can implement the corresponding communication protocol. For example, the expansion service can implement the RDMA protocol, including RoCE v2, RoCE v1, and iWARP, all of which are based on Ethernet-based RDMA transmission. In other embodiments, if the communication method includes other types, the communication protocol may also include other types, which will not be elaborated here.

[0075] The Data Processing Unit (DPU) can utilize these CPU cores and expansion services to process corresponding data communication tasks in parallel, thereby improving the DPU's ability to process data communication tasks in parallel.

[0076] The capacity expansion service can receive data communication task notifications sent by the corresponding drivers and allocate corresponding CPU cores to process the data communication task notifications. In this way, the mapping relationship between each CPU core and the corresponding type of data communication task can be predetermined, or the proportion of CPU cores corresponding to each type of data communication task can be predetermined. In another embodiment, the proportion of CPU cores corresponding to each type of data communication task can be determined based on the number of data communication tasks in the data communication task queue corresponding to each driver, so as to dynamically allocate corresponding CPU cores to process data communication tasks.

[0077] In this way, the VPE and RPE, which originally handled data communication tasks, are no longer responsible for handling the corresponding data communication tasks. Instead, they only use the direct data access hardware units in their respective hardware parts for data access. The retransmission control and other algorithms in the communication protocol are also all implemented by the CPU core.

[0078] To achieve bandwidth complementarity, this application utilizes the direct data access hardware unit within the DPU to handle a portion of the data read / write tasks, executing these tasks in parallel with the direct data access hardware units in the VPE and RPE. The direct data access hardware unit within the DPU may include SDMA, etc., and is not specifically limited here.

[0079] In the above application scenarios, multiple CPU cores send or receive data in parallel, increasing the bandwidth for sending data to or receiving data from the DPE and solving the problem of limited communication bandwidth between the RPE and the DPE.

[0080] In one exemplary embodiment, such as Figure 5 As shown, a data communication task processing method is provided, which is applied to... Figure 4 Taking the data processing unit (DPU) as an example, the explanation includes the following steps S502 to S504. Wherein:

[0081] S502: Receives data communication task notifications sent by each driver, and allocates each data communication task to the corresponding CPU core based on the data communication task notification. Each CPU core is located in the data processing unit.

[0082] Among them, combined Figure 4 As shown, Figure 4 The system includes two communication methods, therefore the host contains two drivers: an RDMA driver and a network driver. Both drivers can send data communication task notifications to the expansion service. Figure 4 The example described here uses only the RDMA driver, but those skilled in the art will understand that when the Ethernet communication method also uses the expansion service described in this application, the network driver can also send data communication tasks to the expansion service.

[0083] The data communication tasks sent by different drivers can carry the corresponding communication type, so that different drivers can share a single expansion service. The expansion service allocates the corresponding CPU cores to the data communication tasks according to the communication type.

[0084] In other embodiments, each driver can correspond to a scaling service, so that the data communication task does not carry a communication type, and the corresponding scaling server allocates the corresponding CPU core to the data communication task.

[0085] The CPU core is located in the Data Processing Unit (DPU). For example, some DPU chips have as many as 18 ARM N2 cores, which are used to process the corresponding data communication tasks.

[0086] When using a capacity expansion service, allocating each data communication task to the corresponding CPU core can be done by determining the corresponding CPU core based on the type of the data communication task.

[0087] In other embodiments, allocating each data communication task to the corresponding CPU core can be done by first obtaining the performance parameters of the CPU core, such as the number of data communication tasks currently being processed by the CPU core, resource utilization, etc., and then obtaining the CPU core whose performance parameters meet the requirements, such as selecting the CPU core with the fewest data communication tasks or the lowest resource utilization. In other embodiments, other allocation rules can also be used, which are not specifically limited here.

[0088] S504: Processes data communication tasks in parallel through each CPU core.

[0089] The CPU cores in the Data Processing Unit (DPU) are independent of each other, so they can process each data communication task in parallel. This improves the processing efficiency of data communication tasks compared to only VPE or RPE processing data communication tasks. Multiple CPU cores can send or receive data in parallel, increasing the bandwidth for sending data to or receiving data from DPE, increasing the utilization of DPE bandwidth, and also improving the utilization of DPU.

[0090] The above data communication task processing method receives data communication task notifications sent by each driver and allocates each data communication task to a corresponding CPU core based on the notification. Each CPU core is located in the data processing unit. Each data communication task is processed in parallel by each CPU core. The CPU core in the data processing unit processes the communication tasks, and multiple CPU cores can send or receive data in parallel, which increases the bandwidth for sending data to or receiving data from the DPE, increases the utilization rate of the DPE bandwidth, and also improves the utilization rate of the DPU.

[0091] The relationship between the CPU cores and the corresponding data communication tasks in the expansion service of this application can be a pre-configured static relationship or a static relationship generated based on real-time data traffic.

[0092] In one optional embodiment, before allocating each data communication task to the corresponding CPU core based on the notification of each data communication task, the method further includes: receiving a data traffic configuration instruction; configuring the proportion of CPU cores corresponding to each type of data communication task based on the data traffic configuration instruction, wherein the larger the traffic of the corresponding type of data communication task, the larger the proportion of the corresponding CPU core.

[0093] Data traffic configuration commands can be used to pre-determine the proportion of CPU cores for each type of data communication task before data communication begins. This allows users to predict future traffic; if traffic for a certain type of data communication increases, the proportion of the corresponding CPU cores is increased; if traffic for a certain type of data communication decreases, the proportion of the corresponding CPU cores is decreased. This ensures that data traffic and CPU cores are matched, making full use of the CPU core resources in the DPU.

[0094] In the above embodiments, the number of CPU cores corresponding to different network communication types is pre-configured, which can be configured according to user needs, avoiding insufficient bandwidth and improving the utilization of DPU.

[0095] In one optional embodiment, before allocating each data communication task to the corresponding CPU core based on each data communication task notification, the method further includes: obtaining the traffic in the task queue corresponding to each driver, wherein different driver-corresponding task queues correspond to different types of data communication tasks; and adjusting the proportion of CPU cores corresponding to each type of data communication task based on the traffic in the driver-corresponding task queue, wherein the greater the traffic in the driver-corresponding task queue, the greater the proportion of CPU cores corresponding to the data communication task.

[0096] In this application, different communication methods correspond to different drivers, different drivers correspond to different task queues, and the types of data communication tasks stored in each task queue are different.

[0097] The scaling service can obtain the traffic in the task queue corresponding to each driver, that is, the number of data communication tasks in the task queue corresponding to the driver. Then, based on the traffic in the task queue corresponding to each driver, the scaling service adjusts the proportion of CPU cores corresponding to each type of data communication task. For example, if the traffic in the task queue corresponding to a driver increases within a certain period of time, the scaling service will increase the proportion of CPU cores corresponding to the data communication tasks corresponding to that driver. Similarly, if the traffic in the task queue corresponding to a driver decreases within a certain period of time, the scaling service will decrease the proportion of CPU cores corresponding to the data communication tasks corresponding to that driver. This can make full use of the CPU cores in the Data Processing Unit (DPU) and improve the processing efficiency of data communication tasks.

[0098] In the above embodiments, the proportion of CPU cores corresponding to each type of data communication task is dynamically adjusted based on the traffic in the task queue corresponding to the driver, combined with... Figure 4 It can dynamically adjust the ratio of Ethernet traffic to RDMA traffic according to user needs, thereby improving the utilization rate of the data processing unit (DPU).

[0099] In one optional embodiment, each data communication task is processed in parallel by each CPU core, including: each CPU core executes the corresponding data communication task in parallel based on the following steps: generating corresponding subtasks based on the data communication task and assigning the subtasks to corresponding direct data access hardware units, wherein each direct data access hardware unit processes the subtasks corresponding to the data communication task in parallel; processing the subtasks through the direct data access hardware units and receiving the processing results of the subtasks returned by the direct data access hardware units; and processing the data communication task based on the processing results of the subtasks.

[0100] Each CPU core executes its corresponding data communication task in parallel. When executing a data communication task, each CPU core needs to generate a corresponding subtask, which includes data read and write tasks. These data read and write tasks are executed through the corresponding direct data access hardware unit.

[0101] In some alternative embodiments, the direct data access hardware unit includes a hardware unit in the data processing unit that supports direct data access or a hardware unit in the original communication engine that supports direct data access.

[0102] Optionally, if the data communication task is of type RDMA, the direct data access hardware unit includes at least one of the hardware units in the RDMA communication engine that support direct data access and the hardware units in the data processing unit that support direct data access; if the data communication task is of type Ethernet, the direct data access hardware unit includes at least one of the hardware units in the Ethernet communication engine that support direct data access and the hardware units in the data processing unit that support direct data access.

[0103] The hardware unit that supports direct data access in the data processing unit may include SDMA (System Direct Memory Access). In other embodiments, it may also include other hardware units that support direct data access, without specific limitations.

[0104] The hardware unit supporting direct data access in the RDMA communication engine may include DMA (Direct Memory Access). In other embodiments, it may also include other hardware units supporting direct data access, without specific limitations.

[0105] Among them, combined Figure 4 The RPE receives data read / write tasks from the expansion service; the RPE uses its internal DMA to complete the data read / write tasks from the expansion service; after completing the data read / write tasks, the RPE sends a notification to the expansion service; the RPE is no longer responsible for RDMA data transmission and reception tasks; the SDMA receives data read / write tasks from the expansion service; after completing the data read / write tasks, the SDMA can send a notification to the expansion service.

[0106] In this application, when the CPU core executes the corresponding data communication task, it can generate a corresponding subtask. In some optional embodiments, the subtask includes at least one of the following: a first task for reading task information of the data communication task, a second task for performing data read and write operations based on the data communication address, and a third task for informing the driver that the data communication task has been completed.

[0107] The CPU core can allocate these subtasks to corresponding direct data access (DDMA) hardware units for execution. The allocation rules can include at least one of the task type and task quantity. For example, based on the task type corresponding to the DDMA hardware unit, subtasks with the same task type as the DDMA hardware unit can be allocated to that DDMA hardware unit. For instance, a DDMA-enabled hardware unit in an RDMA communication engine can only process subtasks corresponding to RDMA-type data communication tasks. A DDMA-enabled hardware unit in a data processing unit can process subtasks corresponding to any type of data communication task.

[0108] In addition, the workload corresponding to the direct data access hardware unit can be obtained, and the direct data access hardware unit with sufficient workload can be selected to process the corresponding subtask. No specific restrictions are placed on the allocation rules here.

[0109] It should also be noted that the subtasks corresponding to the same data communication task can be assigned to different direct data access hardware units for execution, or they can be assigned to the same direct data access hardware unit for execution, without any specific restrictions.

[0110] The direct data access hardware unit processes the data read and write tasks corresponding to the data communication task in parallel, which can improve the processing efficiency of the data communication task and thus achieve bandwidth complementarity.

[0111] In one optional embodiment, the subtask includes at least one of the following: a first task for reading task information of a data communication task, a second task for performing data read / write operations based on a data communication address, and a third task for informing the driver that the data communication task processing is complete; processing the subtask through a direct data access hardware unit and receiving the processing result of the subtask returned by the direct data access hardware unit includes at least one of the following: assigning the first task to a corresponding direct data access hardware unit, each direct data access hardware unit being used to read the task information of the data communication task from the host memory in parallel; reading the task information of the data communication task through the direct data access hardware unit and sending it to the corresponding CPU core. The system returns the processing result of the first task; assigns the second task to the corresponding direct data access hardware unit; performs data read and write operations on the host memory based on the data communication task through the direct data access hardware unit to obtain the communication data corresponding to the data communication task or write the communication data corresponding to the data communication task into the host memory, and returns the processing result of the second task to the corresponding CPU core; assigns the third task to the corresponding direct data access hardware unit, stores the information of the completed data communication task in the host memory through the direct data access hardware unit, and returns the processing result of the third task to the corresponding CPU core, wherein the information of the completed data communication task in the host memory is used for reading by each driver.

[0112] The first, second, and third tasks mentioned here are all generated by the CPU core when processing data communication tasks. Therefore, when the direct data access hardware unit completes these tasks, it returns the processing results of these tasks to the CPU core. The processing procedure of these tasks can be seen in detail below. This embodiment only emphasizes that the expansion service allocates subtasks to RPE or SDMA; the expansion service receives the subtask completion notification returned by RPE or RDMA.

[0113] In one alternative embodiment, the method further includes: sending communication data to the data path engine via the CPU core or receiving communication data sent by the data path engine via the CPU core.

[0114] In this application, the expansion service can send data to the DPE (Data plane Process Engine), and the expansion service can receive data sent by the DPE; the DPE receives data sent by the expansion service and sends data to the expansion service; the DPE no longer receives data from the RPE, nor sends data to the RPE.

[0115] For ease of understanding, the following is combined Figure 4 As shown, with Figure 4The example of expanding RDMA communication is used for illustration, but those skilled in the art will know that similar processing can be applied to Ethernet communication and other methods.

[0116] Figure 4 In this approach, the SDMA within the DPU handles a portion of the RDMA data read / write tasks, running in parallel with the RPE's internal DMA. This achieves bandwidth complementarity. Furthermore, multiple CPU cores send or receive data in parallel, increasing the bandwidth for sending data to or receiving data from the DPE and resolving the bandwidth limitation issue in communication between the RPE and DPE.

[0117] The expansion service implements the RDMA protocol and is responsible for receiving and processing RDMA data transmission and reception tasks issued by the application service via RDMA driver; the expansion service takes over the RDMA data transmission and reception tasks originally handled by RPE.

[0118] The expansion service assigns data read / write tasks to RPE or SDMA; the expansion service receives data read / write task completion notifications from RPE or RDMA.

[0119] The expansion service can send data to the DPE, and the expansion service can receive data sent by the DPE.

[0120] DPE receives data from the expansion service and sends data to the expansion service; DPE no longer receives data from RPE, nor sends data to RPE.

[0121] RPE receives data read / write tasks from the expansion service; RPE uses its internal DMA to complete the data read / write tasks from the expansion service; after completing the data read / write tasks, RPE sends a notification to the expansion service; RPE is no longer responsible for RDMA data transmission and reception tasks.

[0122] SDMA receives data read / write tasks from the expansion service; after completing the data read / write tasks, SDMA can send a notification to the expansion service.

[0123] For ease of understanding, combined with Figure 6 As shown, Figure 6 This is a schematic diagram of the application service sending data process in one embodiment. In this embodiment, the application service sending data process includes:

[0124] 1) The application service writes the data to be sent, send-data, to the host memory, HOST-MEM, and records the address, host-mem-send-addr.

[0125] 2) The application service sends a sending task rdma-send-wqe through the RDMA driver, and the sending task rdma-send-wqe specifies the data sent in the sending address host-mem-send-addr as send-data; the RDMA driver writes the sending task rdma-send-wqe into the host memory HOST-MEM.

[0126] 3) The RDMA driver notifies the expansion service that there are new tasks.

[0127] 4) The expansion service generates a read data task, namely the first task dma-task1, which reads the task information of the send task rdma-send-wqe; the expansion service can choose to distribute the first task dma-task1 to RPE or SDMA.

[0128] 5.1) If the expansion service chooses to distribute the first task dma-task1 to RPE; RPE uses its internal DMA to execute the first task dma-task1, reads the send task rdma-send-wqe, and notifies the expansion service that the first task dma-task1 is complete.

[0129] 5.2) If the expansion service chooses to distribute the first task dma-task1 to the SDMA; the SDMA executes the first task dma-task1, reads the send task rdma-send-wqe, and the SDMA notifies the expansion service that the first task dma-task1 is complete.

[0130] 6) The expansion service parses the sending task rdma-send-wqe, finds that it needs to read data from the address host-mem-send-addr, and generates a read data task, namely the second task dma-task2. The expansion service can choose to distribute the second task dma-task2 to RPE or SDMA.

[0131] 7.1) If the expansion service chooses to distribute the second task dma-task2 to RPE; RPE uses its internal DMA to execute the second task dma-task2, reads the data send-data from the address host-mem-send-addr, and notifies the expansion service that the second task dma-task2 is complete.

[0132] 7.2) If the expansion service chooses to distribute the second task dma-task2 to the SDMA; the SDMA executes the second task dma-task2, reads the data send-data from the address host-mem-send-addr, and the SDMA notifies the expansion service that the second task dma-task2 is complete.

[0133] 8) The expansion service continues to execute the send task rdma-send-wqe, sending data send-data to DPE.

[0134] 9) The expansion service generates the completion status CQE corresponding to the sending task rdma-send-wqe, and generates a write data task, namely the third task dma-task3, to write the completion status CQE to the host memory HOST-MEM; the expansion service can choose to distribute the third task dma-task3 to RPE or SDMA.

[0135] 10.1) If the expansion service chooses to distribute the third task dma-task3 to RPE; RPE uses its internal DMA to execute the write of the third task dma-task3 and writes the completion status CQE to the host memory HOST-MEM; RPE notifies the expansion service that the third task dma-task3 is complete.

[0136] 10.2) If the expansion service chooses to distribute the third task dma-task3 to SDMA; SDMA executes the third task dma-task3 and writes the completion status CQE to the host memory HOST-MEM; SDMA notifies the expansion service that the third task dma-task3 is complete.

[0137] 11) The RMDA driver reads the completion status CQE from the host memory HOST-MEM and sends the task rdma-send-wqe to end.

[0138] For ease of understanding, combined with Figure 7 As shown, Figure 7 This is a schematic diagram of the application service receiving data process in one embodiment. In this embodiment, the application service receiving data process includes:

[0139] 1) The application service requests a space from the host memory HOST-MEM to store the received data and records its address host-mem-recv-addr.

[0140] 2) The application service issues a receive task rdma-recv-wqe through the RDMA driver. The receive task rdma-recv-wqe specifies that the received data should be placed in host-mem-recv-addr. The RDMA driver writes the receive task rdma-recv-wqe into the host memory HOST-MEM.

[0141] 3) The RDMA driver notifies the expansion service that there are new tasks.

[0142] 4) The expansion service receives data recv-data from the DPE.

[0143] 5) The expansion service generates a read data task, namely the first task dma-task1, which reads the task information of the receive task rdma-recv-wqe; the expansion service can choose to distribute the first task dma-task1 to RPE or SDMA.

[0144] 6.1) If the expansion service chooses to distribute the first task dma-task1 to RPE; RPE uses its internal DMA to execute the first task dma-task1, reads the task information of the receiving task rdma-recv-wqe, and notifies the expansion service that the first task dma-task1 is complete.

[0145] 6.2) If the expansion service chooses to distribute the first task dma-task1 to the SDMA; the SDMA executes the first task dma-task1, reads the task information of the receiving task rdma-recv-wqe, and the SDMA notifies the expansion service that the first task dma-task1 is complete.

[0146] 7) The expansion service parses the receive task rdma-recv-wqe and finds that the received data recv-data needs to be written to the address host-mem-recv-addr. The expansion service generates a write data task, namely the second task dma-task2. The expansion service can choose to distribute the second task dma-task2 to RPE or SDMA.

[0147] 8.1) If the expansion service chooses to distribute the second task dma-task2 to RPE; RPE uses its internal DMA to execute the second task dma-task2, writes data recv-data to the address host-mem-recv-addr, and RPE notifies the expansion service that the second task dma-task2 is complete.

[0148] 8.2) If the expansion service chooses to distribute the second task dma-task2 to SDMA; SDMA executes the second task dma-task2, writes data recv-data to the address host-mem-recv-addr, and SDMA notifies the expansion service that the second task dma-task2 is complete.

[0149] 9) The expansion service generates the completion status CQE corresponding to the receive task rdma-recv-wqe, and generates a write data task, namely the third task dma-task3, to write the completion status CQE to the host memory HOST-MEM; the expansion service can choose to distribute the third task dma-task3 to RPE or SDMA.

[0150] 10.1) If the expansion service chooses to distribute the third task dma-task3 to RPE; RPE uses its internal DMA to execute the third task dma-task3 and writes the completion status CQE to the host memory HOST-MEM; RPE notifies the expansion service that the third task dma-task3 is complete.

[0151] 10.2) If the expansion service chooses to distribute the third task dma-task3 to SDMA; SDMA executes the third task dma-task3 and writes the completion status CQE to the host memory HOST-MEM; SDMA notifies the expansion service that the third task dma-task3 is complete.

[0152] 11) The RMDA driver reads the completion status CQE from the host memory HOST-MEM, and the receive task rdma-recv-wqe ends.

[0153] In the above embodiments, by adding a capacity expansion service, the numerous high-efficiency CPU cores within the DPU are utilized to concurrently process RDMA communication tasks. Multiple CPU cores send or receive data in parallel, increasing the bandwidth for sending data to or receiving data from the DPE, increasing the utilization rate of DPE bandwidth, and improving the overall RDMA communication bandwidth of the DPU. This can meet certain application scenarios of GPU clusters. Furthermore, the ratio of Ethernet traffic to RDMA traffic can be dynamically adjusted according to user needs.

[0154] It should be understood that although the steps in the flowcharts of the above embodiments are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the flowcharts of the above embodiments may include multiple steps or multiple stages. These steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least some of the steps or stages of other steps.

[0155] Based on the same inventive concept, this application also provides a data communication task processing apparatus for implementing the data communication task processing method described above. The solution provided by this apparatus is similar to the implementation scheme described in the above method; therefore, the specific limitations in one or more data communication task processing apparatus embodiments provided below can be found in the limitations of the data communication task processing method described above, and will not be repeated here.

[0156] In one exemplary embodiment, such as Figure 8 As shown, a data communication task processing device is provided, including: a receiving module 801 and a processing module 802, wherein:

[0157] The receiving module 801 is used to receive each data communication task notification sent by each driver, and based on each data communication task notification, allocate each data communication task to the corresponding CPU core, and each CPU core is located in the data processing unit.

[0158] Processing module 802 is used to process each data communication task in parallel through each CPU core.

[0159] In one optional embodiment, the apparatus further includes: a configuration module, configured to receive a data traffic configuration instruction; and configure the proportion of CPU cores corresponding to various types of data communication tasks based on the data traffic configuration instruction, wherein the larger the traffic of the corresponding type of data communication task, the larger the proportion of the corresponding CPU cores.

[0160] In one optional embodiment, the above apparatus further includes: an adjustment module, configured to acquire the traffic in the task queues corresponding to each driver, wherein different driver-corresponding task queues correspond to different types of data communication tasks; and adjust the proportion of CPU cores corresponding to each type of data communication task based on the traffic in the task queues corresponding to the driver, wherein the greater the traffic in the task queues corresponding to the driver, the greater the proportion of CPU cores corresponding to the data communication task.

[0161] In one optional embodiment, the processing module 802 is specifically configured to execute the corresponding data communication task in parallel by each CPU core based on the following steps: generating a corresponding subtask based on the data communication task, and allocating the subtask to the corresponding direct data access hardware unit, wherein each direct data access hardware unit processes the subtask corresponding to the data communication task in parallel; processing the subtask through the direct data access hardware unit, and receiving the processing result of the subtask returned by the direct data access hardware unit; and processing the data communication task based on the processing result of the subtask.

[0162] In one optional embodiment, the subtask includes at least one of the following: a first task for reading task information of a data communication task, a second task for performing data read / write operations based on a data communication address, and a third task for informing the driver that the data communication task processing is complete; the processing module 802 is specifically configured to process the subtask through a direct data access hardware unit by at least one of the following methods, and receive the processing result of the subtask returned by the direct data access hardware unit: assigning the first task to a corresponding direct data access hardware unit, each direct data access hardware unit being used to read the task information of the data communication task from the host memory in parallel; reading the task information of the data communication task through the direct data access hardware unit and informing the driver that the data communication task processing is complete. The corresponding CPU core returns the processing result of the first task; the second task is assigned to the corresponding direct data access hardware unit; the direct data access hardware unit performs data read and write operations on the host memory based on the data communication task to obtain the communication data corresponding to the data communication task or write the communication data corresponding to the data communication task into the host memory, and returns the processing result of the second task to the corresponding CPU core; the third task is assigned to the corresponding direct data access hardware unit, the direct data access hardware unit stores the information of the completed data communication task into the host memory, and returns the processing result of the third task to the corresponding CPU core, wherein the information of the completed data communication task in the host memory is used for reading by each driver.

[0163] In one optional embodiment, when the data communication task is of type RDMA, the direct data access hardware unit includes at least one of the hardware unit supporting direct data access in the RDMA communication engine and the hardware unit supporting direct data access in the data processing unit; when the data communication task is of type Ethernet, the direct data access hardware unit includes at least one of the hardware unit supporting direct data access in the Ethernet communication engine and the hardware unit supporting direct data access in the data processing unit.

[0164] In one optional embodiment, the above apparatus further includes: a sending module for sending communication data to the data path engine via the CPU core or receiving communication data sent by the data path engine via the CPU core.

[0165] Each module in the aforementioned data communication task processing device can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in or independent of the processor in a computer device, or stored in the memory of a computer device as software, so that the processor can call and execute the operations corresponding to each module.

[0166] In one embodiment, a chip is provided. The chip includes a memory and a processor, the memory storing a computer program. When the processor executes the computer program, it implements the access control method described above. The chip may be a data processing unit (DPU) chip.

[0167] In one embodiment, a network interface card is provided, which includes the aforementioned chip and multiple interfaces. The chip processes data or communicates externally through the interfaces. The interfaces include PCI / PCIE interfaces, network interfaces, etc.

[0168] In one exemplary embodiment, a computer device is provided, which may be a server, and its internal structure diagram may be as follows: Figure 9 As shown, this computer device includes a processor, memory, input / output (I / O) interfaces, and a communication interface (which may be a network interface card as previously described). The processor, memory, and I / O interfaces are connected via a system bus, and the communication interface is also connected to the system bus via the I / O interfaces. The processor provides computational and control capabilities. The memory includes non-volatile storage media and internal memory. The non-volatile storage media stores the operating system, computer programs, and a database. The internal memory provides an environment for the operation of the operating system and computer programs stored in the non-volatile storage media. The database stores corresponding data. The I / O interfaces are used for exchanging information between the processor and external devices. The communication interface is used for communicating with external terminals via a network connection. When the computer program is executed by the processor, it implements a data communication task processing method.

[0169] Those skilled in the art will understand that Figure 9 The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the computer device to which the present application is applied. Specific computer devices may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.

[0170] In one embodiment, a computer device is also provided, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the steps in the above method embodiments.

[0171] In one embodiment, a computer-readable storage medium is provided having a computer program stored thereon that, when executed by a processor, implements the steps in the above method embodiments.

[0172] In one embodiment, a computer program product is provided, including a computer program that, when executed by a processor, implements the steps in the above method embodiments.

[0173] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, data stored, data displayed, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of the relevant data must comply with relevant regulations.

[0174] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. Any references to memory, databases, or other media used in the embodiments provided in this application can include at least one of non-volatile memory and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can take many forms, such as Static Random Access Memory (SRAM) or Dynamic Random Access Memory (DRAM). The databases involved in the embodiments provided in this application may include at least one type of relational database and non-relational database. Non-relational databases may include, but are not limited to, blockchain-based distributed databases. The processors involved in the embodiments provided in this application may be general-purpose processors, central processing units, graphics processing units, digital signal processors, programmable logic devices, quantum computing-based data processing logic devices, artificial intelligence (AI) processors, etc., and are not limited to these.

[0175] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this application.

[0176] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.

Claims

1. A method of processing a data communication task, characterized by, The method comprises: receiving each data communication task notification sent by each driver, and distributing each data communication task to a corresponding CPU core based on each data communication task notification, each CPU core being located in a data processing unit, the data communication task being a data processing unit to send or receive data in an application service in RDMA; parallel processing each data communication task by each CPU core, comprising: parallel executing a corresponding data communication task by each CPU core based on the following steps: generating a corresponding subtask based on the data communication task, and distributing the subtask to a corresponding direct data access hardware unit, wherein each direct data access hardware unit parallel processes a subtask corresponding to the data communication task, each direct data access hardware unit comprising a direct data access hardware unit inside a data processing unit, a direct data access supported hardware unit in an RDMA communication engine, and a direct data access supported hardware unit in an Ethernet communication engine, the subtask comprising at least one of a first task for reading task information of the data communication task, a second task for data read-write operation based on a data communication address, and a third task for informing the driver that the data communication task processing is completed; in the case that the type of the data communication task is an RDMA type, the direct data access hardware unit comprises at least one of a direct data access supported hardware unit in an RDMA communication engine and a direct data access supported hardware unit in a data processing unit; in the case that the type of the data communication task is an Ethernet type, the direct data access hardware unit comprises at least one of a direct data access supported hardware unit in an Ethernet communication engine and a direct data access supported hardware unit in a data processing unit; processing the subtask by the direct data access hardware unit, and receiving a processing result of the subtask returned by the direct data access hardware unit; processing the data communication task based on the processing result of the subtask.

2. The method of claim 1, wherein, Before the distributing each data communication task to a corresponding CPU core based on each data communication task notification, the method further comprises: receiving a data flow configuration instruction; configuring a proportion of a CPU core corresponding to each type of data communication task based on the data flow configuration instruction, wherein the greater the flow of the data communication task of the corresponding type is, the greater the proportion of the CPU core is.

3. The method of claim 1, wherein, Before the distributing each data communication task to a corresponding CPU core based on each data communication task notification, the method further comprises: obtaining a flow in a task queue corresponding to each driver, wherein different task queues corresponding to different drivers correspond to different types of data communication tasks; adjusting a proportion of a CPU core corresponding to each type of data communication task based on the flow in the task queue corresponding to the driver, wherein the greater the flow in the task queue corresponding to the driver is, the greater the proportion of the CPU core corresponding to the data communication task is.

4. The method of claim 1, wherein, The processing the sub-tasks by the direct data access hardware units and receiving processing results of the sub-tasks returned by the direct data access hardware units comprises at least one of the following: allocating the first task to a corresponding direct data access hardware unit, each direct data access hardware unit being configured to read task information of the data communication task from the host memory in parallel; reading the task information of the data communication task by the direct data access hardware unit and returning a processing result of the first task to the corresponding CPU core; allocating the second task to a corresponding direct data access hardware unit; performing data read / write operations on the host memory by the direct data access hardware unit based on the data communication task to obtain communication data corresponding to the data communication task or write the communication data corresponding to the data communication task into the host memory, and returning a processing result of the second task to the corresponding CPU core; allocating the third task to a corresponding direct data access hardware unit, storing information about completion of processing of the data communication task into the host memory by the direct data access hardware unit, and returning a processing result of the third task to the corresponding CPU core, wherein the information about completion of processing of the data communication task in the host memory is configured to be read by each of the drivers.

5. The method of claim 1, wherein, The method further comprises: sending communication data by the CPU core to a data path engine or receiving communication data sent by the data path engine by the CPU core.

6. A data communication task processing apparatus characterized by comprising: The apparatus comprises: a receiving module configured to receive each data communication task notification sent by each driver and allocate each data communication task to a corresponding CPU core based on each data communication task notification, each CPU core being located in a data processing unit, and the data communication task being data sent or received by an application service in RDMA implemented by a data processing unit; a processing module configured to process each data communication task by each CPU core in parallel, comprising: performing a corresponding data communication task by each CPU core in parallel based on the following steps: generating corresponding sub-tasks based on the data communication task and distributing the sub-tasks to corresponding direct data access hardware units, wherein each direct data access hardware unit processes the sub-tasks corresponding to the data communication task in parallel, each direct data access hardware unit comprises a direct data access hardware unit inside a data processing unit, a direct data access supported hardware unit in an RDMA communication engine and a direct data access supported hardware unit in an Ethernet communication engine, and the sub-tasks comprise at least one of a first task for reading task information of the data communication task, a second task for data read-write operation based on a data communication address and a third task for informing the driver that the data communication task processing is completed; in the case that the data communication task is of an RDMA type, the direct data access hardware unit comprises at least one of a direct data access supported hardware unit in an RDMA communication engine and a direct data access supported hardware unit in a data processing unit; in the case that the data communication task is of an Ethernet type, the direct data access hardware unit comprises at least one of a direct data access supported hardware unit in an Ethernet communication engine and a direct data access supported hardware unit in a data processing unit; processing the sub-tasks through the direct data access hardware units and receiving processing results of the sub-tasks returned by the direct data access hardware units; processing the data communication task based on the processing results of the sub-tasks.

7. A chip comprising a memory and a processor, the memory storing a computer program, characterized in that, The processor executes the computer program to implement the steps of the method in any one of claims 1 to 5.

8. A network interface card, comprising: The chip and the plurality of interfaces as claimed in claim 7, wherein the chip processes data or communicates externally through the interfaces.

9. A computer device, comprising: The network interface card as claimed in claim 8, wherein the network interface card processes data or communicates externally.

10. A computer-readable storage medium having stored thereon a computer program, characterized in that, The computer program is executed by the processor to implement the steps of the method in any one of claims 1 to 5.

11. A computer program product comprising a computer program, characterized in that, The computer program is executed by the processor to implement the steps of the method in any one of claims 1 to 5.

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