Electromagnetic interference filter and control method thereof

Abstract

The invention discloses an electromagnetic interference filter and a control method thereof, and belongs to the technical field of filters, the electromagnetic interference filter comprises a detection circuit, an adder circuit, a compensation circuit and an injection circuit, the first end of the detection circuit is connected with the third end of a linear stable impedance network, and the second end of the detection circuit is connected with the fourth end of the linear stable impedance network; the third end of the detection circuit is connected with the first end of the summator circuit, the fourth end of the detection circuit is connected with the first end of the summator circuit, the second end of the summator circuit is connected with the first end of the compensation circuit, the second end of the compensation circuit is connected with the first end of the injection circuit, and the second end of the injection circuit is connected with the second end of the detection circuit. According to the common-mode electromagnetic interference suppression circuit, effective common-mode electromagnetic interference suppression is achieved, meanwhile, the size is remarkably reduced, the structure is simplified, and miniaturization and integration of a system are better facilitated.

Description

Technical Field

[0001] The present invention relates to the technical field of filters, and in particular to an electromagnetic interference filter and a control method thereof. Background Art

[0002] With the continuous advancement of semiconductor technology, switching converters, thanks to their significant advantages such as high power density, compact size, and light weight, have been widely used in a wide range of modern applications, from mobile phone chargers to new energy vehicles. However, as switching frequencies and power densities continue to increase, the development of switching converters has led to the emergence of serious electromagnetic interference (EMI) problems. EMI can propagate from the interference source to sensitive equipment through both radiation and conduction. Conducted EMI can be further divided into conducted differential-mode EMI and conducted common-mode EMI.

[0003] Severe electromagnetic interference not only disrupts the normal operation of nearby electronic systems, reducing their reliability, but also pollutes the power grid. Currently, there are two main approaches to reducing electromagnetic interference in power conversion devices: one is to conduct in-depth research on how to reduce the electromagnetic interference generated by the switching converter circuit itself; the other is to use electromagnetic interference filters to effectively block the transmission path of conducted electromagnetic interference.

[0004] Active filter technology has attracted attention for its compact size in electromagnetic interference (EMI) filtering. Its operating principle is to generate a signal equal in magnitude and opposite in direction to the EMI noise signal through active circuitry to cancel out the original EMI signal. However, currently, the topologies of active filters that achieve effective filtering often tend to be complex, which limits their application. Therefore, developing an active filter with a compact size and simple topology is crucial for effectively suppressing EMI in switching converters. Summary of the Invention

[0005] In order to overcome the defects of the prior art, the present application provides an electromagnetic interference filter and a control method thereof, so as to achieve effective common-mode electromagnetic interference suppression while significantly reducing the volume and simplifying the structure.

[0006] In a first aspect, the present application provides an electromagnetic interference filter, wherein the first and second ends of a linear stabilization impedance network are connected in parallel to the two ends of a DC power supply, the first end of the electromagnetic interference filter is connected to the third end of the linear stabilization impedance network, the second end of the electromagnetic interference filter is connected to the fourth end of the linear stabilization impedance network, and a DC / DC converter is connected in parallel to the third and fourth ends of the linear stabilization impedance network, comprising: a detection circuit, an adder circuit, a compensation circuit, and an injection circuit, wherein the first end of the detection circuit is connected to the third end of the linear impedance stabilization network (LISN), the second end of the detection circuit is connected to the fourth end of the linear stabilization impedance network, the third end of the detection circuit is connected to the first end of the adder circuit, the fourth end of the detection circuit is connected to the first end of the adder circuit, the second end of the adder circuit is connected to the first end of the compensation circuit, the second end of the compensation circuit is connected to the first end of the injection circuit, and the second end of the injection circuit is grounded.

[0007] Optionally, the detection circuit includes a first capacitor, a first resistor, a second capacitor and a second resistor, the first end of the first capacitor is connected to the third end of the linear stable impedance network, the second end of the first capacitor is connected to the first end of the first resistor, and the second end of the first resistor is grounded; the first end of the second capacitor is connected to the fourth end of the linear stable impedance network, the second end of the second capacitor is connected to the first end of the second resistor, and the second end of the second resistor is grounded.

[0008] Optionally, the adder circuit includes a third resistor, a fourth resistor, a fifth resistor, a sixth resistor and a first operational amplifier, wherein the first end of the third resistor is connected to the ground, the second end of the third resistor is connected to the first end of the first operational amplifier, the first end of the fourth resistor is connected to the second end of the second capacitor, the second end of the fourth resistor is connected to the second end of the first operational amplifier, the first end of the fifth resistor is connected to the second end of the first capacitor, the second end of the fifth resistor is connected to the second end of the first operational amplifier, the first end of the sixth resistor is connected to the first end of the first operational amplifier, and the second end of the sixth resistor is connected to the third end of the first operational amplifier.

[0009] Optionally, the compensation circuit includes a third capacitor, a seventh resistor, an eighth resistor and a second operational amplifier, the first end of the eighth resistor is connected to the third end of the first operational amplifier, the second end of the eighth resistor is connected to the first end of the second operational amplifier, the first end of the third capacitor is connected to the first end of the second operational amplifier, the second end of the third capacitor is connected to the third end of the second operational amplifier, the first end of the seventh resistor is connected to the first end of the second operational amplifier, the second end of the seventh resistor is connected to the third end of the second operational amplifier, and the second end of the second operational amplifier is connected to the reference voltage.

[0010] Optionally, the injection circuit includes a ninth resistor and a fourth capacitor, the first end of the ninth resistor is connected to the third end of the second operational amplifier, the second end of the ninth resistor is connected to the first end of the fourth capacitor, and the second end of the fourth capacitor is grounded.

[0011] In a second aspect, the present application provides a control method for an electromagnetic interference filter, which is applied to the electromagnetic interference filter according to any one of the first aspects, comprising the following steps:

[0012] The original common-mode currents on the two power lines are detected by the detection link, and the detected currents are converted into voltage signals through the CR structure to obtain the first voltage and the second voltage;

[0013] The first voltage and the second voltage are superimposed by an adder link to generate a common mode voltage signal;

[0014] The common mode voltage signal is input into the compensation link for inverse compensation to generate a compensation voltage signal;

[0015] The compensation voltage signal is converted into a compensation current signal and injected into the loop, where it is superimposed and offset with the original common-mode current to achieve a filtering effect.

[0016] Optionally, the detection link is used to detect the original common mode current on the two power lines respectively, and the detected current is converted into a voltage signal through the CR structure to obtain a first voltage and a second voltage, including: the detection link is implemented by a detection circuit, the first capacitor C sen1 and the first resistor R sen1 The first CR structure is formed, and the second capacitor C sen2 and the second resistor R sen2 A second CR structure is formed, and the first CR structure and the second CR structure are respectively connected to two power lines to respectively detect common-mode current and convert the common-mode current into a first voltage and a second voltage.

[0017] Optionally, the detection step The specific expression is:

[0018]

[0019] Among them, R sen is the resistance value of the resistor in the CR structure, C sen is the capacitance of the capacitor in the CR structure, and s is a complex variable.

[0020] Optionally, the specific expression of the compensation link is:

[0021]

[0022] Among them, R f2 is the resistance of the seventh resistor; C f1 is the capacitance value of the third capacitor; s is a complex variable; R4 is the resistance value of the eighth resistor; is the frequency value corresponding to the main pole of the second operational amplifier U2.

[0023] Optionally, the expression of the injection link is:

[0024]

[0025] Among them, R inj is the resistance of the ninth resistor, s is a complex variable; C inj is the capacitance value of the fourth capacitor.

[0026] The present invention adopts the above technical solution and has the following beneficial effects: by adopting a detection circuit composed of capacitors and resistors to detect common-mode current and convert it into voltage, the larger current transformer is replaced, which can simplify the filter structure and is conducive to the miniaturization and integrated design of the system; by utilizing a two-stage compensation structure, a circuit composed of an operational amplifier and the like is used to generate a compensation signal that is equal in magnitude and opposite in direction to the electromagnetic interference noise signal, which can effectively offset the original electromagnetic interference signal, and the noise at the fundamental frequency can be reduced from 6mV to 1mV; through the above design, the defects of the large size of passive filters, the influence of parasitic parameters on the system at high frequencies, and the complex topology of some existing active filters can be overcome, and the requirements of small size, simple topology and good filtering effect can be taken into account. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] In order to more clearly illustrate the technical solutions in the embodiments of the present application or related technologies, the following briefly introduces the drawings required for use in the embodiments or related technical descriptions. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0028] Figure 1 This is a structural block diagram of an electromagnetic interference filter provided in one embodiment of the present application.

[0029] Figure 2 This is a schematic diagram of the specific structure of the electromagnetic interference filter provided in one embodiment of the present application.

[0030] Figure 3 This is a flow chart of a method for controlling an electromagnetic interference filter provided in one embodiment of the present application.

[0031] Figure 4 This is a control block diagram of an electromagnetic interference filter provided in one embodiment of the present application.

[0032] Figure 5 This is a Bode diagram of the control loop of the electromagnetic interference filter provided in one embodiment of the present application.

[0033] Figure 6 This is a first simulation waveform diagram of an electromagnetic interference filter provided in one embodiment of the present application.

[0034] Figure 7 This is a second simulation waveform diagram of the electromagnetic interference filter provided in one embodiment of the present application.

[0035] Figure 8 This is a common-mode electromagnetic interference noise simulation waveform diagram in one embodiment of the present application.

[0036] Figure 9 This is a waveform diagram of the fundamental wave of common-mode electromagnetic interference simulation in one embodiment of the present application. DETAILED DESCRIPTION

[0037] To make the purpose and technical solutions of the embodiments of the present application clearer, the technical solutions of the embodiments of the present application will be clearly and completely described below in conjunction with the drawings of the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the described embodiments of the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0038] In one embodiment, see Figure 1The present application provides an electromagnetic interference filter 1, wherein the first and second ends of a linear stabilizing impedance network 3 are connected in parallel to the two ends of a DC power supply 2, the first end of the electromagnetic interference filter 1 is connected to the third end of the linear stabilizing impedance network 3, the second end of the electromagnetic interference filter 1 is connected to the fourth end of the linear stabilizing impedance network 3, and a DC / DC converter 4 is connected in parallel to the third and fourth ends of the linear stabilizing impedance network 3. The electromagnetic interference filter 1 includes: a detection circuit 11, an adder circuit 12, a compensation circuit 13, and an injection circuit 14, wherein the first end of the detection circuit 11 is connected to the third end of the linear stabilizing impedance network 3, the second end of the detection circuit 11 is connected to the fourth end of the linear stabilizing impedance network 3, the third end of the detection circuit 11 is connected to the first end of the adder circuit 12, the fourth end of the detection circuit 11 is connected to the first end of the adder circuit 12, the second end of the adder circuit 12 is connected to the first end of the compensation circuit 13, the second end of the compensation circuit 13 is connected to the first end of the injection circuit 14, and the second end of the injection circuit 14 is grounded.

[0039] As an example, see Figure 2 , the detection circuit 11 includes a first capacitor C sen1 , the first resistor R sen1 , the second capacitor C sen2 and the second resistor R sen2 , the first capacitor C sen1 The first end of the first capacitor C is connected to the third end of the linear stabilizing impedance network 3. sen1 The second end is connected to the first resistor R sen1 The first end of the first resistor R sen1 The second end of the second capacitor C sen2 The first end of the linear stabilizing impedance network 3 is connected to the fourth end of the second capacitor C sen2 The second end is connected to the second resistor R sen2 The first end of the second resistor R sen2 The second end is grounded.

[0040] As an example, the first capacitor C sen1 and the first resistor R sen1 The first CR structure is formed, and the second capacitor C sen2 and the second resistor R sen2 A second CR structure is formed, and the first CR structure and the second CR structure are respectively connected to two power lines to detect common mode current.

[0041] As an example, the detection circuit 11 may be a common mode current detection circuit, and the detection circuit 11 is used to detect the common mode current i s , common mode current i s Flowing through the first resistor R sen1 , the second resistor R sen2 Convert the current into a first voltage VRsen1 and the second voltage V Rsen2 ; Among them, the common mode current i s Including the first common mode current i s1 and the second common-mode current i s2 , the first common mode current i s1 The first CR structure converts it into the first voltage V Rsen1 , the second common mode current i s2 The second CR structure converts it into the second voltage V Rsen2 .

[0042] As an example, see Figure 2 The adder circuit 12 includes a third resistor R1, a fourth resistor R2, a fifth resistor R3, and a sixth resistor R f1 and the first operational amplifier U1, wherein the first end of the third resistor R1 is connected to the ground, the second end of the third resistor R1 is connected to the first end of the first operational amplifier U1, and the first end of the fourth resistor R2 is connected to the second capacitor C sen2 The second end of the fourth resistor R2 is connected to the second end of the first operational amplifier U1, and the first end of the fifth resistor R3 is connected to the first capacitor C sen1 The second end of the fifth resistor R3 is connected to the second end of the first operational amplifier U1, and the sixth resistor R f1 The first end of the sixth resistor R f1 The second end of is connected to the third end of the first operational amplifier U1. The adder circuit 12 connects the first resistor R sen1 The first voltage V Rsen1 and the second resistor R sen2 The second voltage V Rsen2 Add together to get the common mode voltage signal V cm The output is sent to the compensation circuit 13 for processing. The first power supply terminal of the first operational amplifier U1 is connected to the voltage VCC, and the second power supply terminal of the first operational amplifier U1 is connected to the voltage VEE.

[0043] As an example, see Figure 2 , the compensation circuit 13 includes a third capacitor C f1 , the seventh resistor R f2 , an eighth resistor R4 and a second operational amplifier U2, a first end of the eighth resistor R4 is connected to the third end of the first operational amplifier U1, a second end of the eighth resistor R4 is connected to the first end of the second operational amplifier U2, a third capacitor C f1 The first end of the second operational amplifier U2 is connected to the first end of the third capacitor C f1 The second end of the seventh resistor R f2 The first end of the seventh resistor R f2The second terminal of the second operational amplifier U2 is connected to the third terminal of the second operational amplifier U2, and the second terminal of the second operational amplifier U2 is connected to the reference voltage Vref. The first terminal of the second operational amplifier U2 is the inverting input terminal, the second terminal of the second operational amplifier U2 is the non-inverting input terminal, and the third terminal of the second operational amplifier U2 is the output terminal. The first power supply terminal of the second operational amplifier U2 is connected to the voltage VCC, and the second power supply terminal of the second operational amplifier U2 is connected to the voltage VEE.

[0044] Optionally, the reference voltage Vref is an ideal DC noise-free source, and the voltage value is 1 / 2VCC.

[0045] As an example, in order to achieve the effect of phase reversal, the common mode voltage signal V cm The voltage compensation signal V is connected to the inverting input terminal of the second operational amplifier U2 in the compensation circuit 13, and the positive input terminal of the second operational amplifier U2 is connected to the ideal DC noise-free source 1 / 2VCC. After compensation by the second operational amplifier U2, a voltage compensation signal V with opposite phase and equal magnitude is obtained. comp .

[0046] As an example, see Figure 2 , the injection circuit 14 includes a ninth resistor R inj and the fourth capacitor C inj , the ninth resistor R inj The first end of the ninth resistor R inj The second end is connected to the fourth capacitor C inj The first end of the fourth capacitor C inj The second end of the fourth capacitor C is grounded. inj and the ninth resistor R inj The compensation voltage signal V output by the second operational amplifier U2 in the compensation circuit 13 can be comp Converted into current compensation signal i c Injected into the loop, the original common mode noise source current i n They cancel each other out and achieve the effect of a filter.

[0047] As an example, the fourth capacitor C inj and the ninth resistor R inj It can be a high-pass filter that has a filtering effect and only allows high-frequency electromagnetic interference compensation signals to pass through.

[0048] Optionally, the electromagnetic interference filter is a mode common source electromagnetic interference filter.

[0049] In another embodiment, see Figure 3 The present application also provides a control method for an electromagnetic interference filter. The control method for the electromagnetic interference filter may include the following steps: step S1 to step S4.

[0050] Step S1: Detecting the original common-mode currents on the two power lines using a detection link, converting the detected currents into voltage signals through a CR structure to obtain a first voltage and a second voltage;

[0051] Step S2: superimposing the first voltage and the second voltage through an adder link to generate a common mode voltage signal;

[0052] Step S3: inputting the common mode voltage signal into the compensation link for inverse compensation to generate a compensation voltage signal;

[0053] Step S4: using the injection link to perform signal conversion on the compensation voltage signal, converting the compensation voltage signal into a compensation current signal and injecting it into the loop, superimposing and offsetting it with the original common mode current to achieve a filtering effect.

[0054] The electromagnetic interference filter topology structure of the present application can effectively solve the problems of large size and low integration of traditional active filters; by replacing the current transformer with a capacitor and resistor detection circuit, the common-mode current sampling structure can be simplified, the device size can be reduced and the circuit integration can be improved; by integrating the two detection voltages through the adder circuit, the common-mode signal can be accurately extracted, avoiding the complexity of the flux cancellation design of the traditional magnetic ring transformer; through the two-stage compensation structure, the phase margin can be maintained while enhancing the high-frequency attenuation capability, ensuring that the system stability is better than the single-stage compensation solution; by converting the compensation signal through the filter loop, the noise current can be accurately cancelled; through the pure circuit design without a magnetic core, the risk of magnetic saturation can be completely avoided, and it is suitable for high-power density miniaturized systems.

[0055] In step S1, the original common-mode currents on the two power lines are detected respectively by using a detection link, and the detected currents are converted into voltage signals through a CR structure to obtain a first voltage and a second voltage.

[0056] Specifically, the detection link can be implemented by the detection circuit 11. The specific expression is:

[0057]

[0058] Among them, R sen is the resistance value of the resistor in the CR structure, C sen is the capacitance of the capacitor in the CR structure, and s is a complex variable.

[0059] As an example, the resistance of the first CR structure in the detection link is the first resistor R sen1 , the capacitance is the first capacitance C sen1 , the first common mode current i s1 The first CR structure converts it into the first voltage V Rsen1 .

[0060] As an example, the resistance of the second CR structure in the detection link is the second resistor R sen2 , the capacitance is the second capacitance C sen2 , the second common mode current i s2 The second CR structure converts it into the second voltage V Rsen2 .

[0061] Step S2: superimposing the first voltage and the second voltage through an adder link to generate a common mode voltage signal.

[0062] Specifically, the adder link is implemented by the adder circuit 12. The function of the adder circuit 12 is to add the first voltage V Rsen1 and the second voltage V Rsen2 Perform vector superposition and finally output common mode voltage signal V cm .

[0063] Step S3: input the common-mode voltage signal into the compensation link for inverting compensation to generate a compensation voltage signal.

[0064] Specifically, the compensation link can be implemented by the compensation circuit 13. The specific expression is:

[0065]

[0066] Among them, R f2 The seventh resistor R f2 The resistance value, C f1 The third capacitor C f1 The capacitance value of R4 is the resistance value of the eighth resistor R4; s is a complex variable; is the frequency value corresponding to the main pole of the second operational amplifier U2.

[0067] As an example, the seventh resistor R f2 The seventh resistor R is a resistor that may play a role in feedback regulation in the circuit, and affects the processing and transmission of signals by cooperating with other components. f2 and the third capacitor C f1 The combined 1+sR f2 C f1 The structure affects the transmission characteristics of the signal in this part of the circuit; the eighth resistor R4 participates in the calculation as a proportional factor in the formula, affecting the value of the overall transfer function.

[0068] Step S4: using the injection link to perform signal conversion on the compensation voltage signal, converting the compensation voltage signal into a compensation current signal and injecting it into the loop, superimposing and offsetting it with the original common mode current to achieve a filtering effect.

[0069] Specifically, the injection link can be implemented by the injection circuit 14. The specific expression is:

[0070]

[0071] Among them, R inj The ninth resistor R inj The resistance value is the resistance that converts the output voltage signal of the op amp into a current signal in the injection loop; s is a complex variable; C inj The fourth capacitor C inj The capacitance value is the capacitance injected into the loop.

[0072] As an example, the fourth capacitor C inj and the ninth resistor R inj The high-pass filter together constitutes the key part of the injection loop, which only allows high-frequency electromagnetic interference compensation signals to pass through the injection loop, thereby achieving targeted compensation for high-frequency electromagnetic interference noise.

[0073] As an example, the compensation current i c is the high frequency compensation current.

[0074] As an example, the EMI filter control block diagram is as follows Figure 4 As shown, i n is the original common-mode noise source current, i c is the compensation current, i s The detection current can also be called the compensated current. The loop includes the detection link, adder link, compensation link, and injection link. The open-loop expression of the control loop is as follows:

[0075]

[0076] Among them, R sen is the resistance value of the resistor in the CR structure, C sen is the capacitance value of the capacitor in the CR structure, s is a complex variable, R f2 The seventh resistor R f2 The resistance value, C f1 The third capacitor C f1 The capacitance value of R4 is the resistance value of the eighth resistor R4, is the frequency value, R inj The ninth resistor R inj The resistance value, C inj The fourth capacitor C inj capacitance value.

[0077] Furthermore, according to the control block diagram, the detection current i can be obtained s Equal to the original common-mode noise source current i n Minus compensation current i c , i.e. i s=i n -i c , where the compensation current i c The expression is:

[0078]

[0079] Among them, i c is the compensation current, i s To detect the current, G(s) is the open-loop expression of the control loop.

[0080] Furthermore, the detection current i can be obtained s The original common-mode noise source current i n The ratio is:

[0081]

[0082] Where G(s) is the open-loop expression of the control loop.

[0083] Furthermore, the compensation current i can be obtained c The original common-mode noise source current i n The ratio is:

[0084]

[0085] Where G(s) is the open-loop expression of the control loop.

[0086] In one example, you can use Mathcad to perform simulation experiments, such as Figure 5 As shown, Figure 5 This is the Bode diagram of the electromagnetic interference filter control loop of this application, where the red curve is the amplitude-frequency curve and the blue dotted line is the phase-frequency curve. Figure 5 It can be seen that when the open-loop gain is less than 0dB, the compensation current i s ≈i n , signal pass through; when the open loop gain is greater than 0dB, i c ≈i n That is, the compensation current i s ≈0, the signal is compensated and suppressed. Crossing 0dB corresponds to a phase margin of approximately 105°. Crossing 0dB refers to the frequency where the open-loop gain amplitude-frequency curve intersects the 0dB line. The phase margin is the difference between the phase value of the phase-frequency curve at that frequency point and -180°. The phase margin is approximately 105°, far greater than the minimum phase margin required to ensure system stability, resulting in good system stability.

[0087] In another example, a simulation model can be built in LT Spice. The voltage of the DC power supply 2 is 10V, the DC / DC converter 4 can be an open-loop buck (Buck) circuit, and the switch nodes of the two switches in the DC / DC converter 4 are set to connect the parasitic capacitance of the PE line to simulate the common-mode current in reality.

[0088] As an example, see Figure 6 , Figure 6 This is the first simulation waveform of the electromagnetic interference filter of the present application, wherein I(C7) is the original common-mode noise current generated by the parasitic capacitance, which has a large amplitude and is an interference signal that needs to be suppressed; I(R7) is the current flowing through the resistor R7 in the linear stable impedance network 3, and I(R8) is the current flowing through the resistor R8 in the linear stable impedance network 3, wherein the resistance value of the resistor R7 is 50Ω, and the resistance value of the resistor R8 is 50Ω. I(R7) and I(R8) reflect the transmission of the common-mode noise in the linear stable impedance network, and they are the currents after the original common-mode noise current is transmitted through the transmission path; I(C8) and I(C9) are the common-mode currents detected on the two power lines respectively; V(VC1,PE) and V(VC2,PE) are the detection resistors R sen1 and the detection resistor R sen2 The first voltage V Rsen1 and the second voltage V Rsen2 , successfully converting the current signal into a voltage signal that is easy to process, verifying the effectiveness of the CR detection circuit. Figure 6 It can be seen that the detection link of the active common-mode EMI filter can accurately capture common-mode noise information, laying the foundation for generating reverse compensation signals in the subsequent compensation link. It reflects the good performance of the circuit design in signal detection and conversion, which is an important prerequisite for achieving effective filtering.

[0089] As an example, see Figure 7 , Figure 7 This is the second simulation waveform of the electromagnetic interference filter of this application, where I(R15) is the compensation current, I(C7) is the original common mode noise current, and I(R16) is the current after compensation. Figure 7 It can be seen that the compensation current I(R15) is much smaller than the original common-mode noise current I(C7), which proves that the electromagnetic interference filter of the present application can effectively reduce the common-mode electromagnetic interference noise, which is consistent with the theoretical analysis.

[0090] As an example, Figure 8 and Figure 9The following are the simulated waveforms of the common-mode electromagnetic interference noise and the expanded waveform of the simulated fundamental frequency of the present application. The red waveform shows the simulated common-mode electromagnetic interference noise waveform without the active filter, and the green waveform shows the simulated common-mode electromagnetic interference noise waveform with the active filter. As can be seen from the waveforms, the proposed electromagnetic interference filter effectively suppresses common-mode noise, reducing the noise at the fundamental frequency from 6mV to 1mV.

[0091] The electromagnetic interference filter of the present application does not require the use of a bulky current transformer, and detects the common-mode current through a CR circuit composed of a capacitor and a resistor. The structure is simple, which is conducive to miniaturization and integrated design. A two-stage compensation structure is adopted, and a circuit composed of an operational amplifier and the like is used to generate a compensation signal that is equal in magnitude and opposite in direction to the electromagnetic interference noise signal, which can effectively offset the original electromagnetic interference signal, especially the compensation and attenuation effect of high-frequency electromagnetic interference noise is better. The control loop design ensures that the system has good stability. While achieving good filtering effect, it overcomes the problems of large size of passive filters, the influence of parasitic parameters on the system at high frequencies, and the complex topology of some existing active filters.

[0092] It should be understood that although the steps in the flowcharts of the accompanying drawings are shown sequentially as indicated by the arrows, these steps are not necessarily executed sequentially in the order indicated by the arrows. Unless otherwise specified herein, there is no strict order restriction on the execution of these steps, and these steps can be executed in other orders. Moreover, at least some of the steps in the accompanying drawings may include multiple sub-steps or multiple stages, and these sub-steps or stages are not necessarily executed at the same time, but can be executed at different times. The order of execution of these sub-steps or stages is not necessarily sequential, but can be executed in rotation or alternation with other steps or at least a portion of the sub-steps or stages of other steps.

[0093] The technical features of the above embodiments can be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0094] Although the present application has been disclosed above with reference to the embodiments, they are not intended to limit the present application. Anyone with ordinary knowledge in the technical field may make slight changes and modifications without departing from the spirit and scope of the present application.

Claims

1. An electromagnetic interference filter, wherein the first and second ends of a linear stabilizing impedance network are connected in parallel to two ends of a DC power supply, the first end of the electromagnetic interference filter is connected to the third end of the linear stabilizing impedance network, the second end of the electromagnetic interference filter is connected to the fourth end of the linear stabilizing impedance network, and a DC / DC converter is connected in parallel to the third and fourth ends of the linear stabilizing impedance network, characterized in that: The electromagnetic interference filter includes: a detection circuit, an adder circuit, a compensation circuit and an injection circuit. The first end of the detection circuit is connected to the third end of the linear stabilizing impedance network, the second end of the detection circuit is connected to the fourth end of the linear stabilizing impedance network, the third end of the detection circuit is connected to the first end of the adder circuit, the fourth end of the detection circuit is connected to the first end of the adder circuit, the second end of the adder circuit is connected to the first end of the compensation circuit, the second end of the compensation circuit is connected to the first end of the injection circuit, and the second end of the injection circuit is grounded.

2. The electromagnetic interference filter according to claim 1, characterized in that The detection circuit includes a first capacitor, a first resistor, a second capacitor and a second resistor, wherein the first end of the first capacitor is connected to the third end of the linear stable impedance network, the second end of the first capacitor is connected to the first end of the first resistor, and the second end of the first resistor is grounded; the first end of the second capacitor is connected to the fourth end of the linear stable impedance network, the second end of the second capacitor is connected to the first end of the second resistor, and the second end of the second resistor is grounded.

3. The electromagnetic interference filter according to claim 1, wherein The adder circuit includes a third resistor, a fourth resistor, a fifth resistor, a sixth resistor and a first operational amplifier, wherein the first end of the third resistor is connected to the ground, the second end of the third resistor is connected to the first end of the first operational amplifier, the first end of the fourth resistor is connected to the second end of the second capacitor, the second end of the fourth resistor is connected to the second end of the first operational amplifier, the first end of the fifth resistor is connected to the second end of the first capacitor, the second end of the fifth resistor is connected to the second end of the first operational amplifier, the first end of the sixth resistor is connected to the first end of the first operational amplifier, and the second end of the sixth resistor is connected to the third end of the first operational amplifier.

4. The electromagnetic interference filter according to claim 1, wherein The compensation circuit includes a third capacitor, a seventh resistor, an eighth resistor and a second operational amplifier, the first end of the eighth resistor is connected to the third end of the first operational amplifier, the second end of the eighth resistor is connected to the first end of the second operational amplifier, the first end of the third capacitor is connected to the first end of the second operational amplifier, the second end of the third capacitor is connected to the third end of the second operational amplifier, the first end of the seventh resistor is connected to the first end of the second operational amplifier, the second end of the seventh resistor is connected to the third end of the second operational amplifier, and the second end of the second operational amplifier is connected to a reference voltage.

5. The electromagnetic interference filter according to claim 1, characterized in that The injection circuit includes a ninth resistor and a fourth capacitor, wherein the first end of the ninth resistor is connected to the third end of the second operational amplifier, the second end of the ninth resistor is connected to the first end of the fourth capacitor, and the second end of the fourth capacitor is grounded.

6. A control method for an electromagnetic interference filter, characterized in that: The electromagnetic interference filter according to any one of claims 1 to 5 comprises the following steps: The original common-mode currents on the two power lines are detected by the detection link, and the detected currents are converted into voltage signals through the CR structure to obtain the first voltage and the second voltage; superimposing the first voltage and the second voltage through an adder link to generate a common-mode voltage signal; Inputting the common-mode voltage signal into a compensation link for inverse compensation to generate a compensation voltage signal; The compensation voltage signal is converted into a compensation current signal by using an injection link, and is injected into a loop to be superimposed with the original common mode current to offset the original common mode current.

7. The control method of the electromagnetic interference filter according to claim 6, characterized in that: The original common-mode currents on the two power lines are detected respectively by using a detection link, and the detected currents are converted into voltage signals through a CR structure to obtain a first voltage and a second voltage. The detection link is implemented by a detection circuit, a first capacitor and a first resistor form a first CR structure, a second capacitor and a second resistor form a second CR structure, the first CR structure and the second CR structure are connected to the two power lines respectively, the common-mode currents are detected respectively, and the common-mode currents are converted into the first voltage and the second voltage respectively.

8. The control method of the electromagnetic interference filter according to claim 7, characterized in that: Testing The specific expression is: ， Among them, R sen is the resistance value of the resistor in the CR structure, C sen is the capacitance of the capacitor in the CR structure, and s is a complex variable.

9. The control method of the electromagnetic interference filter according to claim 6, characterized in that: Compensation The specific expression is: ， Among them, R f2 is the resistance of the seventh resistor, C f1 is the capacitance of the third capacitor, s is a complex variable, R4 is the resistance of the eighth resistor, is the frequency value corresponding to the main pole of the second operational amplifier U2.

10. The control method of the electromagnetic interference filter according to claim 6, characterized in that: Injection The expression is: ， Among them, R inj is the resistance of the ninth resistor, s is a complex variable, C inj is the capacitance value of the fourth capacitor.

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