TDDB test process structure and preparation method thereof, and TDDB test method

Abstract

The invention discloses a TDDB test process structure and a preparation method thereof, and a TDDB test method, and the structure comprises a substrate which comprises a first surface and a second surface, and the first surface and the second surface are opposite to each other; the insulating layer is located on the first surface, and the insulating layer comprises a first area and a second area; the capacitor is located on the first region, and the capacitor comprises a dielectric layer; the resistor is located on the second area, and the resistor is electrically connected with one end of the capacitor; the electrodes comprise the first electrode and the second electrode, the first electrode is located on the second area and electrically connected with the resistor, and the second electrode is located on the second surface. According to the invention, the capacitor and the resistor are integrated on the same substrate to form a series structure of the capacitor and the resistor, so that the TDDB test is facilitated.

Description

Technical Field

[0001] The present invention belongs to the technical field of semiconductor manufacturing, and in particular relates to a TDDB test process structure and a preparation method thereof, and a TDDB test method. Background Art

[0002] The dielectric layer is a crucial component of semiconductor devices, such as deep trench capacitors (DTCs) and integrated passive devices. The quality and lifespan of the dielectric layer are crucial to the stable operation and lifespan prediction of semiconductor devices. Therefore, a rational and convenient testing method is needed to accurately and efficiently measure the lifespan of the dielectric layer.

[0003] Time-dependent dielectric breakdown (TDDB) testing is an important reliability testing method. It applies a constant test bias to the dielectric layer, gradually increasing the leakage current of the dielectric layer until the dielectric layer breaks down and loses its insulation function. This allows the quality of the dielectric layer to be evaluated and the service life of semiconductor devices to be predicted.

[0004] In the prior art, the TDDB test for the dielectric layer is divided into during the Fab tape-out process or after the Fab tape-out is completed, but whether during the Fab tape-out process or after the Fab tape-out is completed, the samples to be tested need to be tested one by one, and the test efficiency is low. In addition, during the Fab tape-out process, usually after the deposition of the dielectric layer and the metal layer is completed and the capacitor structure is formed, the wafer-level TDDB test is performed. However, during the TDDB test process, it is usually necessary to heat the sample to be tested, but because it is a wafer-level test, the sample to be tested is not cut, and only the overall heating can be performed, resulting in inconsistent temperature stresses applied to the first sample to be tested and the last sample to be tested, affecting the accuracy of the test results. For the TDDB test after the Fab tape-out is completed, if voltage is applied to multiple samples to be tested at the same time, it is necessary to package and wire them separately after the cutting of the samples to be tested is completed, and place them in the corresponding equipment for testing, which greatly increases the testing cost.

[0005] Therefore, in response to the above technical problems, it is necessary to provide a TDDB test process structure and its preparation method, and a TDDB test method. Summary of the Invention

[0006] The object of the present invention is to provide a TDDB test process structure and a preparation method thereof, and a TDDB test method, which can simultaneously test multiple samples to be tested during a TDDB experiment, thereby improving the test efficiency and the accuracy of the experimental results.

[0007] In order to achieve the above-mentioned purpose, the technical solution provided by one embodiment of the present invention is as follows:

[0008] A TDDB test process structure, the TDDB test process structure comprising:

[0009] A substrate comprising a first surface and a second surface disposed opposite to each other;

[0010] an insulating layer located on the first surface, the insulating layer comprising a first region and a second region;

[0011] a capacitor located on the first region, the capacitor comprising a dielectric layer;

[0012] a resistor, located on the second region, the resistor being electrically connected to one end of the capacitor;

[0013] The electrode includes a first electrode and a second electrode, wherein the first electrode is located on the second area and is electrically connected to the resistor, and the second electrode is located on the second surface.

[0014] In one embodiment, the TDDB test process structure includes a plurality of capacitors and a plurality of resistors arranged at intervals, one capacitor and one resistor are electrically connected to each other, and the first electrode is electrically connected to each of the plurality of resistors.

[0015] In one embodiment, the capacitor includes a first metal layer, a dielectric layer, and a second metal layer stacked sequentially on the first region, and the resistor includes a resistor film layer and a third metal layer stacked sequentially on the second region, and the third metal layer is electrically connected to the second metal layer and the first electrode, respectively.

[0016] In one embodiment, the dielectric layer extends onto the second region, and the resistor and the first electrode are located on the dielectric layer in the second region.

[0017] In one embodiment, the first electrode is electrically connected to a positive electrode of a voltage source, and the second electrode is electrically connected to a negative electrode of the voltage source.

[0018] In one embodiment, the capacitor is a MIM capacitor, a MOM capacitor or a MOS capacitor.

[0019] Another embodiment of the present invention provides a technical solution as follows:

[0020] A method for preparing a TDDB test process structure, the method comprising the following steps:

[0021] Providing a substrate, and preparing an insulating layer on the substrate, wherein the insulating layer includes a first region and a second region;

[0022] preparing a capacitor and a first electrode on the first region and the second region, respectively, wherein the capacitor includes a dielectric layer;

[0023] preparing a resistor on the second area, wherein the resistor is electrically connected to one end of the capacitor and the first electrode respectively;

[0024] A second electrode is prepared on the second surface of the substrate.

[0025] In one embodiment, forming a capacitor and a first electrode on the first region and the second region, respectively, comprises the following steps:

[0026] forming a first metal layer on the first region;

[0027] forming a dielectric layer on the first metal layer, wherein the dielectric layer extends onto the second region;

[0028] A second metal layer and a first electrode are respectively formed on the dielectric layer in the first region and the second region.

[0029] Another embodiment of the present invention provides the following technical solutions:

[0030] A TDDB testing method, comprising the following steps:

[0031] Continuously applying a voltage between a first electrode and a second electrode of a TDDB test process structure, wherein the TDDB test process structure is the aforementioned TDDB test process structure or a TDDB test process structure prepared according to the aforementioned preparation method;

[0032] measuring a change in a total current and / or a total resistance between the first electrode and the second electrode over time;

[0033] According to the change amount and change time of the total current and / or the total resistance, the breakdown number and the corresponding breakdown time of the dielectric layer in the TDDB test process structure are obtained.

[0034] In one embodiment, a voltage is applied between the first electrode and the second electrode using a DC source meter; and / or,

[0035] A DC source meter is used to measure the change of the total current and / or the total resistance between the first electrode and the second electrode over time.

[0036] Compared with the prior art, the present invention has the following beneficial effects:

[0037] The present invention prepares multiple series structural units of capacitors and resistors on the same substrate, and simultaneously realizes parallel connection of multiple structural units, thereby conveniently measuring multiple dielectric layer samples at the same time, reducing costs, and improving test efficiency. In addition, the structural unit maximizes consistency with the capacitor product process. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments recorded in the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0039] Figure 1 Schematic diagram of the TDDB test process structure in Example 1 of the present invention;

[0040] Figure 2 Schematic diagram of the planar structure of the TDDB test process structure in Example 1 of the present invention;

[0041] Figures 3a to 3f 1 is a process flow chart of the method for preparing the TDDB test process structure in Example 1 of the present invention;

[0042] Figure 4 1 is an equivalent circuit diagram when a TDDB test process structure is tested using a DC source meter in Example 1 of the present invention;

[0043] Figure 5 This is a current-time curve of the TDDB test process structure in Example 1 of the present invention during the TDDB test process.

[0044] Description of main reference numerals:

[0045] 10 - substrate, 20 - insulating layer, 30 - capacitor, 301 - dielectric layer, 302 - first metal layer, 303 - second metal layer, 40 - resistor, 401 - resistor film layer, 402 - third metal layer, 501 - first electrode, 502 - second electrode. DETAILED DESCRIPTION

[0046] In order to enable those skilled in the art to better understand the technical solutions of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts should fall within the scope of protection of the present invention.

[0047] The present invention discloses a TDDB test process structure, comprising:

[0048] A substrate comprising a first surface and a second surface disposed opposite to each other;

[0049] an insulating layer located on the first surface, the insulating layer including a first region and a second region;

[0050] a capacitor located on the first region, the capacitor comprising a dielectric layer;

[0051] a resistor, located on the second region, the resistor being electrically connected to one end of the capacitor;

[0052] The electrodes include a first electrode and a second electrode. The first electrode is located on the second area and is electrically connected to the resistor. The second electrode is located on the second surface.

[0053] The present invention also discloses a method for preparing a TDDB test process structure, comprising the following steps:

[0054] Providing a substrate, and preparing an insulating layer on the substrate, wherein the insulating layer includes a first region and a second region;

[0055] preparing a capacitor and a first electrode on the first region and the second region, respectively, wherein the capacitor includes a dielectric layer;

[0056] A resistor is prepared on the second area, and the resistor is electrically connected to one end of the capacitor and the first electrode respectively;

[0057] A second electrode is prepared on the second surface of the substrate.

[0058] The present invention also discloses a TDDB testing method, comprising the following steps:

[0059] Applying a voltage between a first electrode and a second electrode of a TDDB test process structure, wherein the TDDB test process structure is the aforementioned TDDB test process structure or a TDDB test process structure prepared according to the aforementioned preparation method;

[0060] measuring a change in a total current and / or a total resistance between the first electrode and the second electrode over time;

[0061] According to the change amount and change time of the total current and / or the total resistance, the breakdown number and the corresponding breakdown time of the dielectric layer in the TDDB test process structure are obtained.

[0062] The present invention is further described below with reference to specific examples.

[0063] Example 1:

[0064] Ginseng Figure 1 As shown, the TDDB test process structure in this embodiment includes:

[0065] The substrate 10 includes a first surface and a second surface opposite to each other;

[0066] The insulating layer 20 is located on the first surface and includes a first region and a second region;

[0067] The capacitor 30 is located on the first region and includes a dielectric layer 301;

[0068] a resistor 40 located on the second region, the resistor 40 being electrically connected to one end of the capacitor 30;

[0069] The electrodes include a first electrode 501 and a second electrode 502 . The first electrode 501 is located on the second region and is electrically connected to the resistor 40 . The second electrode 502 is located on the second surface.

[0070] The substrate 10 in this embodiment is a Si substrate, and the insulating layer 20 is a SiO 2 layer. The insulating layer serves to insulate the capacitor from the Si substrate.

[0071] Specifically, the dielectric layer 301 in this embodiment extends to the second region, and the resistor 40 and the first electrode 501 are located on the dielectric layer 301 in the second region.

[0072] It is worth noting that the dielectric layer may also be located only on the first region, and the resistor and the first electrode may be directly prepared on the second region of the insulating layer.

[0073] More specifically, the capacitor 30 in this embodiment is a MIM capacitor, including a first metal layer 302, a dielectric layer 301, and a second metal layer 303 stacked in sequence on a first region. The second metal layer 303 includes a main portion located above the first region and an extension portion extending above the second region. The resistor 40 is located between the capacitor 30 and the first electrode 501, and includes a resistive film layer 401 and a third metal layer 402 stacked in sequence on the second region. The third metal layer 402 is partially located on the extension portion and partially located on the first electrode 501, thereby achieving electrical connection with the second metal layer 303 and the first electrode 501, respectively, so that the capacitor 30 is connected in series with the resistor 40 in the TDDB test process structure.

[0074] Among them, the first metal layer 302 is an AlCu metal layer or a TiPtAu metal layer, the second metal layer 303 is an AlCu metal layer or a TiPtAu metal layer, the dielectric layer 301 is an Al2O3 layer or a SiO2 layer, the resistor film layer 401 is a TiN layer, and the third metal layer 402 is an AlCu metal layer or a TiPtAu metal layer.

[0075] It should be understood that in other embodiments, the capacitor may also be a MOM capacitor or a MOS capacitor, and the material system and thickness of the first metal layer, the dielectric layer, the second metal layer, the resistor film layer, and the third metal layer may be adjusted accordingly according to actual needs. Furthermore, the structure of the capacitor and resistor may also be adjusted according to the specific design, as long as the capacitor and resistor are connected in series.

[0076] Ginseng Figure 2 As shown, the TDDB test process structure in this embodiment includes a plurality of spaced-apart capacitors and a plurality of spaced-apart resistors along the Y direction, one capacitor and one resistor are electrically connected to each other, a first electrode extends along the Y direction, partly located on the dielectric layer and partly located on the insulating layer, and is electrically connected to the plurality of resistors respectively, and the second electrode covers the second surface, thereby realizing parallel connection of multiple series-connected capacitor and resistor structure units in the test process structure during the test process.

[0077] The preparation method of the TDDB test process structure in this embodiment includes the following steps:

[0078] S1, ginseng Figure 3a As shown, a substrate 10 is provided, and an insulating layer 20 is prepared on the substrate 10 . The insulating layer 20 includes a first region and a second region.

[0079] Specifically, the substrate is a Si substrate, and the insulating layer is a SiO2 layer.

[0080] S2 , preparing a capacitor 30 and a first electrode 501 on the first region and the second region respectively, where the capacitor 30 includes a dielectric layer 301 .

[0081] The TDDB test process structure in this embodiment includes a plurality of capacitors arranged at intervals, preferably MIM capacitors. This step specifically includes:

[0082] 1. Ginseng Figure 3b As shown, a first metal layer 302 is prepared on the first region.

[0083] The first metal layer 302 is an AlCu metal layer or a TiPtAu metal layer. Specifically, a plurality of first metal layers 302 are prepared on the first region and spaced apart to determine the position of the capacitor 30 .

[0084] 2. Ginseng Figure 3c As shown, a dielectric layer 301 is formed on the first metal layer 302 , and the dielectric layer 301 extends onto the second region.

[0085] Specifically, dielectric layer 301 includes, but is not limited to, an Al2O3 layer or a SiO2 layer, depending on the actual test sample. In this embodiment, dielectric layers 301 are formed on each of the multiple first metal layers 302. The prepared dielectric layers 301 cover the first metal layers 302 and extend into the second region, while maintaining isolation between the multiple dielectric layers.

[0086] 3. Ginseng Figure 3d As shown, a second metal layer 303 and a first electrode 501 are respectively prepared on the dielectric layer 301 in the first region and the second region.

[0087] Specifically, a second metal layer 303 is prepared on each of the multiple dielectric layers 301, and a first electrode 501 extending along the Y direction is prepared at the same time. The first electrode 501 is partially located on the dielectric layer 301 and partially located on the insulating layer 20. The second metal layer 303 includes a main body located above the first area and an extension portion extending above the second area, which facilitates the subsequent series connection of the resistor and the capacitor.

[0088] 4. Ginseng Figure 3e As shown, a resistor 40 is prepared on the second region, and the resistor 40 is electrically connected to one end of the capacitor 30 and the first electrode 501 respectively.

[0089] Specifically, first, a plurality of spaced-apart resistor film layers 401 are sequentially prepared on the dielectric layer 301 between the capacitor 30 and the first electrode 501, and then a third metal layer 402 is respectively prepared on the plurality of resistor film layers 401 to form a plurality of spaced-apart resistors 40, wherein the resistor film layer 401 is a TiN layer, and the third metal layer 402 is an AlCu metal layer or a TiPtAu metal layer.

[0090] More specifically, the third metal layer 402 is partially located on the extension of the second metal layer 303 and partially located on the first electrode 501 , thereby achieving a series connection between the resistor 40 and the capacitor 30 .

[0091] In this embodiment, the dielectric layer does not need to be limited to the first metal layer when fabricating. It is sufficient to ensure that the multiple dielectric layers are isolated from each other. The resistor and first electrode are fabricated directly on the dielectric layer. During actual testing, only the dielectric layer between the first and second metal layers will form an effective capacitor with the first and second metal layers. The dielectric layer in the second area will not affect the test, but it simplifies the process.

[0092] 5. Ginseng Figure 3f As shown, a second electrode 502 is prepared on the second surface of the substrate 10 .

[0093] Specifically, the substrate 10 needs to be thinned before preparing the second electrode 502 , and the second electrode 502 covers the entire second surface.

[0094] Furthermore, during the test, the first electrode 501 is connected to the positive electrode of the voltage source, and the second electrode 502 is connected to the negative electrode of the voltage source, so that multiple capacitor and resistor series structure units are connected in parallel at both ends of the voltage source.

[0095] In this embodiment, the capacitor and the resistor are directly prepared on the same substrate to form a complete test device structure. There is no need to connect separately prepared resistors in series during subsequent testing, which simplifies the process, improves efficiency, and makes the measurement results more accurate.

[0096] Furthermore, the TDDB testing method in this embodiment includes the following steps:

[0097] S1, continuously applying a voltage between a first electrode and a second electrode of a TDDB test process structure;

[0098] S2. measuring the change of the total current and / or total resistance between the first electrode and the second electrode over time;

[0099] S3. Obtain the number of breakdowns and corresponding breakdown times of the dielectric layer in the TDDB test process structure according to the change in the total current and / or the total resistance and the change time.

[0100] Specifically, refer to Figure 4 As shown, in this embodiment, a DC source meter is used to apply a voltage between the first electrode and the second electrode. In combination with a probe station, a high-voltage probe is connected to the first electrode, and a low-voltage probe is connected to the second electrode, so that multiple series structural units are connected in parallel at both ends of the DC source meter. At the same time, in this embodiment, a DC source meter is used to measure the change of the total current and / or total resistance between the first electrode and the second electrode over time. The DC source meter acts as both a voltage source and a detection device, which provides a stable voltage for the TDDB test process structure while realizing the detection of the change of the total current and / or total resistance in the test circuit, which is more convenient.

[0101] Furthermore, this embodiment also requires a heated stage during the test process. The TDDB test process structure is placed on the heated stage for heating to promote dielectric layer breakdown and shorten test time. Because the TDDB test process structure in this embodiment can simultaneously measure multiple dielectric layer test samples, the temperature stress applied to each test sample during the test is consistent, resulting in more accurate measurement results.

[0102] Specifically, a resistor connected in series with the capacitor to be tested is prepared on one side of the capacitor to be tested through the Fab process to form a structural unit. When multiple structural units connected in parallel are subjected to TDDB testing, when the capacitor in a certain structural unit breaks down and short-circuits, the branch will not short-circuit because the resistor is sufficiently current-resistant, thereby ensuring that the entire parallel circuit will not short-circuit, and the test can continue without affecting the test of the dielectric layer in other branches. At the same time, when the capacitor is working normally and has not broken down, the capacitor defaults to a very large resistance, and each branch in the parallel circuit is almost disconnected. However, as the capacitor breaks down, the branches in the parallel circuit gradually become connected. According to the change in the number of capacitor breakdowns, the total current and / or total resistance in the test circuit will change accordingly, so the breakdown time of the dielectric layer in each structural unit can be easily obtained.

[0103] It should be understood that the TDDB test method in this embodiment can determine the number of dielectric layer breakdowns based on the change in the total current and / or total resistance in the test circuit at a certain moment, but in the actual test process, it is almost impossible for multiple dielectric layers to break down at the same time. Therefore, it is only necessary to obtain the change in the total current and / or total resistance in the test circuit over time to obtain the life of the tested dielectric layer based on statistical methods.

[0104] Ginseng Figure 5 As shown, the total current-time curve of the test circuit is obtained. When there is no dielectric layer breakdown in the test circuit, there is only a small current in the test circuit. The moments TBD1, TBD2, TBD3, TBD4...TBDN when the current signal increases appear in the curve. The moment when the current signal increases instantaneously is the moment when one of the dielectric layers is broken down. The life of the tested dielectric layer is obtained by using statistical methods based on the obtained multiple breakdown times.

[0105] It should be understood that in other embodiments, the total resistance-time variation curve of the test circuit can be tested to obtain multiple breakdown times according to the instantaneous resistance variation, thereby obtaining the life of the tested dielectric layer.

[0106] It can be seen from the above technical solution that the present invention has the following beneficial effects:

[0107] The present invention prepares multiple series structural units of capacitors and resistors on the same substrate, and simultaneously realizes parallel connection of multiple structural units, thereby conveniently measuring multiple dielectric layer samples at the same time, reducing costs, and improving test efficiency. In addition, the structural unit maximizes consistency with the capacitor product process.

[0108] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above and that the invention can be embodied in other specific forms without departing from the spirit or essential characteristics of the invention. Therefore, the embodiments should be considered in all respects as illustrative and non-restrictive, and the scope of the invention is defined by the appended claims, not the foregoing description, and all variations within the meaning and range of equivalents of the claims are intended to be included therein. Any reference sign in a claim should not be construed as limiting the claim to which it relates.

[0109] In addition, it should be understood that although this specification is described in terms of implementation methods, not every implementation method contains only one independent technical solution. This narrative method of the specification is only for the sake of clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each embodiment can also be appropriately combined to form other implementation methods that can be understood by those skilled in the art.

Claims

1. A TDDB test process structure, characterized in that: The TDDB test process structure includes: A substrate comprising a first surface and a second surface disposed opposite to each other; an insulating layer located on the first surface, the insulating layer comprising a first region and a second region; a capacitor located on the first region, the capacitor comprising a dielectric layer; a resistor, located on the second region, the resistor being electrically connected to one end of the capacitor; The electrode includes a first electrode and a second electrode, wherein the first electrode is located on the second area and is electrically connected to the resistor, and the second electrode is located on the second surface.

2. The TDDB test process structure according to claim 1, characterized in that: The TDDB test process structure includes a plurality of capacitors and a plurality of resistors arranged at intervals, one capacitor and one resistor are electrically connected to each other, and the first electrode is electrically connected to the plurality of resistors respectively.

3. The TDDB test process structure according to claim 1, characterized in that: The capacitor includes a first metal layer, a dielectric layer, and a second metal layer sequentially stacked on the first region; the resistor includes a resistive film layer and a third metal layer sequentially stacked on the second region; and the third metal layer is electrically connected to the second metal layer and the first electrode, respectively.

4. The TDDB test process structure according to claim 1, characterized in that: The dielectric layer extends onto the second region, and the resistor and the first electrode are located on the dielectric layer in the second region.

5. The TDDB test process structure according to claim 1, characterized in that: The first electrode is electrically connected to the positive electrode of the voltage source, and the second electrode is electrically connected to the negative electrode of the voltage source.

6. The TDDB test process structure according to claim 1, characterized in that: The capacitor is a MIM capacitor, a MOM capacitor or a MOS capacitor.

7. A method for preparing a TDDB test process structure, characterized in that: The preparation method comprises the following steps: Providing a substrate, and preparing an insulating layer on the substrate, wherein the insulating layer includes a first region and a second region; preparing a capacitor and a first electrode on the first region and the second region, respectively, wherein the capacitor includes a dielectric layer; preparing a resistor on the second area, wherein the resistor is electrically connected to one end of the capacitor and the first electrode respectively; A second electrode is prepared on the second surface of the substrate.

8. The method for preparing the TDDB test process structure according to claim 7, characterized in that: Preparing a capacitor and a first electrode on the first region and the second region, respectively, comprises the following steps: forming a first metal layer on the first region; forming a dielectric layer on the first metal layer, wherein the dielectric layer extends onto the second region; A second metal layer and a first electrode are respectively formed on the dielectric layer in the first region and the second region.

9. A TDDB testing method, characterized in that: The TDDB testing method comprises the following steps: continuously applying a voltage between a first electrode and a second electrode of a TDDB test process structure, wherein the TDDB test process structure is the TDDB test process structure according to any one of claims 1 to 6, or the TDDB test process structure prepared by the preparation method according to any one of claims 7 to 8; measuring a change in a total current and / or a total resistance between the first electrode and the second electrode over time; According to the change amount and change time of the total current and / or the total resistance, the breakdown number and the corresponding breakdown time of the dielectric layer in the TDDB test process structure are obtained.

10. The TDDB testing method according to claim 9, wherein: applying a voltage between the first electrode and the second electrode using a DC source meter; and / or, A DC source meter is used to measure the change of the total current and / or the total resistance between the first electrode and the second electrode over time.

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