Communication agent transit module, bandwidth enhancement processing method and device, chip, equipment, medium and program

By configuring a communication proxy relay module inside the chip, a cross-communication group proxy relay communication link is established, which solves the problem of low bandwidth utilization between communication groups in the existing technology and improves the communication bandwidth and efficiency between multi-processor chips.

CN120751007BActive Publication Date: 2025-11-07SHANGHAI YUNSUI TECHNOLOGY CO LTD
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Patent Information

Application Number
CN202511254934.2
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-09-04
Publication Date
2025-11-07
Estimated Expiration
2045-09-04

AI Technical Summary

Technical Problem

In existing technologies, when using the FULL MESH method to lay out the communication links between processor chips in an artificial intelligence server, the communication link resources between communication groups cannot be fully utilized, resulting in low communication bandwidth utilization in small-scale communication group applications, especially in non-overall communication groups where the processor's communication bandwidth cannot be fully utilized.

Method used

A communication proxy relay module is configured inside the chip. Through this module, a cross-communication group proxy relay communication link is established, the pairing relationship between the RX channel and the TX channel is removed, and cross-communication group communication data relay is realized, making full use of cross-group link resources.

Benefits of technology

It improves the bandwidth utilization and communication efficiency between multiprocessor chips, enhances the effective bandwidth between chips within a communication group, and solves the problem of low bandwidth utilization between communication groups in the prior art.

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Abstract

Embodiments of the present application disclose a communication proxy transfer module, a bandwidth enhancement processing method and device, a chip, an equipment, a medium and a program. The communication proxy transfer module is configured in a target chip. A first input port of the communication proxy transfer module is in communication connection with a data input channel of a first binding port of the target chip. A second input port of the communication proxy transfer module is in communication connection with a data input channel of a second binding port of the target chip. An output port of the communication proxy transfer module is in communication connection with a data output channel of the second binding port. The communication proxy transfer module is configured to receive transfer communication data sent by the first binding port through the data input channel and send the transfer communication data to the data output channel of the second binding port, so as to send the transfer communication data to a non-communication group chip bound to the second binding port. The transfer communication data is sent by the non-communication group chip bound to the first binding port to the first binding port. The technical solution of the embodiments of the present application can improve the communication bandwidth utilization and communication efficiency between multi-processor chips.
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Description

TECHNICAL FIELD

[0001] Embodiments of the present application relate to the chip, communication and artificial intelligence technical field, and particularly relate to a communication proxy transfer module, a bandwidth enhancement processing method and device, a chip, equipment, a medium and a program. BACKGROUND

[0002] In the current artificial intelligence server, the FULL MESH method is often used as a Scale-up interconnection between processor chips such as GPUs (Graphics Processing Unit) or DPUs (Deep learning Processing Unit) for processing units. FULL MESH is a network connection form, which refers to a topology structure in which all nodes are directly connected. Scale-up interconnection is a technology path for system expansion by improving the performance of a single computing node, and its core is to improve overall performance by optimizing hardware configuration or upgrading existing equipment.

[0003] Figure 1 is a schematic diagram of the effect of the Scale-up interconnection of the processor chip in the prior art artificial intelligence server. In a specific example, as shown in Figure 1 , the mainstream application of the current artificial intelligence server often uses an 8-card GPU configuration, and each GPU uses 7 communication links to directly interconnect with other GPUs point to point. Figure 1 Each line between the GPUs in the figure represents a communication link. Assuming that the bandwidth of each communication link is Bw, then the total bandwidth of each GPU in the FULL MESH state is 7*Bw.

[0004] The inventors found the following defects in the prior art during the implementation of the present application: using the FULL MESH method to layout the communication links between the processor chips in the artificial intelligence server is simple, direct and easy to implement, but it cannot fully utilize the communication link resources between the communication groups. Only when the communication group is the entire computing card, that is, the entire computing card is a whole communication group, can the bandwidth of the processor be fully utilized. For small-scale communication group applications, such as Figure 1 , in the application scenario, when the communication group is 2 computing cards, the communication link across the communication group cannot be used, resulting in a communication bandwidth of Bw for the GPUs in the communication group. This is a common problem in the current artificial intelligence field using the FULL MESH method to implement Scale-up interconnection. SUMMARY

[0005] The embodiment of the application provides a communication agent transfer module, a bandwidth enhancement processing method, device, chip, equipment, medium and program, which can improve the communication bandwidth utilization and communication efficiency between multiple processor chips.

[0006] According to a first aspect of the application, a communication agent transfer module is provided, which is configured in a target chip; a first input port of the communication agent transfer module is in communication connection with a data input channel of a first binding port of the target chip, a second input port of the communication agent transfer module is in communication connection with a data input channel of a second binding port of the target chip, and an output port of the communication agent transfer module is in communication connection with a data output channel of the second binding port; the first binding port and the second binding port are communication ports of the chip; the communication agent transfer module is used for:

[0007] receiving transfer communication data sent by the first binding port through the data input channel; wherein the transfer communication data is sent to the first binding port by a non-communication group chip bound by the first binding port;

[0008] sending the transfer communication data to the data output channel of the second binding port through the output port, so as to send the transfer communication data to a non-communication group chip bound by the second binding port through the data output channel of the second binding port.

[0009] According to a second aspect of the application, a bandwidth enhancement processing method is provided, which is applied to a communication agent transfer module, which is configured in a target chip; a first input port of the communication agent transfer module is in communication connection with a data input channel of a first binding port of the target chip, a second input port of the communication agent transfer module is in communication connection with a data input channel of a second binding port of the target chip, and an output port of the communication agent transfer module is in communication connection with a data output channel of the second binding port; the first binding port and the second binding port are communication ports of the chip; the method comprises:

[0010] receiving transfer communication data sent by the first binding port through the data input channel; wherein the transfer communication data is sent to the first binding port by a non-communication group chip bound by the first binding port;

[0011] sending the transfer communication data to the data output channel of the second binding port through the output port, so as to send the transfer communication data to a non-communication group chip bound by the second binding port through the data output channel of the second binding port.

[0012] According to a third aspect of the present application, there is provided a bandwidth enhancement processing apparatus configured in a communication agent transfer module, the communication agent transfer module being configured in a target chip; a first input port of the communication agent transfer module being in communication connection with a data input channel of a first binding port of the target chip, a second input port of the communication agent transfer module being in communication connection with a data input channel of a second binding port of the target chip, and an output port of the communication agent transfer module being in communication connection with a data output channel of the second binding port; the first binding port and the second binding port being communication ports of the chip; the apparatus comprising:

[0013] a transfer communication data receiving module configured to receive transfer communication data sent by the first binding port through the data input channel; wherein the transfer communication data is sent to the first binding port by the chip corresponding to the port identification number of the first binding port;

[0014] a transfer communication data sending module configured to send the transfer communication data to the data output channel of the second binding port through the output port, so as to send the transfer communication data to the chip corresponding to the port identification number of the second binding port through the data output channel of the second binding port.

[0015] According to a fourth aspect of the present application, there is provided a chip, the chip comprising the communication agent transfer module of the first aspect.

[0016] According to a fifth aspect of the present application, there is provided an electronic device, the electronic device comprising the chip of the fourth aspect.

[0017] According to another aspect of the present application, there is provided a computer readable storage medium, the computer readable storage medium storing computer instructions for causing a processor to implement the bandwidth enhancement processing method of any of the embodiments of the present application when executed.

[0018] According to another aspect of the present application, there is also provided a computer program product comprising a computer program for implementing the bandwidth enhancement processing method of any of the embodiments of the present application when executed by a processor.

[0019] The embodiment of the present application provides a communication agent transfer module, which can be configured in a target chip. The first input port of the communication agent transfer module is in communication connection with the data input channel of the first binding port of the target chip, the second input port of the communication agent transfer module is in communication connection with the data input channel of the second binding port of the target chip, and the output port of the communication agent transfer module is in communication connection with the data output channel of the second binding port. The first binding port and the second binding port are communication ports of the chip. Correspondingly, based on the communication agent transfer module, a bandwidth enhancement processing method can be realized. The method receives the transfer communication data sent by the first binding port through the data input channel, and then sends the transfer communication data to the data output channel of the second binding port through the output port, so as to send the transfer communication data to the non-communication group chip bound by the second binding port through the data output channel of the second binding port, wherein the transfer communication data is sent to the first binding port by the non-communication group chip bound by the first binding port. The above technical solution can realize bandwidth enhancement processing between the communication groups by fully utilizing the link connection between the communication groups formed by the chip, solve the problem of low communication bandwidth utilization rate between the communication groups formed by the chip, and improve the communication bandwidth utilization rate and communication efficiency between the multi-processor chips.

[0020] It should be understood that the content described in this part is not intended to identify the key or important features of the embodiments of the present application, nor is it used to limit the scope of the present application. Other features of the present application will become apparent from the following description. BRIEF DESCRIPTION OF DRAWINGS

[0021] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed in the embodiment description will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor.

[0022] Figure 1 is a schematic diagram of the effect of Scale-up interconnection of processor chips in an artificial intelligence server in the prior art;

[0023] Figure 2 is a schematic diagram of the effective interconnection of a 2-card GPU communication group under FULL MESH interconnection in the prior art;

[0024] Figure 3 is another schematic diagram of the effective interconnection of a 2-card GPU communication group under FULL MESH interconnection in the prior art;

[0025] Figure 4is a schematic diagram of the chip internal port structure in the prior art;

[0026] Figure 5 is a schematic diagram of the structure of a communication proxy transfer module in a target chip according to an embodiment of the present application;

[0027] Figure 6 is an effect schematic diagram of a communication method of a 2-card communication group under a FULL MESH interconnection according to an embodiment of the present application;

[0028] Figure 7 is a configuration method schematic diagram of a 2-card communication group chip internal communication proxy transfer module according to an embodiment of the present application;

[0029] Figure 8 is an effect schematic diagram of a communication method of a 4-card communication group under a FULL MESH interconnection according to an embodiment of the present application;

[0030] Figure 9 is a configuration method schematic diagram of a 4-card communication group chip internal communication proxy transfer module according to an embodiment of the present application;

[0031] Figure 10 is a flow chart of a bandwidth enhancement processing method according to an embodiment of the present application;

[0032] Figure 11 is a schematic diagram of an operation flow of processing a request, responding, data transmission and releasing based on an improved network protocol according to an embodiment of the present application;

[0033] Figure 12 is a protocol structure schematic diagram of an improved network protocol according to an embodiment of the present application;

[0034] Figure 13 is a schematic diagram of a bandwidth enhancement processing device according to an embodiment of the present application;

[0035] Figure 14 is a structure schematic diagram of a chip according to an embodiment of the present application;

[0036] Figure 15 is a structure schematic diagram of an electronic device according to an embodiment of the present application. DETAILED DESCRIPTION

[0037] In the following, the technical solutions in the embodiments of the present application will be described clearly and completely with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments of the present application. Based on the embodiments in the present application, all the other embodiments obtained by a person of ordinary skill in the art without creative effort should belong to the protection scope of the present application.

[0038] It should be noted that the terms "first", "second" and the like in the description and claims of the present application and the above drawings are used to distinguish similar objects, and do not necessarily indicate a specific order or sequence. It should be understood that the data thus used can be interchanged under appropriate circumstances, so that the embodiments of the present application described herein can be implemented in other than the order illustrated or described herein. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion, for example, a process, method, system, product or device that includes a list of steps or units need not be limited to those steps or units clearly listed, but can include other steps or units not clearly listed or inherent to such processes, methods, products or devices.

[0039] Figure 2 is an effect diagram of effective interconnection of 2-card GPU communication groups in the prior art FULL MESH interconnection, Figure 3 is another effect diagram of effective interconnection of 2-card GPU communication groups in the prior art FULL MESH interconnection. In a specific example, as shown in Figure 2 , when the communication groups used include 2 computing cards (computing cards are also referred to as chips), there are a total of 4 communication groups in the server, namely GPU0 and GPU1, GPU2 and GPU3, GPU4 and GPU5, and GPU6 and GPU7. Figure 2 The solid line connection between each communication group in indicates a communication link that can be directly used in the communication group, and the dashed line connection between the communication groups indicates a communication link that cannot be directly used due to crossing the communication groups. In order to make it clearer, as shown in Figure 3 , the communication link between each computing card can be displayed using double lines. This is because each communication link is physically bidirectional, and is actually composed of two independent channels in opposite directions, commonly referred to as RX channels (Receive Channel) and TX channels (Transmit Channel). In the current common scenario, the RX channel and the TX channel of the communication link always appear in pairs and are used together, and they are logically paired.

[0040] As shown in Figure 3As shown, the dashed communication links between different communication groups are all link resources that cannot be communicated due to cross-group communication, and the cross-group communication resources are completely wasted. In addition, inside the chip, the logic corresponding to the communication links is generally designed as shown in the structure of Figure 4

[0041] Figure 4 is a schematic diagram of the port structure inside a chip in the prior art. In a specific example, as shown in Figure 4 RX represents receiving, and its function is to receive an electrical signal and decode it into data inside the chip; TX represents transmitting, and its function is to convert data inside the chip into an electrical signal and output it. Generally, RX and TX are used together in pairs. That is, the RX channel of port 0 can receive data sent by other chips through the TX channel of port 0, and communicate the data to the RX channel of port 0 of other chips through the TX channel of port 0.

[0042] Embodiment One

[0043] Figure 5 is a schematic diagram of the structure of a communication proxy transfer module inside a target chip provided by embodiment one of the present application, as shown in Figure 5 The communication proxy transfer module A is configured inside the target chip; the first input port of the communication proxy transfer module A is in communication connection with the data input channel of the first binding port of the target chip, the second input port of the communication proxy transfer module A is in communication connection with the data input channel of the second binding port of the target chip, and the output port of the communication proxy transfer module A is in communication connection with the data output channel of the second binding port; the first binding port and the second binding port are communication ports of the chip.

[0044] ​The communication proxy transiting module can be used to provide a cross-communication group "proxy transiting" communication function between chips in the same communication group. The cross-communication group "proxy transiting" communication function can be understood as that a chip in a communication group communicates with other chips in the same communication group by using the communication ports of other chips in the communication group. The target chip can be a chip configured with the communication proxy transiting module. Exemplarily, the types of the chip can include, but are not limited to, a SoC (System on a Chip), a TPU (Tensor Processing Unit), a DPU, an NPU (Neural network Processing Unit), a GPU, and a CPU (Central Processing Unit), and various high-performance processor chips, and the embodiments of the present application do not limit the types of the chip. The first input port and the second input port can be two input data ports of the communication proxy transiting module. The output port can be a port of the communication proxy transiting module used for sending data to other chip ports. The first binding port and the second binding port can be two ports of the target chip where the communication proxy transiting module is located. The data input channel can be an RX channel of the chip port. The data output channel can be a TX channel of the chip port.

[0045] Optionally, the communication proxy transiting module can be a hardware module suitable for internal logic design of a chip, as long as it can synthesize multiple input signals received by the port into one output in the chip, and the embodiments of the present application do not limit the specific internal structure of the communication proxy transiting module.

[0046] The embodiments of the present application configure the communication proxy transiting module in the chip, thereby establishing a cross-communication group "proxy transiting" communication link through the communication proxy transiting module, so that the RX channel and the TX channel of the chip are independently used, and the logical pairing relationship between the RX channel and the TX channel is released.

[0047] Correspondingly, the communication proxy transiting module A is specifically used for: receiving transiting communication data sent by the first binding port through the data input channel; wherein the transiting communication data is sent to the first binding port by a non-communication group chip bound to the first binding port; and sending the transiting communication data to the data output channel of the second binding port through the output port, so as to send the transiting communication data to the non-communication group chip bound to the second binding port through the data output channel of the second binding port.

[0048] The transit communication data can be communication data transmitted by a non-communication group chip and received by the communication agent transit module from the first binding port.

[0049] In the embodiment of the application, the first binding port and the second binding port can establish a binding relationship with different non-communication group chips, respectively. Correspondingly, in the communication process, the non-communication group chip bound by the first binding port can transmit the transit communication data to the data input channel of the first binding port of the target chip through the data output channel of the internal port of the chip. Correspondingly, after the data input channel of the first binding port of the target chip receives the transit communication data, the transit communication data is transmitted to the data output channel through the output port, and then the data output channel of the communication agent transit module transmits the transit communication data to the non-communication group chip bound by the second binding port through the data output channel of the second binding port of the target chip.

[0050] Therefore, the configuration of the communication agent transit module in the chip can add a new communication working mode to the port of the chip, so that the chip port can work in the "agent transit" mode, thereby the physical communication link across the communication groups can be fully utilized, the communication bandwidth in the communication group can be increased, and the effective communication bandwidth of the chip can be improved.

[0051] Figure 6 is an effect diagram of a communication mode of a 2-card communication group under a FULL MESH interconnection provided by the embodiment one of the application. In a specific example, as shown in Figure 6 in the application scenario of 2 cards as a communication group, every two chips can be a communication group. The communication group has a directly available communication link, for example, GPU0 and GPU1 are a communication group, and GPU0 and GPU1 have a directly communicable intra-group communication link; GPU2 and GPU3 are a communication group, and GPU2 and GPU3 have a directly communicable intra-group communication link; GPU4 and GPU5 are a communication group, and GPU4 and GPU5 have a directly communicable intra-group communication link; GPU6 and GPU7 are a communication group, and GPU6 and GPU7 have a directly communicable intra-group communication link. As shown in Figure 6The communication mode of the 2-card communication group under the FULL MESH interconnection is shown, and GPUs 0 and 1 are taken as examples for illustration. In addition to the communication link within the communication group between GPUs 0 and 1, the other double solid lines can be the proxy transfer communication link between GPUs 0 and 1 across the communication group constructed through the communication proxy transfer module, and the double dashed line represents the communication link irrelevant to the communication group of GPUs 0 and 1. Among them, the proxy transfer communication link can be the communication link across the communication group constructed through the communication proxy transfer module, which can realize the indirect communication process between the chips in the group across different communication groups.

[0052] Figure 7 is a configuration mode schematic diagram of a 2-card communication group chip internal communication proxy transfer module provided by an embodiment of the application. In a specific example, as shown in Figure 6 and Figure 7 shown, assuming that GPUs 0 and 1 are the target communication groups that need to be processed for bandwidth enhancement, GPUs 0 and 1 can be processed for bandwidth enhancement through other communication groups respectively. For convenience of illustration, the port number of each chip is used to connect to the target chip of the same port number. For example, port 1 of GPU X is used to connect to GPU 1, and port 7 of GPU X is used to connect to GPU 7. Correspondingly, the ports 0 and 1 of GPUs 2 and 3 can establish the proxy transfer communication link between GPUs 0 and 1 through the communication proxy transfer module; the ports 0 and 1 of GPUs 4 and 5 can establish the proxy transfer communication link between GPUs 0 and 1 through the communication proxy transfer module; and the ports 0 and 1 of GPUs 6 and 7 can establish the proxy transfer communication link between GPUs 0 and 1 through the communication proxy transfer module.

[0053] Exemplarily, GPUs 6 and 7 are taken as examples for illustration, as shown in Figure 7As shown in sub-figures (1) and (2), the data output channel TX of port 1 of GPU7 can be configured with a communication proxy relay module. The first input port of the communication proxy relay module is communicatively connected to the data input channel of the first bound port of GPU7, namely port 0. The second input port of the communication proxy relay module is communicatively connected to the data input channel of the second bound port of GPU7, namely port 1. The output port of the communication proxy relay module is communicatively connected to the data output channel of port 1 of GPU7. Similarly, the data output channel TX of port 0 of GPU6 can be configured with a communication proxy relay module. The first input port of the communication proxy relay module is communicatively connected to the data input channel of the first bound port of GPU6, namely port 1. The second input port of the communication proxy relay module is communicatively connected to the data input channel of the second bound port of GPU6, namely port 0. The output port of the communication proxy relay module is communicatively connected to the data output channel of port 0 of GPU6. Based on this, when GPU0 needs to send communication data to GPU1, GPU0 can send communication data to GPU1 not only through the intra-group communication link between GPU0 and GPU1 (e.g., sending communication data to GPU1 via port 1), but also to the RX channel of port 0 of GPU7. Correspondingly, the communication proxy relay module at port 1 of GPU7 obtains the communication data sent by GPU0 from the RX channel of port 0 of GPU7 and sends the communication data sent by GPU0 to GPU1 through port 1 of GPU7.

[0054] like Figure 6 The diagram illustrates the communication method of a 2-card communication group under FULL MESH interconnection. Double solid lines of equal thickness represent bidirectional communication links directly usable between chips within the communication group. In a bidirectional communication link consisting of a thick solid line and a thin solid line, the thick solid line represents a proxy relay communication link, and the thin solid line represents a communication link not used for relaying. For example, Figure 6 In the diagram, the double solid lines of different thicknesses indicating "0-1" represent a proxy relay communication link for data transmission from GPU0 to GPU1; similarly, the double solid lines of different thicknesses indicating "1-0" represent a proxy relay communication link for data transmission from GPU1 to GPU0. Specifically, GPU0 can send communication data to port 0 of GPU7. The communication proxy relay module of GPU7 can receive the data sent by GPU0 at port 0 and then send the received data back to GPU1 through port 1 of GPU7. Similarly, GPU1 can send communication data to port 1 of GPU6. The communication proxy relay module of GPU6 can receive the data sent by GPU1 at port 1 and then send the received data back to GPU0 through port 0 of GPU6.

[0055] Therefore, the port 0 and the port 1 of the GPU 7 are used as the "communication relay agent" from the GPU 0 to the GPU 1, and the port 1 and the port 0 of the GPU 6 are used as the "communication relay agent" from the GPU 1 to the GPU 0. Similarly, the port 0 and the port 1 of the GPU 5 can be used as the "communication relay agent" from the GPU 0 to the GPU 1, and the port 1 and the port 0 of the GPU 4 are used as the "communication relay agent" from the GPU 1 to the GPU 0. Therefore, the effective bandwidth between the GPU 0 and the GPU 1 is increased from Bw to 4*Bw by using the communication relay agent, which greatly improves the effective bandwidth between the GPU 0 and the GPU 1. Figure 6 and Figure 7 It can be seen that, after the communication link between the chips in the communication group is established by the communication relay agent, the effective bandwidth between the GPU 0 and the GPU 1 is increased from Bw to 4*Bw, which greatly improves the effective bandwidth between the GPU 0 and the GPU 1.

[0056] Similarly, the communication group of the GPU 2 and the GPU 3 can also use the port 2 and the port 3 of the GPU 5 and the corresponding communication relay agent to create the "communication relay agent" from the GPU 2 to the GPU 3, and use the port 3 and the port 2 of the GPU 4 and the corresponding communication relay agent to create the "communication relay agent" from the GPU 3 to the GPU 2. The communication group of the GPU 4 and the GPU 5 can also use the port 4 and the port 5 of the GPU 7 and the corresponding communication relay agent to create the "communication relay agent" from the GPU 4 to the GPU 5, and use the port 5 and the port 4 of the GPU 6 and the corresponding communication relay agent to create the "communication relay agent" from the GPU 5 to the GPU 4, and the like, which will not be listed one by one.

[0057] Of course, Figure 6 and Figure 7 Only one 2-card communication group is used as an example, which is only used to make the technical solution clearer. In actual deployment, all chips can be used and allocated to different communication groups. For example, when the number of chips is 8, the chip communication group size can be 2 or 4. That is, when the number of chips is 8, one chip communication group can include 2 chips, and there are 4 communication groups; or one chip communication group can include 4 chips, and there are 2 communication groups. In addition, it should be noted that the above example establishes a mapping relationship between the port identification number and the same chip identification number, but the mapping relationship between the port number and the chip can be configured as needed in the actual process. For example, the port 2 and the port 3 of the GPU 7 are used as the "communication relay agent" from the GPU 0 to the GPU 1, and the port 3 and the port 2 of the GPU 6 are used as the "communication relay agent" from the GPU 1 to the GPU 0, and the like, which are not limited by the embodiments of the application.

[0058] In an optional embodiment of the present application, the number of communication proxy relay modules in each chip can be determined by the following method: determining the chip communication group size; determining the inter-chip relay communication links according to the chip communication group size and the total number of chips; determining the number of communication proxy relay modules in each chip according to the inter-chip relay communication links.

[0059] In the above method, the chip communication group size can be the number of chips included in a chip communication group, for example, a 2-card communication group includes 2 chips, and a 4-card communication group includes 4 chips.

[0060] In an embodiment of the present application, when configuring the communication proxy relay modules in the chips, the chip communication group size can be determined first, and then the inter-chip relay communication links can be determined according to the chip communication group size and the total number of chips. The relay communication links can be configured across the ports of the communication groups as needed. For example, as shown in Figure 6 and Figure 7 The relay communication link of “GPU0-GPU7’s port 0-GPU7’s port 1-GPU1” can be used as the link of the “communication relay proxy” from GPU0 to GPU1, or the relay communication link of “GPU0-GPU7’s port 3-GPU7’s port 5-GPU1” can also be used as the link of the “communication relay proxy” from GPU0 to GPU1. After determining the inter-chip relay communication links, the corresponding communication proxy relay modules can be configured between the TX channel and the RX channel of different ports of the chips according to the data flow direction of the inter-chip relay communication links. After the communication proxy relay modules of all chips are configured, the total number of the communication proxy relay modules configured in each chip can be determined.

[0061] Referring to Figure 6 and Figure 7 It can be understood that in a 2-card communication group, each chip can select 6 ports to configure the communication proxy relay modules, and each port can be configured with one communication proxy relay module. Therefore, in a 2-card communication group, each chip can configure a total of 6 communication proxy relay modules. Taking GPU7 as an example, except for the intra-group communication link between GPU6 and GPU7 occupying port 6 and port 7, each of the ports 0-5 of GPU7 can be configured with a communication proxy relay module in the TX channel direction. Similarly, taking GPU1 as an example, except for the intra-group communication link between GPU0 and GPU1 occupying port 0 and port 1, each of the ports 2-7 of GPU1 can be configured with a communication proxy relay module in the TX channel direction.

[0062] Figure 8is a communication method of a 4-card communication group in a FULL MESH interconnection provided by embodiment one of the present application. In a specific example, as shown in Figure 8 , in the application scenario of 4 cards as a communication group, every 4 chips can be as a communication group. The communication group has directly available communication links, such as GPU0, GPU1, GPU2 and GPU3 as a communication group, and GPU0 and GPU1, GPU0 and GPU2, GPU0 and GPU3, GPU1 and GPU2, GPU1 and GPU3, and GPU2 and GPU3 have directly communicable intra-group communication links. As shown in Figure 8 , the communication method of the 4-card communication group in the FULL MESH interconnection, the double solid lines of the same thickness represent the directly available bidirectional communication links between the chips in the communication group; in the bidirectional communication link of the double solid line composed of a thick solid line and a thin solid line, the thick solid line represents a proxy transit communication link in one direction, and the thin solid line represents a proxy transit communication link in the other direction. Figure 8 , the "0 / 1" identified communication link can represent a proxy transit communication link for transmitting communication data from GPU0 to GPU1, or a proxy transit communication link for transmitting communication data from GPU1 to GPU0, for example, in the bidirectional link composed of the thick solid line and the thin solid line identified by "0 / 1", the thick solid line represents a proxy transit communication link for transmitting communication data from GPU0 to GPU1, and the thin solid line represents a proxy transit communication link for transmitting communication data from GPU1 to GPU0. Similarly, the "0 / 2" identified communication link can represent a proxy transit communication link for transmitting communication data from GPU0 to GPU2, or a proxy transit communication link for transmitting communication data from GPU2 to GPU0; the "0 / 3" identified communication link can represent a proxy transit communication link for transmitting communication data from GPU0 to GPU3, or a proxy transit communication link for transmitting communication data from GPU3 to GPU0; the "1 / 2" identified communication link can represent a proxy transit communication link for transmitting communication data from GPU1 to GPU2, or a proxy transit communication link for transmitting communication data from GPU2 to GPU1; the "1 / 3" identified communication link can represent a proxy transit communication link for transmitting communication data from GPU1 to GPU3, or a proxy transit communication link for transmitting communication data from GPU3 to GPU1; and the "2 / 3" identified communication link can represent a proxy transit communication link for transmitting communication data from GPU2 to GPU3, or a proxy transit communication link for transmitting communication data from GPU3 to GPU2.

[0063] Figure 9 is a configuration method of a chip-intra-communication proxy transit module of a 4-card communication group provided by embodiment one of the present application. In a specific example, as shown in Figure 8and Figure 9 As shown, assuming GPU0, GPU1, GPU2, and GPU3 are the target communication group requiring bandwidth enhancement, then GPU0, GPU1, GPU2, and GPU3 can each perform bandwidth enhancement through other communication groups. For ease of explanation, each chip's port number is used to connect to the target chip with the same port number. For example, port 1 of GPUX is used to connect to GPU1, and port 7 of GPUX is used to connect to GPU7. Correspondingly, ports 0 and 1 of GPU2 and GPU3 can establish a proxy communication link between GPU0 and GPU1 through a communication proxy relay module; ports 0 and 1 of GPU4 and GPU5 can establish a proxy communication link between GPU0 and GPU1 through a communication proxy relay module; ports 0 and 1 of GPU6 and GPU7 can establish a proxy communication link between GPU0 and GPU1 through a communication proxy relay module, and so on.

[0064] For example, let's take GPU5 and GPU7 as examples. Figure 9 As shown in sub-figures (1) and (2), the data output channel TX of port 1 of GPU7 can be configured with a communication proxy relay module. The first input port of the communication proxy relay module is connected to the data input channel of the first bound port of GPU7, namely port 0. The second input port of the communication proxy relay module is connected to the data input channel of the second bound port of GPU7, namely port 1. The output port of the communication proxy relay module is connected to the data output channel of port 1 of GPU7. Similarly, the data output channel TX of port 0 of GPU7 can be configured with a communication proxy relay module. The first input port of the communication proxy relay module is connected to the data input channel of the first bound port of GPU7, namely port 1. The second input port of the communication proxy relay module is connected to the data input channel of the second bound port of GPU7, namely port 0. The output port of the communication proxy relay module is connected to the data output channel of port 0 of GPU7. That is, ports 0 and 1 of GPU7 can construct a bidirectional proxy relay communication link between GPU0 and GPU1. Similarly, ports 2 and 3 of GPU5 can be used to build a bidirectional proxy relay communication link between GPU0 and GPU1.

[0065] On this basis, when GPU0 needs to send communication data to GPU1, GPU0 can send the communication data to GPU1 based on the intra-group communication link of GPU0 and GPU1, such as that GPU0 sends the communication data to GPU1 through port 1, and GPU0 can also send the communication data to GPU1 through the communication proxy relay module of GPU7 via port 1 of GPU7. Specifically, GPU0 can send the communication data to the RX channel of port 0 of GPU7. Correspondingly, the communication proxy relay module of port 1 of GPU7 obtains the communication data sent by GPU0 from the RX channel of port 0 of GPU7, and sends the communication data sent by GPU0 to GPU1 through port 1 of GPU7. Similarly, when GPU2 needs to send communication data to GPU3, GPU2 can send the communication data to GPU3 based on the intra-group communication link of GPU2 and GPU3, such as that GPU2 sends the communication data to GPU3 through port 3, and GPU2 can also send the communication data to GPU3 through the communication proxy relay module of GPU5 via port 3 of GPU5. Specifically, GPU2 can send the communication data to the RX channel of port 2 of GPU5. Correspondingly, the communication proxy relay module of port 3 of GPU5 obtains the communication data sent by GPU2 from the RX channel of port 3 of GPU5, and sends the communication data sent by GPU2 to GPU3 through port 3 of GPU5. When GPU3 needs to send communication data to GPU2, GPU3 can send the communication data to GPU2 based on the intra-group communication link of GPU3 and GPU2, such as that GPU3 sends the communication data to GPU2 through port 2, and GPU3 can also send the communication data to GPU2 through the communication proxy relay module of GPU5 via port 2 of GPU5. Specifically, GPU3 can send the communication data to the RX channel of port 3 of GPU5. Correspondingly, the communication proxy relay module of port 2 of GPU5 obtains the communication data sent by GPU3 from the RX channel of port 3 of GPU5, and sends the communication data sent by GPU3 to GPU2 through port 2 of GPU5.

[0066] Similarly, as shown in subgraph (3) and subgraph (4) of FIG. 6 and FIG. 7, in the application scenario of the 4-card communication group, GPU4 and GPU6 can both configure the corresponding communication proxy relay modules at the corresponding ports according to the set proxy relay communication link shown in subgraph (3) and subgraph (4) of FIG. 6 and FIG. 7, and the repeated description is not given. Figure 8 and Figure 9 It can be understood that in the 4-card communication group, the number of communication proxy relay modules that each chip can configure is different. In a specific example, referring to FIG. 6 and FIG. 7, in the 4-card communication group, GPU0 can configure 2 communication proxy relay modules, GPU1 can configure 2 communication proxy relay modules, GPU2 can configure 2 communication proxy relay modules, and GPU3 can configure 2 communication proxy relay modules. Figure 8

[0067] It can be understood that in the 4-card communication group, the number of communication proxy relay modules that each chip can configure is different. In a specific example, referring to Figure 8 and Figure 9 ​The configuration of the proxy transit communication link is shown. For the GPU 7, the intra-group communication link of the GPU 4-GPU 7 occupies the ports 4-7, the ports 0 and 1 of the GPU 7 can be configured with a communication proxy transit module in the TX channel direction, and the ports 2 and 3 of the GPU 7 do not need to be configured with a communication proxy transit module. For the GPU 6, the intra-group communication link of the GPU 4-GPU 7 occupies the ports 4-7, and the ports 0, 1, 2 and 3 of the GPU 6 all need to be configured with a communication proxy transit module in the TX channel direction. For the GPU 5, the intra-group communication link of the GPU 4-GPU 7 occupies the ports 4-7, and the ports 2 and 3 of the GPU 5 need to be configured with a communication proxy transit module in the TX channel direction, and the ports 0 and 1 of the GPU 5 do not need to be configured with a communication proxy transit module. For the GPU 4, the intra-group communication link of the GPU 4-GPU 7 occupies the ports 4-7, and the ports 0, 1, 2 and 3 of the GPU 4 all need to be configured with a communication proxy transit module in the TX channel direction.

[0068] It should be further noted that in the 4-card communication group, the total number of chips is 8, and only one communication group can expand the communication bandwidth from 3*Bw to 6*Bw, as shown in Figure 8 As shown, after the communication bandwidth enhancement processing of the GPU 0-GPU 3 communication group, only 4 cross-group communication links are left in the entire communication network, and the remaining cross-group communication links cannot be used for the communication bandwidth enhancement processing of the GPU 4-GPU 7 communication group.

[0069] The embodiment of the present application provides a communication agent transfer module, which can be configured in a target chip. The first input port of the communication agent transfer module is in communication connection with a data input channel of a first binding port of the target chip, the second input port of the communication agent transfer module is in communication connection with a data input channel of a second binding port of the target chip, and the output port of the communication agent transfer module is in communication connection with a data output channel of the second binding port. The first binding port and the second binding port are communication ports of the chip. Correspondingly, a bandwidth enhancement processing method can be realized based on the communication agent transfer module. The method is to receive transfer communication data sent by the first binding port through the data input channel, then send the transfer communication data to the data output channel of the second binding port through the output port, so as to send the transfer communication data to the non-communication group chip bound by the second binding port through the data output channel of the second binding port, wherein the transfer communication data is sent to the first binding port by the non-communication group chip bound by the first binding port. The above technical solution can realize bandwidth enhancement processing between communication groups by fully utilizing the link connection between the communication groups formed by the chip, solve the problem of low communication bandwidth utilization rate between the communication groups formed by the chip, and improve the communication bandwidth utilization rate and the communication efficiency between the multi-processor chips.

[0070] Embodiment two

[0071] Figure 10 is a flowchart of a bandwidth enhancement processing method provided by the embodiment one of the present application. The embodiment can be applicable to the case that the communication between different ports of the chip communication groups is transferred by the communication agent transfer module. The method can be executed by a bandwidth enhancement processing device. The device can be realized by software and / or hardware, and can be generally integrated in the chip. The chip can be further integrated in an electronic device. The electronic device can be a terminal device or a server device. The embodiment of the present application does not limit the specific device type of the electronic device. Correspondingly, as shown in Figure 10 the method includes the following operations.

[0072] S110, receiving transfer communication data sent by the first binding port through the data input channel; wherein the transfer communication data is sent to the first binding port by the non-communication group chip bound by the first binding port.

[0073] S120, sending the transfer communication data to the data output channel of the second binding port through the output port, so as to send the transfer communication data to the non-communication group chip bound by the second binding port through the data output channel of the second binding port.

[0074] In the embodiment of the present application, the communication agent transfer module is configured inside the target chip; a first input port of the communication agent transfer module is in communication connection with a data input channel of a first binding port of the target chip, a second input port of the communication agent transfer module is in communication connection with a data input channel of a second binding port of the target chip, and an output port of the communication agent transfer module is in communication connection with a data output channel of the second binding port; the first binding port and the second binding port are communication ports of the chip.

[0075] In an optional embodiment of the present application, the target chip is further configured to receive a port binding request initiated by a requester chip through an improved network protocol; in response to the port binding request, establish a binding relationship between the communication agent transfer module and the data input channel and the data output channel of the target chip; the target chip is further configured to receive a port unbinding request initiated by the requester chip through the improved network protocol; in response to the port unbinding request, remove the binding relationship between the communication agent transfer module and the data input channel and the data output channel of the target chip.

[0076] In the embodiment of the present application, the communication agent transfer module is configured inside the target chip; a first input port of the communication agent transfer module is in communication connection with a data input channel of a first binding port of the target chip, a second input port of the communication agent transfer module is in communication connection with a data input channel of a second binding port of the target chip, and an output port of the communication agent transfer module is in communication connection with a data output channel of the second binding port; the first binding port and the second binding port are communication ports of the chip.

[0077] Figure 11 is a schematic diagram of the improved network protocol processing request, response, data transmission and removal operation process provided by the second embodiment of the present application. In a specific example, as shown in Figure 11As shown, the requestor chip can initiate a port binding request as a requestor through the improved network protocol. The target chip can receive the port binding request initiated by the requestor chip as a relay, and respond to the port binding request to parse the port binding request, determine the communication agent relay module and the corresponding port identifier required to be bound by the requestor chip according to the parsing result of the port binding request, and establish the binding relationship between the communication agent relay module and the corresponding data input channel and data output channel in the target chip based on the parsed communication agent relay module and the corresponding port identifier. After the target chip successfully establishes the binding relationship between the communication agent relay module and the corresponding data input channel and data output channel according to the port binding request, the target chip can feedback the establishment result of the binding relationship to the requestor chip as a response based on the improved network protocol. At the same time, after the target chip successfully configures the communication agent relay module, the target chip and the requestor can start data transmission based on the configured communication agent relay module, thereby realizing the function of providing the communication agent relay service for the requestor chip based on the target chip.

[0078] Similarly, the requestor chip can initiate a port unbinding request as a requestor through the improved network protocol. The target chip can receive the port unbinding request initiated by the requestor chip as a relay, and respond to the port unbinding request to parse the port unbinding request, determine the communication agent relay module and the corresponding port identifier required to be unbound by the requestor chip according to the parsing result of the port unbinding request, and cancel the binding relationship between the communication agent relay module and the corresponding data input channel and data output channel in the target chip based on the parsed communication agent relay module and the corresponding port identifier. After the target chip successfully cancels the binding relationship between the communication agent relay module and the corresponding data input channel and data output channel according to the port unbinding request, the target chip can feedback the cancellation result of the binding relationship to the requestor chip as a response based on the improved network protocol.

[0079] The above technical solutions can realize that each chip can apply for binding of the port of the communication relay of any other chip, thereby fully utilizing the interconnection communication resources between the chips.

[0080] In an optional embodiment of the present application, the improved network protocol can include an original network protocol field and an extension field; the extension field can include an identifier field, an operator field and a message field; wherein: the identifier field is used to identify the port relay forwarding function of the data packet; the operator field is used to identify the operation type of the data packet; and the message field is used to establish or cancel the binding relationship between the communication agent relay module and the data input channel and data output channel of the target chip.

[0081] The original network protocol field can be a field in an original network protocol. The original network protocol can be a network protocol originally used in communication between chips, i.e., a bottom-layer protocol originally supported by a chip port. For example, the original network protocol can be an Ethernet protocol, etc., as long as it can be used in communication between chips. The embodiments of the present application do not limit the specific protocol type of the original network protocol.

[0082] Figure 12 is a schematic diagram of a protocol structure of an improved network protocol provided by the second embodiment of the present application. In a specific example, as shown in Figure 12 the improved network protocol can be improved on the basis of the original network protocol, and an extension field is added. That is, the improved network protocol can be composed of the original network protocol field and the extension field. The extension field can include an identifier field, an operator field, and a message field. Specifically, the identifier field can be used to identify the port relay forwarding function of the data packet, i.e., it can be identified that the data packet is used for port communication relay forwarding negotiation, rather than ordinary communication data packet. The operator field is used to identify the operation type of the data packet, which can include but is not limited to establishing binding and unbinding, etc. The message field can include specific message content for establishing or unbinding the binding relationship between the communication proxy relay module and the data input channel and the data output channel of the target chip, thereby establishing or unbinding the binding relationship between the communication proxy relay module and the data input channel and the data output channel of the target chip. For example, the message field can be specific control information, which can include forwarding configuration or mapping of network address and port, etc. The Padding (padding) field and the FCS (Frame Check Sequence, frame check sequence) field in the improved network protocol are fields of the original network protocol. The Padding field can be a redundant byte filled to meet the packet length; the FCS field can be the check part of the data packet.

[0083] Correspondingly, in the communication interaction process of the chip, when a chip implements the communication process across the communication groups by using the proxy relay communication link, the message in the corresponding format can be sent to the corresponding chip port based on the improved network protocol.

[0084] The embodiment of the present application provides a communication agent transfer module, which can be configured in a target chip. The first input port of the communication agent transfer module is in communication connection with the data input channel of the first binding port of the target chip, the second input port of the communication agent transfer module is in communication connection with the data input channel of the second binding port of the target chip, and the output port of the communication agent transfer module is in communication connection with the data output channel of the second binding port. The first binding port and the second binding port are communication ports of the chip. Correspondingly, based on the communication agent transfer module, a bandwidth enhancement processing method can be realized. The method receives the transfer communication data sent by the first binding port through the data input channel, and then sends the transfer communication data to the data output channel of the second binding port through the output port, so as to send the transfer communication data to the non-communication group chip bound by the second binding port through the data output channel of the second binding port, wherein the transfer communication data is sent to the first binding port by the non-communication group chip bound by the first binding port. The above technical scheme can realize the bandwidth enhancement processing between the communication groups by fully utilizing the link connection between the communication groups formed by the chip, solve the problem of low communication bandwidth utilization rate between the communication groups formed by the chip, and improve the communication bandwidth utilization rate and the communication efficiency between the multi-processor chips.

[0085] It should be noted that the related information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data for display, analyzed data, etc.) involved in the present disclosure are all information and data authorized by the user or authorized by all parties, and the collection, use and processing of related data comply with relevant laws, regulations and standards in the relevant region.

[0086] It should be noted that any arrangement and combination of the technical features among the above embodiments also belong to the protection scope of the present application.

[0087] Embodiment three

[0088] Figure 13 is a schematic diagram of a bandwidth enhancement processing device provided by the third embodiment of the present application. The bandwidth enhancement processing device is configured in a communication agent transfer module, and the communication agent transfer module is configured in a target chip. The first input port of the communication agent transfer module is in communication connection with the data input channel of the first binding port of the target chip, the second input port of the communication agent transfer module is in communication connection with the data input channel of the second binding port of the target chip, and the output port of the communication agent transfer module is in communication connection with the data output channel of the second binding port. The first binding port and the second binding port are communication ports of the chip.

[0089] Correspondingly, as Figure 13As shown, the bandwidth enhancement processing device comprises a transit communication data receiving module 310 and a transit communication data sending module 320, wherein:

[0090] The transit communication data receiving module 310 is configured to receive transit communication data sent by the data input channel of the first binding port; wherein the transit communication data is sent to the first binding port by the chip corresponding to the port identification number of the first binding port.

[0091] The transit communication data sending module 320 is configured to send the transit communication data to the data output channel of the second binding port through the output port, so as to send the transit communication data to the chip corresponding to the port identification number of the second binding port through the data output channel of the second binding port.

[0092] The embodiment of the present application provides a communication agent transit module which can be configured in a target chip. The first input port of the communication agent transit module is in communication connection with the data input channel of the first binding port of the target chip, the second input port of the communication agent transit module is in communication connection with the data input channel of the second binding port of the target chip, and the output port of the communication agent transit module is in communication connection with the data output channel of the second binding port. The first binding port and the second binding port are communication ports of the chip. Correspondingly, based on the communication agent transit module, a bandwidth enhancement processing method can be realized. The method receives transit communication data sent by the data input channel of the first binding port, and then sends the transit communication data to the data output channel of the second binding port through the output port, so as to send the transit communication data to the non-communication group chip bound by the second binding port through the data output channel of the second binding port, and send the transit communication data to the chip corresponding to the port identification number of the second binding port through the data output channel of the second binding port. The transit communication data is sent to the first binding port by the non-communication group chip bound by the first binding port, and the transit communication data is sent to the first binding port by the chip corresponding to the port identification number of the first binding port. The above technical solution can fully utilize the link connection between the communication groups composed of chips to realize bandwidth enhancement processing between the communication groups, solve the problem of low communication bandwidth utilization rate between the communication groups composed of existing chips, and improve the communication bandwidth utilization rate and communication efficiency between the multi-processor chips.

[0093] Optionally, the target chip is further configured to: receive a port binding request initiated by the requester chip through the improved network protocol; and in response to the port binding request, establish a binding relationship between the communication proxy module and the data input channel and the data output channel of the target chip. The target chip is further configured to: receive a port unbinding request initiated by the requester chip through the improved network protocol; and in response to the port unbinding request, remove the binding relationship between the communication proxy module and the data input channel and the data output channel of the target chip.

[0094] Optionally, the improved network protocol comprises an original network protocol field and an extension field; the extension field comprises an identifier field, an operator field and a message field; wherein: the identifier field is configured to identify a port proxy forwarding function of a data packet; the operator field is configured to identify an operation type of the data packet; and the message field is configured to establish or remove a binding relationship between the communication proxy module and the data input channel and the data output channel of the target chip.

[0095] The bandwidth enhancement processing apparatus described above can perform the bandwidth enhancement processing method provided by any embodiment of the present application, and has the corresponding function modules and beneficial effects of the execution method. Technical details not described in detail in the present embodiment can be referred to the bandwidth enhancement processing method provided by any embodiment of the present application.

[0096] Since the bandwidth enhancement processing apparatus described above is an apparatus that can perform the bandwidth enhancement processing method in the embodiments of the present application, based on the bandwidth enhancement processing method described in the embodiments of the present application, those skilled in the art can understand the specific implementation of the bandwidth enhancement processing apparatus of the present embodiment and its various forms, so the bandwidth enhancement processing apparatus how to implement the bandwidth enhancement processing method in the embodiments of the present application will not be described in detail here. As long as the apparatus used to implement the bandwidth enhancement processing method in the embodiments of the present application is implemented by those skilled in the art, it belongs to the scope of the present application.

[0097] Embodiment Four

[0098] The present embodiment also provides a chip, Figure 14 is a structural schematic diagram of a chip provided by the fourth embodiment of the present application, as Figure 14 shown, the chip can include the communication proxy module described in any embodiment of the present application. Optionally, one or more ports of the chip can be configured with the communication proxy module. That is, one chip can include one or more communication proxy modules.

[0099] The present embodiment also provides an electronic device. Figure 15A structural diagram of an electronic device 10 that can be used to implement embodiments of the present application is shown. The electronic device is intended to represent various forms of digital computers, such as laptops, desktops, workstations, personal digital assistants, servers, blade servers, mainframes, and other appropriate computers. The electronic device can also represent various forms of mobile devices, such as personal digital assistants, cellular telephones, smartphones, wearable devices (e.g., headsets, glasses, watches, etc.), and other similar computing devices. The components shown here, their connections and relationships, and their functions, are meant to be examples only, and are not meant to limit implementations of the present application described and / or claimed in this document.

[0100] As shown, Figure 15 The electronic device 10 includes at least one processor 11, and a memory, such as a read-only memory (ROM) 12, a random access memory (RAM) 13, etc., connected to the at least one processor 11 in communication, where the memory stores computer programs executable by the at least one processor. The processor 11 can be a chip that can include a communication proxy module described in any embodiment of the present application. The processor 11 can perform various appropriate actions and processes according to the computer programs stored in the read-only memory (ROM) 12 or loaded from the storage unit 18 into the random access memory (RAM) 13. In the RAM 13, various programs and data required for the operation of the electronic device 10 can also be stored. The processor 11, the ROM 12, and the RAM 13 are connected to each other through a bus 14. An input / output (I / O) interface 15 is also connected to the bus 14.

[0101] Various components in the electronic device 10 are connected to the I / O interface 15, including an input unit 16, such as a keyboard, a mouse, etc., an output unit 17, such as various types of displays, speakers, etc., a storage unit 18, such as a magnetic disk, an optical disk, etc., and a communication unit 19, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 19 allows the electronic device 10 to exchange information / data with other devices through a computer network, such as the Internet, and / or various telecommunications networks.

[0102] The processor 11 can be various general and / or special purpose processing components with processing and computing capabilities. Some examples of the processor 11 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various special-purpose artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, a digital signal processor (DSP), and any appropriate processor, controller, microcontroller, etc. The processor 11 performs various methods and processes described above, such as the bandwidth enhancement processing method.

[0103] Optionally, the bandwidth enhancement processing method is applied to a communication proxy transfer module in a chip, and the communication proxy transfer module is configured inside a target chip; a first input port of the communication proxy transfer module is in communication connection with a data input channel of a first binding port of the target chip, a second input port of the communication proxy transfer module is in communication connection with a data input channel of a second binding port of the target chip, and an output port of the communication proxy transfer module is in communication connection with a data output channel of the second binding port; the first binding port and the second binding port are communication ports of the chip; the bandwidth enhancement processing method can include: receiving transfer communication data sent by the first binding port through the data input channel; wherein the transfer communication data is sent to the first binding port by a non-communication group chip bound to the first binding port; sending the transfer communication data to the data output channel of the second binding port through the output port, so as to send the transfer communication data to a non-communication group chip bound to the second binding port through the data output channel of the second binding port.

[0104] In some embodiments, the bandwidth enhancement processing method can be implemented as a computer program tangibly embodied in a computer readable storage medium, such as storage unit 18. In some embodiments, parts or all of the computer program can be loaded and / or installed onto electronic device 10 via, for example, ROM 12 and / or communication unit 19. When the computer program is loaded onto RAM 13 and executed by processor 11, one or more steps of the bandwidth enhancement processing method described above can be performed. Alternatively, in other embodiments, processor 11 can be configured to perform the bandwidth enhancement processing method by way of other means, such as by way of firmware.

[0105] Various implementations of the systems and techniques described above can be realized in digital electronic circuitry, integrated circuitry, specially designed application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), computer hardware, firmware, software, and / or combinations thereof. These various implementations can include implementation in one or more computer programs that are executable and / or interpretable on a programmable system including at least one programmable processor, which can be special or general purpose, coupled to receive data and instructions from, and to transmit data and instructions to, a storage system, at least one input device, and at least one output device.

[0106] Computer programs for implementing the methods of the present application can be written in any combination of one or more programming languages. These computer programs can be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus, such that the computer program, when executed, enables the functions / acts specified in the flowcharts and / or block diagrams to be implemented. The computer program can be executed entirely on a machine, partially on a machine, partially on a machine as a standalone software package and partially on a remote machine or entirely on a remote machine or server.

[0107] In the context of the present application, a computer-readable storage medium can be a tangible medium that can contain or store a computer program for use by or in connection with an instruction execution system, apparatus, or device. A computer-readable storage medium can include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. Alternatively, a computer-readable storage medium can be a machine-readable signal medium. More specific examples of a machine-readable storage medium will include one or more lines of a program of instructions in a transitory signal, a portable computer diskette, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or Flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0108] To provide for interaction with a user, the systems and techniques described here can be implemented on an electronic device having a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user and a keyboard and a pointing device (e.g., a mouse or a trackball) by which the user can provide input to the electronic device. Other kinds of devices can be used to provide for interaction with a user as well; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form, including acoustic, speech, or tactile input.

[0109] The systems and techniques described here can be implemented in a computing system that includes a back end component (e.g., as a data server), or that includes a middleware component (e.g., an application server), or that includes a front end component (e.g., a user computer having a graphical user interface or a Web browser through which a user can interact with an implementation of the systems and techniques described here), or any combination of such back end, middleware, or front end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include a local area network (LAN), a wide area network (WAN), blockchain network, and the Internet.

[0110] The computing system can include clients and servers. A client and server are generally remote from each other and typically interact through a communication network. The relationship of client and server arises by virtue of computer programs running on the respective computers and having a client-server relationship to each other. A server can be a cloud server, also known as a cloud computing server or cloud host, which is a host product in the cloud computing service system, to solve the defects of large management difficulty and weak business scalability in traditional physical host and VPS service.

[0111] It should be understood that the various forms of flow shown above can be re-ordered, added to, or deleted from without departing from the scope of the present disclosure. For example, the steps recited in the present disclosure can be executed in parallel, in series, or in a different order, as long as the desired results of the technical solutions of the present disclosure are achieved, and the present disclosure is not limited herein.

[0112] The above detailed description does not constitute a limitation on the protection scope of the present disclosure. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent replacements, and improvements within the spirit and principles of the present disclosure should be included in the protection scope of the present disclosure.

Claims

1. A communication proxy transit module, comprising: The communication agent transfer module is configured in the target chip; a first input port of the communication agent transfer module is in communication connection with a data input channel of a first binding port of the target chip, a second input port of the communication agent transfer module is in communication connection with a data input channel of a second binding port of the target chip, and an output port of the communication agent transfer module is in communication connection with a data output channel of the second binding port; the first binding port and the second binding port are communication ports of the chip; the communication agent transfer module is used for: receiving transfer communication data sent by the first binding port through the data input channel; wherein the transfer communication data is sent to the first binding port by a non-communication group chip bound to the first binding port; sending the transfer communication data to the data output channel of the second binding port through the output port, so as to send the transfer communication data to a non-communication group chip bound to the second binding port through the data output channel of the second binding port.

2. The communication proxy module of claim 1, wherein, The number of the communication agent transfer modules in each chip is determined by the following method: determining the size of a chip communication group; determining a transfer communication link between chips according to the size of the chip communication group and the total number of chips; determining the number of the communication agent transfer modules in each chip according to the transfer communication link between chips.

3. The communication proxy module of claim 2, wherein, The number of chips is 8, and the size of the chip communication group is 2 or 4.

4. A bandwidth enhancement processing method characterized by, The communication agent transfer module is configured in the target chip; a first input port of the communication agent transfer module is in communication connection with a data input channel of a first binding port of the target chip, a second input port of the communication agent transfer module is in communication connection with a data input channel of a second binding port of the target chip, and an output port of the communication agent transfer module is in communication connection with a data output channel of the second binding port; the first binding port and the second binding port are communication ports of the chip; the method comprises: receiving transfer communication data sent by the first binding port through the data input channel; wherein the transfer communication data is sent to the first binding port by a non-communication group chip bound to the first binding port; sending the transfer communication data to the data output channel of the second binding port through the output port, so as to send the transfer communication data to a non-communication group chip bound to the second binding port through the data output channel of the second binding port. The target chip is further used for:

5. The method of claim 4, wherein, receiving a port binding request initiated by a requestor chip through an improved network protocol; in response to the port binding request, establishing a binding relationship between the communication agent transfer module and the data input channel and the data output channel of the target chip; The target chip is further used for: receiving a port unbinding request initiated by a requestor chip through the improved network protocol; in response to the port unbinding request, removing the binding relationship between the communication agent transfer module and the data input channel and the data output channel of the target chip. ​ 6. The method of claim 5, wherein, The improved network protocol comprises an original network protocol field and an extension field; the extension field comprises an identifier field, an operator field and a message field; wherein: The identifier field is used for identifying the port transit forwarding function of the data message; The operator field is used for identifying the operation type of the data message; The message field is used for establishing or releasing the binding relationship between the communication agent transit module and the data input channel and the data output channel of the target chip.

7. A bandwidth enhancement processing device, characterized by, The communication agent transit module is configured in the target chip; a first input port of the communication agent transit module is in communication connection with the data input channel of a first binding port of the target chip, a second input port of the communication agent transit module is in communication connection with the data input channel of a second binding port of the target chip, and an output port of the communication agent transit module is in communication connection with the data output channel of the second binding port; The first binding port and the second binding port are communication ports of the chip; the device comprises: A transit communication data receiving module is configured to receive transit communication data sent by the data input channel of the first binding port; wherein the transit communication data is sent to the first binding port by the chip corresponding to the port identification number of the first binding port; A transit communication data sending module is configured to send the transit communication data to the data output channel of the second binding port through the output port, so as to send the transit communication data to the chip corresponding to the port identification number of the second binding port through the data output channel of the second binding port.

8. A chip, characterized by The chip comprises the communication agent transit module according to any one of claims 1-3.

9. An electronic device, comprising: The electronic device comprises the chip according to claim 8.

10. A computer-readable storage medium, characterized in that, The computer readable storage medium stores computer instructions, and the computer instructions are used to make the processor execute the bandwidth enhancement processing method according to any one of claims 4-6.

11. A computer program product comprising computer programs / instructions, wherein, The computer program / instructions are executed by the processor to implement the bandwidth enhancement processing method according to any one of claims 4-6.

Citation Information

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