System-in-package vehicle package substrate based on tenting process and processing method thereof
By improving the tenting process, including through-hole plating, resin plugging, and thickened copper plating, the problems of low yield and poor pad consistency in the processing of system-level automotive packaging substrates have been solved, achieving efficient and low-cost substrate production.
Patent Information
- Application Number
- CN202510889138.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-06-30
- Publication Date
- 2026-08-25
- Estimated Expiration
- 2045-06-30
AI Technical Summary
Existing system-level automotive packaging substrates have low yield rates and poor pad consistency during processing, making it difficult to meet the needs of mass production.
The process employs a tenting-based method, which includes through-hole plating, resin plugging, grinding, thickened copper plating, and electroplating. By differentially controlling plating efficiency and etching parameters, the consistency of copper layer thickness and pad size accuracy are ensured.
It significantly improves the dimensional consistency of the outer layer patterned product, increases the processing yield, reduces costs, and meets the usage requirements of system-level automotive packaging substrates.
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Figure CN120751594B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of circuit board technology, and in particular to a system-level automotive packaging substrate based on Tenting technology and its processing method. Background Technology
[0002] With the development of society and science and technology, automotive electronic products are becoming increasingly integrated. By stacking / integrating multiple functional chips on the same packaging substrate, not only can close-range integration be achieved and the product packaging size be reduced, but modules with different functions can also be customized according to different specific application scenarios. This not only improves application performance but also significantly reduces power consumption and saves packaging substrate space.
[0003] Currently, the manufacturing process of system-level automotive packaging substrates requires the following design specifications: mechanical fabrication of vias; copper plating after via plugging; fabrication of matrix-arranged wire bonding pads with micro-pitch, specifically: upper dimension of the wire bonding pads ≤ 50μm, pad spacing ≥ 15μm; etc. However, limited by the current industry-standard tenting process, the yield rate of system-level automotive packaging substrates during mass production is low, and pad consistency is poor.
[0004] In view of this, the present invention is hereby proposed. Summary of the Invention
[0005] To overcome the above-mentioned defects, the present invention provides a system-level automotive packaging substrate based on the Tenting process and its processing method. The processing method is simple and reasonable, with high processing yield and low processing cost. In particular, it can significantly improve the dimensional consistency of the outer layer patterned product, which well meets the usage requirements of the system-level automotive packaging substrate.
[0006] The technical solution adopted by this invention to solve its technical problem is: a method for processing a system-level automotive packaging substrate based on Tenting technology, comprising: A first PNL board is provided, the first PNL board having two oppositely arranged outer copper foils and a through hole penetrating the two outer copper foils; The first PNL board is subjected to through-hole electroplating to form a connecting copper layer on the inner wall of the through hole. The connecting copper layer extends and covers the two outer copper foils and surrounds the predetermined areas outside the two ports of the through hole. The portion of the connecting copper layer covering the outer copper foil is defined as the annular copper layer. The through holes are plugged with resin; The two ends of the through hole are ground to remove the resin protruding from the two ends of the through hole; then the copper layer of the annular hole is subjected to copper reduction treatment and then the whole board is ground to control the thickness of the copper layer of the annular hole to 4-6μm, thereby forming a micro step between the outer copper foil and the copper layer of the annular hole. A thickened copper layer with uniform thickness is formed on the two outer copper foils and the annular copper layer by electroplating. An outer layer pattern is then fabricated on the thickened copper layer by circuit fabrication process, resulting in a second PNL board. The obtained second PNL board is subjected to solder resist treatment, and then electroplating is performed using a processing method with a current density of less than 1.2 ASD and dummy gold-plated fingers set on the edge of the obtained second PNL board and between SETs to obtain an outer layer pattern product with uniform thickness; the outer layer pattern product has a number of wire bonding pads arranged in a matrix, the upper width of the wire bonding pads is 35-50 μm, the lower width is 40-55 μm, and the spacing between each two adjacent wire bonding pads is 10-25 μm.
[0007] As a further improvement of the present invention, the specific processing parameters for the above-mentioned through-hole electroplating are as follows: the current density is 1.0 to 1.3 ASD; the first PNL plate, which is placed vertically, is divided into an upper part, a middle part, and a lower part from top to bottom, and the electroplating efficiency corresponding to the upper part of the plate is 105% to 115%, the electroplating efficiency corresponding to the middle part of the plate is 90% to 100%, and the electroplating efficiency corresponding to the lower part of the plate is 80% to 90%, so that the copper thickness tolerance of the connecting copper layer is ±1.5 μm.
[0008] As a further improvement of the present invention, before performing the above-mentioned through-hole electroplating, the first PNL board needs to be sequentially coated with a resist-plating photosensitive film, exposed and developed to achieve the coating of a film layer with a cutout window A on the two outer copper foils respectively. At the same time, the two ports of the through hole and the preset areas on the two outer copper foils surrounding the two ports of the through hole are exposed to the cutout window A respectively. After the above-mentioned through-hole electroplating is completed, the resist-plating photosensitive film is removed.
[0009] As a further improvement of the present invention, before the above-mentioned resin plugging is performed, the first PNL board needs to be pretreated, dipped in ink, exposed and developed in sequence to achieve the application of ink layers with hollow windows B on the two outer copper foils respectively. At the same time, the two ends of the through hole and the copper layer of the annular hole are exposed through the hollow window B respectively. After the resin plugging is completed, a baking process at 100℃~120℃ for 25~35 minutes is required to pre-cure the resin in the through hole. In addition, after the microsteps are formed, a baking treatment at a temperature of 150°C to 160°C is required for 50 to 60 minutes to completely cure the resin in the through-holes.
[0010] As a further improvement of the present invention, the electroplating processing parameters used in fabricating the thickened copper layer are as follows: the current density is not greater than 1.2 ASD; the vertically placed first PNL board is divided from top to bottom into an upper part, a middle part, and a lower part, and the electroplating efficiency corresponding to the upper part of the board is 110% to 120%, the electroplating efficiency corresponding to the middle part of the board is 95% to 105%, and the electroplating efficiency corresponding to the lower part of the board is 85% to 95%, so that the copper thickness tolerance of the thickened copper layer is ±1.5 μm.
[0011] As a further improvement of the present invention, the above-mentioned circuit fabrication process includes pretreatment, coating with a photosensitive resist film, exposure, development, vacuum two-fluid etching, and film removal processes performed sequentially; wherein, during the vacuum two-fluid etching process, the surface of the etched wire bonding pads is facing downwards, and the etching spray pressure is 1.2 to 1.4 kg / cm². 2 .
[0012] As a further improvement of the present invention, the outer layer pattern includes an outer layer circuit pattern and a pad pattern. The pad pattern is composed of a plurality of wire bonding pads arranged in a matrix. The technical parameters of the pad pattern are as follows: the upper width of the wire bonding pad is 25-40 μm, the lower width is 30-45 μm, and the spacing between each two adjacent wire bonding pads is 20-35 μm.
[0013] As a further improvement of the present invention, during the electroplating process, a plurality of the aforementioned dummy gold-plated fingers are respectively provided around the edge of the obtained second PNL board and between SETs. The technical parameters of the dummy gold-plated fingers are as follows: the length of the dummy gold-plated fingers is 20±0.05mm, the width of the dummy gold-plated fingers is 2±0.05mm, and the distance between each pair of adjacent dummy gold-plated fingers is 50±0.05mm.
[0014] As a further improvement of the present invention, the method for manufacturing the first PNL board is as follows: providing an insulating intermediate layer and two composite copper layers, wherein each of the two composite copper layers is provided with a carrier copper layer and an ultra-thin copper layer disposed on the carrier copper layer in a detachable manner; After the insulating intermediate layer and the two composite copper layers are stacked and then pressed together, a substrate is obtained; wherein, the ultra-thin copper layers of the two composite copper layers are respectively attached to the opposite sides of the insulating intermediate layer. The first PNL board is obtained by sequentially performing QR code printing, mechanical drilling, removal of the carrier copper layer, and copper plating on the substrate.
[0015] The present invention also provides a system-level automotive packaging substrate based on the Tenting process, which is manufactured using the processing method of the system-level automotive packaging substrate based on the Tenting process described in the present invention.
[0016] The beneficial effects of this invention are: ① Through process innovation, particularly in the "through-hole electroplating process," "micro-step formation process," "copper layer thickening process," and "electroplating process" of the system-level automotive packaging substrate, this invention significantly improves the dimensional consistency of the outer layer patterned products. Production verification shows that the dimensional consistency of the outer layer circuitry and wire bonding pads obtained by this invention is improved by approximately 15%, effectively meeting the usage requirements of system-level automotive packaging substrates. ② The processing method for the system-level automotive packaging substrate provided by this invention is simple and reasonable, with high yield and low processing cost, which is conducive to production implementation. Attached Figure Description
[0017] Figure 1 This is a flowchart of the processing method for a system-level automotive packaging substrate based on Tenting technology as described in Embodiment 1 of the present invention; Figure 2 This is a schematic cross-sectional view of the substrate described in Embodiment 1 of the present invention; Figure 3 This is a schematic cross-sectional view of the first PNL plate obtained in Embodiment 1 of the present invention; Figure 4 This is a schematic cross-sectional view of the board obtained after coating the first PNL board with a film layer in Embodiment 1 of the present invention. Figure 5 This is a schematic cross-sectional view of the board obtained after electroplating the through holes of the first PNL board in Embodiment 1 of the present invention. Figure 6 This is a schematic cross-sectional view of the board obtained after applying an ink layer to the first PNL board in Embodiment 1 of the present invention. Figure 7 This is a schematic cross-sectional view of the board obtained after resin plugging of the through holes in Embodiment 1 of the present invention. Figure 8 This is a schematic cross-sectional view of the board obtained after the first PNL board has undergone two-stage grinding and copper reduction treatment in Embodiment 1 of the present invention. Figure 9 for Figure 8 An enlarged structural diagram of part A shown in the image; Figure 10 This is a schematic cross-sectional view of the board obtained after the thickened copper layer is formed by electroplating in Embodiment 1 of the present invention. Figure 11 This is a schematic cross-sectional view of the second PNL plate obtained in Embodiment 1 of the present invention; Figure 12 This is a schematic cross-sectional view of the system-level automotive packaging substrate obtained in Embodiment 1 of the present invention.
[0018] Referring to the accompanying drawings, the following explanations are provided: 1. First PNL board; 10. Outer copper foil; 11. Through hole; 12. Connecting copper layer; 120. Ring hole copper layer; 13. Insulating intermediate layer; 14. Carrier copper layer; 2. Thickened copper layer; 3. Outer layer pattern; 30. Outer layer circuit pattern; 31. Pad pattern; 4. Film layer; 40. Cutout window A; 5. Ink layer; 50. Cutout window B; 6. Resin; 7. Nickel-gold layer; 8. Solder mask layer. Detailed Implementation
[0019] The preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings.
[0020] Example 1:
[0021] Please see the appendix Figure 1 To be continued Figure 12 As shown, this embodiment 1 provides a method for processing a system-level automotive packaging substrate based on Tenting technology, including the following processing steps: S1: A first PNL board 1 is provided, the first PNL board 1 having two oppositely arranged outer copper foils 10 and through holes 11 penetrating the two outer copper foils 10.
[0022] Specifically, in this embodiment, the preferred manufacturing method for the first PNL board 1 is as follows: S10: Provide an insulating intermediate layer 13 and two composite copper layers, each of the two composite copper layers having a carrier copper layer 14 and an ultrathin copper layer disposed on the carrier copper layer 14 in a detachable manner.
[0023] The insulating intermediate layer 13 may be composed of at least two prepreg sheets. The composite copper layer is formed by depositing the ultrathin copper layer onto the carrier copper layer 14, which has been treated with chemicals, using an electrodeposition process. The thickness of the carrier copper layer 14 is preferably 17±2μm, the thickness of the ultrathin copper layer is preferably controlled to be 2-3μm, and the copper tooth Rz value is preferably controlled to be no greater than 0.8μm.
[0024] Note: The chemical treatment of the carrier copper layer 14 before electrodepositing the ultrathin copper layer is to ensure that the carrier copper layer 14 and the ultrathin copper layer have a certain peel force while also enabling good mechanical separation between them. This is a conventional technique in the field of circuit board technology and will not be described in detail here.
[0025] S11: After stacking the insulating intermediate layer 13 and the two composite copper layers, a lamination process is performed to obtain a substrate; wherein, the ultra-thin copper layers of the two composite copper layers are respectively attached to opposite sides of the insulating intermediate layer 13; see appendix for details. Figure 2 As shown.
[0026] The pressing process described above uses an electric heating pressing method, and the specific processing parameters for the pressing process are: heating rate ≥ 8℃ / min, maximum pressing temperature ≥ 230℃, and maximum pressing pressure ≥ 450Psi.
[0027] Understandably, by using a lamination process, not only can the ultra-thin copper layer and the insulating intermediate layer be easily and reliably bonded, but also boards of different thicknesses can be manufactured according to product design requirements.
[0028] S12: In conjunction with the ERP system, use a QR code printer to mark a unique PNL QR code on the edge area of the substrate.
[0029] S13: Drill the required through holes 11 on the substrate using a mechanical drilling machine; it is understood that the two ends of the through holes 11 respectively penetrate the carrier copper layers 14 on the two composite copper layers.
[0030] S14: Remove the carrier copper layer 14 from the two composite copper layers using a mechanical stripping method.
[0031] S15: First, remove the adhesive residue from the walls of the through-hole 11, then perform a whole-board copper deposition process on the substrate (i.e., deposit a thin copper layer on the surfaces of the two ultra-thin copper layers and on the inner wall of the through-hole 11), thus obtaining the first PNL board 1. For clarification, please refer to the appendix. Figure 3 As shown, the first PNL board 1 has an insulating intermediate layer 13, two outer copper foils 10 (composed of an ultra-thin copper layer and thin copper deposited thereon) respectively attached to the opposite sides of the insulating intermediate layer 13, and through holes 11 penetrating the insulating intermediate layer 13 and the two outer copper foils 10. Thin copper is also deposited on the inner wall of the through holes 11 (which can be understood as metallization treatment).
[0032] Of course, in practical applications, the first PNL board 1 may also adopt other implementation structures. This application does not impose any restrictions, and the specific implementation structure shall be determined according to the design requirements of the circuit board product.
[0033] S2: Through-hole electroplating is performed on the first PNL board 1 to form a connecting copper layer 12 on the inner wall of the through-hole 11. The connecting copper layer 12 extends and covers the two outer copper foils 10 and surrounds a predetermined area outside the two ports of the through-hole 11. It is understood that the specific size of the "preset area" is determined according to the circuit board product design requirements, and this application does not impose any restrictions. In addition, for the convenience of describing the processing method of the system-level automotive packaging substrate described in this application, the portion of the connecting copper layer 12 covering the outer copper foil 10 is also defined as the annular copper layer 120. For details, please refer to the appendix. Figure 5 As shown.
[0034] Specifically, the preferred implementation method for S2 is as follows: S20: The first PNL board 1 is sequentially coated with a photosensitive film, exposed and developed to achieve the coating of film layers 4 with hollow windows A40 on the two outer copper foils 10 respectively. At the same time, the two ports of the through hole 11 and the preset areas on the two outer copper foils 10 and surrounding the two ports of the through hole 11 are exposed through the hollow windows A40 respectively.
[0035] The above-mentioned photosensitive anti-plating film coating process involves applying the photosensitive anti-plating film onto the two outer copper foils 10 using a vacuum laminator. The above-mentioned exposure process involves exposing a portion of the photosensitive anti-plating film using an LDI exposure machine according to the work instructions. The above-mentioned development process involves removing the unexposed areas of the photosensitive anti-plating film, specifically removing the photosensitive anti-plating film located at the two ends of the through-hole 11 and in predetermined areas on the two outer copper foils 10 surrounding the two ends of the through-hole 11, to form the perforated window A40. At this point, the film layer 4 with the perforated window A40 can be applied to the two outer copper foils 10 respectively. For details, please refer to the appendix. Figure 4 As shown.
[0036] S21: The first PNL board 1 is subjected to through-hole electroplating using a pattern-controlled through-hole electroplating process, so as to plate the connecting copper layer 12 on the inner wall of the through-hole 11 and on the two outer copper foils 10 and on the predetermined areas surrounding the two ends of the through-hole 11, respectively. See Appendix. Figure 5As shown; the specific processing parameters for the above-mentioned through-hole electroplating are: ① The current density is 1.0~1.3ASD, which is 20% lower than the current density in the traditional pattern electroplating process; ② If the vertically placed first PNL plate 1 is divided into an upper part, a middle part, and a lower part from top to bottom, the electroplating efficiency corresponding to the upper part of the plate is 105%~115%, the electroplating efficiency corresponding to the middle part of the plate is 90%~100%, and the electroplating efficiency corresponding to the lower part of the plate is 80%~90%. That is, during the through-hole electroplating process, the electroplating efficiency decreases in a stepwise manner along the vertical direction of the first PNL plate 1, which is inversely related to the electric field distribution; ③ The jet pressure is increased by 15% to 25% compared with the jet pressure in the traditional pattern electroplating process; thereby enabling the copper thickness tolerance of the connecting copper layer 12 to be optimally controlled at ±1.5μm, effectively improving the consistency of the thickness of the connecting copper layer 12, which also provides technical support for the subsequent process to obtain a thickened copper layer 2 with good thickness consistency.
[0037] Notes: ① As is well known in the field of circuit board technology, the formula for calculating the thickness of electroplated copper layers is: Electroplated copper layer thickness (μm) = Current density (ASF) × Electroplating time (min) × Electroplating efficiency × Electroplating coefficient; where, current density is the number of amperes of current passing through a unit area per square foot; electroplating time is the duration of the electroplating process; electroplating efficiency is the actual utilization efficiency of the current during the electroplating process; and the electroplating coefficient is a constant of 0.0202. It is understandable that electroplating efficiency can significantly affect the thickness of the electroplated copper layer. ② To achieve differentiated control of the electroplating efficiency at various locations on the connecting copper layer 12, this embodiment utilizes three rectifiers to manage the electroplating efficiency and current density applied to the upper, middle, and lower parts of the board, respectively.
[0038] S22: After the above-mentioned through-hole electroplating is completed, the anti-plating photosensitive dry film on the outer copper foil 10 is removed by a combination of immersion in strong alkaline solution and spraying.
[0039] S3: First, the first PNL board 1 is subjected to pretreatment, ink dipping, exposure, and development processes in sequence to achieve the deposition of ink layers 5 with perforated windows B50 on the two outer copper foils 10. At the same time, the two ends of the through hole 11 and the annular copper layer 120 are respectively exposed through the perforated windows B50. See Appendix. Figure 6 As shown; it can be understood that the ink layer 5 serves as a protective layer to protect the copper surface of the first PNL board 1 during the following grinding and copper reduction operations; then, a vacuum resin plugging machine is used to plug the through holes 11 with resin to fill and compact the resin 6 within the through holes 11, as shown in the attached document. Figure 7As shown; then, a baking treatment at a temperature of 100℃~120℃ for 25~35 minutes is performed to pre-cure the resin 6 in the through hole 11.
[0040] The pretreatment process involves cleaning and drying the first PNL board 1. The ink coating process involves immersing the first PNL board 1 in ink to coat it with an ink layer 5. The exposure process involves exposing a portion of the ink layer 5 using an LDI exposure machine according to the work instructions. The development process involves removing the unexposed areas of the ink layer 5, specifically removing the ink layer 5 located on the inner wall of the through hole 11 and the annular copper layer 120 to form a cutout window B50. Thus, the ink layer 5 with the cutout window B50 can be coated onto the two outer copper foils 10 respectively.
[0041] S4: First, use a ceramic brush wheel to grind the two ends of the through hole 11 to remove the resin protruding from the two ends of the through hole 11; then, use an etching process (specifically a micro-etching process) to reduce the copper content of the connecting copper layer 12 (i.e., the annular hole copper layer 120) covering the outer copper foil 10; then, use a mechanical grinding device to grind the entire first PNL board 1 to control the thickness of the annular hole copper layer 120 to 4-6 μm, thereby forming a micro-step between the outer copper foil 10 and the annular hole copper layer 120 (see Appendix for details). Figure 8 and 9 As shown), this ensures that the thickness consistency of the thickened copper layer 2 produced in subsequent processes is greatly improved.
[0042] In addition, after the microsteps are formed, this embodiment also removes the ink layer 5 by a combination of soaking, spraying and shaking with chemicals, and bakes it at a temperature of 150°C to 160°C for 50 to 60 minutes to completely cure the resin 6 in the through hole 11.
[0043] Understandably, by adopting the above-mentioned two-stage grinding and copper reduction process combination, this application can effectively overcome the problems of micro-steps and poor copper thickness consistency caused by the alignment misalignment due to multiple exposures, and significantly improve the consistency of micro-steps and copper thickness.
[0044] S5: A thickened copper layer 2 with uniform thickness is formed on the two outer copper foils 10 and the annular copper layer 120 thereon through an electroplating process. See the appendix for details. Figure 10 As shown; then, using circuit fabrication technology, an outer layer pattern 3 is fabricated on the thickened copper layer 2 to obtain the second PNL board; see attached document. Figure 11 As shown.
[0045] Specifically, in this embodiment, a full-board via-filling electroplating process is used to form the thickened copper layer 2 on the two outer copper foils 10 and the annular copper layer 120. The specific processing parameters of the full-board via-filling electroplating process are: ① The current density is not greater than 1.2 ASD, which is 20% lower than the traditional via-filling electroplating process; ② If the vertically placed first PNL board 1 is divided into an upper part, a middle part, and a lower part from top to bottom, the electroplating efficiency corresponding to the upper part of the board is 110% to 120%. The electroplating efficiency in the middle of the board is 95%–105%, and the electroplating efficiency in the lower part of the board is 85%–95%. That is, during the above-mentioned whole-board via-filling electroplating process, the electroplating efficiency decreases in a stepwise manner along the vertical direction of the first PNL board 1, which is inversely related to the electric field line distribution. This allows the copper thickness tolerance of the thickened copper layer 2 to be precisely controlled to ±1.5μm, with excellent thickness consistency, providing excellent technical support and guarantee for the subsequent fabrication of precision circuits. Furthermore, the above-mentioned whole-board via-filling electroplating process also overcomes the problem of poor wire bonding caused by the grinding marks generated in S4.
[0046] Similar to S21 above, in order to achieve differentiated control of the electroplating efficiency at different locations of the thickened copper layer 2, this embodiment also uses three rectifiers to manage the electroplating efficiency and current density applied to the upper, middle and lower parts of the board respectively.
[0047] In addition, prior to the aforementioned vertical electroplating process, this embodiment further roughens the resin 6 at both ends of the through-hole 11 and performs copper plating treatment on the outer copper foil 10 and the annular copper layer 120 to improve the stability of the bond between the thickened copper layer 2 and the resin 6, the outer copper foil 10, and the annular copper layer 120. Furthermore, the thickness of the thickened copper layer 2 is determined according to the circuit board product design requirements, and this embodiment does not impose any limitations.
[0048] In this embodiment, the preferred circuit fabrication process for creating the outer layer pattern 3 includes the following steps: pretreatment, coating with a photosensitive resist film, exposure, development, vacuum two-fluid etching, and film removal. Specifically, the pretreatment involves cleaning and drying the first PNL board 1; the coating with the photosensitive resist film involves applying the photosensitive resist film onto the two thickened copper layers 2 using a vacuum laminator; the exposure involves exposing a portion of the photosensitive resist film using an LDI exposure machine according to work instructions; the development involves removing the unexposed areas of the photosensitive resist film; and the vacuum two-fluid etching involves using a vacuum two-fluid etching device to etch the portion of the thickened copper layer 2 exposed outside the photosensitive resist film to obtain the outer layer pattern 3. Furthermore, during the vacuum two-fluid etching process, the etched wire bonding pads are positioned downwards, and the etching spray pressure is optimally controlled at 1.2–1.4 kg / cm². 2The above-mentioned film removal process involves using a strongly alkaline solution to completely remove the photosensitive dry film.
[0049] Through the above-described circuit fabrication process, the structure and technical parameters of the outer layer pattern 3 obtained in this embodiment are as follows: Please refer to the appendix for further details. Figure 11 As shown, the outer layer pattern 3 includes an outer layer circuit pattern 30 and a pad pattern 31. The line width of the outer layer circuit pattern 30 is 20-40 μm and the line spacing is 20-40 μm. The pad pattern 31 is composed of several wire bonding pads arranged in a matrix. The upper width of the wire bonding pad is 25-40 μm and the lower width is 30-45 μm. The spacing between each two adjacent wire bonding pads is 20-35 μm.
[0050] Additional notes: ① In the PCB industry, the upper part of the vertically arranged wire bonding pads is usually referred to as the "upper section" and the lower part as the "lower section". ② According to the PCB product design requirements, the outer layer circuit pattern 30 is formed on each of the two thickened copper layers 2, and the pad pattern 31 is formed on at least one of the two thickened copper layers 2.
[0051] In addition, after completing the above-mentioned circuit fabrication, this embodiment also performs appearance AOI inspection on the obtained outer layer graphic 3 for confirmation. If there is any defective information, it will be uploaded and stored in conjunction with the PNL QR code.
[0052] S6: The obtained second PNL board is subjected to solder resist treatment, and then electroplating is performed using a current density of less than 1.2 ASD (50% to 70% of the current density in conventional electroplating processes), and dummy gold-plated fingers are set around the edges of the obtained second PNL board and between SETs to obtain an outer layer pattern product with uniform thickness; wherein, the outer layer pattern product has a plurality of wire bonding pads arranged in a matrix, the upper width of the wire bonding pads is 35 to 50 μm, the lower width is 40 to 55 μm, and the spacing between each two adjacent wire bonding pads is 10 to 25 μm; for details, please refer to the appendix. Figure 12 As shown.
[0053] Specifically, in this embodiment, the second PNL board is subjected to pretreatment, solder resist coating, pre-baking, exposure, development, and post-baking processes in sequence to achieve the protection of the non-soldering area surface of the obtained second PNL board by covering it with a solder resist layer 8 and to remove the solder resist layer on the soldering area surface of the obtained second PNL board. The above-mentioned solder resist process is a commonly used solder resist process in the field of circuit board technology and is common knowledge, so it will not be described in detail here.
[0054] In this embodiment, the second PNL board after solder resist treatment is sequentially subjected to pretreatment, coating with resist photosensitive film, exposure, development, nickel plating, and gold plating to achieve nickel-gold plating 7 on the outer layer pattern 3. The pretreatment involves cleaning and drying the second PNL board. The coating with resist photosensitive film involves applying the resist photosensitive dry film to the two thickened copper layers 2 (including the outer layer pattern 3) using a vacuum laminator. The exposure involves exposing a portion of the resist photosensitive dry film using an LDI exposure machine according to the work instructions. The development removes the unexposed areas of the resist photosensitive dry film, specifically removing the resist photosensitive dry film applied to the pad pattern 31 and its surrounding designated area (determined according to the circuit board product design requirements), and removing the resist photosensitive dry film applied to the surface of the designated area of the outer layer circuit pattern 30. The nickel plating and gold plating processes are as follows: Gold layer treatment: A nickel layer and a gold layer are sequentially plated on the area of the outer pattern 3 not covered by the photosensitive dry film using an electroplating process (i.e., the gold layer is deposited on top of the nickel layer, and the nickel layer and the gold layer are conventionally referred to as the nickel-gold layer 7 in the industry). In addition, during the above-mentioned electroplating of the nickel layer and the electroplating of the gold layer, this embodiment controls the current density to be below 1.2 ASD, which is 30% to 50% lower than conventional electroplating operations. Several dummy gold-plated fingers are set around the edges of the obtained second PNL board and between SETs. The technical parameters of the dummy gold-plated fingers are: the length of the dummy gold-plated fingers is 20±0.05mm, the width of the fingers is 2±0.05mm, and the distance between each two adjacent dummy gold-plated fingers is 50±0.05mm. This greatly improves the consistency of the thickness of the nickel-gold layer 7. Production verification shows that the thickness consistency of the nickel-gold layer 7 obtained in this embodiment is improved by 15%. Additional notes: In the PCB industry, PNL, SET, and PCS are commonly used units. A PNL consists of one or more SETs, and a SET consists of one or more PCSs.
[0055] Furthermore, based on the above description of the structure and technical parameters of the outer layer circuit pattern 30, the structure and technical parameters of the finished outer layer pattern after electroplating are as follows: Please refer to the appendix. Figure 12 As shown, the outer layer circuit pattern 30 and the nickel-gold layer 7 together constitute the outer layer circuit product, and the technical parameters of the outer layer circuit product are: line width of 20-40μm and line spacing of 20-40μm; the pad pattern 31 and the nickel-gold layer 7 together constitute the pad pattern product, and the technical parameters of the pad pattern product are: the upper width of the wire bonding pad product is 35-50μm, the lower width is 40-55μm, and the spacing between each two adjacent wire bonding pad products is 10-25μm.
[0056] Furthermore, according to product design requirements, this embodiment also performs conventional molding, electrical testing, finished product inspection, packaging and shipping processes on the second PNL board after electroplating, in order to complete the subsequent fabrication of the system-level automotive packaging substrate based on the Tenting process. Please refer to the attached diagram for the structural diagram of the resulting system-level automotive packaging substrate. Figure 12 As shown.
[0057] As can be seen from the above, this application has significantly improved the dimensional consistency of the outer layer pattern products through process innovation, especially the innovation of "through-hole electroplating process", "micro-step formation process", "thickened copper layer fabrication process" and "electroplating process". Production verification shows that the dimensional consistency of the outer layer circuit products and wire bonding pad products obtained by this application has been improved by 15%, which well meets the usage requirements of system-level automotive packaging substrates.
[0058] Example 2:
[0059] This embodiment 2 provides a system-level automotive packaging substrate based on the Tenting process, which is manufactured using the processing method for the system-level automotive packaging substrate based on the Tenting process described in embodiment 1 above.
[0060] Specifically, the specific structure of the system-level automotive packaging substrate described in Embodiment 2 is as follows: Please refer to the appendix. Figure 12 As shown, the system-level automotive packaging substrate includes an insulating intermediate layer 13 and two outer layer pattern products respectively disposed on opposite sides of the insulating intermediate layer 13. The outer layer pattern products have outer layer circuit products and pad pattern products. The line width of the outer layer circuit products is 20-40 μm and the line spacing is 20-40 μm. The pad pattern products are composed of a number of wire bonding pad products arranged in a matrix. The upper width of the wire bonding pad products is 35-50 μm and the lower width is 40-55 μm. The spacing between each pair of adjacent wire bonding pad products is 10-25 μm. In addition, the two outer layer circuit products are electrically connected through a connecting copper layer 12.
[0061] As can be seen from the above, the outer layer pattern of the system-level automotive packaging substrate described in this embodiment 2 has a very high dimensional consistency, which is 15% higher than the prior art, and well meets market demand.
[0062] Finally, the prefixes "first," "second," etc. (such as first PNL board, second PNL board, etc.) and suffixes "A," "B," etc. (such as cutout window A, cutout window B, etc.) in the component names in this application specification are only for ease of description and are not intended to limit the scope of implementation of this invention patent.
[0063] Many specific details have been set forth in the foregoing description to provide a thorough understanding of the present invention. However, the above description is merely a preferred embodiment of the present invention, and the present invention can be implemented in many other ways different from those described herein. Therefore, the present invention is not limited to the specific embodiments disclosed above. Furthermore, any person skilled in the art can make many possible variations and modifications to the technical solutions of the present invention, or modify them into equivalent embodiments, using the methods and techniques disclosed above, without departing from the scope of the present invention. Any simple modifications, equivalent changes, and modifications made to the above embodiments based on the technical essence of the present invention, without departing from the content of the present invention, shall still fall within the protection scope of the present invention.
Claims
1. A method for fabricating a system-level automotive packaging substrate based on Tenting technology, characterized in that: include: A first PNL board (1) is provided, the first PNL board (1) having two oppositely arranged outer copper foils (10) and a through hole (11) penetrating the two outer copper foils (10); The first PNL board (1) is subjected to through-hole electroplating to form a connecting copper layer (12) on the inner wall of the through hole (11). The connecting copper layer (12) extends and covers the two outer copper foils (10) and surrounds the predetermined area outside the two ports of the through hole (11). The portion of the connecting copper layer (12) covering the outer copper foils (10) is defined as the annular copper layer. The through hole (11) is plugged with resin; The two ends of the through hole (11) are ground to remove the resin protruding from the two ends of the through hole (11); then the copper layer of the annular hole is subjected to copper reduction treatment and then the whole board is ground to control the thickness of the copper layer of the annular hole to 4-6 μm, thereby forming a micro step between the outer copper foil (10) and the copper layer of the annular hole. A thickened copper layer (2) with uniform thickness is formed on the two outer copper foils (10) and the annular copper layer by electroplating process, and an outer layer pattern (3) is formed on the thickened copper layer (2) by circuit fabrication process; thus, a second PNL board is obtained. The obtained second PNL board is subjected to solder resist treatment, and then electroplating is performed using a processing method with a current density of less than 1.2 ASD and dummy gold-plated fingers set on the edge of the obtained second PNL board and between SETs to obtain an outer layer pattern product with uniform thickness; the outer layer pattern product has a number of wire bonding pads arranged in a matrix, the upper width of the wire bonding pads is 35-50 μm, the lower width is 40-55 μm, and the spacing between each two adjacent wire bonding pads is 10-25 μm.
2. The method for processing a system-level automotive packaging substrate based on Tenting technology according to claim 1, characterized in that: The specific processing parameters for the above-mentioned through-hole electroplating are as follows: the current density is 1.0 to 1.3 ASD; the first PNL plate (1) placed vertically is divided into an upper part, a middle part and a lower part from top to bottom, and the electroplating efficiency corresponding to the upper part of the plate is 105% to 115%, the electroplating efficiency corresponding to the middle part of the plate is 90% to 100%, and the electroplating efficiency corresponding to the lower part of the plate is 80% to 90%, so that the copper thickness tolerance of the connecting copper layer (12) is ±1.5μm.
3. The method for processing a system-level automotive packaging substrate based on Tenting technology according to claim 1, characterized in that: Before performing the above-mentioned through-hole electroplating, the first PNL board (1) needs to be coated with a photosensitive film, exposed and developed in sequence to achieve the coating of a film layer with a hollow window A on the two outer copper foils (10). At the same time, the two ports of the through hole (11) and the preset areas on the two outer copper foils (10) and surrounding the two ports of the through hole (11) are exposed to the hollow window A. After completing the above-mentioned through-hole electroplating, the photosensitive film is removed.
4. The method for processing a system-level automotive packaging substrate based on Tenting technology according to claim 1, characterized in that: Before the above-mentioned resin plugging is performed, the first PNL board (1) needs to be pretreated, dipped in ink, exposed and developed in sequence to achieve the application of ink layers with hollow windows B on the two outer copper foils (10). At the same time, the two ends of the through hole (11) and the copper layer of the annular hole are exposed in the hollow window B. After the resin plugging is completed, a baking process at 100℃~120℃ for 25~35 minutes is required to pre-cure the resin in the through hole (11). In addition, after the microsteps are formed, they need to be baked at 150°C to 160°C for 50 to 60 minutes to completely cure the resin in the through hole (11).
5. The method for processing a system-level automotive packaging substrate based on Tenting technology according to claim 1, characterized in that: The electroplating parameters used when making the thickened copper layer (2) are: current density not greater than 1.2ASD; the first PNL board (1) placed vertically is divided into an upper part, a middle part and a lower part from top to bottom, and the electroplating efficiency corresponding to the upper part of the board is 110% to 120%, the electroplating efficiency corresponding to the middle part of the board is 95% to 105%, and the electroplating efficiency corresponding to the lower part of the board is 85% to 95%, so that the copper thickness tolerance of the thickened copper layer (2) is ±1.5μm.
6. The method for processing a system-level automotive packaging substrate based on Tenting technology according to claim 1, characterized in that: The aforementioned circuit fabrication process includes sequential pretreatment, coating with a photosensitive resist film, exposure, development, vacuum two-fluid etching, and film removal. During vacuum two-fluid etching, the etched wire bonding pads are positioned with the etched surface facing downwards, and the etching spray pressure is 1.2–1.4 kg / cm². 2 .
7. The method for processing a system-level automotive packaging substrate based on Tenting technology according to claim 6, characterized in that: The outer layer pattern (3) includes an outer layer circuit pattern (30) and a pad pattern (31). The pad pattern (31) is composed of several wire bonding pads arranged in a matrix. The technical parameters of the pad pattern (31) are: the upper width of the wire bonding pad is 25-40 μm, the lower width is 30-45 μm, and the spacing between each two adjacent wire bonding pads is 20-35 μm.
8. The method for processing a system-level automotive packaging substrate based on Tenting technology according to claim 1, characterized in that: During the electroplating process, a number of dummy gold-plated fingers are provided around the edges of the obtained second PNL board and between SETs. The technical parameters of the dummy gold-plated fingers are as follows: the length of the dummy gold-plated fingers is 20±0.05mm, the width of the dummy gold-plated fingers is 2±0.05mm, and the distance between each pair of adjacent dummy gold-plated fingers is 50±0.05mm.
9. The method for processing a system-level automotive packaging substrate based on Tenting technology according to claim 1, characterized in that: The manufacturing method of the first PNL board (1) is as follows: An insulating intermediate layer (13) and two composite copper layers are provided, each of the two composite copper layers having a carrier copper layer (14) and an ultrathin copper layer disposed on the carrier copper layer (14) in a detachable manner; After the insulating intermediate layer (13) and the two composite copper layers are stacked and then pressed together, a substrate is obtained; wherein, the ultra-thin copper layers of the two composite copper layers are respectively attached to the opposite sides of the insulating intermediate layer (13); After sequentially performing QR code printing, mechanical drilling, removal of carrier copper layer, and copper plating on the substrate, the first PNL board (1) is obtained.
10. A system-level automotive packaging substrate based on Tenting technology, characterized in that: It is manufactured using the processing method of the system-level automotive packaging substrate based on the Tenting process as described in any one of claims 1-9.
Citation Information
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