Solar cell structure with multiple semiconductor layers and manufacturing process of solar cell structure

Abstract

The invention relates to the technical field of photovoltaic cells, and particularly discloses a solar cell structure with multiple semiconductor layers and a manufacturing process of the solar cell structure. The semiconductor device comprises a silicon wafer, and a first semiconductor layer, a secondary semiconductor layer and a metal electrode which are formed on the silicon wafer, the secondary semiconductor layer is locally or wholly formed above the first semiconductor layer, and the metal electrode is in contact with the secondary semiconductor layer; the material of the first semiconductor layer comprises polycrystalline silicon doped with phosphorus (P) or boron (B); and the material of the secondary semiconductor layer comprises one layer or a combination of more layers of TiO2, WO3, MoO3, TeO2 or NiO. According to the solar cell structure with the multiple semiconductor layers, the thickness of the polycrystalline silicon can be better controlled, the metal electrode is in contact with the secondary semiconductor layer, the use of a low-cost electrode can be reduced, and the manufacturing process is simpler.

Description

Technical Field

[0001] The present invention relates to the technical field of photovoltaic cells, and in particular discloses a solar cell structure with multiple semiconductor layers and a manufacturing process thereof. Background Art

[0002] The use of doped polysilicon to form junctions is the core technology in the TopCon structure. Due to its excellent passivation characteristics and charge collection capabilities, it plays a vital role in the high efficiency of TopCon. However, doped polysilicon causes free carrier absorption (FCA) due to the high doping concentration and parasitic light absorption of the polysilicon itself, which will lead to current loss.

[0003] To address this issue, reducing the polysilicon thickness using conventional sintering processes can lead to metal punch-through during metal sintering, or silver ions diffusing through the polysilicon grain boundaries, causing shunting and degrading cell performance. In particular, using low-cost aluminum paste instead of silver paste can significantly reduce the passivation properties of N-type polysilicon by significantly reducing the passivation properties of N-type polysilicon due to the reaction between aluminum and polysilicon to form P-type doping.

[0004] Patent CN202310955877.5 discloses a composite passivation layer on the back of a solar cell, a TOPCon cell, and a manufacturing process, wherein the metal electrode is in direct contact with the n+ doped polysilicon layer, and therefore it is difficult to apply an Al electrode.

[0005] Patent US20220077328A1 discloses a conductive paste and a method for manufacturing TOPCon solar cells. Although it uses Al conductive paste sintered as the electrode material, in order to avoid the reaction between the aluminum in the conductive paste and N-type polysilicon, the silicon content of the conductive paste is 25-40wt%, which increases the line resistance of the Al electrode and requires more conductive wires to collect and conduct current. In addition, the direct contact between the Al electrode and the doped polysilicon requires thick polysilicon, which increases the parasitic absorption of light.

[0006] In view of the above-mentioned defects in the prior art, it is urgently necessary to provide a new solar cell structure with multiple semiconductor layers. Summary of the Invention

[0007] The purpose of the present invention is to overcome the deficiencies of the prior art and to provide a solar cell structure with multiple semiconductor layers and a manufacturing process thereof.

[0008] On the one hand, the present invention discloses a solar cell structure with multiple semiconductor layers, which adopts the following technical solutions:

[0009] A solar cell structure with multiple semiconductor layers comprises: a silicon wafer, a first semiconductor layer, a secondary semiconductor layer and a metal electrode formed on the silicon wafer; the secondary semiconductor layer is locally or entirely formed above the first semiconductor layer, and the metal electrode is in contact with the secondary semiconductor layer; the material of the first semiconductor layer comprises polycrystalline silicon doped with phosphorus (P) or boron (B); the material of the secondary semiconductor layer comprises a combination of one or more layers of TiO2, WO3, MoO3, TeO2 or NiO.

[0010] Preferably, the secondary semiconductor layer includes a second semiconductor layer formed on the first semiconductor layer, and the metal electrode is in contact with the second semiconductor layer.

[0011] Preferably, a metal alloy is formed between the contact surface of the metal electrode and the second semiconductor layer, and the metal alloy is formed by the reaction between the metal electrode and the metal element of the second semiconductor layer material.

[0012] Preferably, the secondary semiconductor layer includes a second semiconductor layer and a third semiconductor layer sequentially formed on the first semiconductor layer, and the metal electrode is in contact with the third semiconductor layer.

[0013] Preferably, a metal alloy is formed between the contact surface of the metal electrode and the third semiconductor layer, and the metal alloy is formed by the reaction between the metal electrode and the metal element of the third semiconductor layer material.

[0014] Preferably, the metal electrode comprises Al, Ag, Cu or a mixture thereof.

[0015] Preferably, the thickness of the first semiconductor layer is 20-100 nm, and the thickness of the secondary semiconductor layer is 10-100 nm.

[0016] Preferably, it further comprises a packaging layer formed on the secondary semiconductor layer, wherein the packaging layer is SiN x 、SiO x 、SiON x Or a combination of one or more layers of Al2O3, the thickness of the encapsulation layer is 10nm to 80nm.

[0017] Preferably, the secondary semiconductor layer contains dopants, the dopant content is 0-5wt%, and the dopant includes one or more of aluminum (Al), boron (B), vanadium (V), niobium (Nb), nitrogen (N), and oxygen (O).

[0018] On the other hand, the present invention discloses a manufacturing process for a solar cell structure with multiple semiconductor layers, which adopts the following technical solution:

[0019] A process for manufacturing a solar cell structure with multiple semiconductor layers, comprising the following steps:

[0020] S1. Forming a first semiconductor layer on a silicon wafer by deposition and doping;

[0021] S2. depositing a secondary semiconductor layer on the first semiconductor layer;

[0022] S3. Forming a metal electrode on the secondary semiconductor layer by printing slurry and sintering, so that the metal electrode contacts the secondary semiconductor layer.

[0023] Preferably, in S2, TiO2, WO3, MoO3, TeO2 or NiO is directly deposited on the first semiconductor layer by PVD, PECVD, LPCVD or ALD to form a secondary semiconductor layer.

[0024] Preferably, in S2, a metal layer of Ti, W, Mo, Te or Ni is deposited on the first semiconductor layer by PVD, PECVD, LPCVD or ALD, and then TiO2, WO3, MoO3, TeO2 or NiO is indirectly formed as a secondary semiconductor layer by oxidizing the metal layer.

[0025] Preferably, in S2, TiO2, WO3, MoO3, TeO2 or NiO is directly deposited on the first semiconductor layer by PVD, PECVD, LPCVD or ALD as the second semiconductor layer, and a metal layer of Ti, W, Mo, Te or Ni is deposited on the second semiconductor layer by PVD, PECVD, LPCVD or ALD; in S3, a third semiconductor layer is formed in the process of printing and sintering to form a metal electrode, and a metal alloy is formed at the position where the third semiconductor layer contacts the metal electrode, and TiO2, WO3, MoO3, TeO2 or NiO is oxidized at other positions.

[0026] Preferably, an encapsulation layer is formed on the secondary semiconductor layer; the encapsulation layer is formed before printing the paste in S3, and the metal electrode passes through the encapsulation layer and contacts the secondary semiconductor layer.

[0027] Compared with the prior art, the present invention has at least the following beneficial effects:

[0028] 1. The present invention forms a first semiconductor layer of doped polysilicon and a secondary semiconductor layer comprising an oxide of Ti, W, Mo, Te or Ni on a tunnel oxide layer of a silicon wafer. The secondary semiconductor layer in contact with the metal electrode prevents the metal from diffusing into the first semiconductor layer, thereby avoiding the problem of damage to the passivation characteristics of polysilicon caused by metal diffusion. The thickness of the first semiconductor layer can be controlled, the parasitic absorption of light by the thick polysilicon layer is reduced, and the photoelectric conversion efficiency is improved.

[0029] 2. The present invention prevents aluminum from diffusing into polysilicon through the secondary semiconductor layer, thus avoiding the problem of P-type doping caused by Al diffusion on N-type polysilicon and reducing doping efficiency. At the same time, the secondary semiconductor layer has good contact resistance with aluminum, so low-cost metal electrodes such as aluminum can be used on both P-type and N-type electrodes.

[0030] 3. The secondary semiconductor layer can be prepared using the same manufacturing process as the first semiconductor layer, can undergo low-temperature processes, and has high-temperature stability. Therefore, it will not be affected by subsequent high-temperature processes. It can be prepared based on the existing solar cell manufacturing process without adding additional processes. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1 S1 is a schematic diagram of the manufacturing process of the solar cell structure with multiple semiconductor layers according to Example 1;

[0032] Figure 2 Schematic diagram S2 of the manufacturing process of the solar cell structure with multiple semiconductor layers of Example 1;

[0033] Figure 3 S3.1 is a schematic diagram of the manufacturing process of the solar cell structure with multiple semiconductor layers of Example 1;

[0034] Figure 4 Schematic diagram S3.2 of the manufacturing process of the solar cell structure with multiple semiconductor layers of Example 1;

[0035] Figure 5 Schematic diagram of the solar cell structure of the multi-layer semiconductor layer of Examples 1-3;

[0036] Figure 6 The light absorption coefficient characteristic curve of different materials;

[0037] Figure 7 The contact resistance characteristics of different materials and Al metal;

[0038] Figure 8 Schematic diagram of charge energy loss in Example 1 and Example 2;

[0039] Figure 9 Schematic diagram of light reflection of Example 1 and Example 2;

[0040] Figure 10 The metal alloy forming process of the solar cell structure with multiple semiconductor layers of Example 3;

[0041] Figure 11 Schematic diagram of the metal electrode formation process of the multi-layer semiconductor solar cell structure of Example 1 and Example 3;

[0042] Figure 12 The theoretical simulation diagram of Al metal diffusion length of different materials;

[0043] Figure 13 This is a comparison chart of PL values ​​of Ti and TiO2 in high temperature sintering experiments;

[0044] Figure 14 is the contact resistivity between different materials and Al metal electrode.

[0045] Description of Figure Numbers:

[0046] 1. Tunneling oxide layer; 2. First semiconductor layer; 3. Second semiconductor layer; 4. Encapsulation layer; 5. Metal electrode; 6. Third semiconductor layer. DETAILED DESCRIPTION

[0047] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the present invention is further described in detail below with reference to the accompanying drawings and specific embodiments.

[0048] Example 1

[0049] In this embodiment, the multi-layer semiconductor solar cell structure includes: a silicon wafer, a tunneling oxide layer 1 formed on the silicon wafer, a first semiconductor layer 2, a second semiconductor layer 3, an encapsulation layer 4, and a metal electrode 5. The second semiconductor layer 3 is formed entirely above the first semiconductor layer 2, the encapsulation layer 4 is formed above the second semiconductor layer 3, and the metal electrode 5 passes through the encapsulation layer 4 and contacts the second semiconductor layer 3. The first semiconductor layer 2 is a phosphorus-doped polysilicon layer, and the metal electrode 5 is an Al electrode.

[0050] In this embodiment, referring to Figure 1-4 , a manufacturing process for a solar cell structure with multiple semiconductor layers, comprising the following steps:

[0051] S1, see Figure 1A tunnel oxide layer and a phosphorus-doped polysilicon layer are formed on the back side of the silicon wafer. The tunnel oxide layer is formed by oxidation in a vacuum device and has a thickness of 1-2 nm. The phosphorus-doped polysilicon layer is deposited by LPCVD and has a thickness of 20 nm. The tunnel oxide layer can also be formed on the silicon wafer by thermal treatment or wet processing, and the phosphorus-doped polysilicon layer can be deposited using methods such as PVD or PECVD. Phosphorus or other dopants can be deposited together with the polysilicon, implanted in a diffusion furnace, or prepared using a variety of other processes.

[0052] S2, see Figure 2 , TiO2 is formed as the second semiconductor layer by PVD deposition on the phosphorus-doped polysilicon layer with a thickness of 60nm. The deposition process of the second semiconductor layer can also use vacuum deposition methods such as PECVD and ALD, or a slurry printing process. The secondary semiconductor layer can be doped with other elements, and the dopant can be one or more of aluminum (Al), boron (B), vanadium (V), niobium (Nb), nitrogen (N), and oxygen (O), with a dopant content of 0 to 5wt%; between the phosphorus-doped polysilicon layer and the second semiconductor layer, a chemical reaction may occur between the two materials to produce other substances, and together with the silicide, the total thickness is less than 5nm.

[0053] S3.1, see Figure 3 , SiN is deposited on the second semiconductor layer x As the encapsulation layer, the thickness is 30nm, and the encapsulation layer can also be SiN x 、SiO x 、AlO x The total thickness of the encapsulation layer is determined by the thickness of the second semiconductor layer below it, and the deposition thickness can range from 10nm to 80nm. The encapsulation layer can reduce the reflection of light on the surface of the battery, increase the light absorption rate, and thus improve the photoelectric conversion efficiency. In addition, it can provide more hydrogen, effectively fill the defects on the surface or interface of the semiconductor material, and reduce the recombination of charge carriers. However, this process is not necessary and can be omitted, such as Figure 5 As shown in (a).

[0054] S3.2, see Figure 4 A laser is used to form contact holes in the packaging layer, and aluminum paste is then printed using a screen printer. This is followed by rapid thermal processing to form Al metal electrodes, with the peak temperature of the rapid thermal processing process reaching 920°C. When using aluminum paste, the paste can contain silicon, with a silicon content ranging from 0 to 20wt%. The metal paste can also be copper, silver, aluminum, or a mixture of these materials. After the rapid thermal processing, the Al metal electrode directly contacts the second semiconductor layer and does not contact the underlying phosphorus-doped polysilicon layer.

[0055] By forming a secondary semiconductor layer on the polysilicon layer, the advantages over the prior art are:

[0056] 1. Easy to control the thickness of polysilicon: When traditional metal electrodes directly contact polysilicon, the diffusion and spike effect of metal ions will cause the polysilicon layer to reach a certain thickness or above, making it difficult to make it thinner. The light absorption caused by the thick polysilicon layer is therefore difficult to reduce, especially the low current on the back side also limits the improvement of double-sided efficiency. This invention makes it possible for the metal electrode to contact the second semiconductor layer but not the polysilicon below, thereby thinning the polysilicon layer to solve the above problem. In addition, the larger band gap of the second semiconductor layer can further reduce light absorption losses, such as Figure 6 As shown, the polysilicon thickness is effectively reduced to further reduce light absorption, thereby minimizing current loss.

[0057] 2. Application of low-cost electrode paste: When aluminum electrode paste is used to form electrodes for traditional N-type polysilicon, a reaction occurs between aluminum and polysilicon, resulting in P-type doping, or aluminum diffuses through polysilicon, resulting in a decrease in battery characteristics. The second semiconductor layer can effectively prevent the diffusion of aluminum in the metal electrode into the polysilicon, and has excellent contact resistance characteristics with aluminum, such as Figure 7 As shown, the second semiconductor layer facilitates electron transport, has low contact resistance with the electrode, and has no FF loss, so low-cost metal electrodes such as aluminum can be used.

[0058] 3. Simple manufacturing process: The second semiconductor layer can be formed using the same manufacturing process as polysilicon, can undergo low-temperature processing, and has high-temperature stability. It will not be affected by the high temperature of subsequent processes. Therefore, it can be applied to the existing solar cell manufacturing process without adding additional processes.

[0059] Example 2

[0060] In this embodiment, if Figure 5 As shown in Figure (b), the solar cell structure with multiple semiconductor layers includes: a silicon wafer, a tunneling oxide layer 1 formed on the silicon wafer, a first semiconductor layer 2, a second semiconductor layer 3, a third semiconductor layer 6, and a metal electrode 5. The second semiconductor layer 3 and the third semiconductor layer 6 are sequentially formed as a whole above the first semiconductor layer 2, and the metal electrode 5 is in contact with the third semiconductor layer 6. The first semiconductor layer 2 is a phosphorus-doped polysilicon layer, and the metal electrode 5 is an Al electrode.

[0061] In this embodiment, the manufacturing process of the solar cell structure with multiple semiconductor layers includes the following steps:

[0062] S1. Form a tunnel oxide layer and a phosphorus-doped polysilicon layer on the back side of the silicon wafer; the thickness of the tunnel oxide layer is 1 to 2 nm; the thickness of the phosphorus-doped polysilicon layer is 20 nm.

[0063] S2. Deposit TiO2 on the phosphorus-doped polysilicon layer to form a second semiconductor layer with a thickness of 60nm; deposit WO3 on the second semiconductor layer to form a third semiconductor layer with a thickness of 30nm. In other embodiments, the secondary semiconductor layer can also be: the second semiconductor layer is TiO2 / the third semiconductor layer is aluminum-doped TiO x (Al-doped TiO x ); the second semiconductor layer is a combination of TiO2 / the second semiconductor layer is MoO3, etc.

[0064] S3. A screen printer prints aluminum paste, which is then subjected to rapid thermal processing to form an Al metal electrode at the printed aluminum paste. The peak temperature of the rapid thermal processing is 920°C. After the rapid thermal processing, the Al metal electrode directly contacts the third semiconductor layer and does not contact the underlying second semiconductor layer or the phosphorus-doped polysilicon layer.

[0065] Compared with the single-layer semiconductor layer of Example 1, the double-layer semiconductor layer has the following technical effects:

[0066] 1. Low charge energy loss: The energy level difference of the double-layer semiconductor layer is small, and the energy band arrangement between the metal electrode and the doped polysilicon has a small energy loss. Figure 8 ;

[0067] 2. Smaller light loss on the back: The double layer can make the refractive index from high to low, resulting in lower reflectivity on the back, thereby improving the bifaciality of solar cells and improving photoelectric conversion efficiency. Figure 9 .

[0068] Example 3

[0069] In this embodiment, if Figure 5 As shown in Figure (c), the multi-layer semiconductor solar cell structure includes: a silicon wafer, a tunneling oxide layer 1 formed on the silicon wafer, a first semiconductor layer 2, a second semiconductor layer 3, a third semiconductor layer 6, and a metal electrode 5. The second semiconductor layer 3 and the third semiconductor layer 6 are sequentially formed as a whole above the first semiconductor layer 2, and the metal electrode 5 contacts the third semiconductor layer 6. The first semiconductor layer 2 is a phosphorus-doped polycrystalline silicon layer, and the metal electrode 5 is an Al electrode. A metal alloy is formed between the contact surface of the metal electrode 5 and the third semiconductor layer 6.

[0070] In this embodiment, the manufacturing process of the solar cell structure with multiple semiconductor layers includes the following steps:

[0071] S1. Form a tunnel oxide layer and a phosphorus-doped polysilicon layer on the back side of the silicon wafer; the thickness of the tunnel oxide layer is 1 to 2 nm; the thickness of the phosphorus-doped polysilicon layer is 20 nm.

[0072] S2. Depositing TiO2 on the phosphorus-doped polysilicon layer to form a second semiconductor layer with a thickness of 60 nm; and depositing a Ti metal layer on the second semiconductor layer with a thickness of 15 nm;

[0073] S3. Use a screen printer to print aluminum paste, and then undergo rapid heat treatment to form an Al metal electrode at the printed aluminum paste. The Ti metal layer is heat treated to form a third semiconductor layer. The contact surface between the Al metal electrode and the Ti metal layer undergoes a high-temperature reaction to form a TiAl metal alloy, while the other parts are oxidized to form TiO2, thus forming a third semiconductor layer with a special structure of TiO2-TiAl-TiO2. Figure 10 .

[0074] See Figure 11 As shown in the figure on the left, when Al metal is in direct contact with the second semiconductor, the second semiconductor TiO2 provides an oxygen source during the sintering process of the metal paste (peak temperature > 700°C), and Al metal may form metal oxides (such as Al2O3) at the interface with the second semiconductor, which may lead to higher contact resistance and unevenness. Metal alloys such as TiAl are inserted between Al metal and the second semiconductor. Due to their excellent oxidation resistance, they can prevent metal oxidation, thereby forming a good and uniform contact. However, metal alloys have greater light reflectivity. Regarding the double-sidedness of solar cells, it is necessary to consider the illumination of light on both sides.

[0075] Example 3 forms a TiAl metal alloy by using a self-aligned reaction between the second semiconductor and the Ti metal layer, such as Figure 11 The TiAl metal alloy forms only in the contact area between the Al paste and the Ti metal. During the sintering process, TiO2 forms in other areas due to the oxidation of Ti. Because TiO2 is highly transparent, it does not block light from entering the Si wafer, giving the Topcon cell a good bifaciality.

[0076] In addition, the following tests are performed on the semiconductor layer’s metal diffusion prevention performance and contact resistance:

[0077] Figure 12 The theoretical simulation diagram of the Al metal diffusion length of different materials is shown. It can be seen that the Ti metal layer is difficult to protect Al from diffusing into the silicon wafer at high temperature.

[0078] Figure 13The PL values ​​from high-temperature sintering experiments are presented, confirming the theoretical estimates. During high-temperature sintering, a TiO2 layer of appropriate thickness can effectively prevent Al from diffusing into the silicon wafer. The Ti metal layer exhibits lower photoluminescence (PL) intensity, indicating that Al diffuses into the wafer, damaging the passivation layer. Therefore, a single Ti metal layer alone cannot serve as an Al diffusion barrier.

[0079] Figure 14 The contact resistivity of different materials and Al metal electrodes is shown. From the data in the figure, it can be seen that the contact resistivity of TiO-2 and Al is only 1.75mohmcm. The Ti deposited on TiO2 reacts and converts into TiAl during the sintering process in contact with Al slurry, which has lower contact resistance than TiO2. The contact resistivity of the Ti metal layer in the thickness range of 10nm to 30nm is all below 1.5mohmcm, which has good metal contact performance.

[0080] The technical solution provided by the present invention is introduced in detail above. Specific examples are used herein to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea. At the same time, for those skilled in the art, according to the idea of ​​the present invention, there may be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as limiting the present invention.

Claims

1. A solar cell structure with multiple semiconductor layers, characterized in that: include: A silicon wafer, a first semiconductor layer, a secondary semiconductor layer, and a metal electrode formed on the silicon wafer; the secondary semiconductor layer is locally or entirely formed above the first semiconductor layer, and the metal electrode is in contact with the secondary semiconductor layer; The material of the first semiconductor layer includes polysilicon doped with phosphorus (P) or boron (B); The material of the secondary semiconductor layer includes one or more layers of TiO2, WO3, MoO3, TeO2 or NiO.

2. The solar cell structure with multiple semiconductor layers according to claim 1, characterized in that: The secondary semiconductor layer includes a second semiconductor layer formed on the first semiconductor layer, and the metal electrode contacts the second semiconductor layer.

3. The solar cell structure with multiple semiconductor layers according to claim 2, characterized in that: A metal alloy is formed between the contact surface of the metal electrode and the second semiconductor layer. The metal alloy is formed by the reaction between the metal electrode and the metal element of the second semiconductor layer material.

4. The solar cell structure with multiple semiconductor layers according to claim 1, characterized in that: The secondary semiconductor layer includes a second semiconductor layer and a third semiconductor layer sequentially formed on the first semiconductor layer, and the metal electrode contacts the third semiconductor layer.

5. The solar cell structure with multiple semiconductor layers according to claim 4, characterized in that: A metal alloy is formed between the contact surface of the metal electrode and the third semiconductor layer. The metal alloy is formed by the reaction between the metal electrode and the metal element of the third semiconductor layer material.

6. The solar cell structure with multiple semiconductor layers according to claim 1, characterized in that: The metal electrode comprises Al, Ag, Cu or a mixture thereof.

7. The solar cell structure with multiple semiconductor layers and the manufacturing process thereof according to claim 1, characterized in that: The thickness of the first semiconductor layer is 20-100 nm, and the thickness of the secondary semiconductor layer is 10-100 nm.

8. The solar cell structure with multiple semiconductor layers and the manufacturing process thereof according to claim 1, characterized in that: It also includes a packaging layer formed on the secondary semiconductor layer, the packaging layer is SiN x 、SiO x 、SiON x Or a combination of one or more layers of Al2O3, the thickness of the encapsulation layer is 10nm to 80nm.

9. The solar cell structure with multiple semiconductor layers according to claim 1, characterized in that: The secondary semiconductor layer contains dopants, the content of the dopants is 0-5wt%, and the dopants include one or more of aluminum (Al), boron (B), vanadium (V), niobium (Nb), nitrogen (N), and oxygen (O).

10. The manufacturing process of the solar cell structure with multiple semiconductor layers according to any one of claims 1 to 9, characterized in that: The following steps are involved: S1. Forming a first semiconductor layer on a silicon wafer by deposition and doping; S2. depositing a secondary semiconductor layer on the first semiconductor layer; S3. Forming a metal electrode on the secondary semiconductor layer by printing slurry and sintering, so that the metal electrode contacts the secondary semiconductor layer.

11. The manufacturing process of a solar cell structure with multiple semiconductor layers according to claim 10, characterized in that: In S2, TiO2, WO3, MoO3, TeO2 or NiO is directly deposited on the first semiconductor layer by PVD, PECVD, LPCVD or ALD to form a secondary semiconductor layer.

12. The manufacturing process of a solar cell structure with multiple semiconductor layers according to claim 10, characterized in that: In S2, a metal layer of Ti, W, Mo, Te or Ni is formed on the first semiconductor layer by PVD, PECVD, LPCVD or ALD deposition, and then TiO2, WO3, MoO3, TeO2 or NiO is indirectly formed as a secondary semiconductor layer by oxidizing the metal layer.

13. The manufacturing process of a solar cell structure with multiple semiconductor layers according to claim 10, characterized in that: In S2, TiO2, WO3, MoO3, TeO2 or NiO is directly deposited on the first semiconductor layer by PVD, PECVD, LPCVD or ALD to form a second semiconductor layer, and a metal layer of Ti, W, Mo, Te or Ni is deposited on the second semiconductor layer by PVD, PECVD, LPCVD or ALD; in S3, a third semiconductor layer is formed in the process of printing and sintering to form a metal electrode, and a metal alloy is formed at the position where the third semiconductor layer contacts the metal electrode, and TiO2, WO3, MoO3, TeO2 or NiO is oxidized at other positions.

14. The manufacturing process of a solar cell structure with multiple semiconductor layers according to claim 10, characterized in that: An encapsulation layer is formed on the secondary semiconductor layer; the encapsulation layer is formed before the printing paste in S3, and the metal electrode passes through the encapsulation layer and contacts the secondary semiconductor layer.

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