Method for manufacturing semiconductor device
By forming grooves and holes as marks on the device surface of the semiconductor substrate, the problem of difficulty in alignment from the opposite side of the device surface in the prior art is solved, stable and efficient substrate alignment and processing are achieved, and the manufacturing accuracy and quality of the semiconductor device are improved.
Patent Information
- Application Number
- CN202480014322.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-07-31
- Filing Date
- 2024-02-26
- Publication Date
- 2025-10-03
AI Technical Summary
In the prior art, it is difficult to align the substrate from the side opposite to the device surface during the manufacturing process of semiconductor devices. In particular, it is impossible to directly confirm the alignment line during the singulation process, resulting in alignment difficulties.
Deep grooves and holes are formed on the device surface of the substrate as marks, which are then exposed during the grinding process. These marks are then used as a reference for alignment and processing during the processing steps, including photolithography and singulation.
This achieves stable alignment of the substrate from the side opposite to the device surface, improves process accuracy and efficiency, reduces processing damage, simplifies the manufacturing process, and improves the quality of semiconductor devices.
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Figure CN120752739A_ABST
Abstract
Description
Technical Field
[0001] Embodiments of the present invention relate to a method for manufacturing a semiconductor device.
[0002] This application claims priority based on Japanese Patent Application No. 2023-125147 filed in Japan on July 31, 2023, the contents of which are incorporated herein by reference. Background Art
[0003] Semiconductor devices such as MOSFET (Metal Oxide Semiconductor Field Effect Transistor) are used for applications such as power conversion. Such semiconductor devices are manufactured by forming a circuit pattern on a substrate and then singulating it into individual chips. Each process involved in the manufacture of a semiconductor device is aligned based on the alignment line formed on the device surface. On the other hand, in terms of product quality, the process after forming the circuit pattern (for example, the singulation process) is sometimes preferably performed from the opposite side of the device surface. In this case, there is a problem that it is difficult to align the substrate because a certain alignment line on the device surface cannot be directly confirmed.
[0004] Prior art literature
[0005] Patent Literature
[0006] Patent Document 1: Japanese Patent Application Laid-Open No. 2016-096265 Summary of the Invention
[0007] Technical problem to be solved by the invention
[0008] The technical problem to be solved by the present invention is to provide a method for manufacturing a semiconductor device that can easily perform positioning of a substrate during the process.
[0009] Means for solving technical problems
[0010] The manufacturing method of the semiconductor device of the embodiment includes a mark forming step, a first pasting step, a grinding step, and a processing step. The mark forming step is a step of forming a recess on the device surface of the substrate composed of semiconductor material for forming a circuit pattern. The first pasting step is a step of pasting the device surface to a supporting substrate. The grinding step is a step of grinding the surface of the substrate on the opposite side of the device surface while being supported by the supporting substrate to form a ground surface. The processing step is a step of processing the substrate from the ground surface side while being supported by the supporting substrate. In the manufacturing method of the semiconductor device of the embodiment, in the grinding step, the recess is exposed on the ground surface as a mark, and in the processing step, processing is performed based on the mark. BRIEF DESCRIPTION OF THE DRAWINGS
[0011] Figure 1It is a schematic diagram of the semiconductor device according to the first embodiment.
[0012] Figure 2 This is a flowchart showing the method for manufacturing the semiconductor device according to the first embodiment.
[0013] Figure 3 It is a schematic diagram showing the device surface forming step of the first embodiment.
[0014] Figure 4 It is a schematic diagram showing the mark forming step of the first embodiment.
[0015] Figure 5 This is a schematic diagram of the device surface showing the mark forming step of the first embodiment.
[0016] Figure 6 This is a schematic diagram showing the first pasting step in the first embodiment.
[0017] Figure 7 It is a schematic diagram showing the grinding process of the first embodiment.
[0018] Figure 8 It is a schematic diagram showing the film forming process of the first embodiment.
[0019] Figure 9 This is an example of an enlarged view of the membrane portion near the groove portion in the first embodiment.
[0020] Figure 10 This is an example of an enlarged view of the membrane portion near the groove portion in the first embodiment.
[0021] Figure 11 This is an example of an enlarged view of the membrane portion near the groove portion in the first embodiment.
[0022] Figure 12 This is a schematic diagram showing the photoresist coating process according to the first embodiment.
[0023] Figure 13 It is a schematic diagram showing the exposure process of the first embodiment.
[0024] Figure 14 It is a schematic diagram of the photomask of the first embodiment.
[0025] Figure 15 It is a schematic diagram showing the development step of the first embodiment.
[0026] Figure 16 It is a schematic diagram showing the etching process of the first embodiment.
[0027] Figure 17 It is a schematic diagram of the photoresist removal step in the first embodiment.
[0028] Figure 18 This is a schematic diagram showing the singulation process of the first embodiment.
[0029] Figure 19 This is a schematic diagram showing the second pasting step in the first embodiment.
[0030] Figure 20 It is a schematic diagram showing the support substrate separating step according to the first embodiment.
[0031] Figure 21 It is a schematic diagram showing the pickup process of the first embodiment.
[0032] Figure 22 It is a schematic diagram of a device surface showing a mark forming step according to a modification example.
[0033] Figure 23 This is a flowchart showing a method for manufacturing a semiconductor device according to the second embodiment.
[0034] Figure 24 It is a schematic diagram showing the second pasting step of the second embodiment.
[0035] Figure 25 It is a schematic diagram showing the support substrate separating step according to the second embodiment.
[0036] Figure 26 It is a schematic diagram showing the singulation process of the second embodiment. DETAILED DESCRIPTION
[0037] Hereinafter, a method for manufacturing a semiconductor device and a semiconductor device according to an embodiment will be described with reference to the drawings.
[0038] In this specification, to indicate the positional relationship of components, the upper direction in the drawings is described as "upper," and the lower direction in the drawings is described as "lower." In this specification, the concepts of "upper" and "lower" are not necessarily terms that indicate a relationship with the direction of gravity.
[0039] (First embodiment)
[0040] Figure 1 This is a schematic diagram of a semiconductor device 1 according to the first embodiment. The semiconductor device 1 according to this embodiment is, for example, a MOSFET, an IGBT (Insulated Gate Bipolar Transistor), etc. The semiconductor device 1 according to this embodiment includes a rectangular plate-shaped semiconductor chip 10T and an electrode 20T provided on one surface of the semiconductor chip 10T.
[0041] The semiconductor chip 10T is made of a semiconductor material. In this specification, the semiconductor material is, for example, silicon (Si), silicon carbide (SiC), GaAs (gallium arsenide), or GaN (gallium nitride), but is not limited thereto.
[0042] The semiconductor chip 10T has a device surface 10a, a back surface 10b located opposite the device surface 10a, and four side surfaces 10c connecting the device surface 10a and the back surface 10b. The area of each side surface 10c is sufficiently smaller than the area of the device surface 10a and the back surface 10b. A circuit pattern is formed on the device surface 10a. For example, a MOSFET device or an IGBT device is formed on the device surface 10a. In the following description, the distance between the device surface 10a and the back surface 10b is referred to as the thickness H of the semiconductor chip 10T.
[0043] The electrode 20T is provided on the back surface 10b of the semiconductor chip 10T. The electrode 20T contacts the back surface 10b of the semiconductor chip 10T. For example, if the semiconductor chip 10T is a MOSFET chip, the electrode 20T serves as the drain electrode of the MOSFET. The electrode 20T comprises a conductive material. Examples of the conductive material include, but are not limited to, Cu (copper), Al (aluminum), Ni (nickel), Ag (silver), or Au (gold).
[0044] In the semiconductor chip 10T of this embodiment, the area of the device surface 10a is larger than the area of the back surface 10b. In addition, all side surfaces 10c of the semiconductor chip 10T are inclined relative to the normal line of the device surface 10a. All side surfaces 10c are inclined in a direction approaching the side surface 10c located on the opposite side of the side surface 10c as they move from the device surface 10a side toward the back surface 10b side. In addition, it is sufficient that at least one group of side surfaces 10c facing opposite sides of the four side surfaces 10c are inclined in a direction approaching each other as they move from the device surface 10a side toward the back surface 10b side.
[0045] Figure 2 This is a flowchart illustrating a method for manufacturing a semiconductor device 1 according to the present embodiment. The method for manufacturing a semiconductor device 1 according to the present embodiment includes a device surface forming step S10, a mark forming step S20, a first attaching step S30, a grinding step S40, a film forming step S50, a photolithography step (processing step) S60, a singulation step (processing step) S70, a second attaching step S80, a support substrate detaching step S90, and a pickup step S100.
[0046] Figure 3Schematic diagram of the device surface forming process S10 of the present embodiment. The device surface forming process S10 is a process of forming a circuit pattern of a device such as a MOSFET or an IGBT on one surface of a disc-shaped substrate 10 (semiconductor wafer) composed of a semiconductor material, and using this surface as the device surface 10a. In addition, in the following description, the surface on the opposite side of the device surface 10a before the grinding process S40 described later is referred to as the initial back surface 10f. Although omitted from the figure, the device surface forming process S10 and the mark forming process S20 performed thereafter are performed in a state where the initial back surface 10f supports the substrate 10.
[0047] Figure 4 Schematic diagram illustrating the mark forming step S20 of this embodiment. The mark forming step S20 of this embodiment is a step of processing the device surface 10a of the substrate 10 to form a plurality of grooves (recesses, marks) 11 of a depth D and a plurality of holes (recesses, marks) 12 of a depth D on the device surface 10a.
[0048] In this embodiment, the groove 11 functions as a mark in the subsequent singulation step S70. On the other hand, the hole 12 functions as a mark in the subsequent photolithography step S60. The steps using the groove 11 and the hole 12 in this embodiment are merely examples and can be interchanged or substituted for each other. Therefore, the hole 12 can be used as a mark in the singulation step S70, and the groove 11 can be used as a mark in the photolithography step S60.
[0049] The depth D of the groove portion 11 and the hole portion 12 is greater than the thickness H (see FIG. 1 ) of the semiconductor chip 10T manufactured by the manufacturing method of this embodiment. Figure 1 ) is large. In the present embodiment, the depth D of the groove 11 and the hole 12 is consistent with each other. However, the depth D of the groove 11 and the hole 12 only needs to be greater than the thickness H, respectively, and may not be consistent with each other. In addition, the shape of the groove 11 and the hole 12 that function as a mark in the present embodiment is an example, and the mark only needs to be a recessed portion processed from the device surface 10a in the depth direction, and is not limited to the shape of the present embodiment. In addition, in this specification, "recessed portion" refers to a shape obtained by processing in the depth direction relative to a specified surface (the device surface 10a in the present embodiment), and is a concept that also includes a through portion that penetrates in the depth direction. Therefore, the recessed portion formed in the mark forming step S20 may also penetrate the substrate 10 in the thickness direction. In addition, the shape of the bottom of the "recessed portion" does not need to be flat, and may also be circular or any shape like the groove 11.
[0050] In the mark forming step S20 of this embodiment, the grooves 11 are formed by the cutting device M used in the singulation process (see the subsequent singulation step S70). The grooves 11 are formed by a rotating disk-shaped blade 9 provided in the cutting device M. Alternatively, the grooves 11 may be formed using a laser.
[0051] In the mark forming step S20 of the present embodiment, the hole 12 is formed using, for example, a laser. Alternatively, a cutting tool such as a drill may be used to form the hole 12. In addition, the hole 12 of the present embodiment is a circular hole when viewed from above, but the shape of the hole 12 is not limited.
[0052] Figure 5 Schematic diagram showing the device surface 10a after the mark forming step S20. Figure 5 In FIG, the groove portion 11 is shown in bold. Figure 5 As shown, multiple alignment lines L11 and L12 are pre-formed on the device surface 10a. These alignment lines L11 and L12 serve as reference positions for forming the circuit pattern during the device surface forming step S10. These alignment lines L11 and L12 include multiple first alignment lines L11 and multiple second alignment lines L12. The first and second alignment lines L11 and L12 extend in mutually orthogonal directions. The alignment lines L11 and L12 divide the device surface 10a into multiple vertical and horizontal sections.
[0053] The sections arranged between alignment lines L11 and L12 are divided into rectangular active sections S1, which serve as semiconductor devices 1, and removed sections S2, which are arranged along the outer edge of device surface 10a. Each active section S1 has a circuit pattern for one semiconductor device 1 formed in it. On the other hand, no circuit pattern is formed in removed sections S2. Removed sections S2 are arranged to surround the central area where active sections S1 are concentrated.
[0054] In the present embodiment, the groove portion 11 and the hole portion 12 are formed with the alignment lines L11 and L12 as references. In order to detect the relative position of the device surface 10a when used as a mark, at least one groove portion 11 is provided, and more preferably, two or more are provided in order to improve the detection accuracy. The groove portion 11 of the present embodiment is formed in a manner overlapping with the portion on the alignment lines L11 and L12 that divides the adjacent removal partitions S2 from each other. That is, the groove portion 11 of the present embodiment is formed overlapping with the end portions of a portion of the alignment lines L11 and L12. The groove portion 11 of the present embodiment is formed on all the alignment lines L11 and L12 that divide the removal partitions S2 from each other among the plurality of alignment lines L11 and L12. However, the groove portion 11 only needs to be formed on the alignment lines L11 and L12 that divide at least a portion of the removal partitions S2 from each other.
[0055] In this embodiment, three holes 12 are provided on the device surface 10a. When used as a marker, at least two holes 12 are sufficient to detect the relative position of the device surface 10a. To improve detection accuracy, three or more holes 12 are more preferably provided. Furthermore, to improve detection accuracy, multiple holes 12 are preferably spaced apart within the device surface 10a. In this embodiment, three holes 12 are provided on the device surface 10a, located in different removal zones S2 near the outer edge of the device surface 10a.
[0056] Figure 6 This is a schematic diagram illustrating the first attaching step S30 of this embodiment. During the transition from the marking forming step S20 to the first attaching step S30, the substrate 10 is flipped upside down. The first attaching step S30 is a step in which the downward-facing device surface 10a is attached to the support substrate 40 using adhesive 30. After the first attaching step S30, the substrate 10 is secured to the support substrate 40.
[0057] In the first laminating step S30, uncured adhesive 30 is first applied to the device surface 10a. Next, the device surface 10a is bonded to the support surface of the support substrate 40 so that they face each other. The adhesive 30 is then cured. For example, an acrylic adhesive, an epoxy adhesive, or a silicone adhesive can be preferably used as the adhesive 30. The support substrate 40 is a plate-shaped member made of, for example, glass or silicon (Si).
[0058] In addition, Figure 6 In FIG. 1 , the groove 11 and the hole 12 are shown to be completely filled with the adhesive 30. However, the filling state of the adhesive 30 is not limited to Figure 6 That is, the adhesive 30 may be filled halfway into the groove 11 and the hole 12, with a gap provided near the bottom of the groove 11 and the hole 12. In addition, the adhesive 30 may not be filled into the groove 11 and the hole 12.
[0059] Figure 7: is a schematic diagram showing the grinding process S40 of the present embodiment. The grinding process S40 is a process of grinding the initial back surface 10f to form the back surface (grinded surface) 10b. The grinding process S40 of the present embodiment is carried out in a state where the substrate 10 is supported by the supporting substrate 40. Through the grinding process S40, the substrate 10 is set to a thickness H. As a result, the groove 11 and the hole 12 formed from the device surface 10a side are connected to the back surface 10b side, and the groove 11 and the hole 12 pass through the substrate 10. That is, the manufacturing method of the semiconductor device 1 of the present embodiment exposes the groove 11 and the hole 12 on the back surface 10b in the grinding process S40 as a mark that can be confirmed from the back surface 10b side. In addition, as described above, the interior of the groove 11 and the hole 12 of the present embodiment is filled with an adhesive 30. Therefore, the adhesive 30 is exposed from the back surface 10b by the groove 11 passing through the substrate 10.
[0060] Figure 8 : is a schematic diagram showing the film forming process S50 of the present embodiment. The film forming process S50 is a process of forming the film portion 20 on the back side 10b of the substrate 10. The film forming process S50 of the present embodiment is performed in a state where the substrate 10 is supported by the supporting substrate 40. The film portion 20 of the present embodiment is a metal film made of a metal material. However, the material of the film portion 20 is not limited. The film forming process S50 of the present embodiment is performed, for example, by CVD (Chemical Vapor Deposition), PVD (Physical Vapor Deposition), electroplating, chemical plating, etc. The thickness h of the film portion 20 of the present embodiment is, for example, about 40 μm. However, the thickness h of the film portion 20 is not limited to the present embodiment.
[0061] As described above, the adhesive 30 in the groove 11 and the hole 12 is exposed on the back surface 10 b . Therefore, a portion of the film 20 is formed on the adhesive 30 . Figure 9 This is an enlarged view of the film portion 20 near the groove portion 11 (or hole portion 12). When the material of the surface of the film portion 20 is different, the film portion 20 in that portion becomes different from the other portions. For example, the region 20b where the film is formed on the adhesive 30 and the region 20a where the film is formed on the substrate 10 have observable differences such as local unevenness, rough surface roughness, or small or large film thickness. Therefore, even after the film portion 20 is formed on the back surface 10b, the positions of the groove portion 11 and the hole portion 12 can be grasped by observing the film portion 20. In addition, Figure 9 , the adhesive 30 is shown to be completely filled in the groove 11 and the hole 12. However, the adhesive 30 in the groove 11 and the hole 12 may be as follows: Figure 10 As shown, instead of filling the groove 11 and the hole 12, it is also possible to Figure 11As shown, only a portion of the groove 11 and the hole 12 is filled. In these cases, since the concave shape 20 c is formed on the surface of the membrane 20 , the positions of the groove 11 and the hole 12 can be easily grasped by observing the membrane 20 .
[0062] Figures 12 to 17 Schematic diagram illustrating the photolithography step S60 of this embodiment. The photolithography step S60 is a step for etching the film portion 20 formed in the film forming step S50 in a desired pattern. The photolithography step S60 includes a photoresist coating step, an exposure step, a development step, an etching step, and a photoresist removal step.
[0063] Figure 12 Schematic diagram showing the photoresist coating process of this embodiment. In the photoresist coating process, a photoresist 60 is coated on the surface of the membrane portion 20 by spin coating or other methods and then cured by pre-baking.
[0064] Figure 13 Schematic diagram showing the exposure process of this embodiment. In the exposure process, light from a light source LS is irradiated onto the photoresist 60 through a photomask 70. In the exposure process, light that has passed through a portion of the photomask 70 is irradiated onto the photoresist 60. The portion of the photoresist 60 irradiated with light becomes a photosensitive portion 61, and its solubility changes. In this embodiment, the photosensitive portion 61 is aligned with the alignment lines L11 and L12 (see FIG. 1 ). Figure 5 The photosensitive portion 61 needs to be positioned relative to the substrate 10. Therefore, the photomask 70 needs to be aligned so that the light-transmitting portion 72 is positioned at a desired position relative to the substrate 10.
[0065] Figure 14 This is a schematic diagram of a photomask 70 according to this embodiment. Photomask 70 includes multiple mask sections 71 that restrict light transmission, and light-transmitting sections 72 located outside mask sections 71 that transmit light. Light-transmitting sections 72 are linearly formed so that portions overlapping alignment lines L11 and L12 are exposed.
[0066] The photomask 70 is provided with three alignment marks 73 for aligning the photomask 70 with respect to the substrate 10. During the exposure process, the three alignment marks 73 are overlapped with the holes 12 exposed on the back surface 10b of the substrate 10, thereby enabling alignment of the photomask 70 with respect to the substrate 10. In other words, during the exposure process, the photomask 70 is aligned with respect to the holes 12. The method of aligning the photomask 70 and the substrate 10 described here is an example; other methods may also be used as long as the alignment can be performed with respect to the holes 12.
[0067] The photolithography process S60 of this embodiment is performed from the back side 10b of the substrate 10. Therefore, it is difficult to align the photomask 70 using the alignment lines L11 and L12 provided on the device surface 10a. In this embodiment, the hole portion 12 provided on the device surface 10a penetrates to the back side 10b. Therefore, in the photolithography process S60, the position of the hole portion 12 can be grasped from the back side 10b via the membrane portion 20. The alignment of the photomask 70 is performed by observing the membrane portion 20 and grasping the position of the hole portion 12 so that it overlaps with the alignment mark 73 of the photomask 70. That is, the photolithography process S60 of this embodiment is performed based on the hole portion 12 that penetrates to the back side 10b.
[0068] In this embodiment, the photomask 70 is positioned using the holes 12. However, the photomask 70 may be positioned using the grooves 11. In this case, the photomask 70 is provided with alignment marks 73 that overlap with the grooves 11. In this case, the holes 12 of the substrate 10 are omitted.
[0069] Figure 15 This is a schematic diagram illustrating the development process of this embodiment. The development process involves using a developer to dissolve and remove the photosensitive portion 61 of the photoresist 60, followed by post-baking. Removal of the photosensitive portion 61 forms an opening 62 in the photoresist 60. Furthermore, a portion of the membrane portion 20 is exposed through the opening 62. While this embodiment describes the photolithography process S60 using a positive photoresist 60, the photolithography process can also be performed using a negative photoresist. When using a negative photoresist, portions other than the photosensitive portion dissolve, forming an opening.
[0070] Figure 16 Schematic diagram showing the etching process of this embodiment. The etching process is a process of removing the film portion 20 exposed from the opening portion 62 of the photoresist 60 by etching. As described above, the light-transmitting portion 72 ( Figure 14 ) is formed into a linear shape so as to overlap with the alignment lines L11 and L12. Thus, through the etching process, a groove 22 is formed in the membrane portion 20 so as to overlap with the alignment lines L11 and L12. The groove 22 penetrates the membrane portion 20 in the thickness direction. Therefore, the back surface 10b of the substrate 10 is exposed at the bottom of the groove 22.
[0071] Figure 17 Schematic diagram of the photoresist removal process of this embodiment. In the photoresist removal process, the photoresist 60 is removed and the surface of the membrane portion 20 is exposed.
[0072] Figure 18Schematic diagram showing the singulation step S70 of this embodiment. The singulation step S70 is a step of singulating the substrate 10 by cutting the substrate 10 and removing the semiconductor chips 10T. The singulation step S70 of this embodiment is performed while the substrate 10 is supported by the support substrate 40.
[0073] In the singulation step S70 of the present embodiment, the substrate 10 is cut by a dicing device M using a blade 9. Alternatively, the substrate 10 may be cut using a laser cutting device.
[0074] The singulation step S70 of this embodiment is performed from the back surface 10b side of the substrate 10. Therefore, in the singulation step S70, it is difficult to observe the alignment lines L11 and L12 (see FIG. 1 ) provided on the device surface 10a from the processing side. Figure 5 ). In addition, the film portion 20 of the present embodiment is provided with a groove 22 extending along the alignment lines L11 and L12. Therefore, it is also possible to cut the substrate 10 along the groove 22 and singulate the substrate 10. However, in order to prevent the inner side surface of the groove 22 from contacting the blade 9 when cutting the substrate 10, the groove 22 is formed to be wide enough relative to the alignment lines L11 and L12. In addition, since the groove 22 is formed by etching, the positional accuracy is low. Therefore, when the singulation process S70 is performed based on the groove 22, there is a problem that it is difficult to improve the positional accuracy of the cut surface in the singulation process S70.
[0075] In this embodiment, the groove 11 provided on the device surface 10a extends through to the back surface 10b. Therefore, during the singulation step S70, the position of the groove 11 can be determined from the back surface 10b. The cutting device M includes an imaging device C for observing the groove 11 from above. The cutting device M uses the imaging device C to determine the position of the groove 11 and cuts the substrate 10 based on the groove 11. In other words, the singulation step S70 of this embodiment is performed based on the groove 11 extending through to the back surface 10b.
[0076] like Figure 5 As shown, all alignment lines L11 and L12 of this embodiment are arranged on the extension line of the groove portion 11. Therefore, the dicing device M cuts the substrate 10 linearly along the groove portion 11 captured by the imaging device C, thereby separating the substrate 10 into individual pieces. By cutting the substrate 10, the semiconductor device 1 is formed, in which the electrodes 20T are provided on the back surface 10b side of the semiconductor chip 10T.
[0077] like Figure 18As shown, in the singulation process S70, a cutting groove 10G is formed in the substrate 10 using a blade 9. Even when the blade 9 has a certain thickness, the width of the cutting groove 10G gradually increases as it moves from the bottom portion toward the opening side. This is because the cut surface is ground by the side surface of the blade 9 on the opening side of the cutting groove 10G. Therefore, the cut surfaces of the substrate 10 that are opposite to each other across the cutting groove 10G gradually separate from each other as they move toward the opening side. Therefore, the pair of side surfaces 10c of the semiconductor chip 10T formed between the cut surfaces are inclined in a direction that gradually approaches each other as they move from the device surface 10a side toward the back surface 10b side.
[0078] Figure 19 Schematic diagram illustrating the second pasting step S80 of this embodiment. During the transition from the singulation step S70 to the second pasting step S80, the substrate 10 is flipped upside down. The second pasting step S80 is performed while supported by the support substrate 40. The second pasting step S80 is a step of pasting the substrate 10 to the dicing tape 50 on the side opposite the support substrate 40. In this embodiment, the film portion 20 is provided on the back surface 10b of the substrate 10, so that the substrate 10 is pasted to the dicing tape 50 via the film portion 20.
[0079] Figure 20 This is a schematic diagram illustrating the support substrate detachment step S90 of this embodiment. The support substrate detachment step S90 is a step for detaching the support substrate 40 from the base material 10. In the support substrate detachment step S90 of this embodiment, the adhesive 30 may be dissolved by a solvent, or the adhesive strength may be weakened by irradiating the light-transmitting support substrate 40 with a laser. Furthermore, the support substrate detachment step S90 may also be a step for detaching the support substrate 40 from the base material 10 by mechanically peeling the adhesive 30 by inserting a sharp tool between the base material 10 and the support substrate 40.
[0080] Figure 21 : is a schematic diagram showing the picking-up process S100 of this embodiment. The picking-up process S100 is a process of removing the singulated semiconductor devices 1 on the dicing tape 50 individually from the dicing tape 50. In the picking-up process S100, first, a process is performed to weaken the adhesive force of the adhesive layer on the surface of the dicing tape 50. As a process for weakening the adhesive force of the adhesive layer of the dicing tape 50, for example, a process of irradiating the adhesive layer with ultraviolet light or heating the adhesive layer is performed. In addition, in the picking-up process S100, one semiconductor device 1 is pushed upward from the lower side of the dicing tape 50 using a pin, and negative pressure is applied to the device surface 10a of the semiconductor device 1 for adsorption, thereby picking up the semiconductor device 1. By going through the above processes, the semiconductor device 1 can be manufactured.
[0081] Next, the effects of the first embodiment will be described.
[0082] like Figure 2 As shown, the manufacturing method of the semiconductor device 1 of this embodiment includes a mark forming step S20, a first pasting step S30, a grinding step S40, and a processing step (a photolithography step S60 or a singulation step S70). Figure 4 As shown, the mark forming step S20 is a step of forming a recess (groove 11 and hole 12) on the device surface 10a on which the circuit pattern is formed of the substrate 10 made of semiconductor material. Figure 6 As shown, the first pasting step S30 is a step of pasting the device surface 10a to the support substrate 40. Figure 7 As shown, the grinding step S40 is a step of grinding the surface of the substrate 10 on the opposite side of the device surface 10a (initial back surface 10f) to form a back surface (ground surface) 10b while being supported by the support substrate 40. Figures 12 to 18 As shown, the processing step (photolithography step S60 or singulation step 70) is a step in which the substrate 10 is processed from the back surface 10b side while being supported by the support substrate 40. In the method for manufacturing the semiconductor device 1 of this embodiment, in the grinding step S40, the recessed portions (grooves 11 and holes 12) are exposed on the back surface 10b to serve as marks. In the processing step (photolithography step S60 or singulation step S70), the method for manufacturing the semiconductor device 1 of this embodiment uses the marks (grooves 11 and holes 12) as a reference for processing.
[0083] According to this configuration, in the mark forming process S20, a recess (groove 11 and hole 12) can be formed from the device surface 10a side with the alignment lines L11, L12, etc. of the device surface 10a as a reference. In addition, the formed recess (groove 11 and hole 12) can be exposed from the back side 10b by the grinding process S40. Thus, when a processing process (photolithography process S60 or singulation process S70) is performed from the back side 10b, alignment can be performed from the back side 10b side with the recess (groove 11 and hole 12) as a reference. According to this configuration, for a processing process (photolithography process) that needs to be performed from the back side 10b, alignment of the substrate 10 during processing becomes easy. In addition, when a processing process that requires alignment of the substrate 10 is performed, there is no need to turn the device surface 10a side toward the upper side for alignment, which can simplify the manufacturing process.
[0084] like Figure 18 As shown, in the method for manufacturing the semiconductor device 1 of this embodiment, the processing step is a singulation step S70 of cutting the base material 10 based on the mark (groove portion 11 ) while being supported by the support substrate 40 to separate the base material 10 into pieces.
[0085] According to this configuration, as a processing step, the singulation step S70 is performed from the back side 10b while being supported by the supporting substrate 40. In the past, in the method for manufacturing a semiconductor device, the process of cutting and singulating the substrate to form the semiconductor device 1 was performed while being mounted on a dicing tape. The dicing tape 50 has elasticity, so if the substrate is cut on the dicing tape, there is a problem that the substrate is difficult to stabilize during cutting and the cut surface is easily damaged. In contrast, according to the above-mentioned configuration, the singulation of the substrate 10 is performed while being supported by the supporting substrate 40. Therefore, compared with the case where the substrate 10 is singulated on the dicing tape 50, the substrate 10 can be cut while being stably supported. As a result, it is difficult for damage to remain on the cut surface after the singulation step S70, and a semiconductor device 1 with improved quality can be provided.
[0086] Furthermore, according to the above-described configuration, the singulation step S70 is performed while the device surface 10a is adhered to the support substrate 40. Typically, during the singulation step S70, particles are easily generated during cutting, and these particles sometimes scatter into the processing space and contaminate the device surface 10a. In particular, when the singulation step S70 is performed on a dicing tape 50, there is a concern that a portion of the dicing tape 50 may be scraped off by the blade 9 performing the singulation step S70 and adhere to the device surface 10a, making it difficult to remove. According to the above-described configuration, the device surface 10a is covered by the support substrate 40 via the adhesive 30, thereby preventing particles generated during the singulation step S70 from adhering to the device surface 10a, and thus providing a semiconductor device 1 having improved quality.
[0087] In addition, according to the above-mentioned configuration, after the singulation step S70 is completed, the singulated substrate 10 (semiconductor chip 10T) is placed on the support substrate 40. Therefore, when the semiconductor chip 10T is processed (for example, the side surface 10c is etched) after the singulation step S70, the plurality of semiconductor chips 10T on the support substrate 40 can be processed together. In contrast, when the singulation step S70 is performed on the dicing tape 50 as in the past, etching or other processing cannot be performed on the dicing tape 50 in consideration of damage to the dicing tape 50. Therefore, in the conventional manufacturing method, it is necessary to move the singulated semiconductor chip 10T from the dicing tape 50 to the support table before processing. According to the above-mentioned configuration, when the singulated semiconductor chip 10T is subjected to etching or other processing, the process of re-mounting the semiconductor chip 10T on the support table can be omitted, and the manufacturing process can be simplified.
[0088] like Figure 5As shown, in the method for manufacturing the semiconductor device 1 of this embodiment, alignment lines L11 and L12 are provided on the device surface 10a to divide the substrate 10. The recessed portion is a groove 11 at least partially overlapping the alignment lines L11 and L12 when viewed in the thickness direction of the substrate 10.
[0089] According to this configuration, by providing grooves 11 as the recessed portions serving as markers and at least one groove 11, the substrate 10 can be aligned. Furthermore, by arranging the grooves 11 so as to overlap the alignment lines L11 and L12 when viewed in the thickness direction of the substrate 10, the singulation step S70 can be performed by cutting along the grooves 11. This facilitates alignment of the cutting lines in the singulation step S70, enabling the manufacture of semiconductor devices 1 with improved positional accuracy of the cutting lines.
[0090] In the method for manufacturing the semiconductor device 1 of this embodiment, the substrate 10 is divided by alignment lines L11 and L12 into a plurality of rectangular active sections S1 and a plurality of removed sections S2 arranged along the outer edge. The groove 11 overlaps with the portion of the alignment lines L11 and L12 that divides the removed sections S2.
[0091] This configuration prevents the cut surface of the groove 11 formed in the mark forming step S20 from forming the outer side surface of the final semiconductor device 1. Therefore, in the mark forming step S20, the groove 11 forming method and various forming conditions can be set with processing speed prioritized over the state of the cut surface, thereby shortening the time required for the mark forming step S20. As a result, the surface accuracy of the side surface 10 c of the manufactured semiconductor device 1 can be maintained, and the manufacturing time of the semiconductor device 1 can be shortened.
[0092] like Figure 2 As shown, the manufacturing method of the semiconductor device 1 of this embodiment includes a film forming step S50 performed after the grinding step S40. The film forming step S50 is a step of forming the film portion 20 on the back surface 10b. Figures 12 to 17 As shown, the processing step is a photolithography step S60 of removing a portion of the membrane portion 20 by etching based on the mark (hole portion 12).
[0093] With this configuration, a photolithography step S60 can be performed as a processing step to etch a portion of the membrane portion 20. Specifically, the photomask 70 can be aligned in the photolithography step S60 from the rear surface 10b. This improves the accuracy of the alignment of the photomask 70, allowing the grooves 22 to be formed in the membrane portion 20 with high positional accuracy.
[0094] like Figure 14As shown, in the method for manufacturing the semiconductor device 1 of this embodiment, alignment lines L11 and L12 are provided on the device surface 10a to partition the substrate 10. In the photolithography step S60, the region (groove 22) where the membrane portion 20 is etched overlaps with the alignment lines L11 and L12 when viewed in the thickness direction of the substrate 10.
[0095] According to this configuration, the membrane portion 20 can be singulated into the size of the electrode 20T of the semiconductor device 1 by the photolithography step S60. Thus, in the singulation step S70 performed separately, there is no need to cut the membrane portion 20. In the case where the membrane portion 20 is sufficiently thick (40 μm or more), if the membrane portion 20 and the substrate 10 are to be cut at the same time, a large burden is imposed on the substrate 10, which causes damage to the substrate 10. In particular, the substrate 10 is made of a fragile material such as silicon (Si) or silicon carbide (SiC). Therefore, when the lower side of the membrane portion 20 of a sufficiently thick ductile material is connected to the membrane portion 20 at the same time, cracks may occur in the substrate 10. By singulating the membrane portion 20 in the photolithography step S60, damage to the substrate 10 when the substrate 10 is cut can be suppressed.
[0096] like Figure 2 As shown, the method for manufacturing the semiconductor device 1 of the present embodiment includes a singulation step S70 performed after the photolithography step S60. The singulation step S70 is a step of cutting the substrate 10 and singulating the substrate 10.
[0097] When the film portion 20 is mechanically cut using a blade 9 or the like, burrs may be generated from the film portion 20. Burrs generated from the film portion 20 may affect subsequent steps, and therefore require additional steps for handling. According to the above configuration, the film portion 20 is pre-segmented in the photolithography step S60, and burrs are not generated from the film portion 20 in the segmentation step S70. Therefore, the segmentation step S70 can be smoothly performed.
[0098] like Figure 1 As shown, the semiconductor device 1 of this embodiment includes a plate-shaped semiconductor chip 10T made of a semiconductor material. The semiconductor chip 10T has a device surface 10a, a back surface 10b, and four side surfaces 10c. A circuit pattern is formed on the device surface 10a. The back surface 10b is located opposite the device surface 10a. The four side surfaces 10c connect the device surface 10a and the back surface 10b. At least one pair of the four side surfaces 10c facing opposite sides tilts toward each other as it moves from the device surface 10a toward the back surface 10b.
[0099] By performing the singulation step S70 from the back surface 10b side of the substrate 10 using the blade 9, the side surfaces 10c are each inclined toward each other as they move from the device surface 10a side toward the back surface 10b side. That is, by having such side surfaces 10c, the above-described manufacturing method can be employed, and a semiconductor device 1 having improved quality can be provided.
[0100] Modifications that can be adopted in this embodiment will be described.
[0101] In this embodiment, the film portion 20 is formed on the back surface 10b of the substrate 10 in the film forming step S50, and a portion of the film portion 20 is etched in the photolithography step S60. However, the semiconductor device 1 may not include the electrode 20T. In this case, the film forming step S50 and the photolithography step S60 are omitted in the method for manufacturing the semiconductor device 1.
[0102] In this embodiment, if Figure 5 As shown in FIG. 1 , the groove 11 is only arranged between the removed partitions S2 and not between the effective partitions S1. Therefore, in this embodiment, the cut surface of the groove 11 as a mark does not appear as the side surface 10c of the semiconductor device 1, which is the final product. However, as Figure 22 As shown in the modified example, the groove portion 11A can also be arranged on the alignment lines L11 and L12 between the effective partition S1 and the removal partition S2. In other words, the groove portion 11A can also overlap with the portion of the alignment lines L11 and L12 that divide the effective partition S1. According to this modified example, the cut surface of the groove portion 11A formed in the mark forming step S20 can be used as the outer surface of the semiconductor device 1 as the final product. Therefore, in the singulation step S70, part of the cutting step can be omitted, and the time required for the singulation step S70 can be shortened. In addition, the groove portion 11A can also be arranged between the effective partitions S1.
[0103] Then, based on Figure 22 The singulation step S70 in the case of forming the groove portion 11A of the modified example will be described. The singulation step S70 includes a first cutting step of cutting the substrate 10 along the first alignment line L11 and a second cutting step of cutting the substrate 10 along the second alignment line L12.
[0104] In the first cutting step, the substrate 10 is first cut along one groove portion 11A overlapping the first alignment line L11. Next, the blade 9 is shifted a predetermined distance in a direction perpendicular to the first alignment line L11 to cut the substrate 10. By repeating the steps of shifting the blade 9 a predetermined distance and then cutting the substrate 10, the substrate 10 can be cut along all the first alignment lines L11.
[0105] In the second cutting step, the substrate 10 is cut along the second alignment line L12 using the same procedure as in the first cutting step. Specifically, the substrate 10 is first cut along one groove portion 11A that overlaps the second alignment line L12. Next, the blade 9 is offset by a predetermined distance in a direction perpendicular to the second alignment line L12 to cut the substrate 10. By repeating this step of offsetting the blade 9 by a predetermined distance and then cutting the substrate 10, the substrate 10 can be cut along all of the second alignment lines L12. By following these steps, the substrate 10 is cut along all of the alignment lines L11 and L12, and all of the semiconductor chips 10T are removed from the substrate 10.
[0106] (Second embodiment)
[0107] Figure 23 1 is a flowchart showing a method for manufacturing the semiconductor device 1 according to the second embodiment. In the following description of the embodiment, the same components as those in the previously described embodiment are denoted by the same reference numerals, and their description is omitted.
[0108] The method for manufacturing the semiconductor device 1 of this embodiment includes a device surface forming step S10, a mark forming step S20, a first pasting step S30, a grinding step S40, a film forming step S50, a photolithography step S60, a second pasting step S170, a support substrate detaching step S180, a singulation step S190, and a pickup step S100. The method for manufacturing the semiconductor device 1 of the second embodiment differs from the first embodiment in the order of the second pasting step S170, the support substrate detaching step S180, and the singulation step S190. In the second embodiment, descriptions of the steps performed before the second pasting step S170 are omitted.
[0109] Figure 24 Schematic diagram illustrating the second pasting step S170 of this embodiment. The second pasting step S170 is performed while supported by the support substrate 40. The second pasting step S170 is a step for pasting the surface of the membrane portion 20 to the dicing tape 50. In this embodiment, the second pasting step S170 is performed immediately after the photolithography step S60 and before the singulation step S190. Therefore, during the second pasting step S170, the membrane portion 20 is singulated into a plurality of electrodes 20T, while the substrate 10 is not singulated.
[0110] Figure 25 Schematic diagram showing the support substrate detaching step S180 of the present embodiment. The support substrate detaching step S180 is a step of detaching the support substrate 40 from the base material 10. The support substrate detaching step S180 of the present embodiment is performed in the same steps as those of the first embodiment.
[0111] Figure 26 Schematic diagram showing the singulation step S190 of this embodiment. The singulation step S190 of this embodiment is performed with the surface of the film portion 20 attached to the dicing tape 50. The substrate 10 is cut using a dicing device M using a blade 9. The singulation step S190 of this embodiment is performed from the device surface 10a side of the substrate 10. Therefore, the dicing device M uses the imaging device C to cut the substrate 10 along the alignment lines L11 and L12. In the singulation step S190 of this embodiment, the film portion 20 has been singulated in advance, so the blade 9 only cuts the substrate 10.
[0112] Next, the effects of the second embodiment will be described.
[0113] The method for manufacturing the semiconductor device 1 of this embodiment includes the same photolithography step S60 as in the first embodiment. That is, the photomask 70 can be aligned from the rear surface 10b side using the mark (hole 12) as a reference.
[0114] The method for manufacturing the semiconductor device 1 of this embodiment includes a second pasting step S170 performed after the photolithography step S60, and a support substrate detaching step S180 performed after the second pasting step S170 and before the singulation step S190. The second pasting step S170 is a step of pasting the surface of the film portion 20 to the dicing tape 50 while supported by the support substrate 40. The support substrate detaching step S180 is a step of detaching the support substrate 40 from the base material 10. The singulation step S190 is performed while the surface of the film portion 20 is pasted to the dicing tape 50.
[0115] In the past, the singulation process of simultaneously cutting the film portion and the substrate was performed on a dicing tape. In the previous method, when the film portion is a metal film, burrs are generated from the cut portion toward the dicing tape due to the ductility of the metal. In addition, sometimes the burrs of the film portion are sunk into the dicing tape, making it difficult to pick up the semiconductor device. In contrast, according to the above-mentioned structure, although the singulation process S190 is performed on the dicing tape 50, the film portion 20 has been singulated in advance, so burrs will not be generated from the film portion 20, and the above-mentioned problem will not occur. As a result, the semiconductor device 1 can be manufactured stably. In addition, according to this structure, the singulation process S190 can be performed on the dicing tape 50, so compared with the case where the singulation process is performed on the supporting substrate 40, the concern that the adhesive 30 will damage the blade 9 can be eliminated.
[0116] According to at least one embodiment described above, by exposing the recessed portion (groove portion 11 and hole portion 12) on the back side 10b as a mark, the substrate 10 can be positioned from the back side 10b, and a method for manufacturing a semiconductor device 1 that facilitates the positioning of the substrate 10 within the process can be provided.
[0117] While several embodiments of the present invention have been described, these embodiments are provided as examples and are not intended to limit the scope of the invention. These embodiments may be implemented in various other ways, and various omissions, substitutions, and modifications may be made without departing from the spirit of the invention. These embodiments and their variations are intended to be included within the scope and spirit of the invention, and are also intended to be included within the scope of the invention set forth in the claims and their equivalents.
[0118] Description of Reference Numerals
[0119] 1. Semiconductor device; 10. Substrate; 10a. Device surface; 10b. Back surface (ground surface); 11, 11A. Grooves (recesses, marks); 12. Holes (recesses, marks); 20. Film; 40. Support substrate; 50. Dicing tape; h, H. Thickness; L11. Alignment line; S1. Active partition; S2. Removal of partition; S20. Mark forming step; S30. First lamination step; S40. Grinding step; S50. Film forming step; S60. Photolithography step (processing step); S70. Singulation step (processing step);
[0120] S80, S170 ...second pasting step; S90, S180 ...support substrate detaching step; S190 ...singularization step.
Claims
1. A method for manufacturing a semiconductor device, wherein: have: a mark forming step of forming a recess on a device surface of a substrate made of a semiconductor material on which a circuit pattern is formed; A first pasting step of pasting the device surface onto a supporting substrate; a grinding step of grinding a surface of the base material on the opposite side of the device surface while the base material is supported by the support substrate to form a ground surface; as well as a processing step of processing the base material from the grinding surface side while the base material is supported by the support substrate; In the grinding step, the recess is exposed on the grinding surface to serve as a mark. In the processing step, the processing is performed based on the mark.
2. The method for manufacturing a semiconductor device according to claim 1, wherein: The processing step is a singulation step of cutting the base material based on the mark while the base material is supported by the support substrate to separate the base material into pieces.
3. The method for manufacturing a semiconductor device according to claim 2, wherein: An alignment line for dividing the substrate is provided on the device surface. The recessed portion is a groove portion at least partially overlapping the alignment line when viewed from the thickness direction of the base material.
4. The method for manufacturing a semiconductor device according to claim 3, wherein: The substrate is divided by the alignment lines into a plurality of effective partitions divided into rectangular shapes and a plurality of removal partitions arranged along the outer edges. The groove portion overlaps with a portion of the alignment line that divides the removal zones into each other.
5. The method for manufacturing a semiconductor device according to claim 3, wherein: The substrate is divided by the alignment lines into a plurality of effective partitions divided into rectangular shapes and a plurality of removal partitions arranged along the outer edges. The groove portion overlaps with a portion of the alignment line that divides the effective partitions.
6. The method for manufacturing a semiconductor device according to claim 1, wherein: A film forming step of forming a film portion on the ground surface is performed after the grinding step. The processing step is a photolithography step of etching and removing a portion of the film portion based on the mark.
7. The method for manufacturing a semiconductor device according to claim 6, wherein: An alignment line for dividing the substrate is provided on the device surface. A region where the film portion is etched in the photolithography step overlaps with the alignment line when viewed in the thickness direction of the substrate.
8. The method for manufacturing a semiconductor device according to claim 7, wherein: The method includes a singulation step of cutting the substrate and singulating the substrate into individual pieces, which is performed after the photolithography step.
9. The method for manufacturing a semiconductor device according to claim 8, wherein: have: a second pasting step, performed after the photolithography step, of pasting the surface of the film portion to a dicing tape while being supported by the support substrate; as well as The support substrate detaching step is performed after the second bonding step and before the singulation step, and is performed to detach the support substrate from the base material. The singulation step is performed in a state where the surface of the film portion is attached to the dicing tape.
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