A macro cell layout method, device, medium and product of integrated circuit design

Abstract

The application relates to a macro cell layout method, device, medium and product of integrated circuit design. The macro cell layout method is applied to a legalization stage of macro cell layout, and comprises the following steps: obtaining an initialization layout, performing global layout on the initialization layout to obtain an initial layout with a boundary and comprising a plurality of macro cells; providing preset constraint conditions corresponding to the initial layout, wherein the preset constraint conditions comprise minimum spacing constraints and prohibited spacing constraints, whether there is a violation between adjacent macro cells and between the macro cells and the boundary is determined according to the preset constraint conditions, and the types of the violation include repulsion violation and attraction violation; according to the initial layout, idle layout space distribution available for macro cell movement is generated, and the idle layout space of the macro cell in the moving direction is calculated; based on the idle layout space, the violation and the type of the violation, the displacement of the macro cell is calculated, and the initial layout is optimized.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of chip layout, and particularly relates to a macro cell layout method, device, medium and product of integrated circuit design. BACKGROUND

[0002] In modern chip design, macro cells mainly include memories, custom IP cores, etc., and due to their large size and position sensitivity, their layout needs to meet multiple constraint conditions, including pre-placed, boundary constraint, spacing constraint, etc. The traditional layout process usually includes three stages: global placement, legalization and detailed placement. The core task of the legalization stage is to eliminate the overlap between modules while preserving the optimization characteristics (such as wire length, timing, etc.) of the global layout as much as possible, and meeting all physical constraints.

[0003] Chip layout legalization is based on a given layout and the constraints that the layout needs to comply with to remove the overlap between standard cells or macro cells in the chip and legalize them, while minimizing the layout changes. As the process node continues to shrink and the design complexity increases, existing legalization algorithms face the problems of "high-density overlap difficult to remove efficiently", "insufficient compatibility of complex constraints" and "edge compaction needs not met". SUMMARY

[0004] To solve the technical problem that in the legalization stage of macro cell layout, moving macro cells to remove the mutual overlap between macro cells cannot meet the multiple constraint conditions of the layout, thereby affecting the global layout optimization result, the present application provides a macro cell layout method, device, medium and product of integrated circuit design.

[0005] The technical problem is solved by providing a macro cell layout method for integrated circuit design, applied to the legalization stage of macro cell layout, the macro cell layout method comprising the following steps: obtaining an initialization layout, performing global layout on the initialization layout to obtain an initial layout with boundaries and comprising a plurality of macro cells; providing preset constraint conditions corresponding to the initial layout, the preset constraint conditions comprising minimum spacing constraints and prohibited spacing constraints, the prohibited spacing constraints allowing adjacent macro cells to be placed closely when there are no pins on the adjacent edges between the adjacent macro cells, and allowing a macro cell to be placed close to the boundary when there are no pins on the edge of the macro cell close to the boundary, determining whether there is a violation between adjacent macro cells or between the macro cell and the boundary according to the preset constraint conditions, the types of violations including repulsion violations and attraction violations; generating a free layout space distribution available for the movement of the macro cells according to the initial layout, calculating the free layout space of the macro cells in the movement direction, the free layout space distribution being obtained by removing the occupied area and the prohibited placement area of the macro cells from the placeable area of the macro cells; calculating the displacement of the macro cells based on the free layout space, the violations and the types of violations, and optimizing the initial layout; wherein calculating the free layout space of the macro cells in the movement direction comprises the following steps: obtaining the free layout space distribution; scanning from the macro cell to the boundary to obtain a projection line segment of the occupied area of the macro cell in the movement direction, the movement direction including up, down, left and right directions; when the free layout space distribution completely contains the scanning length of the projection line segment, the free layout space of the macro cells in each direction is calculated.

[0006] Preferably, the violation is defined as the overlapping area calculated between adjacent macro cells or between the macro cell and the boundary, and the macro cell generating the overlapping area is the violation object; determining whether there is a violation between adjacent macro cells or between the macro cell and the boundary according to the preset constraint conditions comprises the following steps: obtaining the preset constraint conditions, the minimum spacing constraints and the prohibited spacing constraints corresponding to the repulsion violations and the attraction violations, respectively; calculating the distance between adjacent macro cells or between the macro cell and the boundary according to the preset constraint conditions, and determining whether there is a repulsion violation or an attraction violation.

[0007] Preferably, the preset constraint condition is defined as a minimum spacing constraint, and if the spacing between adjacent macro units or between the macro unit and the boundary is less than a preset minimum spacing, the repulsion violation exists; or, the preset constraint condition is defined as a prohibited spacing constraint, and if the spacing between adjacent macro units or between the macro unit and the boundary is less than the preset prohibited spacing and there is no pin corresponding to the adjacent edge, the attraction violation exists; or, the preset constraint condition is defined as a minimum spacing constraint and a prohibited spacing constraint, and the preset minimum spacing is greater than the preset prohibited spacing, and if the spacing between adjacent macro units or between the macro unit and the boundary is less than the preset prohibited spacing, the attraction violation exists, and if it is greater than or equal to the preset prohibited spacing and less than the preset minimum spacing, the repulsion violation exists.

[0008] Preferably, based on the idle layout space, the violation and the type of the violation, the displacement of the macro unit is calculated, and the initial layout is optimized, including the following steps: based on the type of the violation and the state of the violation object, the contribution displacement of the violation to the violation object is calculated, the contribution displacement refers to the moving distance that two violation objects need to bear respectively to eliminate the violation, and the state of the violation object includes fixed and movable; projection line segment scanning is performed on each moving direction of the macro unit respectively to obtain the average idle layout space of the macro unit; based on the average idle layout space and the placement area boundary of the macro unit, an anchor point is calculated, and all macro units are sorted from near to far according to the right angle distance between the macro unit and the anchor point; the displacement of the macro unit is calculated in sequence, and the macro unit is moved.

[0009] Preferably, based on the type of the violation and the state of the violation object, the contribution displacement of the violation to the violation object is calculated, including the following steps: the total amount of overlap o of the violation in the horizontal and vertical directions is calculated respectively, and the total amount of overlap is evenly distributed to the overlapping violation objects to generate the contribution displacement in the opposite direction , wherein, , is defined as the vector length, records the minimum contribution displacement combination and the second minimum contribution displacement combination; the minimum contribution displacement and the second minimum contribution displacement are adjusted according to the state of the violation object; the minimum contribution displacement and the second minimum contribution displacement are adjusted according to the idle layout space of the violation object; wherein, when recording the minimum contribution displacement combination and the second minimum contribution displacement combination, if the horizontal direction is the minimum contribution displacement combination, the vertical direction is the second minimum contribution displacement combination, if the vertical direction is the minimum contribution displacement combination, the horizontal direction is the second minimum contribution displacement combination.

[0010] Preferably, the displacement of the macro cell is calculated by sequentially traversing, and the macro cell is moved, comprising the following steps: judging whether the direction of the displacement contributed by two of the violations to the same macro cell in the horizontal and vertical directions is the same, if the same, the two violations are located on one side of the macro cell, if the opposite, the two violations are located on both sides of the macro cell; when the violations are located on one side of the macro cell, the maximum contribution displacement is taken as the displacement of the macro cell; when the violations are located on both sides of the macro cell, the maximum contribution displacement of the side with more violations is taken as the displacement of the macro cell; the displacement of the macro cell is calculated After that, all violations are traversed, and the displacement contributed by each of the violations to another macro cell generating the violation is recalculated , satisfying .

[0011] The application also provides a computer device comprising a storage, a processor and a computer program stored on the storage, the processor executing the computer program to implement the steps of the macro cell layout method.

[0012] The application also provides a computer readable storage medium having a computer program stored thereon, the computer program implementing the steps of the macro cell layout method when executed by a processor.

[0013] The application also provides a computer program product comprising a computer program, the computer program implementing the steps of the macro cell layout method when executed by a processor.

[0014] Compared with the prior art, the macro cell layout method, device, medium and product for integrated circuit design provided by the application have the following advantages:

[0015] 1. The embodiment of the application provides a macro cell layout method for integrated circuit design, which is applied to the legalization stage of macro cell layout. Chip layout legalization is to make macro cells comply with physical design rules or various constraints set by users of automatic design tools on the basis of a given global layout. The macro cell layout method identifies repulsion violations and attraction violations between adjacent macro cells and between a macro cell and a boundary through preset constraint conditions, calculates the displacement of the macro cell in combination with the free layout space of the macro cell in the moving direction, and optimizes the initial layout. After completing the global layout, the macro cell can be subjected to a de-overlapping operation of minimum layout change amount in strict compliance with minimum spacing constraints and prohibited spacing constraints, so that a solution with smaller layout change amount and complying with spacing constraints and boundary constraints is obtained.

[0016] It can be understood that the macro cell layout method can realize de-overlapping of macro cells of any size in a two-dimensional space, the layout space detection mechanism can calculate the free layout space of the macro cell in the moving direction, and the local de-overlapping operation is guaranteed to skip the local optimum through the layout space detection mechanism, compared with the traditional two-dimensional de-overlapping algorithm, and has stronger robustness and convergence, and has a smaller layout change amount in the case of completely removing the overlap.

[0017] 2、The macro cell layout method provided by the embodiment of the application, the violation is defined as the overlap area calculated between adjacent macro cells or between the macro cell and the boundary, the macro cell generating the overlap area is the violation object, and the preset constraint condition is combined, wherein the minimum spacing constraint corresponds to the repulsion violation, and the prohibited spacing constraint corresponds to the attraction violation, whether the repulsion violation or the attraction violation exists is judged by calculating the distance between adjacent macro cells and the distance between the macro cell and the boundary, and through this design, the violation and the type of the violation can be accurately identified, and accurate violation judgment basis is provided for subsequent calculation of the displacement of the macro cell and optimization of the initial layout.

[0018] 3、The macro cell layout method provided by the embodiment of the application, the preset constraint condition is pre-set, and the legal layout of the chip needs to satisfy the minimum spacing constraint and / or the prohibited spacing constraint, the judgment standard of different violation types under different preset constraint conditions is defined, and accurate violation judgment basis is provided for subsequent calculation of the displacement of the macro cell and optimization of the initial layout.

[0019] 4、The macro cell layout method provided by the embodiment of the application, the free layout space distribution is obtained by removing the occupied area and the prohibited placement area of the macro cell from the placeable area of the macro cell, and the free layout space is calculated from the free layout space distribution and the occupied area of the macro cell. The macro cell in the two-dimensional case has free layout spaces in four directions of up, down, left and right, the projection line segment of the occupied area of the macro cell in the moving direction is obtained by scanning from the macro cell to the boundary, the scanning length of the projection line segment can be completely accommodated by the free layout space distribution, and the free layout space in this direction is obtained, and then the free layout spaces in which the macro cell can move in each direction can be determined, and accurate space basis is provided for subsequent calculation of the displacement of the macro cell and optimization of the initial layout.

[0020] 5、The macro cell layout method provided by the embodiment of the application, the contribution displacement of the violation to the violation object is calculated according to the type of the violation and the state of the violation object, the anchor point is calculated in combination with the average free layout space of the macro cell and the placement area boundary, all macro cells are sorted from near to far, and the displacement of the macro cell is calculated in sequence, and then the moving distance of the macro cell can be reasonably determined, the moving conflict can be avoided, and the initial layout can be effectively optimized to eliminate the violation.

[0021] 6、The macro cell layout method provided by the embodiment of the present application, the contribution displacement refers to the moving distance that two violation objects need to bear respectively to eliminate the violation, the total amount of overlap of the violation in horizontal and vertical directions is calculated, and the contribution displacement is evenly distributed, the minimum contribution displacement combination and the second minimum contribution displacement combination are recorded, and the minimum contribution displacement and the second minimum contribution displacement are adjusted in combination with the state of the violation object and the idle layout space, through the design, the displacement basis suitable for the displacement calculation and initial layout optimization of the macro cell can be provided, so that the violation can be better eliminated.

[0022] 7、The macro cell layout method provided by the embodiment of the present application, the direction of the contribution displacement generated by two violations to the same macro cell is judged to determine whether the two violations are located on one side or both sides of the macro cell, and the maximum contribution displacement is selected as the displacement of the macro cell , and the contribution displacement of another macro cell generating the violation is recalculated to meet the condition of , so that the displacement of the macro cell can be reasonably determined, the violation can be effectively eliminated, and the initial layout can be optimized subsequently.

[0023] 8、The embodiment of the present application further provides a computer device, which comprises a storage, a processor and a computer program stored on the storage, and the processor executes the computer program to realize the steps of the above-mentioned macro cell layout method. It should be noted that the computer device has the same beneficial effects as the above-mentioned macro cell layout method, and will not be described here.

[0024] 9、The embodiment of the present application further provides a computer readable storage medium, which stores a computer program, and the computer program realizes the steps of the above-mentioned macro cell layout method when executed by a processor. It should be noted that the computer readable storage medium has the same beneficial effects as the above-mentioned macro cell layout method, and will not be described here.

[0025] 10、The embodiment of the present application further provides a computer program product, which comprises a computer program, and the computer program realizes the steps of the above-mentioned macro cell layout method when executed by a processor. It should be noted that the computer program product has the same beneficial effects as the above-mentioned macro cell layout method, and will not be described here. BRIEF DESCRIPTION OF DRAWINGS

[0026] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the drawings needed to be used in the embodiments or prior art description. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor.

[0027] Figure 1 is a flowchart of steps S1 to S4 in a macro cell layout method of integrated circuit design provided by an embodiment of the present application.

[0028] Figure 2 is a flowchart of steps S21 to S22 in a macro cell layout method of integrated circuit design provided by an embodiment of the present application.

[0029] Figure 3 is a flowchart of steps S31 to S33 in a macro cell layout method of integrated circuit design provided by an embodiment of the present application.

[0030] Figure 4 is a flowchart of steps S41 to S44 in a macro cell layout method of integrated circuit design provided by an embodiment of the present application.

[0031] Figure 5 is a flowchart of steps S411 to S413 in a macro cell layout method of integrated circuit design provided by an embodiment of the present application.

[0032] Figure 6 is a flowchart of steps S441 to S444 in a macro cell layout method of integrated circuit design provided by an embodiment of the present application.

[0033] Figure 7 is an initial layout of a macro cell before legalization.

[0034] Figure 8 is a macro cell layout after legalization by using a commercial tool.

[0035] Figure 9 is a macro cell layout after legalization in a macro cell layout method of integrated circuit design provided by an embodiment of the present application.

[0036] Figure 10 is a framework of a computer device provided by an embodiment of the present application.

[0037] Figure 11 is a framework of a computer readable storage medium provided by an embodiment of the present application.

[0038] Figure 12 is a framework of a computer program product provided by an embodiment of the present application.

[0039] Explanation of figure mark:

[0040] 1, computer device; 11, storage; 12, processor;

[0041] 2. A computer readable storage medium;

[0042] 3. A computer program product;

[0043] 100. A computer program. DETAILED DESCRIPTION

[0044] In order to make the objectives, technical solutions and advantages of the present application clearer, the present application will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and should not be used to limit the present application.

[0045] In the embodiments provided by the present application, it should be understood that "B corresponding to A" means that B is associated with A, and B can be determined according to A. However, it should also be understood that the determination of B according to A does not mean that B is determined only according to A, but B can also be determined according to A and / or other information.

[0046] It should be understood that "one embodiment" or "an embodiment" mentioned throughout the specification means that the specific features, structures or characteristics related to the embodiment are included in at least one embodiment of the present application. Therefore, "in one embodiment" or "in an embodiment" appearing throughout the specification does not necessarily refer to the same embodiment. In addition, these specific features, structures or characteristics can be combined in any suitable manner in one or more embodiments. Those skilled in the art should also know that the embodiments described in the specification are all optional embodiments, and the actions and modules involved are not necessarily required by the present application.

[0047] In various embodiments of the present application, it should be understood that the size of the serial number of the above processes does not mean the inevitable sequence of execution order, and the execution order of the processes should be determined according to its function and inherent logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0048] The computer program product of the present application can be a computer program product, which is a machine-readable medium (media) having stored therein a sequence of instructions executable by a machine, such as a computer, to cause the machine to perform a process. The instructions can be stored in a computer memory, which can be a single memory or spread across multiple memories, which can be of the same type or different types. The machine can be a personal computer, a digital

[0049] The existing legalization algorithms face the following key challenges:

[0050] High-density overlap is difficult to remove efficiently: Global placement usually allows temporary overlap between modules to optimize the objective function, but in the macro cell dense area, traditional constraint graph or force-directed based methods may not converge quickly due to high computational complexity, or cause module displacement too large, destroying the global optimization results;

[0051] Insufficient compatibility of complex constraints: Pre-placed macro cells, spacing constraints and boundary constraints and other restrictions will significantly reduce the movable space of the module, and although the existing legalization methods can handle some constraints, they may still not be able to find a legal solution in the extreme congestion scenario;

[0052] Edge compaction needs are not met: In industrial practice, it is often necessary to push the macro cell to the edge of the chip or to place the macro cell compactly to form a regular core area for standard cell placement and routing, but most legalization algorithms do not include this goal in the optimization framework.

[0053] It is further understood that removing overlaps of macro cells can be modeled as a two-dimensional optimal de-overlapping problem of rectangles: given boundary constraints, spacing constraints and initial states of all rectangles, minimize the total movement of rectangles while removing all overlaps of rectangles. For this problem, it can be theoretically modeled as a mixed integer programming problem for solution, but the mixed integer programming problem is theoretically an NP-hard (non-deterministic polynomial) problem, and the solution time exponentially increases with the problem size in the worst case, and only small-scale problems can be processed when using fast solution methods such as branch and bound method, cutting plane method, and when using heuristic algorithms such as simulated annealing algorithm, genetic algorithm, the quality of the solution cannot be guaranteed; in addition, it can also be modeled as a one-dimensional de-overlapping problem in multiple rows, but the greedy strategy of the de-overlapping algorithm in the row is easy to lead to a local optimum rather than a global optimum, resulting in a large total movement of macro cells.

[0054] Therefore, embodiments of the present application provide a macro cell layout method, device, medium and product for integrated circuit design, which will be described below.

[0055] Referring to Figure 1 The embodiments of the present application provide a macro cell layout method for integrated circuit design, which is applied to a legalization stage of macro cell layout, and the macro cell layout method comprises the following steps:

[0056] S1: obtaining an initial layout, performing global layout on the initial layout, and obtaining an initial layout with boundaries and including a plurality of macro cells;

[0057] S2: providing preset constraint conditions corresponding to the initial layout, the preset constraint conditions including minimum spacing constraints and prohibited spacing constraints, determining whether there is a violation between adjacent macro cells and between the macro cells and the boundaries according to the preset constraint conditions, and the types of violations including repulsion violations and attraction violations;

[0058] S3: generating a distribution of idle layout spaces available for movement of the macro cells according to the initial layout, and calculating the idle layout spaces of the macro cells in the movement direction;

[0059] S4: calculating the displacement of the macro cells based on the idle layout spaces, the violations and the types of violations, and optimizing the initial layout.

[0060] The macro cell layout method provided by the embodiments of the present application is applied to the legalization stage of macro cell layout, wherein the chip layout legalization is to make the macro cells comply with the physical design rules or various constraints set by the user of the automatic design tool based on the given global layout.

[0061] It can be understood that the macro cell layout method identifies repulsion violations and attraction violations between adjacent macro cells and between the macro cell and the boundary through preset constraint conditions, calculates the displacement of the macro cell in combination with the free layout space of the macro cell in the moving direction, and optimizes the initial layout, and after completing the global layout, can perform a de-embedding operation of a minimum layout change amount on the macro cell under the condition of strictly complying with the minimum spacing constraint and the prohibited spacing constraint to obtain a solution with a smaller layout change amount and complying with the spacing constraint and the boundary constraint.

[0062] It should be noted that the macro cell layout method of the present application can realize de-embedding of macro cells of any size in a two-dimensional space. The free layout space of the macro cell in the moving direction can be calculated through a layout space detection mechanism, and the movement range of the macro cell is constrained through the free layout space calculation, so as to ensure that the violations can be eliminated and no new conflicts are caused while calculating the displacement of the macro cell and optimizing the initial layout, so as to ensure that the local de-embedding operation skips the local optimum. Compared with the traditional two-dimensional de-embedding algorithm, the present application has stronger robustness and convergence, and has a smaller layout change amount in the case of completely removing the overlap, thereby solving the technical problem that in the legalization stage of the macro cell layout, the movement of the macro cell to remove the mutual overlap between the macro cells cannot meet the various constraint conditions of the layout, thereby affecting the global layout optimization result.

[0063] Specifically, in step S1, the initial layout is obtained by a layout tool based on physical design rules, and after global layout, an initial layout with overall uniformity and local overlap is obtained.

[0064] In step S2, the preset constraint conditions refer to the boundary constraint and the spacing constraint of the macro cell, specifically including the minimum spacing constraint and the prohibited spacing constraint. There are standard cells and line networks connected closely with the macro cell in the initial layout. The main purpose of the minimum spacing constraint is to reserve a certain placement and routing space for these standard cells and line networks to weaken congestion and optimize timing; the main purpose of the prohibited spacing constraint is to make the adjacent edges of adjacent macro cells closely placed when there are no pins on the adjacent edges, and the macro cell is placed close to the boundary when there are no pins on the edge close to the boundary, thereby reducing unnecessary waste of layout resources. The constraint conditions used in the legalization stage can be specified in advance according to actual needs. The macro cell layout method of the present application embodiment can minimize the total movement amount of the macro cell under the condition of removing the mutual overlap between the macro cells after the initial layout of the given macro cell and the boundary constraint and the spacing constraint of the macro cell are given; the violations of the present application embodiment are the overlapping areas calculated between adjacent macro cells and between the macro cell and the boundary, and the types of violations include repulsion violations and attraction violations.

[0065] In step S3, the idle layout space distribution available for the macro cell to move is generated according to the initial layout, which can be used to calculate the idle layout space of the macro cell in the moving direction; in step S4, the displacement of the macro cell is calculated by using the idle layout space, the violation and the type of the violation, and the initial layout is optimized, thereby removing the violation determined in step S2 according to the preset constraint condition, and the de-embedding operation of the minimum layout change of the macro cell is realized. After the initial layout is optimized, the macro cell layout without overlapping violation and with the minimum total movement amount of the macro cell is output, wherein the non-overlapping violation means that the macro cell layout satisfies the minimum distance constraint and the prohibited distance constraint.

[0066] In the embodiment of the application, the violation is the overlapping area calculated between adjacent macro cells or between the macro cell and the boundary, and the macro cell defining the overlapping area is the violation object.

[0067] Further, referring to Figure 2 , whether there is a violation between adjacent macro cells or between the macro cell and the boundary is determined according to the preset constraint condition, including the following steps:

[0068] S21: Obtain the preset constraint condition, and the minimum distance constraint and the prohibited distance constraint correspond to the repulsive violation and the attractive violation, respectively;

[0069] S22: Calculate the distance between adjacent macro cells or between the macro cell and the boundary according to the preset constraint condition, and determine whether there is a repulsive violation or an attractive violation.

[0070] In the macro cell layout method provided by the embodiment of the application, the minimum distance constraint corresponds to the repulsive violation, and the prohibited distance constraint corresponds to the attractive violation. By calculating the distance between adjacent macro cells and the distance between the macro cell and the boundary, whether there is a repulsive violation or an attractive violation is determined. Through this design, the violation and the type of the violation can be accurately identified, and accurate violation judgment basis is provided for subsequent calculation of the displacement of the macro cell and optimization of the initial layout.

[0071] In step S21, the minimum distance constraint corresponds to the repulsive violation, and requires that the distance between adjacent macro cells or between the macro cell and the boundary is greater than or equal to the preset minimum distance; the prohibited distance constraint corresponds to the attractive violation, and requires that the distance between adjacent macro cells or between the macro cell and the boundary is less than the preset prohibited distance and there is no pin corresponding to the adjacent side, and the macro cell is placed close to the adjacent macro cell or the boundary. The preset minimum distance and the preset prohibited distance can be set by an automatic design tool.

[0072] In step S22, the minimum distance constraint corresponds to a repulsion violation, which is defined as a real overlap area between the violation objects and an overlap area between the violation objects calculated according to the preset minimum distance in the minimum distance constraint, wherein the real overlap area refers to a physically real overlap area, and the overlap area refers to an area that does not satisfy the minimum distance constraint; when facing the repulsion violation, the violation objects need to be repulsed to remove the overlap.

[0073] In some embodiments, the preset constraint condition is defined as the minimum distance constraint, and if the distance between adjacent macro cells or between the macro cell and the boundary is less than the preset minimum distance, a repulsion violation exists; or, the preset constraint condition is defined as the forbidden distance constraint, and if the distance between adjacent macro cells or between the macro cell and the boundary is less than the preset forbidden distance and there is no pin corresponding to the adjacent side, an attraction violation exists; or, the preset constraint condition is defined as the minimum distance constraint and the forbidden distance constraint, and the preset minimum distance is greater than the preset forbidden distance, if the distance between adjacent macro cells or between the macro cell and the boundary is less than the preset forbidden distance, a repulsion violation exists, and if the distance is greater than or equal to the preset forbidden distance and less than the preset minimum distance, an attraction violation exists.

[0074] In the macro cell layout method provided by the embodiments of the present application, the preset constraint condition is pre-set, and the legal layout of the chip needs to satisfy the minimum distance constraint and / or the forbidden distance constraint, the judgment standards for different violation types under different preset constraint conditions are defined, and accurate violation judgment basis is provided for subsequent calculation of the displacement of the macro cell and optimization of the initial layout.

[0075] As a first implementation, when the preset constraint condition is only specified as the minimum distance constraint, the distance between adjacent macro cells or between the macro cell and the boundary is required to be greater than or equal to the preset minimum distance to eliminate the repulsion violation.

[0076] As a second implementation, when the preset constraint condition is only specified as the minimum distance constraint, if the distance between adjacent macro cells or between the macro cell and the boundary is less than the preset forbidden distance and there is no pin corresponding to the adjacent side, the macro cell needs to be placed close to the adjacent macro cell or the boundary to eliminate the attraction violation.

[0077] As the third implementation, when the preset constraint condition specifies both the minimum spacing constraint and the forbidden spacing constraint, the preset minimum spacing is necessarily greater than the preset forbidden spacing, and the forbidden spacing constraint is given priority. Specifically, if the spacing between adjacent macro units or between a macro unit and a boundary is less than the preset forbidden spacing, it is determined that there is a repulsion violation, and the first implementation is applied to eliminate the repulsion violation; if the spacing between adjacent macro units or between a macro unit and a boundary is greater than or equal to the preset forbidden spacing and less than the preset minimum spacing, it is determined that there is an attraction violation, and the second implementation is applied to eliminate the attraction violation.

[0078] In some embodiments, the idle layout space distribution is obtained by removing the occupied region and the forbidden placement region of the macro unit from the placeable region of the macro unit. In some embodiments, when the macro unit layout method is executed while providing a spacing constraint, the minimum spacing constraint in the preset constraint condition is considered, the occupied region of the macro unit is first expanded outward to one half of the preset minimum spacing between macro units, and then the forbidden placement region of the macro unit is expanded to the preset minimum spacing between the macro unit and the boundary from the placeable region of the macro unit.

[0079] Referring to Figure 3 , the idle layout space of the macro unit in the moving direction is calculated, including the following steps:

[0080] S31: Obtain the idle layout space distribution;

[0081] S32: Scan from the macro unit to the boundary to obtain the projection line segment of the occupied region of the macro unit in the moving direction, the moving direction including the four directions of up, down, left, and right;

[0082] S33: When the idle layout space distribution can completely accommodate the scanning length of the projection line segment, the idle layout space of the macro unit in each direction is calculated.

[0083] In the macro unit layout method provided by the embodiments of the present application, the idle layout space distribution is obtained by removing the occupied region and the forbidden placement region of the macro unit from the placeable region of the macro unit, and the idle layout space is calculated from the idle layout space distribution obtained in step S31 and the occupied region of the macro unit.

[0084] It can be understood that the macro unit in the two-dimensional case has idle layout spaces in the four directions of up, down, left, and right. In steps S32 and S33, the projection line segment of the occupied region of the macro unit in the moving direction is obtained by scanning from the macro unit to the boundary, and the idle layout space distribution can completely accommodate the scanning length of the projection line segment, which is the idle layout space in this direction. Thus, the idle layout space of the macro unit in each direction can be determined, providing accurate spatial basis for subsequent calculation of the displacement of the macro unit and optimization of the initial layout.

[0085] Referring to Figure 4 , the displacement of the macro cell is calculated based on the idle layout space, the violation and the type of the violation, and the initial layout is optimized, including the following steps:

[0086] S41: The contribution displacement of the violation to the violation object is calculated according to the type of the violation and the state of the violation object, and the contribution displacement refers to the moving distance that needs to be borne by each of the two violation objects to eliminate the violation, and the state of the violation object includes fixed and movable;

[0087] S42: The average idle layout space of the macro cell is obtained by projecting the line segment scanning in each moving direction of the macro cell;

[0088] S43: The anchor point is calculated based on the average idle layout space and the placement area boundary of the macro cell, and all macro cells are sorted from near to far according to the right angle distance between the macro cell and the anchor point;

[0089] S44: The displacement of the macro cell is calculated in sequence, and the macro cell is moved.

[0090] In the macro cell layout method provided by the embodiment of the application, the contribution displacement of the violation to the violation object is calculated according to the type of the violation and the state of the violation object, the anchor point is calculated in combination with the average idle layout space of the macro cell and the placement area boundary, all macro cells are sorted from near to far, and the displacement of the macro cell is calculated in sequence, so that the moving distance of the macro cell can be reasonably determined, the moving conflict can be avoided, and the initial layout can be effectively optimized to eliminate the violation.

[0091] Specifically, in step S41, the possible displacement direction of the violation object has four directions of up, down, left and right, and if the violation is to be eliminated, the two violation objects need to move in opposite directions along the horizontal direction or in opposite directions along the vertical direction, and if the displacement of the violation object is to be minimized, the local greedy strategy is selected to select the two directions with the minimum total moving amount in the horizontal and vertical dimensions.

[0092] In step S42, the average idle layout space of the macro cell is obtained by projecting the line segment scanning in each moving direction of the macro cell, and the average idle layout space in four directions is denoted as In step S43, the anchor point is calculated by the average idle layout space of all macro cells and the placement area boundary of the macro cell, the coordinates of the lower left corner and the upper right corner of the placement area boundary of the macro cell are set as , and the calculation formula of the anchor point coordinates is: , After the anchor points are calculated, all macro units are sorted from near to far according to the right-angle distance between the macro units and the anchor points.

[0093] Please refer to Figure 5 According to the type of violation and the state of the violation object, the contribution displacement of the violation to the violation object is calculated, including the following steps:

[0094] S411: Calculate the total overlap o of the violation in the horizontal and vertical directions respectively, and evenly distribute it to the overlapping violation objects to generate contribution displacements in opposite directions , wherein , defined as the vector length, record the minimum contribution displacement combination and the second minimum contribution displacement combination;

[0095] S412: Adjust the minimum contribution displacement and the second minimum contribution displacement according to the state of the violation object;

[0096] S413: Adjust the minimum contribution displacement and the second minimum contribution displacement according to the free layout space of the violation object.

[0097] In the macro unit layout method provided by the embodiment of the application, the contribution displacement refers to the moving distance that two violation objects need to bear to eliminate the violation, the total overlap of the violation in the horizontal and vertical directions is calculated, and the contribution displacement is generated by evenly distributing it, the minimum contribution displacement combination and the second minimum contribution displacement combination are recorded, and the minimum contribution displacement and the second minimum contribution displacement are adjusted in combination with the state of the violation object and the free layout space. Through this design, the displacement basis can be provided for the displacement calculation and initial layout optimization of the macro unit, so as to better eliminate the violation.

[0098] In step S411, the formula followed by the contribution displacement, the total overlap o is evenly distributed to the overlapping violation objects to generate contribution displacements in opposite directions If the type of the violation is repulsion violation, the direction of the contribution displacement is from the violation to the violation object; if the type of the violation is attraction violation, the direction of the contribution displacement is from the violation object to the violation. When recording the minimum contribution displacement combination and the second minimum contribution displacement combination, if the horizontal direction is the minimum contribution displacement combination, the vertical direction is the second minimum contribution displacement combination; if the vertical direction is the minimum contribution displacement combination, the horizontal direction is the second minimum contribution displacement combination.

[0099] In step S412, the minimum contribution displacement and the second minimum contribution displacement are adjusted according to the state of the violation object; if one of the violation objects is in a fixed state, the displacement of the violation object is reversely superimposed on the other overlapped violation object to ensure that the total displacement amount can remove the overlap.

[0100] In step S413, the minimum contribution displacement and the second minimum contribution displacement are adjusted according to the free layout space of the violation object. If the free layout space in the direction of the minimum contribution displacement is insufficient, and the free layout space in the direction of the second minimum contribution displacement is sufficient, the second minimum contribution displacement is regarded as the minimum contribution displacement; if the free layout spaces in the directions of the minimum contribution displacement and the second minimum contribution displacement are both insufficient, the minimum contribution displacement is adjusted to 0.

[0101] Referring to Figure 6 , the displacement of the macro cell is calculated in sequence, and the macro cell is moved, including the following steps:

[0102] S441: Determine whether the contribution displacements of two violations to the same macro cell in the horizontal and vertical directions are in the same direction, if so, the two violations are located on one side of the macro cell, if not, the two violations are located on both sides of the macro cell;

[0103] S442: When the violations are located on one side of the macro cell, the maximum contribution displacement is taken as the displacement of the macro cell;

[0104] S443: When the violations are located on both sides of the macro cell, the maximum contribution displacement of the side with more violations is taken as the displacement of the macro cell;

[0105] S444: The displacement of the macro cell is calculated , and then all violations are traversed to recalculate the contribution displacement of each violation to another macro cell generating the violation , which satisfies .

[0106] In the macro cell layout method provided by the embodiment of the application, the direction of the contribution displacement of two violations to the same macro cell is determined to determine whether the two violations are located on one side or both sides of the macro cell, and the maximum contribution displacement is correspondingly selected as the displacement of the macro cell , and the contribution displacement of another macro cell generating the violation is recalculated to satisfy , so that the displacement of the macro cell can be reasonably determined, the violations can be effectively eliminated, and the initial layout can be subsequently optimized.

[0107] Specifically, in step S441, if the contribution displacements of the two violations to the same macro cell are in the same direction in the horizontal or vertical dimension, it is considered that the two violations are located on the same side of the macro cell; if the contribution displacements of the two violations to the same macro cell are in the opposite direction in the horizontal or vertical dimension, it is considered that the two violations are located on the two sides of the macro cell, respectively.

[0108] In step S442, if all the violations of a single macro cell are located on the same side, the maximum contribution displacement of the violations is taken as the displacement of the macro cell; in step S443, if the violations of a single macro cell are located on the two sides, respectively, the maximum contribution displacement of the side with more violations is taken as the displacement of the macro cell.

[0109] In step S444, after the displacement of a macro cell is calculated through steps S441 to S443 , it is necessary to traverse all the violations of the macro cell, and recalculate the contribution displacement of each violation to another macro cell from which the violation is generated , and the formula that the displacement of the macro cell needs to satisfy is: In the formula, the case of equality means that the violation can be removed exactly, and the displacement of the macro cell is the maximum contribution displacement of the violation; the case of greater than means that the violation can be removed, but the displacement of the macro cell is slightly more, and the displacement of the macro cell is not the maximum contribution displacement of the violation.

[0110] The technical solutions and technical effects of the macro cell layout method will be further explained in combination with exemplary embodiments. It should be noted that the exemplary embodiments are only used to explain the present application, and do not limit the application range of the present application.

[0111] Table 1: The design case information corresponding to the layout as the input piece using the physical design rules of TSMC 28nm and SMIC 14nm in global layout

[0112]

[0113] It can be understood that the chip layout legalization needs to maintain the optimization results as much as possible in the global layout, therefore, the optimization target of the present method is to minimize the layout change amount, and the exemplary embodiments use the total displacement of the macro cell as the index for measuring the layout change amount, and perform a comparative test of complete removal of overlap using the macro cell layout method of the present application and the mainstream commercial tool in the technical field, and the following results are obtained:

[0114] Table 2: Comparative test results of the total displacement of the macro cell (numerical unit: μm)

[0115]

[0116] As shown in Table 2, the macro cell layout method of the technical scheme of the present application can find a solution with better total displacement compared with mainstream commercial tools. In particular, based on a TSMC 28nm design (Design 1), an extreme constraint condition is set for comparison test with mainstream commercial tools: the preset minimum spacing of macro cells to the left and right side boundaries is set to 100 μm, wherein, Figure 7 is the initial layout, Figure 8 is the layout after legalization of the mainstream commercial tool, Figure 9 is the layout after legalization of the macro cell layout method of the technical scheme of the present application. As shown in Table 2, Figures 7 to 9 compared with the use of mainstream commercial tools, the technical scheme of the present application is more complete in processing extreme constraints, and can find a legal solution under the condition of meeting extreme constraints.

[0117] Referring to Figure 10 , the embodiment of the present application further provides a computer device 1 comprising a storage 11, a processor 12 and a computer program 100 stored on the storage 11, wherein the processor 12 executes the computer program 100 to realize the steps of the macro cell layout method of the integrated circuit design described in the above embodiment.

[0118] It can be understood that the computer device 1 provided by the embodiment of the present application can realize the macro cell layout method of the integrated circuit design described in the above embodiment when the processor 12 executes the computer program 100, and the computer device 1 provided by the embodiment of the present application has the same beneficial effects as the macro cell layout method provided by the above embodiment.

[0119] In some embodiments, the computer device 1 is a computer device applied to chip layout technology field, including but not limited to performing global layout on an initial layout to obtain an initial layout with boundaries and comprising a plurality of macro cells, determining whether there is a violation between adjacent macro cells and between a macro cell and a boundary according to a preset constraint condition, and calculating the displacement of the macro cell and optimizing the initial layout, which will not be described here, and theoretically, the method steps involved in the technical scheme of the present application can be realized by participating in control of the computer device 1, and the related parameters involved can also be adjusted by the computer device 1, wherein the related parameters include but are not limited to preset minimum spacing, preset prohibited spacing, minimum contribution displacement and next minimum contribution displacement and the like.

[0120] In some embodiments, the processor 12 provided by the embodiments of the present application is a general processor, which is a microprocessor or any conventional processor, such as a central processing unit (CPU), a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic device, a discrete gate or transistor logic device, a discrete hardware component, and can implement or execute the methods, steps and logic block diagrams disclosed in the embodiments of the present application.

[0121] In some embodiments, the method steps disclosed by the embodiments of the present application can be implemented by a hardware processor or a combination of hardware and software modules in the processor.

[0122] Referring to Figure 11 The embodiments of the present application further provide a computer readable storage medium 2, which stores a computer program 100, and the computer program 100 implements the steps of the macro cell layout method when executed by a processor.

[0123] It can be understood that the computer readable storage medium 2 provided by the embodiments of the present application stores the computer program 100, and the computer program 100 can be called by a processor to execute the macro cell layout method of the integrated circuit design described in the above embodiments.

[0124] It should be noted that the computer readable storage medium 2 provided by the embodiments of the present application has the same beneficial effects as the macro cell layout method provided by the above embodiments, and will not be described here.

[0125] Specifically, the computer readable storage medium 2 can include at least one type of storage medium, such as flash memory, hard disk, multimedia card, card type memory, random access memory (RAM), static random access memory (SRAM), programmable read-only memory (PROM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), magnetic memory, magnetic disk, optical disk, etc.

[0126] In some embodiments, the computer readable storage medium 2 includes a non-volatile computer readable storage medium, which can be used to store non-volatile software programs, non-volatile computer executable programs and modules.

[0127] Specifically, the computer readable storage medium 2 provided by the embodiments of the present application has a storage space for the computer program 100 to execute any method steps of the above macro cell layout method, and these programs can be read from one or more computer program products or written into the one or more computer program products.

[0128] In some embodiments, the computer program 100 can be compressed in a suitable form.

[0129] Referring to Figure 12 The embodiments of the present application also provide a computer program product 3 comprising the computer program 100, which, when executed by a processor, implements the steps of the macro cell layout method described above.

[0130] It can be understood that the computer program product 3 provided by the embodiments of the present application comprises the computer program 100, and the computer program 100 can be called by a processor to execute the macro cell layout method of the integrated circuit design described in the above embodiments, which will not be described here.

[0131] The above describes in detail the macro cell layout method, device, medium and product of the integrated circuit design according to the embodiments of the present application. The principles and implementation manners of the present application are described by using specific examples in this paper. The above description of the embodiments is only used to help understand the method of the present application and its core idea. Meanwhile, for those skilled in the art, according to the idea of the present application, the specific implementation manners and application ranges can be changed. In summary, the content of the specification should not be understood as a limitation of the present application. Any modification, equivalent replacement and improvement within the principles of the present application should be included in the protection scope of the present application.

Claims

1. A macrocell placement method for integrated circuit design, applied to the legalization stage of macrocell placement, characterized in that, The macro cell layout method includes the following steps: Obtain the initial layout, perform global layout on the initial layout to obtain an initial layout with boundaries and including several macro units; The system provides preset constraints corresponding to the initial layout. These preset constraints include minimum spacing constraints and prohibited spacing constraints. The prohibited spacing constraints allow adjacent macrocells to be placed close together when there are no pins on their adjacent edges, and to be placed close to the boundary when there are no pins on the edges of a macrocell near the boundary. Based on the preset constraints, the system determines whether there are violations between adjacent macrocells and between a macrocell and the boundary. The types of violations include exclusion violations and attraction violations. Based on the initial layout, a free layout space distribution for the macro unit to move is generated. The free layout space of the macro unit in the moving direction is calculated. The free layout space distribution is obtained by subtracting the occupied area and prohibited area of ​​the macro unit from the placeable area of ​​the macro unit. Based on the free layout space, the violation, and the type of the violation, the displacement of the macro cell is calculated, and the initial layout is optimized. The calculation of the free layout space of the macro unit in the direction of movement includes the following steps: Obtain the distribution of the free layout space; Starting from the macrocell and scanning to the boundary, the projected line segment of the occupied area of ​​the macrocell in the moving direction is obtained, and the moving direction includes four directions: up, down, left, and right. When the free layout space distribution fully accommodates the scan length of the projected line segment, the free layout space of the macrocell in each direction is calculated.

2. The macrocell layout method as described in claim 1, characterized in that, The violation is defined as the overlapping region calculated between adjacent macrocells and between the macrocell and the boundary, and the macrocell that generates the overlapping region is the violation object; Determining whether violations exist between adjacent macrocells and between a macrocell and the boundary based on the preset constraints includes the following steps: The preset constraints are obtained, wherein the minimum spacing constraint and the prohibited spacing constraint correspond to the repulsion violation and the attraction violation, respectively; Based on the preset constraints, calculate the distances between adjacent macrocells and between the macrocells and the boundary, and determine whether there is a rejection violation or an attraction violation.

3. The macrocell layout method as described in claim 2, characterized in that: The preset constraint condition is defined as a minimum spacing constraint. If the spacing between adjacent macrocells or between a macrocell and the boundary is less than the preset minimum spacing, then the exclusion violation exists. Alternatively, the preset constraint condition can be defined as a prohibited spacing constraint. If the spacing between adjacent macrocells, or between a macrocell and the boundary, is less than the preset prohibited spacing, and there are no pins on the corresponding adjacent side, then the attraction violation exists. Alternatively, the preset constraint conditions can be defined as minimum spacing constraint and prohibited spacing constraint, and the preset minimum spacing is greater than the preset prohibited spacing. If the spacing between adjacent macrocells or between a macrocell and the boundary is less than the preset prohibited spacing, then the attraction violation exists. If the spacing is greater than or equal to the preset prohibited spacing and less than the preset minimum spacing, then the repulsion violation exists.

4. The macrocell layout method as described in claim 2 or 3, characterized in that, Based on the free layout space, the violation, and the type of the violation, the displacement of the macrocell is calculated, and the initial layout is optimized, including the following steps: Based on the type of violation and the state of the violation object, calculate the contribution displacement of the violation to the violation object. The contribution displacement refers to the distance that each of the two violation objects needs to move to eliminate the violation. The state of the violation object includes fixed and movable. Projected line segments are scanned in each of the movement directions of the macrocell to obtain the average free layout space of the macrocell; Based on the average free layout space and the placement area boundary of the macro unit, the anchor point is calculated, and all macro units are sorted from near to far according to the right angle distance between the macro unit and the anchor point. The displacement of the macrocell is calculated sequentially, and the macrocell is moved.

5. The macrocell layout method as described in claim 4, characterized in that, Based on the type of violation and the state of the violation object, the contribution displacement of the violation to the violation object is calculated, including the following steps: Calculate the total overlap o of the violations in the horizontal and vertical directions respectively, and distribute it evenly among the overlapping violation objects to generate contribution displacements in opposite directions. ,in, , Defined as the vector magnitude, it records the minimum contribution displacement combination and the second minimum contribution displacement combination; Adjust the minimum contribution displacement and the second minimum contribution displacement according to the state of the violation object; Adjust the minimum contribution displacement and the second minimum contribution displacement based on the free layout space of the violation object; Specifically, when recording the minimum contribution displacement combination and the second minimum contribution displacement combination, if the horizontal direction is the minimum contribution displacement combination, then the vertical direction is the second minimum contribution displacement combination; if the vertical direction is the minimum contribution displacement combination, then the horizontal direction is the second minimum contribution displacement combination.

6. The macrocell layout method as described in claim 5, characterized in that, The displacement of the macrocell is calculated sequentially, and the macrocell is moved, including the following steps: Determine whether the directions of the contribution displacements of the two violations to the same macrocell are in the same horizontal and vertical directions. If they are in the same direction, the two violations are located on one side of the macrocell; if they are in opposite directions, they are located on both sides of the macrocell. When the violation is located on one side of the macrocell, the displacement with the largest contribution is taken as the displacement of the macrocell; When the violation is located on both sides of the macrocell, the maximum contribution displacement of the side with more violations is taken as the displacement of the macrocell. Calculate the displacement of the macrocell Then, iterate through all violations and recalculate the contribution displacement of each violation to another macrocell that caused the violation. ,satisfy .

7. A computer device, characterized in that, It includes a storage device, a processor, and a computer program stored on the storage device, the processor executing the computer program to implement the steps of the macrocell layout method according to any one of claims 1-6.

8. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the steps of the macrocell layout method according to any one of claims 1-6.

9. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by a processor, it implements the steps of the macrocell layout method according to any one of claims 1-6.

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