Manufacturing method of through hole

By using a patterned photoresist layer as a mask to perform two etchings in the copper process, the problem of metal precipitation caused by high-temperature photoresist removal is solved, the process steps and costs are reduced, and the production efficiency and device performance are improved.

CN120767249APending Publication Date: 2025-10-10HANGZHOU FULLSEMI SEMICON CO LTD
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Patent Information

Application Number
CN202510640620.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-05-16
Publication Date
2025-10-10

AI Technical Summary

Technical Problem

In existing copper processes, high-temperature debonding causes metal material precipitation, increasing process steps and costs. In addition, using titanium nitride as a mask layer requires additional equipment and process difficulty.

Method used

Using a patterned photoresist layer as a mask, the dielectric layer and the barrier layer are etched twice. The first etching is performed to the remaining thickness of the barrier layer. After removing the photoresist layer, the second etching is performed using the etched dielectric layer as a mask to form a through hole, thereby preventing oxidation of the metal layer and reducing the etching and grinding steps of the titanium nitride layer.

Benefits of technology

It improves device performance, reduces process difficulty and cost, improves production efficiency, and avoids metal material precipitation and the increase of machines.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention provides a manufacturing method of a through hole, and the method comprises the steps: providing a substrate, forming a metal layer in the substrate, and sequentially forming a barrier layer and a dielectric layer on the substrate; forming a patterned photoresist layer on the dielectric layer; etching the dielectric layer and the barrier layer for the first time by taking the patterned photoresist layer as a mask until the barrier layer with partial thickness is left; the patterned photoresist layer is removed; and etching the residual barrier layer for the second time by taking the etched dielectric layer as a mask until a through hole for exposing the metal layer is formed. According to the invention, when the patterned photoresist layer is removed, the metal layer is not exposed, and the metal layer is not oxidized, so that the condition that a metal material is separated out subsequently is avoided, the performance of the device is improved, the process difficulty is reduced, the process steps are saved, machines of different types do not need to be added, the cost is reduced, and the production efficiency is improved. And the production efficiency is improved.
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Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor integrated circuits, and in particular to a method for manufacturing a through hole. Background Art

[0002] The copper process has the advantages of low resistance and good conductivity, which can increase chip speed, reduce RC delay, and make internal connection wires smaller and denser while having the same or even stronger current carrying capacity. The copper process uses embedded patterned wires, and the upper and lower copper wires are connected by through holes. The usual production method is to flatten and clean the copper metal, then deposit a layer of nitrogen-doped silicon carbide (NDC) layer, and then deposit a layer of silicon oxide as the interlayer dielectric layer between the upper and lower copper wires. The interlayer dielectric layer is then etched to form through holes that expose the copper wires.

[0003] When etching the interlayer dielectric layer, a patterned photoresist layer is formed on the interlayer dielectric layer. The patterned photoresist layer is used as a mask to etch the interlayer dielectric layer until the copper metal is exposed, and then the patterned photoresist layer is removed. However, during high-temperature photoresist removal, copper is oxidized to cupric oxide or cuprous oxide. After subsequent wet etching, the acid solution will reduce the cupric oxide or cuprous oxide to copper, causing copper precipitation, which affects device performance and the final WAT (Wafer Acceptance Test).

[0004] The existing solution is to use titanium nitride as a mask layer instead of a photoresist layer to eliminate the high-temperature resist stripping step. However, using titanium nitride as a mask layer adds titanium nitride etching and titanium nitride polishing steps to the overall process, making the process more difficult. Furthermore, the titanium nitride deposition, etching, and polishing steps require three additional machine types, increasing costs. Summary of the Invention

[0005] The object of the present invention is to provide a method for making a through hole, which solves the problem of metal material precipitation caused by high-temperature debonding, avoids adding process steps and machines, reduces costs and improves production efficiency.

[0006] To solve the above technical problems, the present invention provides a method for manufacturing a through hole, comprising the following steps:

[0007] Providing a substrate, forming a metal layer in the substrate, and sequentially forming a barrier layer and a dielectric layer on the substrate;

[0008] forming a patterned photoresist layer on the dielectric layer, wherein the dielectric layer exposed by the patterned photoresist layer is located above the metal layer;

[0009] Using the patterned photoresist layer as a mask, the dielectric layer and the barrier layer are first etched to a thickness of the remaining portion of the barrier layer;

[0010] removing the patterned photoresist layer; and

[0011] The remaining barrier layer is etched a second time using the etched dielectric layer as a mask to form a through hole exposing the metal layer.

[0012] Optionally, the etching selectivity ratio of the barrier layer to the dielectric layer in the second etching is greater than the etching selectivity ratio of the barrier layer to the dielectric layer in the first etching.

[0013] Optionally, in the second etching, an etching selectivity ratio of the barrier layer to the dielectric layer is greater than or equal to 3:1.

[0014] Optionally, in the first etching, the etching gas includes CF4 and N2.

[0015] Optionally, in the second etching, the etching gas includes CH2F2 and O2.

[0016] Optionally, the patterned photoresist layer is removed within the cavity.

[0017] Optionally, CO2 is used to remove the patterned photoresist layer.

[0018] Optionally, the material of the barrier layer includes nitrogen-doped silicon carbide, the material of the dielectric layer includes silicon oxide, and the material of the metal layer includes copper.

[0019] Optionally, the thickness of the dielectric layer is greater than half of the thickness of the barrier layer.

[0020] Optionally, the thickness of the barrier layer is The thickness of the dielectric layer is greater than or equal to

[0021]

[0022] In the method for fabricating a through-hole provided by the present invention, a dielectric layer and a barrier layer are first etched using a patterned photoresist layer as a mask, leaving only a portion of the barrier layer thickness remaining. The patterned photoresist layer is then removed. When the patterned photoresist layer is removed, the metal layer is not exposed, and the metal layer is not oxidized. Consequently, subsequent metal material precipitation does not occur, thereby improving device performance. Furthermore, in the present invention, a portion of the barrier layer thickness is retained during the first etching, and during the second etching, the remaining barrier layer is etched using the etched dielectric layer as a mask layer, eliminating the need for re-forming a mask layer. Compared to methods using titanium nitride as a mask layer, the etching and grinding steps of the titanium nitride layer are reduced, thereby reducing process difficulty and process steps. Furthermore, the addition of different machine types is not required, significantly reducing costs and improving production efficiency.

[0023] Furthermore, the present invention uses a patterned photoresist layer as a mask to perform a first etching of the dielectric layer and the barrier layer, and uses the etched dielectric layer as a mask to perform a second etching of the remaining barrier layer. During the second etching, the etching gas is changed to increase the barrier layer's etching selectivity to the dielectric layer, thereby preventing the cross-sectional dimensions of the through-holes in the dielectric layer from increasing due to a low barrier layer's etching selectivity to the dielectric layer. Simultaneously, compared to the prior art, the thickness of the dielectric layer is appropriately increased to avoid a situation where the dielectric layer is too thin to protect the remaining barrier layer when etching the remaining barrier layer using the etched dielectric layer as a mask. In the present invention, by increasing the thickness of the dielectric layer and changing the etching gas used in the second etching, the cross-sectional dimensions and morphology of the ultimately formed through-holes are guaranteed.

[0024] In addition, removing the patterned photoresist layer in the cavity and using CO2 and lower energy and temperature to remove the patterned photoresist layer can effectively reduce the consumption of the top of the dielectric layer during the de-bonding process, ensuring that the top size of the through hole formed by the first etching will not be expanded and thus affect the size of the final through hole. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 4 is a flow chart of a method for manufacturing a through hole provided in one embodiment of the present invention.

[0026] Figures 2 to 6 It is a schematic structural diagram of each step of a method for manufacturing a through hole provided by an embodiment of the present invention.

[0027] Description of reference numerals:

[0028] 10 - substrate; 11 - metal layer; 12 - barrier layer; 13 - dielectric layer; 14 - patterned photoresist layer; 15 - through hole. DETAILED DESCRIPTION

[0029] After etching the interlayer dielectric layer to form a through hole exposing the metal layer, the patterned photoresist layer needs to be removed at high temperature. High-temperature photoresist removal will oxidize the exposed metal layer to form metal oxide. For example, when the metal layer is copper, the copper will be oxidized to form copper oxide or cuprous oxide. In subsequent processes, the metal oxide will be reduced to metal, thereby causing metal material precipitation. For example, copper oxide or cuprous oxide will be reduced to copper, causing copper precipitation.

[0030] In order to solve the problem of metal material precipitation, a titanium nitride layer is generally used instead of a photoresist as a mask layer, thereby saving the high-temperature degumming step. However, using a titanium nitride layer as a mask layer requires performing the titanium nitride layer deposition step, grinding step, and etching step. In the etching step, a photoresist layer needs to be formed on the titanium nitride layer, and the photoresist layer is exposed and developed to form a patterned photoresist layer. Then, the patterned photoresist layer is used as a mask to etch the titanium nitride layer to form a patterned titanium nitride layer as a mask layer. Using a photoresist layer as a mask layer only requires performing the photoresist layer deposition step and the photoresist layer exposure and development step. Using a titanium nitride layer instead of a photoresist as a mask layer increases the grinding step and etching step of the titanium nitride layer. Moreover, the deposition steps of the titanium nitride layer and the photoresist layer are different, and additional deposition, grinding, and etching machines are required, which increases the cost accordingly.

[0031] To address the above issues, the present invention etches the dielectric layer and barrier layer twice. The first etching involves etching the dielectric layer and a portion of the barrier layer, without exposing the metal layer. The patterned photoresist layer, which serves as a mask layer, is then removed. Because the metal layer is not exposed, the photoresist removal process does not oxidize the metal layer, preventing metal material precipitation. The second etching step uses the etched dielectric layer as a mask to etch the remaining barrier layer, forming contact holes that expose the copper metal layer. Compared to methods using titanium nitride as a mask layer, this method reduces the etching and grinding steps of the titanium nitride layer, thereby reducing process complexity and eliminating the need for additional machine tools, thereby lowering costs.

[0032] Specifically, the present invention provides a method for manufacturing a through hole, comprising the following steps: providing a substrate, forming a metal layer in the substrate, and sequentially forming a barrier layer and a dielectric layer on the substrate; forming a patterned photoresist layer on the dielectric layer, wherein the dielectric layer exposed by the patterned photoresist layer is located above the metal layer; using the patterned photoresist layer as a mask, performing a first etching on the dielectric layer and the barrier layer until the thickness of the barrier layer remains; removing the patterned photoresist layer; and performing a second etching on the remaining barrier layer using the etched dielectric layer as a mask to form a through hole exposing the metal layer.

[0033] In the method for fabricating a through-hole provided by the present invention, a dielectric layer and a barrier layer are first etched using a patterned photoresist layer as a mask, leaving only a portion of the barrier layer thickness remaining. The patterned photoresist layer is then removed. When the patterned photoresist layer is removed, the copper layer is not exposed, and the metal layer is not oxidized. Consequently, subsequent metal material precipitation does not occur, thereby improving device performance. Furthermore, in the present invention, a portion of the barrier layer thickness is retained during the first etching, and during the second etching, the remaining barrier layer is etched using the etched dielectric layer as a mask layer, eliminating the need for re-forming a mask layer. Compared to methods using titanium nitride as a mask layer, this method reduces the etching and grinding steps of the titanium nitride layer, thereby reducing process difficulty and process steps. It also eliminates the need for adding different machine types, significantly reducing costs and improving production efficiency.

[0034] To make the objects, advantages, and features of the present invention more clearly apparent, the present invention is further described below in conjunction with the accompanying drawings and specific embodiments. It should be noted that the drawings are all in a very simplified form and are not drawn to scale. They are only used to conveniently and clearly assist in illustrating the purposes of the embodiments of the present invention. In addition, the structures shown in the drawings are often part of the actual structure. In particular, different drawings may need to illustrate different focuses and sometimes use different scales.

[0035] As used in the present invention, the singular forms "a", "an" and "the" include plural objects, unless the content clearly indicates otherwise. As used in the present invention, the term "or" is generally used in a sense including "and / or", unless the content clearly indicates otherwise. As used in the present invention, the term "several" is generally used in a sense including "at least one", unless the content clearly indicates otherwise. As used in the present invention, the term "at least two" is generally used in a sense including "two or more", unless the content clearly indicates otherwise. In addition, the terms "first", "second" and "third" are used for descriptive purposes only and are not to be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first", "second" and "third" may explicitly or implicitly include one or at least two of the features, unless the content clearly indicates otherwise.

[0036] Figure 1 This is a flow chart of a method for making a through hole provided in one embodiment of the present invention. Figure 1 As shown, the method for manufacturing a through hole provided by an embodiment of the present invention includes the following steps:

[0037] S1: providing a substrate, forming a metal layer in the substrate, and sequentially forming a barrier layer and a dielectric layer on the substrate;

[0038] S2: forming a patterned photoresist layer on the dielectric layer, wherein the dielectric layer exposed by the patterned photoresist layer is located above the metal layer;

[0039] S3: using the patterned photoresist layer as a mask, performing a first etching on the dielectric layer and the barrier layer until the barrier layer has a remaining thickness;

[0040] S4: removing the patterned photoresist layer; and

[0041] S5: etching the remaining barrier layer for a second time using the etched dielectric layer as a mask to form a through hole exposing the metal layer.

[0042] Figures 2 to 6 This is a schematic diagram of the various steps of the method for making a through hole provided by an embodiment of the present invention. Figure 1 、 Figures 2 to 6 The method for manufacturing the through hole provided by the embodiment of the present invention is described in detail.

[0043] In step S1, please refer to Figure 2 As shown, a substrate 10 is provided, a metal layer 11 is formed in the substrate 10 , and a barrier layer 12 and a dielectric layer 13 are sequentially formed on the substrate 10 .

[0044] In one embodiment, the substrate 10 may be made of silicon, germanium, silicon germanium, silicon carbide, gallium arsenide, or indium gallium, or may be silicon-on-insulator (SOI) or germanium-on-insulator (GOI). Alternatively, the substrate 10 may be made of other materials, such as III-V compounds such as gallium arsenide. In this embodiment, the substrate 10 is a silicon substrate.

[0045] In one embodiment, an epitaxial layer is formed on the substrate 10, and a device layer is formed on the epitaxial layer. Various devices, such as transistors, capacitors, resistors, and similar components, can be formed on the surface of the epitaxial layer using any suitable method. Of course, some devices can also be formed within the epitaxial layer. A metal interconnect layer is formed on the device layer, and the metal interconnect layer is used to connect various devices to form a functional circuit. The metal interconnect layer can be formed by alternating interlayer dielectric layers and metal layers, and can be formed by any suitable process (such as deposition, damascene, dual damascene, etc.). The metal layer 11 in this embodiment can be any metal layer in the metal interconnect layer.

[0046] In this embodiment, a metal layer 11 is first formed within the substrate 10 as a conductive layer, with the upper surface of the metal layer 11 being flush with the upper surface of the substrate 10. Exemplarily, the method for forming the metal layer 11 includes: forming a groove within the substrate 10, filling the groove with a metal material, the metal material completely filling the groove and covering a portion of the substrate 10, and then planarizing the metal material until the substrate 10 is exposed, thereby forming the metal layer 11 within the substrate 10. In another embodiment, the metal layer 11 is formed within an interlayer dielectric layer located on the substrate 10.

[0047] In one embodiment, the material of the metal layer 11 is copper, but it can also be other metals suitable for conductive layers such as aluminum.

[0048] Then, a barrier layer 12 and a dielectric layer 13 are sequentially formed on the substrate 10. The barrier layer 12 covers the substrate 10 and the metal layer 11, and the dielectric layer 13 covers the barrier layer 12. For example, the barrier layer 12 and the dielectric layer 13 can be formed by any suitable process known to those skilled in the art, such as atomic layer deposition (ALD), chemical vapor deposition (CVD), and physical vapor deposition (PVD). The material of the barrier layer 12 includes nitrogen-doped silicon carbide, and of course, it can also be any suitable material such as silicon nitride. The barrier layer 12 mainly serves as a barrier layer for the upward diffusion of the metal layer 11. The thickness of the barrier layer 12 is For example, the thickness of the barrier layer 12 is preferably

[0049] The material of the dielectric layer 13 includes silicon oxide, and of course it can also be a stacked structure of silicon oxide and silicon nitride, or any other suitable material known to those skilled in the art. The dielectric layer 13 mainly serves as an interlayer dielectric layer between the upper and lower metal wire layers. The thickness of the dielectric layer 13 needs to be greater than half the thickness of the barrier layer 12. For example, the thickness of the dielectric layer 13 is greater than or equal to

[0050] In the prior art, the thickness of the dielectric layer 13 is generally Compared to the prior art, the present invention increases the thickness of the dielectric layer 13. Subsequently, the dielectric layer 13 is used as a mask for a second etching. If the dielectric layer 13 is relatively thin, the remaining barrier layer 12 may not be sufficiently protected by the dielectric layer 13 when etching the remaining barrier layer 12 using the etched dielectric layer 13 as a mask. Therefore, the thickness of the dielectric layer 13 is appropriately increased in this embodiment. Of course, the thicknesses of the barrier layer 12 and the dielectric layer 13 can be adjusted according to actual needs and process conditions.

[0051] In step S2, please refer to Figure 3 As shown, a patterned photoresist layer 14 is formed on the dielectric layer 13 , and the dielectric layer 13 exposed by the patterned photoresist layer 14 is located above the metal layer 11 .

[0052] Exemplarily, a photoresist layer is formed on the dielectric layer 13 , and the photoresist layer is exposed and developed to form a patterned photoresist layer 14 . The patterned photoresist layer 14 exposes an area on the dielectric layer 13 where a through hole is to be formed, and the area is located above the metal layer 11 .

[0053] In step S3, please refer to Figure 3 As shown, the dielectric layer 13 and the barrier layer 12 are etched for the first time using the patterned photoresist layer 14 as a mask, until the barrier layer 12 has a remaining thickness.

[0054] Using the patterned photoresist layer 14 as a mask, the dielectric layer 13 is etched until the barrier layer 12 is exposed. The barrier layer 12 is further etched until a portion of the barrier layer 12 remains, forming a through hole in the dielectric layer 13 and a portion of the barrier layer 12. A portion of the barrier layer 12 remains at the bottom of the through hole. The remaining barrier layer 12 should not be too thick to prevent the barrier layer 12 from being too thick when the etched dielectric layer 13 is used as a mask for a second etching of the remaining barrier layer 12. This will cause the etching time to be too long, and the dielectric layer 13, which serves as a mask layer, to be etched as well, resulting in changes in the size of the through hole in the dielectric layer 13 and the size of the ultimately formed through hole. The thickness of the remaining barrier layer 12 cannot be too thin. If it is too thin, when the patterned photoresist layer 14 is removed in the next step, the remaining barrier layer 12 is insufficient to protect the metal layer 11 underneath, which may affect the metal layer 11. Therefore, the thickness of the remaining barrier layer 12 needs to be selected according to actual conditions.

[0055] In the first etching, the etching gases used include but are not limited to CF4 and N2, the flow rate of CF4 is 40 sccm to 500 sccm, and the flow rate of N2 is 16 sccm to 500 sccm.

[0056] In one embodiment, the gas pressure in the etching reaction chamber is 50mT to 400mT, the low-frequency power of the upper electrode is 200W to 2000W, the low-frequency power of the lower electrode is 100W to 2500W, and the temperature of the variable ESC (Electrostatic Chuck, an electrostatic chuck used to adsorb the substrate) is 30° to 50°, but of course it is not limited to this.

[0057] In step S4, please refer to Figure 4 and Figure 5 As shown, the patterned photoresist layer 14 is removed.

[0058] In one embodiment, the patterned photoresist layer 14 is removed within the cavity using CO2 at relatively low energy and temperature. This effectively reduces the consumption of the top portion of the dielectric layer 13 during the removal process, ensuring that the top size of the through-hole formed by the first etching is not enlarged, thereby affecting the final size of the through-hole. Exemplarily, the temperature employed for removing the patterned photoresist layer 14 is 55° to 66°, preferably 60°, but this is not intended to be limiting.

[0059] In this embodiment, the metal layer 11 is not exposed when the patterned photoresist layer 14 is removed, and the metal layer 11 will not be oxidized. Therefore, no metal material precipitation will occur subsequently, thereby improving the performance of the device.

[0060] In step S5, please refer to Figure 6 As shown, the remaining barrier layer 12 is etched a second time using the etched dielectric layer 13 as a mask, until a through hole 15 exposing the metal layer 11 is formed.

[0061] During the first etching, a through hole is formed in the dielectric layer 13, which is equivalent to the dielectric layer 13 being etched to form a patterned dielectric layer. In this etching, the barrier layer 12 is etched using the patterned dielectric layer as a mask until the remaining barrier layer 12 above the metal layer 11 is completely removed.

[0062] In this embodiment, the remaining barrier layer 12 is etched using the dielectric layer 13 after etching as a mask. If the etching selectivity of the barrier layer 12 to the dielectric layer 13 is relatively low, when the barrier layer 12 is etched, the dielectric layer 13 will also be etched to a relatively large extent, thereby causing the cross-sectional size of the through hole in the dielectric layer 13 to become larger, and thus causing the cross-sectional size of the finally formed through hole 15 to become larger.

[0063] In one embodiment, to ensure that the etching rate of the barrier layer 12 is greater than the etching rate of the dielectric layer 13, that is, to avoid the problem of increasing the cross-sectional size of the through-holes in the dielectric layer 13 due to a low etching selectivity of the barrier layer 12 to the dielectric layer 13, it is necessary to increase the etching selectivity of the barrier layer 12 to the dielectric layer 13 during the second etching. Specifically, the etching selectivity of the barrier layer 12 to the dielectric layer 13 during the second etching is greater than the etching selectivity of the barrier layer 12 to the dielectric layer 13 during the first etching. In this embodiment, the etching gas in the second etching is changed compared to the first etching to increase the etching selectivity of the barrier layer 12 to the dielectric layer 13. Of course, this is not limited to this. In other embodiments, other etching process conditions may also be changed to increase the etching selectivity of the barrier layer 12 to the dielectric layer 13. For example, during the second etching, the etching selectivity of the barrier layer 12 to the dielectric layer 13 is greater than or equal to 3:1, but this is not limited to this.

[0064] The present invention uses a patterned photoresist layer 14 as a mask to perform a first etching of the dielectric layer 13 and the barrier layer 12, and uses the etched dielectric layer 13 as a mask to perform a second etching of the remaining barrier layer 12. During the second etching, the etching gas is changed to increase the etching selectivity of the barrier layer 12 to the dielectric layer 13, thereby preventing the cross-sectional size of the through hole in the dielectric layer 13 from increasing due to too low an etching selectivity of the barrier layer 12 to the dielectric layer 13. At the same time, compared with the prior art, the thickness of the dielectric layer 13 is appropriately increased to avoid the situation where the thickness of the dielectric layer 13 is too thin to protect the barrier layer 12 when etching the remaining barrier layer 12 using the etched dielectric layer 13 as a mask. In the present invention, by increasing the thickness of the dielectric layer 13 and changing the etching gas for the second etching, the cross-sectional size and morphology of the finally formed through hole 15 are guaranteed.

[0065] In this embodiment, the etching gas in the second etching includes but is not limited to CH2F2 and O2, the flow rate of CH2F2 is 40 sccm to 500 sccm, and the flow rate of O2 is 16 sccm to 500 sccm.

[0066] In one embodiment, the gas pressure in the etching reaction chamber is 50mT to 400mT, the low-frequency power of the upper electrode is 200W to 2000W, the low-frequency power of the lower electrode is 100W to 2500W, and the temperature of the variable ESC (Electrostatic Chuck, an electrostatic chuck used to adsorb the substrate) is 30° to 50°, but of course it is not limited to this.

[0067] In this embodiment, a portion of the barrier layer 12 is retained during the first etching, and the remaining barrier layer 12 is etched using the etched dielectric layer 13 as a mask layer during the second etching, without the need to re-form the mask layer. Compared with the method of using titanium nitride as the mask layer, the etching and grinding steps of the titanium nitride layer are reduced, thereby reducing the process difficulty, saving process steps, and eliminating the need to add different types of machines, thereby greatly reducing costs and improving production efficiency.

[0068] In summary, in the method for fabricating a through-hole provided by the present invention, a patterned photoresist layer is used as a mask to perform a first etching of the dielectric layer and the barrier layer until the remaining thickness of the barrier layer is left. The patterned photoresist layer is then removed. When the patterned photoresist layer is removed, the metal layer is not exposed and is not oxidized. Therefore, subsequent metal material precipitation does not occur, thereby improving device performance. Furthermore, in the present invention, a portion of the barrier layer is retained during the first etching, and the remaining barrier layer is etched using the etched dielectric layer as a mask layer during the second etching, without the need for re-forming the mask layer. Compared to methods using titanium nitride as a mask layer, the etching and grinding steps of the titanium nitride layer are reduced, thereby reducing process difficulty, saving process steps, and eliminating the need to add different machine models, significantly reducing costs and improving production efficiency.

[0069] Furthermore, the present invention uses a patterned photoresist layer as a mask to perform a first etching of the dielectric layer and the barrier layer, and uses the etched dielectric layer as a mask to perform a second etching of the remaining barrier layer. During the second etching, the etching gas is changed to increase the barrier layer's etching selectivity to the dielectric layer, thereby preventing the cross-sectional dimensions of the through-holes in the dielectric layer from increasing due to a low barrier layer's etching selectivity to the dielectric layer. Simultaneously, compared to the prior art, the thickness of the dielectric layer is appropriately increased to avoid a situation where the dielectric layer is too thin to protect the remaining barrier layer when etching the remaining barrier layer using the etched dielectric layer as a mask. In the present invention, by increasing the thickness of the dielectric layer and changing the etching gas used in the second etching, the cross-sectional dimensions and morphology of the ultimately formed through-holes are guaranteed.

[0070] In addition, removing the patterned photoresist layer in the cavity and using CO2 and lower energy and temperature to remove the patterned photoresist layer can effectively reduce the consumption of the top of the dielectric layer during the de-bonding process, ensuring that the top size of the through hole formed by the first etching will not be expanded and thus affect the size of the final through hole.

[0071] The above description is only a description of the preferred embodiments of the present invention and does not limit the scope of the present invention. Any changes and modifications made by ordinary technicians in the field of the present invention based on the above disclosure shall fall within the scope of protection of the claims.

Claims

1. A method for making a through hole, characterized in that: The following steps are involved: Providing a substrate, forming a metal layer in the substrate, and sequentially forming a barrier layer and a dielectric layer on the substrate; forming a patterned photoresist layer on the dielectric layer, wherein the dielectric layer exposed by the patterned photoresist layer is located above the metal layer; Using the patterned photoresist layer as a mask, the dielectric layer and the barrier layer are first etched to a thickness of the remaining portion of the barrier layer; removing the patterned photoresist layer; as well as The remaining barrier layer is etched a second time using the etched dielectric layer as a mask to form a through hole exposing the metal layer.

2. The method for making a through hole according to claim 1, wherein: The etching selectivity ratio of the barrier layer to the dielectric layer in the second etching is greater than the etching selectivity ratio of the barrier layer to the dielectric layer in the first etching.

3. The method for making a through hole according to claim 2, wherein: In the second etching, the etching selectivity ratio of the barrier layer to the dielectric layer is greater than or equal to 3:

1.

4. The method for manufacturing a through hole according to claim 1, wherein: During the first etching, the etching gas includes CF4 and N2.

5. The method for manufacturing a through hole according to claim 1, wherein: In the second etching, the etching gas includes CH2F2 and O2.

6. The method for manufacturing a through hole according to claim 1, wherein: The patterned photoresist layer is removed in the cavity.

7. The method for manufacturing a through hole according to claim 6, wherein: The patterned photoresist layer is removed using CO2.

8. The method for manufacturing a through hole according to claim 1, wherein: The material of the barrier layer includes nitrogen-doped silicon carbide, the material of the dielectric layer includes silicon oxide, and the material of the metal layer includes copper.

9. The method for manufacturing a through hole according to claim 1, wherein: The thickness of the dielectric layer is greater than half of the thickness of the barrier layer.

10. The method for manufacturing a through hole according to claim 9, wherein: The thickness of the barrier layer is The thickness of the dielectric layer is greater than or equal to