Alternating current arc detection method and related apparatus

Abstract

The application provides an alternating current arc detection method and related device. The method comprises the following steps: a controller of an arc detection system acquires an external instruction, determines a circuit simulation model based on the external instruction; acquires a first current signal from a signal detection circuit module in a detection period, and determines an arc feature vector based on the first current signal; determines an arc generation condition based on the arc time-frequency feature vector; generates an arc generation image based on the arc generation condition and the circuit simulation model; determines a multi-stage circuit regulation strategy based on the arc generation condition, and regulates a regulation circuit module based on the multi-stage circuit regulation strategy; acquires a second current signal; determines an arc suppression effect image based on the second current signal and the circuit simulation model; thus, the arc generation condition and the suppression effect can be visualized in real time, the arc suppression efficiency is improved, the arc analysis accuracy is improved, the arc extinguishing time is shortened, and the alternating current arc detection efficiency, detection precision and arc suppression speed are improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of arc detection, in particular to an alternating current arc detection method and related device. BACKGROUND

[0002] With the continuous growth of social power demand, electrical safety problems are increasingly prominent, especially in low-voltage distribution systems and smart home circuits. And alternating current arc fault is one of the main causes of electrical fires, which makes the detection and prevention of alternating current arc fault particularly important.

[0003] At present, the detection method of alternating current arc fault mainly relies on single parameters such as current mutation, temperature change or sound recognition. The harmonic characteristics of the current signal are not fully explored, resulting in insufficient detection sensitivity and reliability, which is difficult to meet the demand of power system for high-precision and real-time arc fault detection, and cannot quickly show and respond to fault conditions to achieve the effect of quickly suppressing arc. SUMMARY

[0004] The embodiments of the present application provide an alternating current arc detection method and related device, which can realize real-time visualization of arc generation and suppression effect, improve arc analysis accuracy, shorten arc extinction time, and further improve arc detection efficiency, detection accuracy and arc suppression speed.

[0005] In a first aspect, the embodiments of the present application provide an alternating current arc detection method applied to a controller of an arc detection system, the arc detection system further comprising a signal detection circuit module and a regulation circuit module, comprising:

[0006] Obtaining an external instruction, determining a circuit simulation model based on the external instruction, the external instruction comprising an operation instruction of a user;

[0007] Obtaining a first current signal from the signal detection circuit module in a detection period, and determining an arc feature vector based on the first current signal;

[0008] Determining an arc generation condition based on the arc time-frequency feature vector, the arc generation condition being used to represent whether an arc is generated and / or an arc generation position and / or a danger degree;

[0009] Generating an arc generation image based on the arc generation condition and the circuit simulation model;

[0010] Determining a multi-stage circuit regulation strategy based on the arc generation condition and regulating the regulation circuit module based on the multi-stage circuit regulation strategy, the multi-stage circuit regulation strategy being used to suppress arc generation and / or prevent arc spread;

[0011] obtaining a second current signal, the second current signal being a current signal generated after regulation based on the multi-stage circuit regulation strategy;

[0012] determining an arc suppression effect image based on the second current signal and the circuit simulation model.

[0013] In a possible embodiment, the first current signal from the signal detection circuit module is obtained, and an arc time-frequency feature vector is determined based on the first current signal, including:

[0014] receiving a plurality of first current signals in the detection period from the signal detection circuit module;

[0015] determining at least one of a plurality of harmonic components, a plurality of time domain feature parameters, and a plurality of frequency domain feature parameters based on the plurality of first current signals;

[0016] determining the arc time-frequency feature vector based on the plurality of harmonic components and / or the plurality of time domain feature parameters and / or the plurality of frequency domain feature parameters.

[0017] In a possible embodiment, the arc generation condition is determined based on the arc time-frequency feature vector, including:

[0018] determining a first arc judgment result based on the arc time-frequency feature vector and a preset threshold, the first arc judgment result including a first result and a second result, the first result being used to represent that the measured circuit has no arc generation, and the second result being used to represent that the measured circuit may generate an arc;

[0019] determining a second arc judgment result in the current detection period based on the first arc judgment result, the second arc judgment result including a third result and a fourth result, the third result being used to represent that the measured circuit generates an arc and indicating that the controller determines a protection strategy, and the fourth result representing that the measured circuit has no arc generation; the determination of the second arc judgment result based on the first arc judgment result includes:

[0020] if the first arc judgment result is the second result, constructing a model input feature vector based on the arc time-frequency feature vector;

[0021] determining an arc type based on the model input feature vector and a pre-trained intelligent analysis model, the arc type including at least one of a series arc type, a parallel arc type, and an interference signal type;

[0022] if the arc type is the series arc type or the parallel arc type, the second arc judgment result is the third result;

[0023] If the arc type is the interference signal type, the second arc judgment result is the fourth result.

[0024] In a possible embodiment, the arc detection system further comprises at least one terminal, the external instruction is acquired, the external instruction comprises an automatic generation instruction and / or an active layout instruction, a circuit simulation model is determined based on the external instruction, comprising:

[0025] If the external instruction is detected as the automatic generation instruction, a layout image from the terminal is acquired, the layout image comprises a layout image taken by the terminal; the circuit simulation model is automatically generated based on the automatic generation instruction and the layout image;

[0026] If the external instruction is detected as the active layout instruction, the circuit simulation model is generated based on the active layout instruction; or, a layout image from the terminal is acquired, the layout image comprises a layout image taken by the terminal; the circuit simulation model is automatically generated based on the active layout instruction and / or the layout image.

[0027] In a possible embodiment, the terminal comprises a first type of terminal, the first type of terminal is provided with a display screen, the display screen is used to display an operation interface, and the active layout instruction of the user is acquired, the active layout instruction comprises a touch instruction or a control instruction, the touch instruction comprises at least one of dragging and clicking; the operation interface comprises a plurality of callable electrical components; the active layout instruction comprises the touch instruction or the control instruction for the plurality of callable electrical components;

[0028] If the external instruction is detected as the active layout instruction, the circuit simulation model is generated based on the active layout instruction, comprising:

[0029] The touch instruction for the plurality of callable electrical components is acquired;

[0030] In response to the touch instruction, a complete circuit simulation model is generated in the display operation interface topology.

[0031] In a possible embodiment, the arc generation image is generated based on the arc generation condition and the circuit simulation model, comprising:

[0032] Based on the arc generation condition and the circuit simulation model, a simulated arc position and an arc intensity parameter are determined, the simulated arc position is an arc generation position in the circuit simulation model;

[0033] Based on the arc intensity parameter and a preset intensity threshold, an arc dynamic display feature is determined;

[0034] determine the arc generation image based on the arc dynamic display feature, the simulated arc position and the circuit simulation model.

[0035] In one possible embodiment, the regulation circuit module comprises a plurality of electronic switching devices, the plurality of electronic switching devices comprising a first type of electronic switching device and a second type of electronic switching device, the first type of electronic switching device being used to cut off the circuit, and the second type of electronic switching device being used to mitigate the arc impact; the determination of the multi-stage circuit regulation strategy based on the arc generation condition and the regulation of the regulation circuit module based on the multi-stage circuit regulation strategy comprises:

[0036] controlling the second type of electronic switching device to operate in the first time period;

[0037] controlling the first type of electronic switching device to operate in the first time period or the second time period, the second time period being a time period subsequent to the first time period.

[0038] In a second aspect, the embodiments of the present application provide an alternating current arc detection device, applied to a controller of an arc detection system, the arc detection system further comprising a signal detection circuit module and a regulation circuit module, and comprising:

[0039] an instruction acquisition module, configured to acquire an external instruction, and determine a circuit simulation model based on the external instruction, the external instruction comprising an operation instruction of a user;

[0040] a first signal acquisition module, configured to acquire a first current signal from the signal detection circuit module in a detection period, and determine an arc feature vector based on the first current signal;

[0041] an arc determination module, configured to determine an arc generation condition based on the arc time-frequency feature vector, the arc generation condition being used to represent whether an arc is generated and / or an arc generation position and / or a dangerous degree;

[0042] a first display module, configured to generate an arc generation image based on the arc generation condition and the circuit simulation model;

[0043] a strategy determination module, configured to determine a multi-stage circuit regulation strategy based on the arc generation condition, and regulate the regulation circuit module based on the multi-stage circuit regulation strategy, the multi-stage circuit regulation strategy being used to suppress arc generation and / or prevent arc diffusion;

[0044] a second signal acquisition module, configured to acquire a second current signal, the second current signal being a current signal generated after being regulated based on the multi-stage circuit regulation strategy;

[0045] a second display module, configured to determine an arc suppression effect image based on the second current signal and the circuit simulation model.

[0046] In a third aspect, an embodiment of the present application provides a computer readable storage medium having stored thereon a computer program comprising program instructions that, when executed by a processor, cause the processor to perform part or all of the steps in the first aspect.

[0047] In a fourth aspect, an embodiment of the present application provides an electronic device, comprising a processor, a memory, a communication interface, and one or more programs, wherein the one or more programs are stored in the memory and configured to be executed by the processor, and the programs comprise instructions for performing part or all of the steps in the first aspect of the embodiments of the present application.

[0048] In a fifth aspect, an embodiment of the present application provides a computer program product, wherein the computer program product includes a non-transitory computer readable storage medium storing a computer program operable to cause a computer to perform part or all of the steps in the first aspect of the embodiments of the present application. The computer program product can be a software installation package.

[0049] By implementing the embodiments of the present application, the method includes that the controller of the electric arc detection system acquires an external instruction, determines a circuit simulation model based on the external instruction, the external instruction includes an operation instruction of a user; acquires a first current signal from the signal detection circuit module in a detection period, and determines an electric arc feature vector based on the first current signal; determines an electric arc generation condition based on the electric arc time-frequency feature vector, the electric arc generation condition is used to represent whether an electric arc is generated and / or an electric arc generation position and / or a danger degree; generates an electric arc generation image based on the electric arc generation condition and the circuit simulation model; determines a multi-stage circuit regulation strategy based on the electric arc generation condition and regulates the regulation circuit module based on the multi-stage circuit regulation strategy, the multi-stage circuit regulation strategy is used to suppress electric arc generation and / or prevent electric arc diffusion; acquires a second current signal, the second current signal is a current signal generated after being regulated based on the multi-stage circuit regulation strategy; determines an electric arc suppression effect image based on the second current signal and the circuit simulation model; in this way, the real-time visualization of the electric arc generation condition and the suppression effect can be realized through the automatic or manual circuit simulation model and the actual circuit correlation construction, the efficiency of the electric arc suppression is improved, the electric arc feature vector is determined based on the time domain and frequency domain feature analysis to improve the accuracy of the electric arc analysis, and the multi-stage suppression strategy is immediately executed based on the electric arc generation condition, which can shorten the electric arc extinguishing time, and further improve the alternating current electric arc detection efficiency, detection accuracy, and electric arc suppression speed. BRIEF DESCRIPTION OF DRAWINGS

[0050] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the background, the drawings needed to be used in the embodiments of the present application or the background will be described below.

[0051] Figure 1a is a schematic diagram of an architecture of an arc detection system provided by an embodiment of the present application;

[0052] Figure 1b is a schematic diagram of an architecture of another arc detection system provided by an embodiment of the present application;

[0053] Figure 2 is a schematic diagram of a flow of an alternating current arc detection method provided by an embodiment of the present application;

[0054] Figure 3 is a schematic diagram of a flow of determining arc generation provided by an embodiment of the present application;

[0055] Figure 4 is a schematic diagram of a multi-stage circuit regulation strategy regulation flow of an alternating current arc detection method provided by an embodiment of the present application;

[0056] Figure 5 is a schematic diagram of a structure of an alternating current arc detection device provided by an embodiment of the present application;

[0057] Figure 6 is a schematic diagram of a structure of another alternating current arc detection device provided by an embodiment of the present application;

[0058] Figure 7 is a schematic diagram of a structure of an electronic device provided by an embodiment of the present application. DETAILED DESCRIPTION

[0059] In order to make the person skilled in the art better understand the present application, the technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, not all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by the person skilled in the art without creative labor are within the scope of protection of the present application.

[0060] The terms "first", "second", and the like in the description and in the claims of the present application and above-described drawings are used to distinguish different objects, and are not used to describe a particular order. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or electronic device including a series of steps or units is not limited to the listed steps or units, but in an alternative example, also includes steps or units not listed, or in an alternative example, also includes other steps or units inherent to the process, method, product, or electronic device.

[0061] Reference herein to "embodiments" means that a particular feature, structure, or characteristic described in connection with an embodiment can be included in at least one embodiment of the present application. The appearance of the phrase in various places in the specification does not necessarily all refer to the same embodiment, nor is it necessarily mutually exclusive of other embodiments. It is explicitly and implicitly understood by those skilled in the art that embodiments described herein can be combined with other embodiments.

[0062] With the increasing demand for social electricity, electrical safety problems are increasingly prominent, especially in low-voltage distribution systems and smart home circuits. And alternating current arc fault is one of the main causes of electrical fires, which makes the detection and prevention of alternating current arc fault particularly important.

[0063] Currently, the detection method of alternating current arc fault mainly relies on a single parameter such as current mutation, temperature change or sound recognition. The harmonic characteristics of the current signal are not fully explored, resulting in insufficient detection sensitivity and reliability, which is difficult to meet the demand of the power system for high-precision and real-time arc fault detection, and cannot quickly display and respond to fault conditions to achieve the effect of quickly suppressing the arc.

[0064] In view of the above problems, the embodiments of the present application provide an alternating current arc detection method and related device, which can realize real-time visualization of arc generation and suppression effect through automatic or manual circuit simulation model and actual circuit correlation construction, improve the efficiency of arc suppression, improve the accuracy of arc analysis based on time domain and frequency domain feature analysis to determine the arc feature vector, and shorten the arc extinguishing time through the multi-level suppression strategy executed immediately based on the arc generation condition, thereby improving the efficiency, accuracy and speed of suppressing the arc.

[0065] The alternating current arc detection method provided by the embodiments of the present application can be applied to the arc detection system as shown in Figure 1a or Figure 1b Please refer to Figure 1a , Figure 1ais a schematic diagram of an arc detection system provided by an embodiment of the present application. The arc detection system 100 comprises a controller 110, a signal detection circuit module 120, a regulation circuit module 130, and a circuit to be detected 140.

[0066] In the present solution, the controller 110 refers to a remote computer for processing a large number of computing tasks and storing data. The controller 110 can be a microcontroller unit (MCU), a programmable logic controller (PLC), a control chip, or other electronic devices that can realize complex logic control, data processing, and automatic regulation. The signal detection circuit module 120 is used to collect the current signal in the circuit to be detected 140. The signal detection circuit module 120 can include at least one of a Hall effect current transformer and an analog-to-digital converter (ADC). The number of bits of the ADC is preferably 16 bits, and the sampling frequency is preferably 10 kHz. The number of bits and the sampling frequency of the ADC are not limited herein. The regulation circuit module 130 includes at least one of a relay, a solid-state switch, a silicon controlled rectifier (SCR), or a pulse width modulation (PWM) controller. The relay or solid-state switch is used to change the impedance characteristics of the circuit to be detected 140. The dynamic damping technology can effectively suppress the sustained discharge phenomenon of the arc current. The SCR and PWM can filter the high-frequency harmonics generated in the circuit, thereby significantly reducing the probability of arc reignition and ensuring the safe and stable operation of the circuit.

[0067] The signal detection circuit module 120 and the regulation circuit module 130 are in communication connection with the controller 110. The controller 110 can receive signals from the signal detection circuit module 120 and the regulation circuit module 130. The controller 110 can also send control instructions to the signal detection circuit module 120 and the regulation circuit module 130.

[0068] In the present solution, the controller 110 is deployed with a circuit simulation model and a pre-trained intelligent analysis model for simulating the arc condition in the circuit and intelligently analyzing the arc generation condition. The controller 110 can also be used to collect data during the use of the model, facilitating the subsequent optimization of the model.

[0069] In one possible embodiment, please refer to Figure 1b , Figure 1bis another architecture schematic diagram of an arc detection system provided by an embodiment of the present application. The arc detection system 100 includes a controller 110, a signal detection circuit module 120, a regulation circuit module 130, a circuit to be detected 140, and a terminal 150.

[0070] The terminal 150 can communicate with the controller 110. The terminal 150 refers to a device used by a user, such as a smartphone, a computer, AR glasses, a tablet computer, and the like.

[0071] In this solution, the terminal 150 can be provided with a user interface, which is mainly responsible for interacting with the controller 110, so that the user can conveniently input external instructions and the like. The terminal 150 can send the instructions input by the user to the controller 110, and the controller 110 can send data to the terminal 150.

[0072] Based on this, the present application provides an alternating current arc detection method and related devices. The present application will be described in detail below with reference to the accompanying drawings.

[0073] Please refer to Figure 2 , Figure 2 is a flowchart of an alternating current arc detection method provided by an embodiment of the present application. The method is applied to a controller of an arc detection system. The arc detection system further includes a signal detection circuit module and a regulation circuit module, as shown in Figure 2 The method includes the following steps:

[0074] S210, an external instruction is acquired, and a circuit simulation model is determined based on the external instruction. The external instruction includes an operation instruction of a user.

[0075] The external instruction is an operation instruction input by the user, which is used to indicate the electrical components and the connection relationship thereof included in the circuit simulation model. The circuit simulation model is an electrical principle simulation model including multiple electrical components, which can simulate the running state of an actual circuit and dynamically display the flow of current between different elements. After the user inputs the operation instruction, the controller acquires the operation instruction, and determines the circuit simulation model based on the multiple electrical components and the corresponding connection relationship indicated in the operation instruction. In this way, the user can intuitively understand the working principle of the circuit, and the electrical principle model provides important basic data for subsequent arc fault detection, so that the fault detection process is more efficient and accurate.

[0076] The input mode of the external instruction from the user side can be input through a terminal, and the type of the terminal can be diverse. For example, the terminal can be an electronic device including a camera device, such as a tablet computer, a camera, a mobile phone, a computer, a smart watch, AR glasses, and the like. The layout image of the circuit under test can be obtained by capturing the circuit under test through the camera or by scanning the circuit under test through the AR glasses, and then the model building is automatically performed based on the layout image of the circuit under test. The terminal can also be an electronic device including a display screen, such as a tablet computer, a camera, a mobile phone, a computer, a smart watch, and the like. The display screen displays a user operable interface or a remote monitoring interface, such as a touch screen, a TFF screen, or an LCD screen or an LED screen, for the user to perform simple gesture operations (such as dragging, clicking, sliding, and the like) to place the electrical component to a specified area for arrangement, or to display the current waveform, the harmonic spectrum diagram, and the arc energy change curve in real time to realize real-time data visualization, and to generate the circuit simulation model based on the arranged electrical component information given by the user.

[0077] In a possible embodiment, the arc detection system further includes at least one terminal, the external instruction is obtained, the external instruction includes an automatic generation instruction and / or an active layout instruction, and the circuit simulation model is determined based on the external instruction. If it is detected that the external instruction is the automatic generation instruction, a layout image from the terminal is obtained, the layout image includes a layout image captured by the terminal, the circuit simulation model is automatically generated based on the automatic generation instruction and the layout image, if it is detected that the external instruction is the active layout instruction, the circuit simulation model is generated based on the active layout instruction, or a layout image from the terminal is obtained, the layout image includes a layout image captured by the terminal, and the circuit simulation model is automatically generated based on the active layout instruction and / or the layout image.

[0078] The automatic generation instruction is an external instruction for generating the circuit simulation model based on the image information captured by the terminal, and the active layout instruction is an external instruction for generating the circuit simulation model based on the arranged electrical component information given by the user on the display screen. The above instructions can exist alone or together, and the circuit simulation model can be generated based on the automatic generation instruction or the active layout instruction alone, or the circuit simulation model can be generated based on the coupling of the automatic generation instruction and the active layout instruction.

[0079] If the external instruction is detected as the automatic generation instruction, further image processing and recognition are performed based on the obtained layout image. First, image preprocessing is performed, including at least one of denoising, image enhancement, distortion correction, and perspective transformation. Then, the preprocessed image is subjected to element detection and recognition based on computer vision technology. Specifically, technologies such as OpenCV contour detection and feature matching or deep learning model are used to recognize and classify electrical elements in the image, and the connection relationship between each element is identified, which can be the cable routing, terminal connection, etc. to determine the electrical connection topology. Based on the results of the above image processing and recognition, a model is generated, the type, position, and connection relationship of the recognized elements are converted into a circuit network topology, and default parameters or parameters matched from a component library are applied to generate a standard circuit simulation model file, such as a SPICE netlist, a Modelica model, or a custom format, to obtain a circuit simulation model.

[0080] If the external instruction is detected as the active layout instruction, a circuit simulation model is directly constructed based on the user-selected electrical components and connection rules in the active layout instruction. In some possible cases, at least one of error correction prompts or automatic error correction can be added during the construction based on the active layout instruction.

[0081] If the external instruction is detected as the active layout instruction and the automatic generation instruction, the circuit simulation model constructed based on the circuit network topology generated by the automatic generation instruction is matched and coupled with the circuit simulation model constructed based on the active layout instruction, and the differences between the two schemes are pointed out for user decision-making. In some possible cases, a weight-based integration method can also be adopted.

[0082] As can be seen, in the embodiment, the automatic generation relying on images and the active layout relying on user input are used to adapt to different user needs and application scenarios, improve the accuracy of the circuit simulation model, and improve the efficiency and accuracy of the user in constructing the circuit simulation model.

[0083] In a possible embodiment, the terminal includes a first type of terminal, the first type of terminal is provided with a display screen, the display screen is used to display an operation interface, and the active layout instruction of the user is obtained, the active layout instruction includes a touch instruction or a control instruction, the touch instruction includes at least one of dragging and clicking, the operation interface includes a plurality of callable electrical components, the active layout instruction includes the touch instruction or the control instruction for the plurality of callable electrical components, and if the external instruction is detected as the active layout instruction, the circuit simulation model is generated based on the active layout instruction, including: obtaining the touch instruction for the plurality of callable electrical components; and in response to the touch instruction, generating the complete circuit simulation model in the display operation interface topology.

[0084] The first type of terminal is provided with a display screen, which corresponds to the electronic device provided with the display screen described above. The display screen is used to display a visual operation interface, and user instructions can be received through touch or external devices (such as a mouse or a keyboard).

[0085] The touch instruction is a direct operation of the user on the screen, such as dragging or clicking a preset electrical component. The terminal can call a preset electrical component library, which can store various electrical elements, including but not limited to various electrical devices, electronic elements, connection rules, electrical parameters, and the like. When the user combines electrical components and constructs a topology structure through interface operation (dragging / clicking), the system generates a corresponding circuit simulation model in real time.

[0086] As can be seen, in this embodiment, the intuitive graphical operation of the user is converted into a high-fidelity circuit model, which provides accurate input for subsequent simulation, can improve the accuracy of the circuit simulation model, and improves the efficiency and accuracy of the user in constructing the circuit simulation model.

[0087] S220, obtaining a first current signal from the signal detection circuit module in a detection period, and determining an arc feature vector based on the first current signal.

[0088] The detection period can be a millisecond-level time period, for example, 1 ms, 2 ms for one period, and the like. Sampling is performed at a preset sampling frequency in each detection period. The preferred preset sampling frequency is preferably 10 kHz. The specific sampling frequency can be selected according to actual conditions, which is not limited herein. The signal detection circuit module is used to obtain a current signal in a to-be-tested circuit.

[0089] The signal detection circuit module is electrically connected with the to-be-tested circuit. The signal detection circuit module can include at least one of an analog-to-digital converter, a Hall effect current transformer, and a current sensor, without limitation. The first current signal is an original signal collected, which can contain noise and interference, and the arc feature vector is determined based on further processing of the first current signal.

[0090] The process of determining the arc feature vector based on the first current signal can include time domain analysis, frequency domain analysis, and feature extraction.

[0091] In a possible embodiment, the first current signal from the signal detection circuit module is acquired, and an arc time-frequency feature vector is determined based on the first current signal, including: receiving a plurality of first current signals in the detection period from the signal detection circuit module; determining at least one of a plurality of harmonic components, a plurality of time domain feature parameters, and a plurality of frequency domain feature parameters based on the plurality of first current signals; and determining the arc time-frequency feature vector based on the plurality of harmonic components and / or the plurality of time domain feature parameters and / or the plurality of frequency domain feature parameters.

[0092] The plurality of time domain feature parameters can include a current root mean square value, a peak factor, etc., the plurality of frequency domain feature parameters can include at least an FFT harmonic component, and the plurality of harmonic components can include at least one of a harmonic amplitude mutation rate, a harmonic energy ratio, and a harmonic phase shift. The arc video feature vector can be determined based on at least one of the plurality of time domain feature parameters, the plurality of frequency domain feature parameters, and the plurality of harmonic components, for analysis of an arc in the to-be-tested circuit.

[0093] Optionally, the calculation process of the current root mean square value can be: calculating a square mean value based on N current signals included in the first current signal, and then taking a square root of the square mean value to obtain the current root mean square value I RMS .

[0094] Optionally, the calculation process of the peak factor can be: finding an absolute maximum value based on N current signals included in the first current signal, and performing division calculation based on the absolute maximum value and the current root mean square value to obtain the peak factor.

[0095] Optionally, the calculation process of the FFT harmonic component extraction can be: windowing and performing M-point FFT on N current signals included in the first current signal, and then calculating a harmonic amplitude based on the M-point FFT to obtain the FFT harmonic component.

[0096] Optionally, the calculation process of the harmonic amplitude mutation rate can be: comparing harmonic amplitudes of adjacent time windows based on the harmonic amplitudes and the time windows to obtain a harmonic amplitude mutation rate of the same harmonic.

[0097] Optionally, the calculation process of the harmonic energy ratio can be: calculating the fundamental wave energy and the total high-frequency harmonic energy based on the multiple harmonic assignments, and obtaining the harmonic energy ratio based on the ratio of the fundamental wave energy and the total high-frequency harmonic energy.

[0098] Optionally, the calculation process of the harmonic phase shift can be: extracting multiple phase angles based on M-point FFT, and determining the harmonic phase shift based on the phase angles.

[0099] Optionally, the determination of the at least one of the multiple harmonic components, the multiple time-domain characteristic parameters, and the multiple frequency-domain characteristic parameters based on the multiple first current signals comprises: determining the multiple harmonic components based on at least one of Fourier transformation and / or short-time Fourier decomposition of the multiple first current signals; and determining the multiple time-domain characteristic parameters based on at least one of RMS calculation, peak value detection, and derivation calculation of the multiple first current signals.

[0100] It can be seen that, in the embodiment, the arc recognition accuracy is improved by joint multi-parameter cross-validation, and the process analysis speed is relatively fast, so that the efficiency of arc recognition is improved.

[0101] In S230, an arc generation condition is determined based on the arc time-frequency feature vector, and the arc generation condition is used to represent whether the arc is generated and / or the arc generation position and / or the danger degree.

[0102] In the embodiment, the arc time-frequency feature vector can be subjected to multi-feature cross-fusion for comprehensive determination, or subjected to time-domain and frequency-domain classification for separate determination.

[0103] For example, if the multi-feature cross-fusion is selected for comprehensive determination, the time-domain features, the frequency-domain features, and the harmonic features contained in the multiple arc feature vectors determined above are subjected to multi-coefficient fusion to obtain fusion features, and the coefficients used for fusion can be obtained through machine learning training. Then, the fusion features are subjected to determination based on cross-comprehensive weights.

[0104] In a possible embodiment, please refer to Figure 3 , Figure 3 is a flowchart of a process for determining an arc generation condition provided by the embodiment of the present application, and the determination of the arc generation condition based on the arc time-frequency feature vector comprises:

[0105] determining a first arc judgment result based on the arc time-frequency feature vector and a preset threshold, the first arc judgment result including a first result and a second result, the first result being used to represent that the measured circuit does not produce an arc, and the second result being used to represent that the measured circuit can produce an arc; determining a second arc judgment result in the current detection period based on the first arc judgment result, the second arc judgment result including a third result and a fourth result, the third result being used to represent that the measured circuit produces an arc and indicating that the controller determines a protection strategy, and the fourth result representing that the measured circuit does not produce an arc.

[0106] Specifically, the determining of the second arc judgment result based on the first arc judgment result includes: if the first arc judgment result is the second result, constructing a model input feature vector based on the arc time-frequency feature vector; determining an arc type based on the model input feature vector and a pre-trained intelligent analysis model, the arc type including at least one of a series arc type, a parallel arc type and an interference signal type; if the arc type is the series arc type or the parallel arc type, the second arc judgment result is the third result; and if the arc type is the interference signal type, the second arc judgment result is the fourth result.

[0107] First, a first arc judgment result is determined based on an arc video feature vector and a preset threshold, to determine whether an arc is likely to be produced, for rapid rough screening, to reduce the calculation load and to achieve a millisecond-level response. If the circuit under test does not produce an arc, the first result is obtained; if the circuit under test is likely to produce an arc, further analysis is needed, and the second result is obtained. In the second result, further arc analysis is performed. If it is determined that an arc is produced, the third result is obtained; if it is determined that no arc is produced, the fourth result is obtained. It should be noted that the fourth result and the first result are ultimately the same result.

[0108] The model input feature vector and the model input vector can be the same, or can be dimensionally converted to adapt to the pre-trained intelligent analysis model. The pre-trained intelligent analysis model can be a support vector machine model or a random forest model. The structure of the pre-trained intelligent analysis model can include a convolution layer, an LSTM layer, a fully connected layer and an output layer, wherein the convolution layer is used to extract local patterns, and the LSTM layer is used to capture time sequence dependencies. The final output includes a series arc probability, a parallel arc probability and an interference signal probability. Based on the series arc probability, the parallel arc probability and the interference signal probability, the arc type is determined to be a series arc, a parallel arc or an interference signal.

[0109] For example, as shown in Table 1, in the process of preset intelligent analysis model analysis, specific arc type judgment can be made through the following typical cases, for example, detection of 30% reduction in current root mean square value, harmonic amplitude mutation rate > 120%, resulting in a high probability of series arc, detection of peak factor > 3.5, phase offset > 0.4 rad, resulting in a high probability of parallel arc, sudden increase in harmonic energy ratio but recovery in a period of time, peak factor < 2.0, resulting in a high probability of interference signal.

[0110] Table 1

[0111]

[0112] It can be seen that in the embodiment, the double-layer architecture of threshold coarse screening combined with intelligent model fine judgment improves the accuracy of arc determination on the basis of ensuring the real-time of arc analysis.

[0113] S240, generating an arc generation image based on the arc generation condition and the circuit simulation model.

[0114] The circuit simulation model is simulated based on the determined arc generation condition, and the specific condition of arc generation is visualized based on the circuit topology, so that the user can clearly see the arc generation condition, position and danger degree.

[0115] The arc generation image includes not only the visualized display of the circuit topology, but also the real-time display of the current waveform, harmonic spectrum diagram and arc energy change curve, realizing real-time data visualization.

[0116] Specifically, generating an arc generation image based on the arc generation condition and the circuit simulation model includes: determining a simulated arc position and an arc intensity parameter based on the arc generation condition and the circuit simulation model, the simulated arc position being the arc generation position in the circuit simulation model; determining an arc dynamic display feature based on the arc intensity parameter and a preset intensity threshold; and determining the arc generation image based on the arc dynamic display feature, the simulated arc position and the circuit simulation model.

[0117] When the arc phenomenon is detected, an alarm window will immediately pop up on the display screen of the terminal, which details a series of key information, including the execution time of suppression action, the specific value of cut-off current and the actual effect of harmonic suppression.

[0118] S250, determining a multi-stage circuit control strategy based on the arc generation condition and controlling the control circuit module based on the multi-stage circuit control strategy, the multi-stage circuit control strategy being used to suppress arc generation and / or prevent arc spread.

[0119] Wherein, at the moment of detecting the arc phenomenon, the system will quickly start the protection mechanism, the controller determines the multi-stage circuit regulation strategy based on the arc generation condition, the multi-stage circuit regulation strategy includes devices for regulating different regulation circuit modules, and a hierarchical control scheme is dynamically formulated based on the real-time monitored arc generation condition (such as arc intensity, duration, position, etc.).

[0120] In one possible embodiment, the regulation circuit module includes a plurality of electronic switching devices, the plurality of electronic switching devices including a first type of electronic switching device and a second type of electronic switching device, the first type of electronic switching device being used to cut off the circuit, and the second type of electronic switching device being used to mitigate the impact of the arc; please refer to Figure 4 , Figure 4 is a multi-stage circuit regulation strategy regulation process schematic diagram of an alternating current arc detection method provided by the embodiment of the present application, the multi-stage circuit regulation strategy is determined based on the arc generation condition, and the regulation circuit module is regulated based on the multi-stage circuit regulation strategy, including: S410, controlling the second type of electronic switching device to operate in the first time period; S420, controlling the first type of electronic switching device to operate in the first time period or the second time period, the second time period being a time period subsequent to the first time period.

[0121] Wherein, the first type of electronic switching device can include a trigger relay or a solid-state switch, such as an insulated gate bipolar transistor (IGBT), and the second type of electronic switching device can include a thyristor or a pulse width modulation controller.

[0122] Wherein, the second time period is a time period subsequent to the first time period, and the first time period is a time period subsequent to the detection of the arc generation. In the first time period, the second type of electronic switching device is dynamically regulated based on the arc position and the arc severity in the arc generation condition, and the operation of the first type of electronic switching device is controlled in the first time period or the second time period.

[0123] Wherein, in the first time period, if a series arc is detected, the series impedance is increased, which can be adjusted by regulating the trigger angle of the thyristor to dynamically suppress the arc generation. Specifically, the trigger angle algorithm of the thyristor can include:

[0124] ;

[0125] Wherein, is the basic trigger angle, and optionally, if used for minimum impedance is , is the proportional gain, is the integral gain, is the current change rate in the detection period, and t is the detection period length.

[0126] Optionally, the thyristor control process may include: determining a zero-crossing reference based on zero-crossing detection to determine a phase reference point; determining the rate of change of current within the detection period based on the arc generation and the first current information; and determining the optimal firing angle based on the rate of change of current. ; Optimal trigger angle The signal is sent to the pulse generator corresponding to the thyristor. The pulse generator reaches the voltage phase... A pulse is sent to the gate of the thyristor at a specific time. The calculation of the trigger angle can be dynamically corrected based on the rate of change of current. Multiple rate of change thresholds are set, including a first rate of change and a second rate of change. If the rate of change of current is less than or equal to the first rate of change, the trigger angle correction is the first trigger angle correction. If the rate of change of current is greater than the first rate of change and less than or equal to the second rate of change, the trigger angle correction is between [a, b]. If the rate of change of current is greater than the second rate of change, the trigger angle correction is between [c, d]. For example, [a, b] can be [-15°, -30°], and [c, d] can be [-45°, -60°].

[0127] In the first time period, if a parallel arc is detected, the parallel impedance is reduced. This can be achieved by adjusting the PWM duty cycle to dynamically suppress arc generation. Specifically, adjusting the PWM duty cycle to regulate the impedance can involve determining the PWM duty cycle frequency based on specific arc data and multiple preset arc thresholds. The specific arc data can be the arc energy, and the preset arc thresholds can include a first arc threshold and a second arc threshold. The first arc threshold can be 10J, and the second arc threshold can be 50J. For example, refer to Table 2: if the arc energy is less than 10J, the PWM frequency is adjusted to 10kHz with a duty cycle range of 30%-70%; if the arc energy is greater than or equal to 10J but less than or equal to 50J, the PWM frequency is adjusted to 20kHz with a duty cycle range of 10%-30%; and if the arc energy is greater than 50J, the PWM frequency is adjusted to 50kHz with a duty cycle range of 5%-15%.

[0128] Table 2

[0129]

[0130] The first type of electronic switch device can operate in the first time period or the second time period, and the process of turning off the first type of electronic switch device can last for a period of time. Before the first type of electronic switch device completely cuts off the circuit, the second type of electronic switch device is controlled to operate. At the moment of detecting the arc phenomenon, the system quickly starts the protection mechanism, and triggers the relay or the solid-state switch (such as the insulated gate bipolar transistor IGBT) to quickly cut off the fault circuit in a very short time, i.e. within 0.1 second, so as to block the further input of arc energy and achieve rapid cutting. At the same time, before the circuit is completely cut off, the system uses the silicon controlled rectifier (SCR) or the pulse width modulation (PWM) controller to dynamically adjust the impedance characteristics of the circuit. This dynamic damping technology can effectively suppress the continuous discharge phenomenon of the arc current.

[0131] As can be seen, in the embodiment, the arc fault cutting time can be shortened to within 0.1 ms through multi-level protection and intelligent control, the arc reignition probability is reduced, and the speed of the arc is inhibited.

[0132] S260, obtaining a second current signal, the second current signal being a current signal generated after being regulated based on the multi-level circuit regulation strategy.

[0133] The second current signal is obtained by a signal detection circuit module based on a multi-level circuit regulation strategy.

[0134] The second current signal needs to be subjected to time domain analysis, frequency domain analysis, feature extraction and the like, and the processing process of the second current signal corresponds to better data comparison. This includes: receiving a plurality of second current signals in the detection period from the signal detection circuit module; determining at least one of a plurality of harmonic components, a plurality of time domain characteristic parameters and a plurality of frequency domain characteristic parameters based on the plurality of second current signals; and determining the arc time-frequency feature vector based on the plurality of harmonic components and / or the plurality of time domain characteristic parameters and / or the plurality of frequency domain characteristic parameters.

[0135] The plurality of time domain characteristic parameters can include a current root mean square value, a peak factor and the like, the plurality of frequency domain characteristic parameters can at least include an FFT harmonic component and the like, and the plurality of harmonic components can at least include at least one of a harmonic amplitude mutation rate, a harmonic energy ratio and a harmonic phase shift. The arc video feature vector can be determined based on at least one of the plurality of time domain characteristic parameters, the plurality of frequency domain characteristic parameters and the plurality of harmonic components, and is used for analyzing the arc in the circuit under test.

[0136] Optionally, the calculation process of the current root mean square value can be: calculating the square mean value based on N current signals contained in the second current signal, and then taking the square root of the square mean value to obtain the current root mean square value IRMS.

[0137] Optionally, the calculation process of the peak factor can be: finding the absolute maximum value based on the N current signals contained in the second current signal, and performing division calculation based on the absolute maximum value and the current root mean square value to obtain the peak factor.

[0138] Optionally, the calculation process of the FFT harmonic component extraction can be: windowing and performing M-point FFT on the N current signals contained in the second current signal, and then calculating the harmonic amplitude based on the M-point FFT to obtain the FFT harmonic component.

[0139] Optionally, the calculation process of the harmonic amplitude mutation rate can be: comparing the harmonic amplitude variation rates of adjacent time windows based on the harmonic amplitude and the time window to obtain the harmonic amplitude mutation rate.

[0140] Optionally, the calculation process of the harmonic energy ratio can be: calculating the fundamental energy and the total high-frequency harmonic energy based on the plurality of harmonic amplitudes, and obtaining the harmonic energy ratio by taking the ratio of the fundamental energy and the total high-frequency harmonic energy.

[0141] Optionally, the calculation process of the harmonic phase shift can be: extracting a plurality of phase angles based on the M-point FFT, and determining the harmonic phase shift based on the phase angles.

[0142] Optionally, the determination of at least one of the plurality of harmonic components, the plurality of time domain characteristic parameters and the plurality of frequency domain characteristic parameters based on the plurality of second current signals comprises: determining the plurality of harmonic components based on the plurality of second current signals and at least one of Fourier transform and / or short-time Fourier transform; and determining the plurality of time domain characteristic parameters based on the plurality of second current signals and at least one of RMS calculation, peak detection and derivative calculation.

[0143] As can be seen, in this embodiment, the arc recognition accuracy is improved by joint multi-parameter cross-validation, and the process analysis speed is relatively fast, which can improve the efficiency of arc recognition.

[0144] S270, determining an arc suppression effect image based on the second current signal and the circuit simulation model.

[0145] Among them, similar to the generation of the arc generation image corresponding to the first current signal based on the arc generation condition and the circuit simulation model, the image of the second current signal is generated in the same way.

[0146] When the arc occurrence is detected, the user interface pops up a window that details the execution time of the suppression action, the specific value of the cut-off current, and the actual effect of harmonic suppression. At the same time, the system dynamically displays the real-time effect of the suppression strategy, such as the suppression rate of current mutation and the decay curve of harmonic energy, which can help users monitor and evaluate the suppression effect in real time. In addition, in order to enable users to more intuitively understand the mechanism of arc suppression, the system simulates the entire process of arc extinction in the form of animation, making the entire suppression process visualized, which facilitates users to better master and understand.

[0147] It can be seen that, by implementing the embodiments of the present application, the controller of the arc detection system acquires an external instruction, determines a circuit simulation model based on the external instruction, the external instruction including an operation instruction of a user; acquires a first current signal from the signal detection circuit module within a detection period, and determines an arc feature vector based on the first current signal; determines an arc generation condition based on the arc time-frequency feature vector, the arc generation condition being used to represent whether an arc is generated and / or an arc generation position and / or a danger degree; generates an arc generation image based on the arc generation condition and the circuit simulation model; determines a multi-stage circuit regulation strategy based on the arc generation condition and regulates the regulation circuit module based on the multi-stage circuit regulation strategy, the multi-stage circuit regulation strategy being used to suppress arc generation and / or prevent arc diffusion; acquires a second current signal, the second current signal being a current signal generated after being regulated based on the multi-stage circuit regulation strategy; determines an arc suppression effect image based on the second current signal and the circuit simulation model; in this way, real-time visualization of the arc generation condition and the suppression effect can be realized through automatic or manual association of the circuit simulation model and the actual circuit, the efficiency of arc suppression is improved, the accuracy of arc analysis is improved based on time-domain and frequency-domain feature analysis to determine the arc feature vector, and the multi-stage suppression strategy that is immediately executed based on the arc generation condition can shorten the arc extinction time, thereby improving the efficiency and accuracy of the alternating current arc detection and the speed of arc suppression.

[0148] Please refer to Figure 5 , Figure 5 is a structural schematic diagram of an alternating current arc detection device proposed by the embodiments of the present application, applied to a controller of an arc detection system, the arc detection system further including a signal detection circuit module and a regulation circuit module, the alternating current arc detection device 500 including: an instruction acquisition module 510, a first signal acquisition module 520, an arc determination module 530, a first display module 540, a strategy determination module 550, a second signal acquisition module 560, and a second display module 570, wherein:

[0149] The instruction obtaining module 510 is configured to obtain an external instruction, and determine a circuit simulation model based on the external instruction, wherein the external instruction comprises an operation instruction of a user.

[0150] The first signal obtaining module 520 is configured to obtain a first current signal from the signal detection circuit module in a detection period, and determine an arc feature vector based on the first current signal.

[0151] The arc determination module 530 is configured to determine an arc generation condition based on the arc time-frequency feature vector, wherein the arc generation condition is used to represent whether an arc is generated and / or a position of arc generation and / or a dangerous degree.

[0152] The first display module 540 is configured to generate an arc generation image based on the arc generation condition and the circuit simulation model.

[0153] The strategy determination module 550 is configured to determine a multi-stage circuit regulation strategy based on the arc generation condition, and regulate the regulation circuit module based on the multi-stage circuit regulation strategy, wherein the multi-stage circuit regulation strategy is used to suppress arc generation and / or prevent arc diffusion.

[0154] The second signal obtaining module 560 is configured to obtain a second current signal, wherein the second current signal is a current signal generated after being regulated based on the multi-stage circuit regulation strategy.

[0155] The second display module 570 is configured to determine an arc suppression effect image based on the second current signal and the circuit simulation model.

[0156] In a possible implementation, the arc detection system further comprises at least one terminal, the external instruction comprises an automatic generation instruction and / or an active layout instruction, and the instruction obtaining module 510 is specifically configured to:

[0157] If it is detected that the external instruction is the automatic generation instruction, a layout image from the terminal is obtained, wherein the layout image comprises a layout image captured by the terminal; and the circuit simulation model is automatically generated based on the automatic generation instruction and the layout image.

[0158] If it is detected that the external instruction is the active layout instruction, the circuit simulation model is generated based on the active layout instruction; or, a layout image from the terminal is obtained, wherein the layout image comprises a layout image captured by the terminal; and the circuit simulation model is automatically generated based on the active layout instruction and / or the layout image.

[0159] In a possible implementation, the terminal includes a first type of terminal, the first type of terminal is configured to display a display screen, the display screen is configured to display an operation interface, and the display screen is configured to obtain a user's active layout instruction, the active layout instruction includes a touch instruction or a control instruction, the touch instruction includes at least one of dragging and clicking, the operation interface includes a plurality of callable electrical components, the active layout instruction includes the touch instruction or the control instruction for the plurality of callable electrical components, and the instruction obtaining module 510 is configured to, in a case where it is detected that the external instruction is the active layout instruction, generate the circuit simulation model based on the active layout instruction, and specifically configured to:

[0160] obtain the touch instruction for the plurality of callable electrical components;

[0161] in response to the touch instruction, generate a complete circuit simulation model in the display operation interface topology.

[0162] In a possible implementation, the first display module 540 is configured to, in a case of generating an arc generation image based on the arc generation condition and the circuit simulation model, and specifically configured to:

[0163] determine a simulated arc position and an arc intensity parameter based on the arc generation condition and the circuit simulation model, the simulated arc position being an arc generation position in the circuit simulation model;

[0164] determine an arc dynamic display feature based on the arc intensity parameter and a preset intensity threshold;

[0165] determine the arc generation image based on the arc dynamic display feature, the simulated arc position, and the circuit simulation model.

[0166] In a possible implementation, the strategy determination module 550 is configured to, in a case of determining a multi-stage circuit control strategy based on the arc generation condition and controlling the control circuit module based on the multi-stage circuit control strategy, and specifically configured to:

[0167] control the second type of electronic switch device to operate in the first time period;

[0168] control the first type of electronic switch device to operate in the first time period or the second time period, the second time period being a time period subsequent to the first time period.

[0169] In a possible implementation, the first signal obtaining module 520 is configured to, in a case of obtaining a first current signal from the signal detection circuit module and determining an arc time-frequency feature vector based on the first current signal, and specifically configured to:

[0170] receive a plurality of the first current signals in the detection period from the signal detection circuit module;

[0171] determine at least one of a plurality of harmonic components, a plurality of time domain characteristic parameters and a plurality of frequency domain characteristic parameters based on the plurality of first current signals;

[0172] determine the arc time-frequency characteristic vector based on the plurality of harmonic components and / or the plurality of time domain characteristic parameters and / or the plurality of frequency domain characteristic parameters.

[0173] In a possible implementation, the first signal acquisition module 520, in the aspect of determining at least one of a plurality of harmonic components, a plurality of time domain characteristic parameters and a plurality of frequency domain characteristic parameters based on the plurality of first current signals, is specifically configured to:

[0174] determine the plurality of harmonic components based on at least one of Fourier transform and / or short-time Fourier transform on the plurality of first current signals;

[0175] determine the plurality of time domain characteristic parameters based on at least one of RMS calculation, peak value detection and derivative calculation on the plurality of first current signals;

[0176] determine the plurality of frequency domain characteristic parameters based on the plurality of first current signals.

[0177] In a possible implementation, the arc determination module 530, in the aspect of determining arc generation based on the arc time-frequency characteristic vector, is specifically configured to:

[0178] determine a first arc judgment result based on the arc time-frequency characteristic vector and a preset threshold, the first arc judgment result comprising a first result and a second result, the first result being used to represent that the measured circuit does not generate arc, and the second result being used to represent that the measured circuit may generate arc;

[0179] determine a second arc judgment result in the current detection period based on the first arc judgment result, the second arc judgment result comprising a third result and a fourth result, the third result being used to represent that the measured circuit generates arc and indicating that the controller determines a protection strategy, and the fourth result representing that the measured circuit does not generate arc; the determination of the second arc judgment result based on the first arc judgment result comprises:

[0180] if the first arc judgment result is the second result, construct a model input characteristic vector based on the arc time-frequency characteristic vector;

[0181] determine an arc type based on the model input characteristic vector and a pre-trained intelligent analysis model, the arc type comprising at least one of a series arc type, a parallel arc type and an interference signal type.

[0182] If the arc type is the series arc type or the parallel arc type, the second arc judgment result is the third result;

[0183] If the arc type is the interference signal type, the second arc judgment result is the fourth result.

[0184] It is worth pointing out that, wherein, the specific function implementation of the alternating current arc detection device 500 is described above Figure 2 The description of the alternating current arc detection method, such as the instruction acquisition module 510 is used to realize the related content of executing S210, the first signal acquisition module 520 is used to realize the related content of executing S220, the arc determination module 530 is used to realize the related content of executing S230, the first display module 540 is used to realize the related content of executing S240, the strategy determination module 550 is used to realize the related content of executing S250, the second signal acquisition module 560 is used to realize the related content of executing S260, and the second display module 570 is used to realize the related content of executing S270. Each unit or module in the alternating current arc detection device 500 can be combined into one or several other units or modules respectively or all, or some of the units or modules can be further split into a plurality of units or modules with smaller functions to constitute, which can realize the same operation without affecting the realization of the technical effects of the embodiments of the present application. The above-mentioned units or modules are divided based on logical functions. In actual application, the function of one unit (or module) is realized by a plurality of units (or modules), or the functions of a plurality of units (or modules) are realized by one unit (or module).

[0185] It can be seen that the alternating current arc detection device described in the embodiment of the application obtains an external instruction, determines a circuit simulation model based on the external instruction, the external instruction includes an operation instruction of a user, obtains a first current signal from the signal detection circuit module in a detection period, and determines an arc feature vector based on the first current signal, determines an arc generation condition based on the arc time-frequency feature vector, the arc generation condition is used to represent whether the arc is generated and / or an arc generation position and / or a dangerous degree, generates an arc generation image based on the arc generation condition and the circuit simulation model, determines a multi-stage circuit regulation strategy based on the arc generation condition and regulates the regulation circuit module based on the multi-stage circuit regulation strategy, the multi-stage circuit regulation strategy is used to suppress the arc generation and / or prevent the arc from spreading, obtains a second current signal, the second current signal is a current signal generated after being regulated based on the multi-stage circuit regulation strategy, and determines an arc suppression effect image based on the second current signal and the circuit simulation model. In this way, the arc generation condition and the suppression effect can be visualized in real time by automatically or manually constructing the relevance between the circuit simulation model and the actual circuit, the efficiency of arc suppression is improved, the arc feature vector is determined based on the time domain and frequency domain feature analysis, the arc analysis accuracy is improved, the multi-stage suppression strategy is immediately executed based on the arc generation condition, the arc extinguishing time is shortened, and then the alternating current arc detection efficiency, detection accuracy and arc suppression speed are improved.

[0186] In the case of using an integrated unit, refer to Figure 6 , Figure 6 is another structure diagram of an alternating current arc detection device provided by the embodiment of the application, as Figure 6 shown, the alternating current arc detection device 500 includes a processing module 502 and a communication module 501. The processing module 502 is used for controlling and managing the actions of the alternating current arc detection device 500, for example, executing the steps of the instruction obtaining module 510, the first signal obtaining module 520, the arc determination module 530, the first display module 540, the strategy determination module 550, the second signal obtaining module 560 and the second display module 570, and / or for executing other processes of the technology described herein. The communication module 501 is used for interaction between the alternating current arc detection device 500 and other devices. As Figure 6 shown, the alternating current arc detection device 500 can also include a storage module 503, the storage module 503 is used to store the program code and data of the alternating current arc detection device 500.

[0187] The processing module 502 can be a processor or a controller, for example, a central processing unit (CPU), a general-purpose processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic devices, transistor logic devices, hardware components or any combination thereof. The processing module 502 can implement or execute the various exemplary logical blocks, modules and circuits described in connection with the disclosure. The processing module 502 can also be a combination of computing functions, for example, a combination of one or more microprocessors, a combination of a DSP and a microprocessor, and the like. The communication module 501 can be a transceiver, an RF circuit or a communication interface, and the like. The storage module 503 can be a memory.

[0188] All related content of each scenario involved in the above method embodiments can be cited to the function description of the corresponding function module, and will not be repeated here. The above alternating current arc detection device 500 can perform the above alternating current arc detection method. Figure 2 The above alternating current arc detection device 500 can perform the above alternating current arc detection method.

[0189] Please refer to Figure 7 , Figure 7 is a structural schematic diagram of an electronic device according to an embodiment of the present application. As shown in the figure, the electronic device 700 includes a processor 710, a memory 720, a communication interface 730 and one or more programs 721. The one or more programs 721 are stored in the memory 720 and configured to be executed by the processor 710.

[0190] The processor 710, the memory 720 and the communication interface 730 are connected to each other and complete the communication work among them. The memory 720 can be a volatile memory such as a dynamic random access memory (DRAM), or a non-volatile memory such as a mechanical hard disk. The memory 720 is used to store a set of executable program codes. The processor 710 is used to call one or more programs 721 stored in the memory 720, and can execute any part or all of the steps as described in the above alternating current arc detection method embodiments.

[0191] The electronic device 700 can include a smart phone (such as an Android phone, an iOS phone, a Windows Phone, or the like), a tablet computer, a palm computer, a vehicle event data recorder, a vehicle-mounted electronic device, a server, a notebook computer, a mobile Internet device (MID), or a wearable electronic device (such as a smart watch or a Bluetooth headset), and the like. The above are merely examples and are not exhaustive, and include but are not limited to the above electronic devices.

[0192] The embodiments of the present application further provide a computer storage medium, which stores a computer program for electronic data exchange, and the computer program causes a computer to execute some or all of the steps of any of the methods described in the above method embodiments. The computer includes an electronic device.

[0193] The embodiments of the present application further provide a computer program product, which includes a non-transitory computer-readable storage medium storing a computer program. The computer program is operable to cause a computer to execute some or all of the steps of any of the methods described in the above method embodiments. The computer program product can be a software installation package, and the computer includes an electronic device.

[0194] It should be noted that, for the above method embodiments, in order to simply describe, each is described as a combination of a series of actions, but those skilled in the art should know that the present application is not limited to the order of the actions described, because according to the present application, certain steps can be performed in other order or simultaneously. Secondly, those skilled in the art should know that the embodiments described in the specification all belong to preferred embodiments, and the actions and modules involved are not necessarily required by the present application.

[0195] In the above embodiments, the description of each embodiment is focused on, and the parts not described in detail in a certain embodiment can be referred to the related description of other embodiments.

[0196] In several embodiments provided in the present application, it should be understood that the disclosed apparatus can be implemented by other means. For example, the apparatus embodiments described above are merely illustrative, for example, the division of the above units is only a logical function division, and actual implementation can have another division manner, for example, a plurality of units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the coupling or direct coupling or communication connection between the displayed or discussed ones can be indirect coupling or communication connection through some interfaces, apparatuses or units, and can be electrical or other forms.

[0197] The units described as separate components may or may not be physically separate, and the components displayed as units may or may not be physical units, i.e., they may be located in one place, or they may be distributed to multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the embodiment.

[0198] In addition, the functional units in each embodiment of the present application can be integrated in one processing unit, or each unit can exist physically, or two or more units can be integrated in one unit. The integrated unit can be realized in the form of hardware or in the form of a software functional unit.

[0199] The integrated unit, if realized in the form of a software functional unit and sold or used as an independent product, can be stored in a computer readable storage medium. Based on this understanding, the technical solutions of the present application essentially or the part that contributes to the prior art or the whole or part of the technical solutions can be embodied in the form of a software product. The computer software product is stored in a storage medium, and includes a number of instructions for making a computer electronic device (which can be a personal computer, an electronic device or a network electronic device, etc.) execute all or part of the steps of the above-mentioned method of each embodiment of the present application. The aforementioned storage medium includes: a U disk, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk or an optical disk, and various media that can store program codes.

[0200] Those skilled in the art can understand that all or part of the steps of the various methods of the above embodiments can be completed by programs instructing relevant hardware, and the programs can be stored in a computer readable storage medium, which can include: a flash disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, etc.

[0201] The embodiments of the present application are described in detail above, and the principles and implementation modes of the present application are described by applying specific examples. The above description of the embodiments is only to help understand the method of the present application and its core idea; at the same time, for those skilled in the art, according to the idea of the present application, the specific implementation mode and application range will be changed; in view of the above, the content of the specification should not be understood as a limitation of the present application.

Claims

1. A method for detecting alternating current arc, characterized in that, A controller for an arc detection system, the arc detection system further comprising a signal detection circuit module, a control circuit module, and at least one terminal, including: Obtain external instructions, determine a circuit simulation model based on the external instructions, the external instructions including user operation instructions, the user operation instructions including automatically generated instructions and / or active layout instructions, including: if the external instruction is detected as the automatically generated instruction, obtain a layout image from the terminal, the layout image including a layout image captured by the terminal; automatically generate the circuit simulation model based on the automatically generated instruction and the layout image; if the external instruction is detected as the active layout instruction, generate the circuit simulation model based on the active layout instruction; or, obtain a layout image from the terminal, the layout image including a layout image captured by the terminal; automatically generate the circuit simulation model based on the active layout instruction and / or the layout image; Acquiring a first current signal from the signal detection circuit module within a detection period, and determining an arc time-frequency feature vector based on the first current signal, includes: receiving multiple first current signals from the signal detection circuit module within the detection period; determining at least one of multiple harmonic components, multiple time-domain feature parameters, and multiple frequency-domain feature parameters based on the multiple first current signals; and determining the arc time-frequency feature vector based on the multiple harmonic components and / or the multiple time-domain feature parameters and / or the multiple frequency-domain feature parameters. The arc generation status is determined based on the arc time-frequency feature vector, and the arc generation status is used to characterize whether an arc is generated and / or the location and / or degree of danger of the arc generation. An arc generation image is generated based on the arc generation situation and the circuit simulation model; Based on the arc generation situation, a multi-level circuit control strategy is determined and the control circuit module is controlled based on the multi-level circuit control strategy. The multi-level circuit control strategy is used to suppress arc generation and / or prevent arc propagation. Acquire a second current signal, which is a current signal generated after being controlled based on the multi-level circuit control strategy; The arc suppression effect image is determined based on the second current signal and the circuit simulation model.

2. The method according to claim 1, characterized in that, Determining the arc generation based on the arc time-frequency feature vector includes: A first arc judgment result is determined based on the arc time-frequency feature vector and a preset threshold. The first arc judgment result includes a first result and a second result. The first result is used to characterize that no arc is generated in the circuit under test, and the second result is used to characterize that the circuit under test may generate an arc. Based on the first arc judgment result, a second arc judgment result is determined within the detection period. The second arc judgment result includes a third result and a fourth result. The third result is used to characterize the generation of an arc in the tested circuit and instruct the controller to determine a protection strategy. The fourth result characterizes the generation of no arc in the tested circuit. The determination of the second arc judgment result based on the first arc judgment result includes: If the first arc judgment result is the second result, then a model input feature vector is constructed based on the arc time-frequency feature vector; The arc type is determined based on the model input feature vector and the pre-trained intelligent analysis model. The arc type includes at least one of series arc type, parallel arc type, and interference signal type. If the arc type is the series arc type or the parallel arc type, the second arc determination result is the third result; If the arc type is the interference signal type, the second arc determination result is the fourth result.

3. The method according to claim 1, characterized in that, The terminal includes a first type of terminal, which is equipped with a display screen. The display screen is used to display an operation interface and obtain the user's active layout instructions. The active layout instructions include touch instructions or control instructions. The touch instructions include at least one of dragging and clicking. The operation interface includes multiple callable electrical components. The active layout instructions include the touch instructions or control instructions for the multiple callable electrical components. If the external instruction is detected to be the active placement instruction, the step of generating the circuit simulation model based on the active placement instruction includes: Obtain the touch commands for the plurality of callable electrical components; In response to the touch command, a complete circuit simulation model is generated on the display operation interface topology.

4. The method according to claim 1 or 3, characterized in that, The step of generating an arc generation image based on the arc generation situation and the circuit simulation model includes: Based on the arc generation situation and the circuit simulation model, the simulated arc position and arc intensity parameters are determined, wherein the simulated arc position is the arc generation position in the circuit simulation model; The dynamic display characteristics of the electric arc are determined based on the electric arc intensity parameters and the preset intensity threshold. The arc generation image is determined based on the arc dynamic display characteristics, the simulated arc position, and the circuit simulation model.

5. The method according to claim 2, characterized in that, The control circuit module includes multiple electronic switching devices, which include a first type of electronic switching device and a second type of electronic switching device. The first type of electronic switching device is used to cut off the circuit, and the second type of electronic switching device is used to mitigate the effects of electric arc. The process of determining a multi-level circuit control strategy based on the arc generation situation and controlling the control circuit module based on the multi-level circuit control strategy includes: The second type of electronic switching device is controlled to operate during a first time period, which is the period following the detection of an electric arc. The first type of electronic switching device is controlled to operate during the first time period or the second time period, wherein the second time period is a successor to the first time period.

6. An AC arc detection device, characterized in that, A controller for an arc detection system, the arc detection system further comprising a signal detection circuit module, a control circuit module, and at least one terminal, including: An instruction acquisition module is used to acquire external instructions and determine a circuit simulation model based on the external instructions. The external instructions include user operation instructions, which include automatically generated instructions and / or active layout instructions. The module includes: if the external instruction is detected as an automatically generated instruction, acquiring a layout image from the terminal, the layout image including a layout image captured by the terminal; automatically generating the circuit simulation model based on the automatically generated instructions and the layout image; if the external instruction is detected as an active layout instruction, generating the circuit simulation model based on the active layout instruction; or, acquiring a layout image from the terminal, the layout image including a layout image captured by the terminal; automatically generating the circuit simulation model based on the active layout instructions and / or the layout image. A first signal acquisition module is configured to acquire a first current signal from the signal detection circuit module within a detection period, and determine an arc time-frequency feature vector based on the first current signal, comprising: receiving multiple first current signals from the signal detection circuit module within the detection period; determining at least one of multiple harmonic components, multiple time-domain feature parameters, and multiple frequency-domain feature parameters based on the multiple first current signals; and determining the arc time-frequency feature vector based on the multiple harmonic components and / or the multiple time-domain feature parameters and / or the multiple frequency-domain feature parameters. An arc determination module is used to determine the arc generation status based on the arc time-frequency feature vector, wherein the arc generation status is used to characterize whether an arc is generated and / or the location and / or degree of danger of the arc generation. The first display module is used to generate an arc generation image based on the arc generation situation and the circuit simulation model; The strategy determination module is used to determine a multi-level circuit control strategy based on the arc generation situation and control the control circuit module based on the multi-level circuit control strategy. The multi-level circuit control strategy is used to suppress arc generation and / or prevent arc propagation. The second signal acquisition module is used to acquire a second current signal, which is a current signal generated after being controlled based on the multi-level circuit control strategy. The second display module is used to determine the arc suppression effect image based on the second current signal and the circuit simulation model.

7. A computer-readable storage medium, characterized in that, The device stores an AC arc detection program, including execution instructions, which, when executed by the processor of the electronic device, perform the method as described in any one of claims 1 to 5.

8. An electronic device, characterized in that, The method includes a processor and a memory storing execution instructions, the memory storing one or more programs; when the processor executes the execution instructions stored in the memory, the processor performs the method as described in any one of claims 1 to 5.

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