Transmission control circuits and electronic equipment

Abstract

This application provides a transmission control circuit and electronic device. The transmission control circuit includes a control module, a switch control module, a switch module, and a test module. The switch control module is electrically connected to both the control module and the switch module, the switch module is electrically connected to the test module, and the switch module is used to connect to both the power supply and the transmission module. The transmission control circuit provided in this application, through the collaborative design of the test module and the control module, ensures that the transmission circuit can operate continuously for extended periods during the production debugging phase by driving the switch module to conduct via a test signal, thus meeting debugging requirements. During normal use, the control module, through timing control logic, automatically outputs a second control signal within a preset time after outputting a first control signal to start the transmission circuit normally, causing the transmission circuit to stop working, thereby achieving automatic shutdown of the transmission process. Therefore, the transmission control circuit simultaneously addresses both production debugging needs and the safety requirements of the user end.

Description

Technical Field

[0001] This application belongs to the field of electronic equipment technology, and in particular relates to a transmission control circuit and electronic equipment. Background Technology

[0002] The Automatic Identification System (AIS) is a core communication device ensuring the safety of ship navigation. AIS Class B equipment employs Carrier Sense-Time Division Multiple Access (CS-TDMA) technology, dividing one minute into 2250 fixed time slots (each slot is 26.667ms). Before transmission, the channel idle status must be checked to avoid resource conflicts. To prevent prolonged channel occupation due to equipment failure, relevant standards explicitly require that AIS equipment automatically shut down its transmitter via hardware if it does not cease transmission within one second after a normal transmission ends. However, the transmission control circuits of existing AIS Class B equipment require continuous transmission for more than 5 seconds during production testing to adjust parameters such as power, frequency error, and frequency offset. The existing hardware-level 1-second transmission protection design limits the transmission duration, making testing impossible. Removing or weakening the hardware protection to meet testing requirements would violate the safety requirements of the user end. Therefore, the existing transmission control circuits cannot simultaneously meet both production testing needs and the safety requirements of the user end. Summary of the Invention

[0003] This application provides a transmission control circuit and electronic device that can solve the problem that existing transmission control circuits cannot simultaneously meet the needs of production debugging and the safety requirements of the user end.

[0004] In a first aspect, embodiments of this application provide a transmission control circuit, including a control module, a switch control module, a switch module, and a test module. The switch control module is electrically connected to the control module and the switch module, respectively. The switch module is electrically connected to the test module, and the switch module is used to be electrically connected to a power supply and a transmission circuit, respectively.

[0005] The test module is used to output a test signal to the switch module according to the received first signal and test control signal, and the switch module is used to turn on according to the test signal to connect the power supply to the transmitting circuit;

[0006] The control module is used to output a first control signal to the switch control module according to the received second signal, and the switch control module is used to output a first switch control signal to the switch module according to the first control signal and the received third signal; the switch module is used to turn on according to the first switch control signal, so that the power supply is connected to the transmitting circuit.

[0007] The control module is further configured to output a second control signal to the switch control module within a preset time after outputting the first control signal; the switch control module is configured to output a second switch control signal to the switch module according to the second control signal and the third signal; the switch module is configured to turn off according to the second switch control signal, thereby disconnecting the power supply from the transmitting circuit.

[0008] In one possible implementation of the first aspect, the control module includes a trigger unit, a control unit, and a logic unit, wherein the control unit is electrically connected to the trigger unit and the logic unit respectively, and the logic unit is electrically connected to the switch control module;

[0009] The triggering unit is used to output a trigger signal to the control unit according to the second signal; the control unit is used to output a first control logic signal to the logic unit according to the trigger signal, and output a second control logic signal to the logic unit after a preset time; the logic unit is used to output the first control signal to the switch control module according to the first control logic signal, and is also used to output the second control signal to the switch control module according to the second control logic signal.

[0010] In one possible implementation of the first aspect, the triggering unit includes a first switching transistor, a first resistor, and a second resistor. The gate of the first switching transistor is electrically connected to a first terminal of the second resistor. The drain of the first switching transistor is electrically connected to a second terminal of the first resistor and the control unit, respectively. The source of the first switching transistor is grounded. The first terminal of the first resistor is used to be electrically connected to a first power supply, and the second terminal of the second resistor is used to receive the second signal.

[0011] The control unit includes a control chip, a third resistor, a fourth resistor, and a first capacitor. The second pin of the control chip is electrically connected to the trigger unit. The sixth pin of the control chip is electrically connected to the seventh pin of the control chip, the first end of the third resistor, and the first end of the first capacitor. The third pin of the control chip is electrically connected to the first end of the fourth resistor. The second end of the third resistor is used to be electrically connected to a first power supply. The second end of the fourth resistor is electrically connected to the logic unit. The second end of the first capacitor is grounded.

[0012] The logic unit includes a logic chip, the input terminal of which is electrically connected to the control unit, and the output terminal of which is electrically connected to the switch control module.

[0013] In one possible implementation of the first aspect, the switch control module includes a first switch unit and a second switch unit, wherein the first switch unit is electrically connected to the control module and the second switch unit respectively, and the second switch unit is electrically connected to the switch module;

[0014] The first switching unit is configured to output a first switching signal to the second switching unit according to the first control signal, and is also configured to output a second switching signal to the second switching unit according to the second control signal; the second switching unit is configured to output the first switching control signal to the switching module according to the third signal and the first switching signal, and is also configured to output the second switching control signal to the switching module according to the third signal and the second switching signal.

[0015] In one possible implementation of the first aspect, the first switching unit includes a second switching transistor and a fifth resistor, the gate of the second switching transistor is electrically connected to the second terminal of the fifth resistor, the drain of the second switching transistor is electrically connected to the second switching unit, the source of the second switching transistor is grounded, and the first terminal of the fifth resistor is electrically connected to the control module.

[0016] The second switching unit includes a third switching transistor and a sixth resistor. The gate of the third switching transistor is electrically connected to the second terminal of the first switching unit and the sixth resistor, respectively. The drain of the third switching transistor is electrically connected to the switching module. The source of the third switching transistor is grounded. The first terminal of the sixth resistor is used to receive the third signal.

[0017] In one possible implementation of the first aspect, the switching module includes a first transistor, a seventh resistor, and an eighth resistor. The base of the first transistor is electrically connected to the second terminal of the seventh resistor, the first terminal of the eighth resistor, and the test module, respectively. The emitter of the first transistor and the first terminal of the seventh resistor are both used to be electrically connected to the power supply. The collector of the first transistor is used to be electrically connected to the transmitting circuit. The second terminal of the eighth resistor is electrically connected to the switching control module.

[0018] In one possible implementation of the first aspect, the test module includes a fourth switch, a ninth resistor, a tenth resistor, a first test point, and a second test point. The gate of the fourth switch is electrically connected to the second terminal of the ninth resistor, the drain of the fourth switch is electrically connected to the second terminal of the tenth resistor, and the source of the fourth switch is grounded. The first terminal of the ninth resistor is used to receive the first signal, the second terminal of the tenth resistor is electrically connected to the second test point, and the first test point is electrically connected to the switch module. The first test point is used to connect to the second test point according to the test control signal.

[0019] In one possible implementation of the first aspect, the transmission control circuit further includes a reset module, which is electrically connected to the control module;

[0020] The reset module is used to receive a fourth signal and output a reset signal to the control module according to the fourth signal.

[0021] In one possible implementation of the first aspect, the reset module includes a fifth switch, an eleventh resistor, and a twelfth resistor. The gate of the fifth switch is electrically connected to the second terminal of the twelfth resistor, the drain of the fifth switch is electrically connected to the second terminal of the eleventh resistor, the source of the fifth switch is grounded, the first terminal of the eleventh resistor is used to be electrically connected to a first power supply, and the first terminal of the twelfth resistor is used to receive the fourth signal.

[0022] Secondly, embodiments of this application provide an electronic device, including a transmitting circuit and a transmitting control circuit as described in any one of the first aspects, wherein the transmitting circuit is electrically connected to a switching module in the transmitting control circuit.

[0023] The beneficial effects of the embodiments of this application compared with the prior art are:

[0024] The transmission control circuit provided in this application includes a control module, a switch control module, a switch module, and a test module. In actual use, the control module, switch control module, and test module can all be electrically connected to the processor module. During the production debugging phase, the test module receives a test control signal and a first signal output by the processor module, and outputs a test signal according to the test control signal and the first signal. The switch module is turned on according to the test signal, thereby connecting the power supply to the transmission circuit. During this process, the switch module is not controlled by the switch control module, but only responds to the test signal output by the test module to remain on, ensuring that the power supply continuously supplies power to the transmission circuit, meeting the requirement of long-term transmission during the debugging phase. During the normal use phase of the equipment, the control module outputs a first control signal to the switch control module according to the second signal output by the processor module. The switch control module outputs a first switch control signal according to the first control signal and the third signal output by the processor module, driving the switch module to turn on, realizing the normal start-up of the transmission circuit. Furthermore, after outputting the first control signal, the control module also outputs a second control signal within a preset time. The switch control module then outputs a second switch control signal based on the second control signal, causing the switch module to turn off, cutting off the connection between the power supply and the transmitting circuit. This means the power supply no longer supplies power to the transmitting circuit, and the transmitting circuit stops working, meeting safety requirements during the usage phase. Therefore, the transmitting control circuit provided in this application, through the collaborative design of the test module and the control module, ensures that the transmitting circuit can operate continuously for extended periods during the production debugging phase by driving the switch module to conduct using test signals, thus meeting debugging requirements. During normal use, the control module, through timing control logic, automatically outputs the second control signal within a preset time after outputting the first control signal to start the transmitting circuit normally, causing the transmitting circuit to stop working, thereby achieving automatic shutdown of the transmitting process. Therefore, the transmitting control circuit provided in this application simultaneously considers both production debugging needs and the safety requirements of the user end. Attached Figure Description

[0025] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0026] Figure 1 This is a schematic block diagram of a transmission control circuit provided in one embodiment of this application;

[0027] Figure 2 This is a schematic block diagram of a transmission control circuit provided in another embodiment of this application;

[0028] Figure 3This is a circuit connection diagram of a transmission control circuit provided in an embodiment of this application.

[0029] In the diagram, 10 is the transmission control circuit; 101 is the control module; 1011 is the trigger unit; 1012 is the control unit; 1013 is the logic unit; 102 is the switch control module; 1021 is the first switch unit; 1022 is the second switch unit; 103 is the switch module; 104 is the test module; 105 is the reset module; and 20 is the transmission circuit. Detailed Implementation

[0030] In the following description, specific details such as particular system architectures and techniques are set forth for illustrative purposes and not for limitation, in order to provide a thorough understanding of the embodiments of this application. However, those skilled in the art will understand that this application may also be implemented in other embodiments without these specific details. In other instances, detailed descriptions of well-known systems, apparatuses, circuits, and methods have been omitted so as not to obscure the description of this application with unnecessary detail.

[0031] It should be understood that, when used in this application specification and the appended claims, the term "comprising" indicates the presence of the described features, integrals, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components and / or a collection thereof.

[0032] It should also be understood that the term “and / or” as used in this application specification and the appended claims means any combination of one or more of the associated listed items and all possible combinations, and includes such combinations.

[0033] As used in this application specification and the appended claims, the term "if" may be interpreted, depending on the context, as "when," "once," "in response to determination," or "in response to detection." Similarly, the phrase "if determined" or "if [the described condition or event] is detected" may be interpreted, depending on the context, as "once determined," "in response to determination," "once [the described condition or event] is detected," or "in response to detection of [the described condition or event]."

[0034] Furthermore, in the description of this application and the appended claims, the terms "first," "second," "third," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0035] References to "one embodiment" or "some embodiments" as described in this specification mean that one or more embodiments of this application include a specific feature, structure, or characteristic described in connection with that embodiment. Therefore, the phrases "in one embodiment," "in some embodiments," "in other embodiments," "in still other embodiments," etc., appearing in different parts of this specification do not necessarily refer to the same embodiment, but rather mean "one or more, but not all, embodiments," unless otherwise specifically emphasized. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless otherwise specifically emphasized.

[0036] Automatic Identification Systems (AIS) are core communication devices ensuring safe navigation for ships. Class B AIS equipment employs Carrier Detection Time Division Multiple Access (CTDMA) technology, dividing one minute into 2250 fixed time slots (each slot is 26.667 ms). Before transmission, the channel idle status must be checked to avoid resource conflicts. To prevent prolonged channel occupation due to equipment failure, relevant standards explicitly require that AIS equipment automatically shut down its transmitter via hardware if it does not cease transmission within one second after a normal transmission ends. However, the transmission control circuits of existing Class B AIS equipment require continuous transmission for more than 5 seconds during production testing to adjust parameters such as power, frequency error, and frequency offset. The existing hardware-level 1-second transmission protection design limits the transmission duration, making testing impossible. Removing or weakening hardware protection to meet testing requirements would violate the safety requirements of the user end. Therefore, the existing transmission control circuits cannot simultaneously meet both production testing needs and the safety requirements of the user end.

[0037] To address the aforementioned issues, the transmission control circuit provided in this application includes a control module, a switch control module, a switch module, and a test module. In practical use, the control module, switch control module, and test module can all be electrically connected to the processor module. During the production debugging phase, the test module receives a test control signal and a first signal output by the processor module, and outputs a test signal based on the test control signal and the first signal. The switch module then conducts based on the test signal, thereby connecting the power supply to the transmission circuit. During this process, the switch module is not controlled by the switch control module; it only responds to the test signal output by the test module to remain on, ensuring that the power supply continuously powers the transmission circuit, meeting the requirement for long-term transmission during the debugging phase. During normal operation, the control module outputs a first control signal to the switch control module based on a second signal output by the processor module. The switch control module outputs a first switch control signal based on the first control signal and a third signal output by the processor module, driving the switch module to conduct and enabling the normal startup of the transmission circuit. Furthermore, after outputting the first control signal, the control module also outputs a second control signal within a preset time. The switch control module then outputs a second switch control signal based on the second control signal, causing the switch module to turn off, cutting off the connection between the power supply and the transmitting circuit. This means the power supply no longer supplies power to the transmitting circuit, and the transmitting circuit stops working, meeting safety requirements during the usage phase. Therefore, the transmitting control circuit provided in this application, through the collaborative design of the test module and the control module, ensures that the transmitting circuit can operate continuously for extended periods during the production debugging phase by driving the switch module to conduct using test signals, thus meeting debugging requirements. During normal use, the control module, through timing control logic, automatically outputs the second control signal within a preset time after outputting the first control signal to start the transmitting circuit normally, causing the transmitting circuit to stop working, thereby achieving automatic shutdown of the transmitting process. Therefore, the transmitting control circuit provided in this application simultaneously considers both production debugging needs and the safety requirements of the user end.

[0038] To illustrate the technical solution described in this application, specific embodiments are provided below.

[0039] Figure 1 A schematic block diagram of a transmit control circuit 10 according to an embodiment of this application is shown. See also Figure 1 As shown, the transmission control circuit 10 includes a control module 101, a switch control module 102, a switch module 103, and a test module 104. The switch control module 102 is electrically connected to the control module 101 and the switch module 103, respectively. The switch module 103 is electrically connected to the test module 104. The switch module 103 is used to be electrically connected to the power supply and the transmission circuit 20, respectively.

[0040] Specifically, in actual use, the control module 101, switch control module 102, and test module 104 can all be electrically connected to the processor module. During the production debugging phase, the test module 104 receives the test control signal TEST_CTL and the first signal TX_RF_TEST output by the processor module, and outputs a test signal according to the test control signal TEST_CTL and the first signal TX_RF_TEST. The switch module 103 is turned on according to the test signal, thereby connecting the power supply to the transmitting circuit 20. During this process, the switch module 103 is not controlled by the switch control module 102, but only responds to the test signal output by the test module 104 to remain on, ensuring that the power supply continuously supplies power to the transmitting circuit 20, meeting the requirement of long-term transmission during the debugging phase. During the normal use phase of the equipment, the control module 101 outputs a first control signal to the switch control module 102 according to the second signal TX_Trigger output by the processor module. The switch control module 102 outputs a first switch control signal according to the first control signal and the third signal TX_control output by the processor module, driving the switch module 103 to turn on, realizing the normal start-up of the transmitting circuit 20. Furthermore, after outputting the first control signal, the control module 101 also outputs a second control signal within a preset time. The switch control module 102 outputs a second switch control signal according to the second control signal, so that the switch module 103 is turned off, cutting off the connection between the power supply and the transmitting circuit 20. That is, the power supply no longer supplies power to the transmitting circuit 20, and the transmitting circuit 20 stops working, meeting the safety specifications during the usage phase. Therefore, the transmitting control circuit 10 provided in this application embodiment, through the collaborative design of the test module 104 and the control module 101, ensures that the transmitting circuit 20 can work continuously for a long time during the production debugging phase by driving the switch module 103 to conduct through the test signal, thus meeting the debugging requirements. During normal use, the control module 101, through timing control logic, automatically outputs the second control signal within a preset time after outputting the first control signal to start the transmitting circuit 20 normally, causing the transmitting circuit 20 to stop working, thereby achieving automatic shutdown of the transmitting process. Therefore, the transmitting control circuit 10 provided in this application simultaneously considers both the production debugging requirements and the safety requirements of the user end.

[0041] It should be noted that at the same time that the control module 101 receives the second signal TX_Trigger, the switch control module 102 receives the third signal TX_control. This ensures that the switch control module 102 can only output the first switch control signal / second switch control signal when it simultaneously receives the third signal TX_control and the first control signal / second control signal.

[0042] It should be noted that the transmission control circuit 10 of this application is controlled by hardware circuitry and is completely independent of software logic. Even if the program in the processor module crashes or malfunctions, the hardware control logic can still operate stably according to the preset mechanism. That is, during the usage phase, the control module 101 outputs a second control signal within a preset time after outputting the first control signal to forcibly shut off the power supply to the transmission circuit 20, thereby preventing protection failure due to software faults.

[0043] For example, the processor module may include a processor chip with GPIO pins for outputting a first signal TX_RF_TEST to the test module 104 during the production debugging phase, a second signal TX_Trigger to the control module 101 during normal use, and a third signal TX_control to the switch control module 102. The test control signal TEST_CTL can be an enable signal input to the test module 104 from production debugging equipment (such as a debugging computer or dedicated test fixture) through a test interface, or it can be a level trigger signal generated by shorting a test point. Its core function is to transmit the instruction indicating that the current production debugging phase is being implemented to the test module 104. Together with the first signal TX_RF_TEST output by the processor module, it triggers the test module 104 to output a test signal, ensuring reliable conduction of the switch module 103 in debugging scenarios.

[0044] For example, the preset time can be set to 1 second, which can meet the requirement of relevant standards that AIS devices must stop transmitting within 1 second after normal transmission ends.

[0045] In one embodiment of this application, such as Figure 2 As shown, the control module 101 includes a trigger unit 1011, a control unit 1012 and a logic unit 1013. The control unit 1012 is electrically connected to the trigger unit 1011 and the logic unit 1013 respectively, and the logic unit 1013 is electrically connected to the switch control module 102.

[0046] Specifically, during normal use, the trigger unit 1011 receives the second signal TX_Trigger and outputs a trigger signal to the control unit 1012 based on the second signal TX_Trigger. The control unit 1012 outputs a first control logic signal to the logic unit 1013 based on the trigger signal, and outputs a second control logic signal to the logic unit 1013 after a preset time. The logic unit 1013 outputs a first control signal to the switch control module 102 based on the first control logic signal, and also outputs a second control signal to the switch control module 102 based on the second control logic signal. Therefore, during normal use, the trigger unit 1011, as the signal receiver, can output a trigger signal based on the second signal TX_Trigger. The control unit 1012, as the core timing and logic generation component, outputs a first control logic signal (a reference signal to start transmission) to the logic unit 1013 based on the trigger signal, and simultaneously activates an internal timing mechanism to automatically generate a second control logic signal (a reference signal to terminate transmission) within a preset protection duration (e.g., 1 second). Logic unit 1013 serves as the signal output terminal, capable of outputting the first control signal and the second control signal. The three units have clearly defined functions, forming a closed loop from signal reception and timing logic generation to control signal output. This ensures that the transmitting circuit 20 can reliably start up during normal use and can be forcibly shut down within a preset time, meeting hardware-level protection requirements.

[0047] In one embodiment of this application, such as Figure 2 As shown, the switch control module 102 includes a first switch unit 1021 and a second switch unit 1022. The first switch unit 1021 is electrically connected to the control module 101 and the second switch unit 1022 respectively, and the second switch unit 1022 is electrically connected to the switch module 103.

[0048] Specifically, during normal use, the first switching unit 1021 and the second switching unit 1022 work together to achieve precise driving of the switching module 103. The first switching unit 1021 outputs a first switching signal to the second switching unit 1022 based on a first control signal, and also outputs a second switching signal to the second switching unit 1022 based on a second control signal. The second switching unit 1022 outputs a first switching control signal to the switching module 103 based on a third signal TX_control and the first switching signal, and also outputs a second switching control signal to the switching module 103 based on the third signal TX_control and the second switching signal. This two-stage control design not only achieves coordination between the timing logic of the control module 101 and the enable logic of the processor module, but also avoids false triggering by a single signal through dual signal verification, further improving the reliability and safety of driving the switching module 103.

[0049] The following is combined Figure 3The working principle and working process of the transmission control circuit 10 provided in the embodiments of this application are described in detail.

[0050] In one embodiment of this application, such as Figure 3 As shown, the trigger unit 1011 includes a first switch Q1, a first resistor R1, and a second resistor R2. The gate of the first switch Q1 is electrically connected to the first end of the second resistor R2. The drain of the first switch Q1 is electrically connected to the second end of the first resistor R1 and the control unit 1012, respectively. The source of the first switch Q1 is grounded. The first end of the first resistor R1 is used to be electrically connected to the first power supply. The second end of the second resistor R2 is used to receive the second signal TX_Trigger.

[0051] Specifically, the first resistor R1 acts as a pull-up resistor, stabilizing the drain level to the first power supply voltage when the first switch Q1 is turned off, providing a high-level reference signal for the control unit 1012. The second resistor R2 acts as a current-limiting protection resistor, connected in series between the input terminal of the second signal TX_Trigger and the gate of the first switch Q1. It limits the gate current when the second signal TX_Trigger is input, preventing excessive current from damaging the first switch Q1, and also filters out minor noise in the signal, ensuring the stability of the second signal TX_Trigger received by the gate. The first switch Q1, as the core switching device, is turned on or off according to the second signal TX_Trigger received by the gate after current limiting by the second resistor R2. When the second signal TX_Trigger is at an effective level (such as a high-level signal), the first switch Q1 is turned on, pulling the drain level to ground potential (low level), and outputting a trigger signal to the control unit 1012, triggering the control unit 1012 to operate. When the second signal TX_Trigger is at an invalid level (such as a low-level signal), the first switch Q1 is turned off, and its drain is kept at a high level through the pull-up effect of the first resistor R1, thus not triggering the control unit 1012. The first switch Q1, the first resistor R1, and the second resistor R2 together ensure the reliable reception, level conversion, and trigger signal generation of the second signal TX_Trigger, providing a stable signal input basis for the control unit 1012 to start subsequent timing logic.

[0052] For example, the designer can select the type of the first switching transistor Q1 according to the actual situation, that is, it can be a fully controllable power device such as a metal-oxide-semiconductor field-effect transistor or an insulated-gate bipolar transistor. For example, the first switching transistor Q1 can be an NMOS transistor. In addition, the voltage of the first power supply can be 5V.

[0053] In one embodiment of this application, such as Figure 3As shown, the control unit 1012 includes a control chip U1, a third resistor R3, a fourth resistor R4, and a first capacitor C1. The second pin of the control chip U1 is electrically connected to the trigger unit 1011. The sixth pin of the control chip U1 is electrically connected to the seventh pin of the control chip U1, the first end of the third resistor R3, and the first end of the first capacitor C1. The third pin of the control chip U1 is electrically connected to the first end of the fourth resistor R4. The second end of the third resistor R3 is used to be electrically connected to the first power supply. The second end of the fourth resistor R4 is electrically connected to the logic unit 1013. The second end of the first capacitor C1 is grounded.

[0054] Specifically, the control chip U1, as the core control element, receives the signal output by the trigger unit 1011 on its second pin (input terminal) to activate the internal timing logic. The third resistor R3 and the first capacitor C1 form an RC timing network, which, through their charging and discharging time constants (determined by the resistance and capacitance values), jointly set the preset timing duration (i.e., preset time, such as 1 second) of the control chip U1. The fourth resistor R4, acting as a current limiter and signal buffer resistor, is connected between the third pin (output terminal) of the control chip U1 and the logic unit 1013, ensuring the stability of the control logic signal transmitted to the logic unit 1013. Specifically, when the second pin of the control chip U1 receives the trigger signal (low level), the control chip U1, based on the charging and discharging rules of the RC network, first outputs a high level (first control logic signal) through the third pin, and then automatically switches to a low level (second control logic signal) after a preset time, thereby achieving precise hardware timing control of the transmission duration and providing a reliable timing reference for the logic unit 1013.

[0055] For example, the designer can select the model of the control chip U1 according to the actual situation. For example, the model of the control chip U1 can be selected as the LMC555 timer chip, where the preset time T=1.1*R3*C1.

[0056] It should be noted that the eighth pin of the control chip U1 is used as a power input pin and is used to electrically connect to the first power supply. The fourth pin of the control chip U1 is used as a reset pin and is used to electrically connect to the reset module 105. The first pin of the control chip U1 is used as a ground pin. The fifth pin of the control chip U1 is used as a control pin and is electrically connected to the first end of R13. The second end of R13 is grounded.

[0057] It should be noted that the transmission control circuit 10 also includes a reset module 105, which is electrically connected to the fourth pin of the control chip U1.

[0058] Specifically, after the transmitting circuit 20 completes a time slot (i.e., 26.667ms), the processor module outputs the fourth signal TX_RESET to the reset module 105. The reset module 105 outputs a reset signal to the control chip U1 according to the fourth signal TX_RESET, so that the timing logic, output state, etc. of the control chip U1 are reset to the initial value, which will not affect the transmission of the next time slot. It can also avoid the problem of transmission timeout or shutdown failure caused by the control chip U1 being stuck or timing error.

[0059] It should be noted that, as Figure 3 As shown, the reset module 105 includes a fifth switch Q5, an eleventh resistor R11, and a twelfth resistor R12. The gate of the fifth switch Q5 is electrically connected to the second terminal of the twelfth resistor R12, the drain of the fifth switch Q5 is electrically connected to the second terminal of the eleventh resistor R11, the source of the fifth switch Q5 is grounded, the first terminal of the eleventh resistor R11 is used to be electrically connected to the first power supply, and the first terminal of the twelfth resistor R12 is used to receive the fourth signal TX_RESET.

[0060] Specifically, the eleventh resistor, R11, acts as a pull-up resistor, stabilizing the drain level to the first power supply voltage when the fifth switch Q5 is turned off. This provides a high-level reference signal for the control unit 1012, ensuring that the reset terminal (pin 4) of the control chip U1 is in a non-reset state. The twelfth resistor, R12, is a current-limiting protection resistor, connected in series between the input of the fourth signal TX_RESET and the gate of the fifth switch Q5. It limits the gate current when the fourth signal TX_RESET is input, preventing excessive current from damaging the fifth switch Q5, and also filters out minor noise in the signal, ensuring the stability of the fourth signal TX_RESET received by the gate. The fifth switch Q5, as the core switching device, is turned on or off based on the fourth signal TX_RESET received by the gate after current limiting by the twelfth resistor R12. When the fourth signal TX_RESET is at a valid level (e.g., a high-level signal), the fifth switch Q5 is turned on, pulling the drain level to ground potential (low level), outputting a reset signal to the control chip U1, and triggering the control chip U1 to reset. When the fourth signal TX_RESET is invalid (e.g., a low-level signal), the fifth switch Q5 is turned off, and its drain remains high through the pull-up effect of the eleventh resistor R11, preventing the control chip U1 from being reset. The fifth switch Q5, the eleventh resistor R11, and the twelfth resistor R12 together ensure reliable reception, level conversion, and accurate output of the fourth signal TX_RESET, providing a stable hardware reset trigger mechanism for the control chip U1 and ensuring that it can be quickly forced back to its initial state when needed.

[0061] For example, designers can select the type of the fifth switch Q5 according to the actual situation, that is, it can be a fully controllable power device such as a metal-oxide-semiconductor field-effect transistor or an insulated-gate bipolar transistor. For example, the fifth switch Q5 can be selected as an NMOS transistor. In addition, the reset time can be 15ms.

[0062] In one embodiment of this application, such as Figure 3 As shown, the logic unit 1013 includes a logic chip U2. The input terminal of the logic chip U2 is electrically connected to the control unit 1012, and the output terminal of the logic chip U2 is electrically connected to the switch control module 102.

[0063] Specifically, the input terminal (second pin) of logic chip U2 is used to receive the first and second control logic signals output by control unit 1012. Through internal logic processing, the received signals are converted into level signals that meet the interface requirements of switch control module 102, and then transmitted from the output terminal (fourth pin) of logic chip U2 to switch control module 102. This not only shapes and buffers the control logic signals, reducing attenuation or interference during signal transmission, but also provides a stable signal foundation for the precise operation of switch control module 102. Specifically, after receiving a trigger signal (low level) at the second pin of control chip U1, control chip U1 outputs a high level (first control logic signal) through its third pin. After processing by logic chip U2, this is converted to a low level (first control signal) and transmitted to switch control module 102. Furthermore, after outputting a high level through its third pin, control chip U1 automatically switches to a low level (second control logic signal) after a preset time, and then, after processing by logic chip U2, converts it back to a high level (second control signal) and transmits it to switch control module 102.

[0064] It should be noted that the fifth pin of logic chip U2 is used as a power supply pin to connect to the second power supply, the third pin of logic chip U2 is used as a ground pin, and the first pin of logic chip U2 is left floating.

[0065] It should be noted that the logic chip U2 can be a logic inverter (such as a 74HC04 series inverter), whose core function is to reverse the level of the input and output signals. When the input of the logic inverter receives a high-level signal (such as the first control logic signal) from the control chip U1, the output will correspondingly output a low-level signal, which is then transmitted to the switch control module 102 as the first control signal. When the input receives a low-level signal (such as the second control logic signal) from the control chip U1, the output will correspondingly output a high-level signal, which is then transmitted to the switch control module 102 as the second control signal. Through this level reversal, the original logic signal output by the control unit 1012 can accurately match the level threshold requirements of the switch control module 102 for the input signal, ensuring signal compatibility and reliable transmission between modules.

[0066] For example, the voltage of the second power supply can be 5V.

[0067] In one embodiment of this application, such as Figure 3 As shown, the first switching unit 1021 includes a second switching transistor Q2 and a fifth resistor R5. The gate of the second switching transistor Q2 is electrically connected to the second end of the fifth resistor R5, the drain of the second switching transistor Q2 is electrically connected to the second switching unit 1022, the source of the second switching transistor Q2 is grounded, and the first end of the fifth resistor R5 is electrically connected to the control module 101.

[0068] Specifically, the fifth resistor R5, acting as a current-limiting protection resistor, is connected in series between the logic unit 1013 and the gate of the second switch Q2. It limits the gate current during input, preventing excessive current from damaging the second switch Q2, and also filters out minor noise in the signal, ensuring the stability of the control signals (first and second control signals) received by the gate. The second switch Q2, as the core switching device, is turned on or off based on the control signal received by its gate after being current-limited by the fifth resistor R5. When the gate of the second switch Q2 receives the first control signal, the second switch Q2 is turned off, outputting a first switching signal to the second switching unit 1022. When the gate of the second switch Q2 receives the second control signal, the second switch Q2 is turned on, outputting a second switching signal to the second switching unit 1022. The second switch Q2 and the fifth resistor R5 work together to complete the conversion from the front-end control signal to the rear-end drive signal, while simultaneously improving the signal driving capability and ensuring that the second switching unit 1022 can reliably respond to control commands.

[0069] For example, designers can select the type of the second switch Q2 according to the actual situation, that is, they can use fully controllable power devices such as metal-oxide-semiconductor field-effect transistors or insulated-gate bipolar transistors. For example, the second switch Q2 can be selected as an NMOS transistor, and correspondingly, the first control signal is a low-level signal and the second control signal is a high-level signal.

[0070] In one embodiment of this application, such as Figure 3 As shown, the second switching unit 1022 includes a third switching transistor Q3 and a sixth resistor R6. The gate of the third switching transistor Q3 is electrically connected to the second terminal of the first switching unit 1021 and the sixth resistor R6, respectively. The drain of the third switching transistor Q3 is electrically connected to the switching module 103. The source of the third switching transistor Q3 is grounded. The first terminal of the sixth resistor R6 is used to receive the third signal TX_control.

[0071] Specifically, the sixth resistor R6, acting as a current-limiting protection resistor, is connected in series between the input terminal of the third signal TX_control and the gate of the third switch Q3. This limits the gate current during input, preventing excessive current from damaging the third switch Q3, and also filters out minor noise in the signal, ensuring the stability of the third signal TX_control received by the gate. The third switch Q3, as the core switching device, is turned on or off based on the gate voltage of the third signal TX_control (current-limited by the sixth resistor R6) and the drain voltage of the second switch Q2. When the second switch Q2 is off, the gate voltage of the third switch Q3 is high, and the third switch Q3 is turned on, outputting a first switch control signal to the switch module 103 to turn on the switch module 103. When the second switch Q2 is on, the gate voltage of the third switch Q3 is pulled low, and the third switch Q3 is turned off, outputting a second switch control signal to the second switch unit 1022 to turn off the switch module 103. The third switch Q3 and the sixth resistor R6 work together to drive the switch module 103, while also improving the signal driving capability and ensuring that the switch module 103 can reliably respond to control commands.

[0072] For example, designers can select the type of the third switch Q3 according to the actual situation, that is, it can be a fully controllable power device such as a metal-oxide-semiconductor field-effect transistor or an insulated-gate bipolar transistor. For example, the third switch Q3 can be selected as an NMOS transistor.

[0073] In one embodiment of this application, such as Figure 3As shown, the switch module 103 includes a first transistor VT1, a seventh resistor R7, and an eighth resistor R8. The base of the first transistor VT1 is electrically connected to the second terminal of the seventh resistor R7, the first terminal of the eighth resistor R8, and the test module 104, respectively. The emitter of the first transistor VT1 and the first terminal of the seventh resistor R7 are both used to be electrically connected to the power supply. The collector of the first transistor VT1 is used to be electrically connected to the transmitter circuit 20. The second terminal of the eighth resistor R8 is electrically connected to the switch control module 102.

[0074] Specifically, the first transistor VT1, as the core power switching device, is connected to the emitter circuit 20 through its collector and to the power supply through its emitter. Its on / off state directly controls the power supply link from the power supply to the emitter circuit 20. The seventh resistor R7 is a current-limiting bias resistor, connected in series between the power supply and the base of the first transistor VT1. It provides a forward bias current to the base to drive the first transistor VT1 to conduct, while also limiting excessive base current that could damage the device. The eighth resistor R8 serves as a signal isolation and bias resistor, connected between the switch control module 102 and the base of the first transistor VT1. It receives the switch control signal (first / second switch control signal) output by the switch control module 102 and works together with the test signal output by the test module 104 on the base.

[0075] During the production and debugging phase, the first transistor VT1 is controlled only by the test module 104. During normal use, the first transistor VT1 is controlled only by the switch control module 102. When the base of the first transistor VT1 receives the first switch control signal (i.e., when the third switch Q3 is turned on), the base of the first transistor VT1 is pulled low, and the first transistor VT1 is turned on, allowing the power supply to power the transmitting circuit 20, enabling the transmitting circuit 20 to transmit. When the base of the first transistor VT1 receives the second switch control signal (i.e., when the third switch Q3 is turned off), the base of the first transistor VT1 is at a high level, and the first transistor VT1 is turned off, preventing the power supply from powering the transmitting circuit 20, and the transmitting circuit 20 stops transmitting. The first transistor VT1, the seventh resistor R7, and the eighth resistor R8 work together to ensure continuous power supply during the debugging phase and reliable shutdown during the use phase, providing a stable power on / off mechanism for the transmitting circuit 20.

[0076] For example, the designer can select the type of the first transistor VT1 according to the actual situation. For example, the first transistor VT1 can be a PNP transistor.

[0077] In one embodiment of this application, such as Figure 3As shown, the test module 104 includes a fourth switch Q4, a ninth resistor R9, a tenth resistor R10, a first test point TP1, and a second test point TP2. The gate of the fourth switch Q4 is electrically connected to the second terminal of the ninth resistor R9, the drain of the fourth switch Q4 is electrically connected to the second terminal of the tenth resistor R10, and the source of the fourth switch Q4 is grounded. The first terminal of the ninth resistor R9 is used to receive the first signal TX_RF_TEST, the second terminal of the tenth resistor R10 is electrically connected to the second test point TP2, and the first test point TP1 is electrically connected to the switch module 103. The first test point TP1 is used to connect to the second test point TP2 according to the test control signal TEST_CTL.

[0078] Specifically, the ninth resistor R9 acts as a current-limiting protection resistor, connected in series between the input of the first signal TX_RF_TEST and the gate of the fourth switch Q4. It limits the gate current during input, preventing excessive current from damaging the fourth switch Q4, and also filters out minor noise in the signal, ensuring the stability of the first signal TX_RF_TEST received by the gate. The tenth resistor R10 also acts as a current-limiting protection resistor, limiting the loop current when the fourth switch Q4 is turned on, preventing overcurrent damage to the device. The fourth switch Q4, as the core switching device, is turned on or off based on the control signal received by the gate after current limiting by the ninth resistor R9. When the first signal TX_RF_TEST is at a valid level (e.g., a high-level signal), the fourth switch Q4 is turned on; when the first signal TX_RF_TEST is at an invalid level (e.g., a low-level signal), the fourth switch Q4 is turned off. When the fourth switch Q4 is turned on and the first test point TP1 is connected to the second test point TP2, the base of the first transistor VT1 can be pulled low, thereby turning on the first transistor VT1 and allowing the power supply to power the transmitting circuit 20, enabling the transmitting circuit 20 to perform its transmitting function. That is, during the production and debugging phase, the first transistor VT1 is only controlled by the first signal TX_RF_TEST and the test control signal TEST_CTL, and is not controlled by the switch control module 102.

[0079] For example, designers can select the type of the fourth switch Q4 according to the actual situation, that is, it can be a fully controllable power device such as a metal-oxide-semiconductor field-effect transistor or an insulated-gate bipolar transistor. For example, the fourth switch Q4 can be selected as an NMOS transistor.

[0080] In one embodiment of this application, such as Figure 3 As shown, the transmission control circuit 10 also includes a filter capacitor C2, which is connected to the collector of the first transistor VT1 and is used to filter the power supply to ensure that the power supply voltage transmitted to the transmission circuit 20 is stable.

[0081] In one embodiment of this application, such as Figure 3As shown, the first signal TX_RF_TEST, the second signal TX_Trigger, the third signal TX_control, and the fourth signal TX_RESET can all be output by the processor chip U3 on the corresponding GPIO pins, and by default, the effective signals of the four signals are all high-level signals.

[0082] The following is combined Figure 3 The circuit diagrams of each unit provided provide a detailed description of the working process and control principle of the transmit control circuit 10 provided in the embodiments of this application.

[0083] During the production debugging phase, when the AIS printed circuit board is placed in the test fixture for transmission parameter debugging, the test pins connect the first test point TP1 and the second test point TP2, creating a short circuit between them. The processor chip U3 outputs the first signal TX_RF_TEST to control the fourth switch Q4 to turn on, pulling the base of the first transistor VT1 low, thus turning on VT1 and ensuring continuous power supply to the transmitter circuit 20, meeting the long-term transmission requirements of the debugging phase. During this phase, the conduction of the first transistor VT1 is unaffected by the second switch Q2 and the third switch Q3. After testing, the first test point TP1 and the second test point TP2 on the assembled main unit are disconnected, and the conduction of the first transistor VT1 is affected by the second switch Q2 and the third switch Q3.

[0084] During normal operation, when the device is in a state about to transmit and requires a time slot, the processor chip U3 simultaneously outputs the second signal TX_Trigger and the third signal TX_control to control the first switch Q1 to turn on. Because the first switch Q1 is turned on, the control chip U1 is triggered and outputs a high-level signal. After processing by the logic chip U2, a low-level signal is output to the second switch Q2 to turn it off. Since the second switch Q2 is off, it does not pull down the gate voltage of the third switch Q3. Therefore, the third switch Q3 turns on according to the third signal TX_control. At this time, the base of the first transistor VT1 is pulled low, and the first transistor VT1 turns on, allowing the power supply to power the transmitting circuit 20, enabling the transmitting circuit 20 to perform its transmission function.

[0085] After the control chip U1 outputs a high-level signal, it outputs a low-level signal within a preset time (e.g., 1 second). After processing by the logic chip U2, a high-level signal is output to the second switch Q2 to turn it on. Since the second switch Q2's conduction pulls down the gate voltage of the third switch Q3, the third switch Q3 is turned off. At this time, the first transistor VT1 is turned off, the power supply cannot supply power to the transmitting circuit 20, and the transmitting circuit 20 stops transmitting.

[0086] In summary, since the control chip U1 has the characteristic of outputting a low level after outputting a high level signal within a preset time, even if the processor chip U3 encounters a program crash, the power supply will not continuously supply power to the transmitting circuit 20, causing the transmitting module to continuously transmit.

[0087] This application also discloses an electronic device (such as an AIS communication device), including a transmitting circuit 20 and the aforementioned transmitting control circuit 10, wherein the transmitting circuit 20 is electrically connected to the switching module 103 in the transmitting control circuit 10. The electronic device employing the aforementioned transmitting control circuit 10 can achieve precise functional adaptation and safety considerations during both the production debugging and normal use phases. Specifically, during the production debugging phase, without modifying hardware or weakening protection mechanisms, the transmitting module can operate continuously for extended periods through signal triggering by the testing module 104, ensuring the accuracy and efficiency of debugging key performance parameters such as power, frequency error, and frequency offset. During normal use, relying on the hardware timing logic of the control module 101 and the dual signal verification of the switching control module 102, it can strictly adhere to maritime safety standards, forcibly cutting off the power supply link within a preset time after transmission, avoiding prolonged channel occupation due to equipment failure, and ensuring the communication order of maritime channels from the ground up. Simultaneously, the pure hardware control design avoids the risk of software failure, enabling the electronic device to meet both the practicality of debugging at the production end and the safety compliance at the user end, significantly improving the overall reliability and market adaptability of the equipment.

[0088] Since the processing and functions implemented by the electronic device in this embodiment are basically the same as the embodiments, principles and examples of the aforementioned transmission control circuit, any details not covered in this embodiment can be found in the relevant descriptions in the aforementioned embodiments, and will not be repeated here.

[0089] The above-described embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.

Claims

1. A transmission control circuit, characterized by comprising: The control module, the switch control module, the switch module and the test module are included, the switch control module is electrically connected with the control module and the switch module respectively, the switch module is electrically connected with the test module, and the switch module is used for being electrically connected with the power supply and the transmitting circuit respectively; The test module is used for outputting test signals to the switch module according to the received first signals and test control signals, and the switch module is used for being turned on according to the test signals to connect the power supply with the transmitting circuit; The control module is used for outputting first control signals to the switch control module according to the received second signals, the switch control module is used for outputting first switch control signals to the switch module according to the first control signals and the received third signals, and the switch module is used for being turned on according to the first switch control signals to connect the power supply with the transmitting circuit; The control module is also used for outputting second control signals to the switch control module within a preset time after the first control signals are outputted, the switch control module is used for outputting second switch control signals to the switch module according to the second control signals and the third signals, and the switch module is used for being turned off according to the second switch control signals to disconnect the power supply from the transmitting circuit; The control module includes a trigger unit, a control unit and a logic unit, the control unit is electrically connected with the trigger unit and the logic unit respectively, and the logic unit is electrically connected with the switch control module; The trigger unit is used for outputting trigger signals to the control unit according to the second signals, the control unit is used for outputting first control logic signals to the logic unit according to the trigger signals and second control logic signals to the logic unit after a preset time, the logic unit is used for outputting the first control signals to the switch control module according to the first control logic signals and the second control signals to the switch control module according to the second control logic signals, and the test module includes a fourth switch tube, a ninth resistor, a tenth resistor, a first test point and a second test point. The fourth switch tube's gate is electrically connected with the ninth resistor's second end, the fourth switch tube's drain is electrically connected with the tenth resistor's second end, the fourth switch tube's source is grounded, the ninth resistor's first end is used for receiving the first signals, the tenth resistor's second end is electrically connected with the second test point, the first test point is electrically connected with the switch module, and the first test point is used for being electrically connected with the second test point according to the test control signals.

2. The transmit control circuit of claim 1, wherein, The trigger unit includes a first switch tube, a first resistor and a second resistor, the first switch tube's gate is electrically connected with the second resistor's first end, the first switch tube's drain is electrically connected with the first resistor's second end and the control unit respectively, the first switch tube's source is grounded, the first resistor's first end is used for being electrically connected with a first power supply, and the second resistor's second end is used for receiving the second signals. The control unit comprises a control chip, a third resistor, a fourth resistor and a first capacitor, a second pin of the control chip is electrically connected with the trigger unit, a sixth pin of the control chip is electrically connected with a seventh pin of the control chip, a first end of the third resistor and a first end of the first capacitor respectively, a third pin of the control chip is electrically connected with a first end of the fourth resistor, a second end of the third resistor is used for being electrically connected with a first power supply, a second end of the fourth resistor is electrically connected with the logic unit, and a second end of the first capacitor is grounded; The logic unit comprises a logic chip, an input end of the logic chip is electrically connected with the control unit, and an output end of the logic chip is electrically connected with the switch control module.

3. The transmit control circuit of claim 1, wherein, The switch control module comprises a first switch unit and a second switch unit, the first switch unit is electrically connected with the control module and the second switch unit respectively, and the second switch unit is electrically connected with the switch module. The first switch unit is used for outputting a first switch signal to the second switch unit according to the first control signal, and outputting a second switch signal to the second switch unit according to the second control signal; and the second switch unit is used for outputting the first switch control signal to the switch module according to the third signal and the first switch signal, and outputting the second switch control signal to the switch module according to the third signal and the second switch signal.

4. The transmit control circuit of claim 3, wherein, The first switch unit comprises a second switch tube and a fifth resistor, a gate of the second switch tube is electrically connected with a second end of the fifth resistor, a drain of the second switch tube is electrically connected with the second switch unit, a source of the second switch tube is grounded, and a first end of the fifth resistor is electrically connected with the control module. The second switch unit comprises a third switch tube and a sixth resistor, a gate of the third switch tube is electrically connected with the first switch unit and a second end of the sixth resistor respectively, a drain of the third switch tube is electrically connected with the switch module, a source of the third switch tube is grounded, and a first end of the sixth resistor is used for receiving the third signal.

5. The transmit control circuit of claim 1, wherein, The switch module comprises a first triode, a seventh resistor and an eighth resistor, a base of the first triode is electrically connected with a second end of the seventh resistor, a first end of the eighth resistor and the test module respectively, an emitter of the first triode and a first end of the seventh resistor are both used for being electrically connected with the power supply, a collector of the first triode is used for being electrically connected with the transmitting circuit, and a second end of the eighth resistor is electrically connected with the switch control module.

6. The transmit control circuit of any of claims 1-5, wherein, The transmitting control circuit further comprises a reset module, and the reset module is electrically connected with the control module; The reset module is used for receiving a fourth signal, and outputting a reset signal to the control module according to the fourth signal.

7. The transmit control circuit of claim 6, wherein, The reset module comprises a fifth switch tube, an eleventh resistor and a twelfth resistor, the gate of the fifth switch tube is electrically connected with the second end of the twelfth resistor, the drain of the fifth switch tube is electrically connected with the second end of the eleventh resistor, the source of the fifth switch tube is grounded, the first end of the eleventh resistor is used for being electrically connected with a first power supply, and the first end of the twelfth resistor is used for receiving the fourth signal.

8. An electronic device, comprising: The transmitting control circuit comprises a transmitting circuit and the transmitting control circuit according to any one of claims 1-7, and the transmitting circuit is electrically connected with the switch module in the transmitting control circuit.

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