Semiconductor device

Abstract

The application provides a semiconductor device, comprising: a substrate having a first surface, the substrate having a first doping type; a doped region in the substrate, the doped region having a second surface in the first surface, the doped region comprising a plurality of first regions and a plurality of second regions one-to-one corresponding, the first regions and the second regions being arranged at intervals, the first regions and the second regions having a first projection and a second projection respectively on the first surface, the second projection surrounding the first projection, the second projection being discontinuous along the circumferential direction, the plurality of second projections being in contact with each other, the doped region having a second doping type; an anode metal layer covering the doped region and the substrate, the anode metal layer forming an ohmic contact with at least part of the first regions, the anode metal layer forming a Schottky contact with the substrate; and a cathode metal layer on a side of the substrate away from the doped region, so as to solve the problem that the prior art semiconductor device cannot simultaneously have high surge capacity and low on-state voltage drop.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor, in particular to a semiconductor device. BACKGROUND

[0002] Compared with the traditional PiN diode, the Schottky diode has lower on-state voltage drop, and as a unipolar device, the Schottky diode has higher switching frequency, shorter reverse recovery time and lower turn-on loss. Silicon carbide is a wide band gap material, and its critical breakdown field is 8-10 times higher than that of silicon. Therefore, compared with silicon-based devices, silicon carbide devices can withstand higher voltage, and silicon carbide high-voltage devices can be realized by a high-doped thin drift layer, thereby reducing the on-state resistance of the device by several orders of magnitude. However, the Schottky diode will increase the reverse leakage current due to the reduction of the Schottky barrier under high reverse bias, and has low surge resistance.

[0003] The above information disclosed in the background section is only used to enhance the understanding of the background of the technology described herein, therefore, the background section can include some information that is not known to those skilled in the art as prior art in the country. SUMMARY

[0004] The main purpose of the present application is to provide a semiconductor device to solve the problem that the semiconductor device in the prior art cannot simultaneously have high surge capacity and low on-state voltage drop.

[0005] In order to achieve the above-mentioned purpose, according to one aspect of the present application, a semiconductor device is provided, comprising: a substrate having a first surface, the substrate having a first doping type; a doped region located in the substrate, the doped region having a second surface located in the first surface, the doped region comprising a plurality of first regions and a plurality of second regions in one-to-one correspondence, the first regions and the second regions being arranged in intervals, the first regions and the second regions having first projections and second projections on the first surface respectively, the second projections surrounding the first projections, the second projections being discontinuous along the circumferential direction, the second projections being in contact with each other, the doped region having a second doping type; an anode metal layer covering the doped region and the substrate, the anode metal layer forming ohmic contact with at least part of the first regions, the anode metal layer forming Schottky contact with the substrate; a cathode metal layer located on the side of the substrate away from the doped region.

[0006] Optionally, at least one of the first regions surrounds a third region of the substrate corresponding to the shape thereof.

[0007] Optionally, one of the first regions located at a center position of the doped region is a first target region, and the remaining first regions are second target regions, the second target regions being arranged around the periphery of the first target region, and the first target region is arranged around a third region of the substrate corresponding to the shape of the first target region.

[0008] Optionally, one of the first regions located at a center position of the doped region is a first target region, and the remaining first regions are second target regions, the second target regions being arranged around the periphery of the first target region, and the first target region is arranged around a third region of the substrate corresponding to the shape of the first target region.

[0009] Optionally, the shapes of the closed figures formed by the first projections and the second projections correspond to each other.

[0010] Optionally, the second regions include a plurality of second sub-regions arranged at intervals, the plurality of second sub-regions being arranged around the first regions, and the distances between adjacent second sub-regions in the same second region are equal.

[0011] Optionally, the second regions and the first regions have a fourth region of the substrate therebetween, a ray defined with a center point of the first region as an end point being a target ray, and the widths of the fourth regions in the extension directions of any target rays are equal.

[0012] Optionally, the first regions not arranged around the third regions of the substrate have a first width in the extension directions of any target rays, the fourth regions have a second width in the extension directions of any target rays, and the first width is greater than the second width.

[0013] Optionally, a ray defined with a center point of the first region as an end point is a target ray, the first regions not arranged around the third regions have a first width in the extension directions of any target rays, the first regions arranged around the third regions have a third width in the extension directions of any target rays, and the first width is greater than half of the third width.

[0014] Optionally, the second regions and the first regions have a fourth region of the substrate therebetween, a ray defined with a center point of the first region as an end point being a target ray, the third regions have a fourth width in the extension directions of any target rays, and the fourth regions have a fifth width in the extension directions of any target rays, and the fourth width is half of the fifth width.

[0015] The technical scheme is applied to the semiconductor device, a doped region with a first region and a second region is arranged in the substrate of the semiconductor device, the second region surrounds the first region, and the first region and the second region have a spacing, so that the second region can form effective electric field shielding for a Schottky barrier of a Schottky junction generated by the anode metal layer and the substrate between the first region and the second region, the second region has a second projection which is discontinuous in the circumferential direction, and the substrate between adjacent sub-regions in the second region has a part of the opposite doping type, and the adjacent sub-regions can also cooperatively form effective electric field shielding for a Schottky barrier of a Schottky junction generated by the anode metal layer and the substrate between the adjacent sub-regions, so as to reduce the electric field intensity of the Schottky contact region, thereby reducing the reverse leakage current and improving the withstand voltage capability. The anode metal layer can also form an ohmic contact with at least part of the first region, so that the device can withstand higher current flow and improve the surge capability, and the anode metal layer and the substrate can also form a Schottky contact, so that the on-voltage drop of the device can also be reduced. The combination of the ohmic contact and the Schottky contact enables the semiconductor device to have both surge resistance and low on-voltage drop, solving the problem that the semiconductor device in the prior art cannot simultaneously have high surge capability and low on-voltage drop. BRIEF DESCRIPTION OF DRAWINGS

[0016] The drawings accompanying the specification of the present application form a part thereof, serve to provide further understanding of the present application, and together with the specification explain the illustrative embodiments of the present application, and do not constitute an improper limitation on the present application. In the drawings:

[0017] Figure 1 A top view structural schematic diagram of a first semiconductor device according to an embodiment of the present application is shown;

[0018] Figure 2 A top view structural schematic diagram of a second semiconductor device according to an embodiment of the present application is shown;

[0019] Figure 3 A top view structural schematic diagram of a third semiconductor device according to an embodiment of the present application is shown;

[0020] Figure 4 A cross-sectional view of the semiconductor device along the A-A' direction is shown in Figure 1

[0021] A cross-sectional view of the semiconductor device along the B-B' direction is shown in Figure 5 Figure 1 A cross-sectional view of the semiconductor device along the C-C' direction is shown in

[0022] Figure 6 Figure 2 A cross-sectional view of the semiconductor device along the C-C' direction is shown in

[0023] Figure 7 A cross-sectional view of the semiconductor device along the C-C' direction is shown in Figure 2 ​​A cross-sectional view of the semiconductor device along the D-D' direction;

[0024] Figure 8 A top view structural schematic diagram of a fourth semiconductor device according to an embodiment of the present application is shown;

[0025] Figure 9 A top view structural schematic diagram of a fifth semiconductor device according to an embodiment of the present application is shown;

[0026] Figure 10 A top view structural schematic diagram of a sixth semiconductor device according to an embodiment of the present application is shown;

[0027] Figure 11 A top view structural schematic diagram of a seventh semiconductor device according to an embodiment of the present application is shown.

[0028] Wherein, the above-mentioned drawings include the following reference signs:

[0029] 10, substrate; 11, third region; 12, fourth region; 20, doped region; 21, first region; 22, second region; 221, second sub-region; 30, anode metal layer; 31, ohmic contact metal layer; 32, Schottky contact metal layer; 40, cathode metal layer. DETAILED DESCRIPTION

[0030] It should be noted that the following detailed description is merely exemplary in nature and is intended to provide further description of the application. Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs.

[0031] It is also important to note that the use of the term "or" in the context of this application is to be interpreted as inclusive, meaning one or more. In addition, it should also be noted that, as used in this specification and the appended claims, the singular forms "a," "an," and "the" include plural referents unless the context clearly indicates otherwise. Furthermore, it should be understood that the terms "comprise," "comprises," "comprising," and the like, when used in this specification and the appended claims, specify the presence of stated features, steps, operations, devices, components, and / or combinations thereof, but do not preclude the presence or addition of one or more other features, steps, operations, devices, components, and / or combinations thereof.

[0032] It should be noted that the terms "first", "second", and the like in the description and in the claims of the present application and the above-described drawings are used to distinguish similar objects and are not necessarily used to describe a particular sequential or chronological order. It should be understood that the data thus used can be interchanged, where appropriate, to present embodiments of the application herein described. Moreover, the terms "comprising" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product, or apparatus that includes a list of steps or units is not necessarily limited to those steps or units that are clearly listed, but can include other steps or units that are not clearly listed or inherent to such processes, methods, products, or apparatuses.

[0033] It should be understood that when an element such as a layer, film, region, or substrate is referred to as being "on" another element, it can be directly on the other element, or intervening elements can also be present. In addition, when an element is referred to as being "connected" or "coupled" to another element, it can be "directly connected" or "directly coupled" to the other element, or "connected" or "coupled" to the other element through a third element.

[0034] As introduced in the background, the prior art Schottky diode has the problem of low surge resistance due to the increase of reverse leakage current caused by the reduction of Schottky barrier under high reverse bias. To solve the problem that a semiconductor device cannot have both high surge capability and low on-state voltage drop, an embodiment of the present application provides a semiconductor device.

[0035] The technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application.

[0036] According to an aspect of the present application, a semiconductor device is provided, as shown in the drawings, comprising: Figures 1 to 7 As shown, comprising: a substrate 10 having a first surface, the substrate 10 having a first doping type; a doped region 20 located in the substrate 10, the doped region 20 having a second surface located in the first surface, the doped region 20 comprising a plurality of first regions 21 and a plurality of second regions 22 in one-to-one correspondence, the first regions 21 and the second regions 22 being arranged at intervals, the first regions 21 and the second regions 22 having a first projection and a second projection on the first surface respectively, the second projection surrounding the first projection, the second projection being discontinuous along its circumferential direction, the plurality of second projections being in contact with each other, the doped region 20 having a second doping type; an anode metal layer 30 covering the doped region 20 and the substrate 10, the anode metal layer 30 forming an ohmic contact with at least part of the first regions, the anode metal layer 30 forming a Schottky contact with the substrate 10; a cathode metal layer 40 located on a side of the substrate 10 away from the doped region 20.

[0037] By providing a doped region with a first region and a second region in the substrate of the semiconductor device, wherein the second region surrounds the first region, and there is a gap between the first region and the second region, under a reverse bias, the depletion layer of the second region expands to cover the Schottky contact region between the first region and the second region, so that the second region can form an effective electric field shielding for the Schottky barrier of the Schottky junction generated by the anode metal layer and the substrate between the first region and the second region, and the second projection of the second region is discontinuous in the circumferential direction, and there is a partially doped type opposite substrate between adjacent sub-regions in the second region, and adjacent sub-regions can also cooperate to form an effective electric field shielding for the Schottky barrier of the Schottky junction generated by the anode metal layer and the substrate between adjacent sub-regions, reducing the electric field strength of the Schottky contact region, thereby reducing the reverse leakage current and improving the withstand voltage capability. The anode metal layer can also form an ohmic contact with at least part of the first region, which can enable the device to withstand higher current flow and improve surge capacity, and the anode metal layer and the substrate can also form a Schottky contact, which can also reduce the on-state voltage drop of the device. The combination of ohmic contact and Schottky contact enables the semiconductor device to have both surge resistance and low on-state voltage drop, solving the problem that the prior art semiconductor device cannot have both high surge capacity and low on-state voltage drop.

[0038] In the above embodiment, the substrate includes a substrate and an epitaxial layer, and the epitaxial layer is located on one side of the substrate, and the doped region is located in the epitaxial layer. The materials of the substrate and the epitaxial layer can be silicon carbide, which has excellent high-temperature performance and high breakdown field strength, which can enable the device to withstand higher voltage. The first surface of the substrate is the front surface of the device, which is used to make the doped region, ohmic contact and Schottky contact. The first doping type can be N-type, forming an N-type silicon carbide substrate as the main source of electron carriers throughout the device, which can provide sufficient electrons to form a Schottky contact. The doping material can be a pentavalent element including phosphorus (P), arsenic (As) and antimony (Sb), etc. The first doping type can also be P-type, and the doping material can be a trivalent element including boron (B), aluminum (Al), gallium (Ga) and indium (In), etc. The doping concentration of the substrate is 1.0e 16 cm -3 .

[0039] In the above embodiment, the doping type of the doped region is opposite to the doping type of the substrate, such as the doping type of the substrate is N-type and the doping type of the doped layer is P-type, or the doping type of the substrate is P-type and the doping type of the doped layer is N-type. The doping material of the doped region is the same as the doping material of the substrate. The doping concentration of the doped region is 2.0e 15 cm -3 .

[0040] In the above embodiment, as shown in Figures 4 to 7 , wherein, Figure 4For Figure 1 A cross-sectional view in the A-A' direction, Figure 5 For Figure 1 A cross-sectional view in the B-B' direction, Figure 6 For Figure 2 A cross-sectional view in the C-C' direction, Figure 7 For Figure 2 A cross-sectional view in the D-D' direction, the anode metal layer 30 includes an ohmic contact metal layer 31 and a Schottky contact metal layer 32, the ohmic contact metal layer 31 forms a stable ohmic contact with the doped region 20, ensuring that the device can conduct current when working in the forward direction, the Schottky contact metal layer 32 forms a Schottky contact with the substrate 10, which reduces the forward conduction voltage drop of the device and reduces power consumption. The material of the ohmic contact metal layer 31 can be aluminum (Al), gold (Au), titanium (Ti), nickel (Ni, platinum (Pt) and molybdenum (Mo). The material of the Schottky contact metal layer 32 can be platinum (Pt), titanium (Ti), aluminum (Al), gold (Au) and silver (Ag). The material of the ohmic contact metal layer and the Schottky contact metal layer is not limited to this.

[0041] In the above embodiment, the cathode metal layer is located on the side of the substrate away from the doped region, which is the back of the device, for forming a stable ohmic contact, facilitating the import and export of current. In this embodiment, the cathode metal layer needs to cover the entire back of the substrate to ensure that when the device is working in the forward direction, the current can be uniformly distributed in the substrate, thereby avoiding local current density too high causing thermal damage and reliability reduction. The material of the cathode metal layer can be aluminum (Al), gold (Au), titanium (Ti), nickel (Ni, platinum (Pt) and molybdenum (Mo).

[0042] In some optional embodiments, as shown in Figure 1 , at least one first region 21 surrounds a third region 11 of the substrate 10 corresponding to its shape. For example, the shape of the first region 21 is circular, and the shape of the third region 11 of the substrate 10 surrounded by the first region 21 is also circular, the shape of the first region 21 is hexagonal, and the shape of the third region 11 of the substrate 10 surrounded by the first region 21 is also hexagonal, which can better match the shape of the Schottky contact between the first region 21 and the metal and the ohmic contact between the third region 11 and the metal, making the electric field distribution more uniform. The first region 21 can be solid or have a hollow structure in the middle, when all the first regions 21 surround the third region 11 of the substrate 10, i.e. the first region 21 is a hollow structure, as shown in Figure 1 and Figure 2 , the semiconductor device is a junction barrier Schottky diode (JBS), if not all the first regions 21 surround the third region 11 of the substrate 10, as shown in Figures 2 to 3As shown, the semiconductor device is a hybrid Pin Schottky diode (MPS). This increases the Schottky contact of the semiconductor device, which can reduce the current density of the entire device when the PN junction is fully turned on, improve the reliability of the device, and increase the proportion of Schottky contact to reduce the forward conduction voltage drop of the device and reduce power consumption.

[0043] The principle of increasing the Schottky contact to enhance the surge capacity of the device is as follows: The current of the PN junction is mainly formed by the diffusion of the majority carriers, and its expression follows the Shockley diode equation: where I is the current through the diode, I S is the reverse saturation current, V D is the forward voltage applied to the diode, n is the emission coefficient or ideal factor, V T is the thermal voltage; increasing the PN junction area will linearly increase the forward current, thereby enhancing the current-carrying and surge capacity of the device, and the PN junction is easier to turn on.

[0044] In the above optional embodiments, as shown in Figure 8 and Figure 9 , the second projection of the second region 22 is a closed figure surrounding the outer periphery of the first region 21. If the projection of the first region on the first surface is circular, the second projection of the second region 22 is a ring shape surrounding the first region, if the projection of the first region on the first surface is a hexagon, the second projection of the second region 22 is a hexagonal ring shape surrounding the first region, and if the projection of the first region on the first surface is a square, the second projection of the second region 22 is a square ring shape surrounding the first region. The second projection of the second region 22 forms a closed figure surrounding the outer periphery of the first region 21, and in the case of reverse bias of the device, the second region 22 can more comprehensively shield the Schottky barrier of the Schottky junction formed between the first region 21 and the second region 22, further enhancing the electric field shielding effect, reducing the reverse leakage current, and improving the reverse voltage performance of the device.

[0045] In some optional embodiments, as shown in Figure 3 and Figure 9 , a first region 21 located at the center of the doped region 20 is a first target region, and the remaining first regions 21 are second target regions, the second target regions surround the outer periphery of the first target region corresponding to their shape, and the first target region surrounds the third region 11 of the substrate. In the first target region, there is part of the third region 11 of the substrate 10 opposite to the doping type of the first target region, and the anode metal layer has a Schottky contact with the third region 11, which can increase the area of the Schottky contact on the basis of the original, and under the premise that the semiconductor device has high surge resistance due to the Ohmic contact, the device also reduces the conduction voltage drop due to the increase in the area of the Schottky contact.

[0046] In some alternative implementations, such as Figure 3 , Figures 9 to 11 As shown, a first region 21 located at the center of the doped region 20 is a first target region, and the remaining multiple first regions 21 are second target regions. The shape of the first projection of the second target region is at least one of the following: polygonal and circular. The second target region of the first region 21 can be a solid structure, such as... Figure 3 , Figures 10 to 11 As shown, the first region 21 can all be solid structures. If the projection of the second target region on the first surface is a polygon, then the shape of the second projection of the second region corresponding to the second target region on the first surface is also a polygon. If the projection of the second target region on the first surface is a circle, then the shape of the second projection of the second region corresponding to the second target region on the first surface is also a circle. The shapes of the second target region and the second region match, which allows the depletion layer of the second target region and the second region to expand under reverse bias, completely covering the Schottky contact area between the second target region and the second region. In this way, the second target region and the second region can work together to form an effective electric field shield for the Schottky barrier of the Schottky junction generated between the anode metal layer and the substrate located between the second target region and the second region, reducing the electric field strength of the Schottky contact area, thereby reducing the reverse leakage current and improving the withstand voltage.

[0047] In the above optional embodiments, if the projection of the second target region on the first surface is a polygon, such as a hexagon, etc. Figures 1 to 3 , Figure 8 and Figure 9 As shown, the structure of the doped region 20 is a honeycomb structure. If the second target region is a square, as shown... Figure 10 As shown, the structure of the doped region 20 is a matrix structure, and the second region 22 is discontinuous. An additional second region can also be continuous (not shown). If the second target region is circular, as... Figure 11 As shown, the structure of the doped region 20 is similar to a honeycomb structure, and the second region 22 is continuous. Additional second regions may also be discontinuous (not shown). This application does not specifically limit the structural morphology of the doped regions.

[0048] In some alternative implementations, such as Figures 1 to 3 and Figures 8 to 11As shown, the shapes of the closed figures enclosed by the first projections and the second projections correspond to each other. In this way, the distance between the second region and the first region is equal everywhere, and the second region can form a more matched and effective electric field shielding for the Schottky barrier of the Schottky junction generated by the anode metal layer and the substrate located between the first region and the second region. Alternatively, the projection shape of the second region can be different from the projection shape of the first region, for example, the first projection is a hexagon and the second projection is a circle, the first projection is a circle and the second projection is a hexagon, and the specific shape combination can be selected according to actual conditions, which is not limited in the present application.

[0049] In some optional embodiments, as Figures 1 to 3 As shown, the second region includes a plurality of second sub-regions 221 arranged at intervals, and the plurality of second sub-regions 221 enclose the first region 21. The distance S1 between the plurality of adjacent second sub-regions 221 in the same second region 22 is equal. The substrate 10 with the opposite partial doping type between the second sub-regions 221 arranged at intervals has a Schottky contact with the anode metal layer. In the case that the device is under reverse bias, the depletion layer of the adjacent second sub-regions 221 expands and can cover the Schottky contact area between the adjacent second sub-regions 221. In this way, the adjacent second sub-regions 221 can cooperate to form an effective electric field shielding for the Schottky barrier of the Schottky junction generated by the anode metal layer and the substrate located between the adjacent second sub-regions 221, thereby reducing the reverse leakage current and improving the withstand voltage capability. Since the second sub-regions 221 are arranged at intervals and the substrate 10 with the opposite partial doping type between the adjacent second sub-regions 221 has a Schottky contact with the anode metal layer, the area of the Schottky contact of the whole device is further increased, which further reduces the on-resistance and improves the current flow capability of the device while ensuring the electric field shielding.

[0050] More specifically, as Figure 3 As shown, the distance S1 between the plurality of adjacent second sub-regions 221 in the same second region 22 is equal. Figure 3 In the case that the first region 21 is a regular hexagon, the shape of the second sub-region 221 needs to match the first region 21. Each second sub-region 221 has two extensions, and the contact between the two extensions has an angle close to the angle of each corner of the regular hexagon. The length of each extension is S2. The boundary of the second sub-region 221 needs to be flush with the corresponding corner of the center injection hexagon at least, and generally the boundary will exceed the corresponding corner (for example, Figure 3 In the case that the first region 21 is a regular hexagon, the shape of the second sub-region 221 needs to match the first region 21. Each second sub-region 221 has two extensions, and the contact between the two extensions has an angle close to the angle of each corner of the regular hexagon. The length of each extension is S2. The boundary of the second sub-region 221 needs to be flush with the corresponding corner of the center injection hexagon at least, and generally the boundary will exceed the corresponding corner (for example, Figure 3the length of the extension of the second sub-region 221 is set as S2, and the width of the depletion layer generated by the second sub-region 221 in the reverse bias can completely shield the Schottky junction between the two rings. The spacing between the adjacent second sub-regions 221 is reasonably set, and the width of the depletion layer generated by the adjacent second sub-regions 221 can shield the Schottky barrier between the adjacent second sub-regions 221 in the reverse bias. On the other hand, the spacing between the two second sub-regions 221 cannot exceed the upper limit. In the case where other conditions remain unchanged, the depletion layer between the two second sub-regions 221 can just cover the Schottky junction at the middle position, which is the upper limit of the spacing between the two second sub-regions 221. The spacing between the adjacent second sub-regions 221 needs to be calculated according to the actual situation, which is related to the injection concentration and dose of the second sub-region 221 and other factors. For example, the second sub-region 221 forms a PN junction with the substrate 10, and the width of the depletion region of the PN junction can be calculated according to the first formula: W = [2ε(V bi + V R ) / qN] 1 / 2 , where V b is the built-in potential, V R is the direction voltage, ε is the dielectric constant of the semiconductor material, q is the electronic charge, N is the injection concentration, and the width of the depletion layer between the two second sub-regions 221 is W. In other words, the spacing between the two second sub-regions 221 is 2W.

[0051] In the above optional embodiments, the injection conditions of the doped regions are generally the same, and the width of the depletion layer generated by the second region is also the same, so the distance between each adjacent second sub-region is basically the same. If the actual demand requires adjustment of the injection conditions of part of the second region, the distance between the adjacent second sub-regions of different second regions may be different, which can be determined according to the actual situation and has strong flexibility.

[0052] In some optional embodiments, as shown in Figure 3 , the second region and the first region 21 have a fourth region 12 of the substrate 10 therebetween, a ray defined with the center point of the first region 21 as an end point is a target ray, and the width S3 of the fourth region 12 in the extension direction of any target ray is equal. The second region surrounds the first region 21 at equal intervals, that is, the distance of the connecting line between the second region and the first region 21 in any direction is equal. The width S3 is reasonably set, so that the second region can completely cover the Schottky barrier of the fourth region 12. The width S3 can be calculated by referring to the above-mentioned first formula.

[0053] In some optional embodiments, as shown in Figure 2 and Figure 9As shown, the first region without the third region has a first width S4 in the extension direction of any target ray, and the fourth region has a second width S3 in the extension direction of any target ray, and the first width S4 is greater than the second width S3. The greater width of the P-type first region can provide a greater current flow path, thereby avoiding the concentration of current in the smaller fourth region, reducing the local current density, reducing the thermal effect and device loss, and improving the reliability of the device. Under reverse bias, the depletion layer of the P-type first region can also extend more effectively to the N-type fourth region, forming a wider electric field shielding area, thereby reducing the reverse leakage current and improving the voltage withstand capability of the device.

[0054] In some alternative embodiments, as shown in Figure 2 and Figure 9 As shown, the first region without the third region has a first width S4 in the extension direction of any target ray, and the fourth region has a second width S3 in the extension direction of any target ray, and the first width S4 is greater than the second width S3. The greater width of the P-type first region can provide a greater current flow path, thereby avoiding the concentration of current in the smaller fourth region, reducing the local current density, reducing the thermal effect and device loss, and improving the reliability of the device. Under reverse bias, the depletion layer of the P-type first region can also extend more effectively to the N-type fourth region, forming a wider electric field shielding area, thereby reducing the reverse leakage current and improving the voltage withstand capability of the device.

[0055] In some alternative embodiments, as shown in Figure 2 and Figure 9 As shown, the first region without the third region has a first width S4 in the extension direction of any target ray, and the fourth region has a second width S3 in the extension direction of any target ray, and the first width S4 is greater than the second width S3. The greater width of the P-type first region can provide a greater current flow path, thereby avoiding the concentration of current in the smaller fourth region, reducing the local current density, reducing the thermal effect and device loss, and improving the reliability of the device. Under reverse bias, the depletion layer of the P-type first region can also extend more effectively to the N-type fourth region, forming a wider electric field shielding area, thereby reducing the reverse leakage current and improving the voltage withstand capability of the device.

[0056] After testing the widths S1, S3 and S6, the widths can be less than or equal to 4 μm, in order to balance the higher surge resistance and lower on-state voltage drop.

[0057] Example 1

[0058] As shown in Figure 3 The ion implantation is performed on the N-type substrate 10 with a thickness of 5.5 μm to form the doped region 20, and the doping concentration of the substrate 10 is 1.0e16 cm-3 The total ion implantation dose was 1.1e15cm. -2 The width S2 of the second sub-region 221 of the doped region 20 is 2.25 μm, the distance S1 between multiple adjacent second sub-regions 221 is 3.0 μm, and the width S3 of the fourth region located between the first region 21 and the second sub-region 221 is 3.5 μm.

[0059] After forming the above structure, Ni metal is deposited on the doped region to form an ohmic contact metal layer with a thickness of 0.1 μm; Ti / Al metal is deposited on the undoped substrate and on the ohmic contact metal layer to form a Schottky contact metal layer with a thickness of 4.0 μm; Ti / Ni / Ag metal is deposited on the back side of the substrate to form a cathode metal layer with a thickness of 1.8 μm.

[0060] Example 2

[0061] like Figure 2 As shown, ion implantation was performed on an N-type substrate 10 with a thickness of 5.5 μm to form a doped region 20. The doping concentration of the substrate 10 was 1.0e16cm. -3 The total ion implantation dose was 1.1e15cm. -2 If a portion of the first region 21 is a solid structure, the width S4 of the first region 21 is 6 μm, and another portion of the first region 21 has a third region 11 with a portion of the base 10, the width S5 of the first region 21 is 1.25 μm, and the width S6 of the third region 11 is 3.5 μm.

[0062] After forming the above structure, Ni metal is deposited on the doped region to form an ohmic contact metal layer with a thickness of 0.1 μm; Ti / Al metal is deposited on the undoped substrate and on the ohmic contact metal layer to form a Schottky contact metal layer with a thickness of 4.0 μm; Ti / Ni / Ag metal is deposited on the back side of the substrate to form a cathode metal layer with a thickness of 1.8 μm.

[0063] According to the above embodiments of this application, the semiconductor device proposed in this application has the following technical effects:

[0064] 1) The semiconductor device of the present application is provided with a doped region having a first region and a second region in the substrate of the semiconductor device, wherein the second region surrounds the first region, and there is a gap between the first region and the second region, under a reverse bias, the depletion layer of the second region expands to cover the Schottky contact region between the first region and the second region, so that the second region can form an effective electric field shield for the Schottky barrier of the Schottky junction generated by the anode metal layer and the substrate between the first region and the second region, and the second region is not discontinuous in the circumferential direction, and there is a substrate with a partially opposite doping type between adjacent sub-regions in the second region, and adjacent sub-regions can also cooperatively form an effective electric field shield for the Schottky barrier of the Schottky junction generated by the anode metal layer and the substrate between adjacent sub-regions, reducing the electric field strength of the Schottky contact region, thereby reducing the reverse leakage current and improving the withstand voltage capability. The anode metal layer can also form an ohmic contact with at least part of the first region, which can enable the device to withstand higher current flow and improve the surge capability, and the anode metal layer and the substrate can also form a Schottky contact, which can also reduce the on-state voltage drop of the device. The combination of ohmic contact and Schottky contact enables the semiconductor device to have both surge resistance and low on-state voltage drop, solving the problem that semiconductor devices in the prior art cannot simultaneously have high surge capability and low on-state voltage drop.

[0065] 2) In the present application, the first region of the semiconductor device located in the middle surrounds the third region of the substrate, and the other first regions are all solid structures, which will increase the Schottky contact of the semiconductor device in the MPS diode, and the area of the Schottky contact can be increased on the basis of the original to reduce the current density of the entire device when the PN junction is fully turned on. Under the premise that the semiconductor device has high surge resistance due to the ohmic contact, the device also reduces the on-state voltage drop due to the increased area of the Schottky contact.

[0066] 3) In the present application, all the first regions of the semiconductor device are surrounded by the third region of the substrate, which will increase the area of the Schottky contact formed by the third region and the anode metal layer in the JBS diode, which can reduce the current density of the entire device when the PN junction is fully turned on, improve the reliability of the device, and at the same time, increase the proportion of the Schottky contact to reduce the on-state voltage drop of the device and reduce power consumption.

[0067] The technical features of the above embodiments can be combined in any way. To make the description concise, not all possible combinations of the technical features in the above embodiments are described, but as long as the combinations of the technical features do not exist, they should be considered as the scope of the present application.

[0068] The above descriptions are only the preferred embodiments of the present application, and are not intended to limit the present application. The present application can have various modifications and changes for those skilled in the art. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A semiconductor device, characterized in that, include: A substrate having a first surface, the substrate having a first doping type; A doped region is located in the substrate, the doped region having a second surface located in the first surface, the doped region including a plurality of corresponding first regions and a plurality of second regions, the first regions and the second regions being spaced apart, the first regions and the second regions having a first projection and a second projection on the first surface respectively, the second projection surrounding the first projection, the second projection being discontinuous along its circumference, the plurality of adjacent second projections being in contact with each other, the doped region having a second doping type; at least one first region surrounds a third region of the substrate corresponding to its shape; An anode metal layer covers the doped region and the substrate, the anode metal layer forming an ohmic contact with at least a portion of the first region, and the anode metal layer forming a Schottky contact with the substrate; A cathode metal layer is located on the side of the substrate opposite to the doped region.

2. The semiconductor device according to claim 1, characterized in that, One of the first regions located at the center of the doped region is a first target region, and the remaining multiple first regions are second target regions. The second target regions surround the outer periphery of the first target regions, and the first target regions surround a third region of the substrate corresponding to their shape.

3. The semiconductor device according to claim 1, characterized in that, One of the first regions located at the center of the doped region is a first target region, and the remaining plurality of the first regions are second target regions. The shape of the first projection of the second target region is at least one of the following: polygon and circle.

4. The semiconductor device according to any one of claims 1 to 3, characterized in that, The second projection includes a plurality of second sub-projections, with a partial base between adjacent second sub-projections. The plurality of adjacent second sub-projections in each second projection are connected by the partial base located between the plurality of adjacent second sub-projections and form a first closed shape. The shape of the second closed shape formed by the first projection corresponds to the shape of the first closed shape.

5. The semiconductor device according to claim 1, characterized in that, The second region includes multiple second sub-regions spaced apart, which enclose the first region. The distance between multiple adjacent second sub-regions within the same second region is equal.

6. The semiconductor device according to claim 1, characterized in that, A fourth region with the base is located between the second region and the first region. A ray with the center point of the first region as its endpoint is defined as a target ray. The width of the fourth region is equal in any direction in which the target ray extends.

7. The semiconductor device according to claim 6, characterized in that, The first region, which is not surrounded by the third region of the substrate, has a first width in any direction of extension of the target ray, and the fourth region has a second width in any direction of extension of the target ray, wherein the first width is greater than the second width.

8. The semiconductor device according to claim 1 or 2, characterized in that, A ray with the center point of the first region as its endpoint is defined as a target ray. The first region that does not enclose the third region has a first width in any direction of extension of the target ray, and the first region that encloses the third region has a third width in any direction of extension of the target ray. The first width is greater than half of the third width.

9. The semiconductor device according to claim 1 or 2, characterized in that, A fourth region with the base is located between the second region and the first region. A ray with the center point of the first region as its endpoint is defined as a target ray. The third region has a fourth width in any direction of extension of the target ray. The fourth region has a fifth width in any direction of extension of the target ray. The fourth width is half of the fifth width.

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