QFN chip packaging structure and method

By adopting the design of copper foil substrate array and microchannel network, the problems of heavy QFN packaging structure and low heat dissipation efficiency are solved, and lightweight, efficient heat dissipation and low-cost manufacturing are achieved, which is suitable for high-performance electronic products.

CN120786989APending Publication Date: 2025-10-14NINGBO JINSHENGXIN IMAGE TECH CO LTD
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Patent Information

Application Number
CN202510940552.9
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-07-09
Publication Date
2025-10-14

AI Technical Summary

Technical Problem

In the existing QFN packaging structure, the bottom substrate is thick and heavy, which is not conducive to lightweight and thinning. The heat dissipation efficiency is low, making it difficult to adapt to high heat load applications. In addition, the manufacturing cost is high, the flexibility is poor, and it is difficult to mass produce.

Method used

A copper foil substrate array is used as the bottom substrate, and a filling cavity and a microchannel network are set up. Combined with solidified thermal conductive insulation material and an elastic support layer, an efficient heat dissipation structure is formed, and production efficiency is improved through array processing.

Benefits of technology

It achieves lightweight and thinness while improving heat dissipation performance, reducing manufacturing costs, enhancing packaging reliability, adapting to mass manufacturing needs, and is suitable for high-performance electronic products.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention discloses a QFN (Quad Flat No-lead) chip packaging structure and method. The QFN chip packaging structure comprises a bottom substrate, a photosensitive chip, a sealing rubber ring, filter glass and a filling rubber ring, the bottom substrate is a packaging area in a copper foil substrate array, the substrate array comprises a plurality of packaging areas arranged in an array, a cutting line is arranged between every two adjacent packaging areas, a plurality of electric connection bonding pads are formed at the edge positions of the packaging areas, a filling cavity is formed in the middle of the bottom substrate, and the filling cavity is filled with a cured heat conduction insulating material; the photosensitive chip is fixedly arranged on the upper surface of the bottom substrate; the sealing rubber ring is arranged above the peripheral edge of the photosensitive area of the photosensitive chip; the filter glass is arranged above the sealing rubber ring in a covering manner; the filling rubber ring is arranged on the peripheries of the photosensitive chip, the sealing rubber ring and the light filtering glass in a surrounding mode, and the photosensitive chip, the light filtering glass, the sealing rubber ring and the bottom substrate are fixedly connected through the filling rubber ring. The thermal conductivity, the structural integrity and the batch manufacturing adaptability are synchronously improved.
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Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of chip packaging, in particular to a QFN chip packaging structure and method. BACKGROUND

[0002] With the development of electronic products towards high performance, miniaturization and integration, packaging technology has become an important link affecting the performance and reliability of chips. QFN (Quad Flat No-Lead) packaging gradually finds wide application in image sensors, communication modules, portable devices and other fields due to its excellent electrical performance, thermal performance and good cost-effectiveness.

[0003] In the traditional QFN packaging structure, the bottom substrate usually adopts a monolithic metal block or a PCB substrate. Such bottom substrates have the following disadvantages in terms of thickness, weight and heat dissipation efficiency:

[0004] 1. Thick and heavy are not conducive to thin and light applications: traditional metal substrates are difficult to meet the requirements of chip packaging lightweight and miniaturization;

[0005] 2. Limited heat dissipation path: the heat dissipation efficiency of ordinary PCB materials or monolithic metal blocks is relatively low, especially in heat-sensitive image sensor applications, heat accumulation may affect image quality and sensor life;

[0006] 3. High manufacturing cost and poor flexibility: the monolithic structure is not conducive to mass production and is difficult to adapt to the customization needs of various packaging sizes.

[0007] In order to solve the above problems, the existing technology gradually explores the use of copper foil substrate array as the bottom substrate for packaging. Copper foil has good thermal conductivity and electrical conductivity, and through patterning and structural design, the heat dissipation channel can be optimized, and through the array structure, the production efficiency can be improved and the manufacturing cost can be reduced.

[0008] However, the currently disclosed related packaging structure has not yet systematically utilized the cutting method of copper foil substrate array to prepare the bottom substrate, and there is still a lack of a QFN chip packaging solution that maintains thinness while considering high thermal conductivity, structural integrity and batch manufacturing adaptability. SUMMARY

[0009] In view of the deficiencies of the prior art, the purpose of the present application is to provide a QFN chip packaging structure and method for simultaneously improving thermal conductivity, structural integrity and batch manufacturing adaptability.

[0010] To achieve the above purpose, the present application provides the following technical solution: a QFN chip packaging structure, comprising: a bottom substrate, a photosensitive chip, a sealing rubber ring, a filter glass and a filling rubber ring;

[0011] The bottom substrate is a packaging area in a copper foil substrate array. The substrate array includes a plurality of packaging areas arranged in an array. A cutting line is provided between adjacent packaging areas. A plurality of electrical connection pads are formed at the edge of the packaging area. A filling cavity is provided in the middle of the bottom substrate. The filling cavity is filled with a solidified thermally conductive insulating material.

[0012] The photosensitive chip is fixedly arranged on the upper surface of the bottom substrate;

[0013] The sealing rubber ring is arranged above the peripheral edge of the photosensitive area of ​​the photosensitive chip;

[0014] The filter glass is covered and arranged above the sealing rubber ring;

[0015] The filling rubber ring is arranged around the periphery of the photosensitive chip, the sealing rubber ring and the filter glass, and fixedly connects the photosensitive chip, the filter glass, the sealing rubber ring and the bottom substrate.

[0016] Furthermore, a preformed microchannel network is provided in the filling cavity, and the microchannel network includes serpentine or grid-shaped grooves that are interconnected; the two ends of the microchannel network extend to the side edges of the bottom substrate to form an inlet and outlet for the cooling medium; and the solidified thermally conductive insulating material fills the cavity space outside the microchannel network.

[0017] Furthermore, the cross-section of the microchannel network is rectangular or trapezoidal, with a depth of 50-200 μm and a width of 100-500 μm;

[0018] The solidified thermally conductive insulating material is a high thermally conductive silicone grease or a metal particle reinforced epoxy resin. After being filled into the filling cavity, the solidified thermally conductive insulating material is in close contact with the microchannel network to form a solid-fluid two-phase composite cooling channel.

[0019] Furthermore, an annular elastic support layer is provided between the photosensitive chip and the bottom substrate, the upper surface of the elastic support layer is fixed to the bottom surface of the non-functional area of ​​the photosensitive chip, and the lower surface is fixed to the upper surface of the bottom substrate;

[0020] The solidified heat-conducting insulating material in the filling cavity protrudes upward to form a heat-conducting boss, and a gap of 10-50 μm is provided between the top surface of the heat-conducting boss and the bottom surface of the functional area of ​​the photosensitive chip.

[0021] Furthermore, the elastic support layer has a thickness of 0.2-0.5 mm and is made of silicone rubber or polyurethane elastomer with a Shore hardness of A30-A50;

[0022] The heat-conducting boss is integrally formed by solidified heat-conducting insulating material, the top flatness deviation is less than or equal to 5 microns, and the material is metal particle reinforced epoxy resin or ceramic filled silicone grease with a heat conductivity coefficient greater than or equal to 5 W / (m·K).

[0023] Further, the upper surface edge of the bottom substrate is provided with an annular stepped groove, and the annular stepped groove comprises:

[0024] An annular shallow groove on the inner side, with a depth of 0.1-0.3mm and a width covering the inner side edge of the pad to the filling glue ring mounting area;

[0025] An annular deep groove on the outer side, with a depth of 0.5-1.0mm and a metal shielding ring embedded in the groove;

[0026] The filling glue ring fills and covers the annular stepped groove, forming a mechanical interlocking structure.

[0027] Further, the top of the metal shielding ring is 0.05-0.15mm lower than the upper surface of the bottom substrate;

[0028] The lower part of the filling glue ring is embedded in the deep groove and covers the metal shielding ring, and the upper part extends to cover the annular shallow groove, forming a continuous sealing ring belt;

[0029] The groove wall of the annular shallow groove forms an inclination angle of 60°-85° with the horizontal plane, constituting a glue overflow flow guide surface.

[0030] Further, the sealing glue ring is made of transparent elastomer doped with fluorescent powder, and the bottom extends out a ring-shaped array of light guide teeth, which are inserted into the light guide holes on the edge of the light sensing chip;

[0031] The top of the sealing glue ring forms an annular reflective inclined surface with an angle of 45°±2°, which reflects the lateral incident light to the light entrance area of the filter glass.

[0032] Further, the height of the light guide tooth is 0.2-0.5mm, the diameter is 0.1-0.3mm, and the center-to-center distance between adjacent light guide teeth is 0.3-0.6mm;

[0033] The fluorescent powder is europium-activated silicate or nitride fluorescent powder, and the mass fraction in the sealing glue ring is 5%-20%;

[0034] The surface of the annular reflective inclined surface is covered with a metal reflective film with a reflectivity greater than or equal to 90%.

[0035] A QFN chip packaging method applied to the QFN chip packaging structure described above, comprising:

[0036] Step S1, providing a bottom substrate, wherein a filling cavity is communicated with the outside through a glue injection hole in the side edge of the bottom substrate, a molten heat-conducting insulating material is injected from the glue injection hole, and a heat-conducting filling body is formed by solidification in a vacuum environment;

[0037] Step S2, fixing the photosensitive chip on the upper surface of the bottom substrate, coating liquid sealant on the peripheral edge of the photosensitive region of the photosensitive chip, covering the filter glass, and then pressurizing and solidifying to form a sealant ring;

[0038] Step S3, coating molten filling glue on the periphery of the stack formed by the photosensitive chip, the filter glass and the sealant ring, so that the stack is covered, and a filling glue ring is formed after solidification, and the flash on the outside of the filling glue ring is cut off.

[0039] The beneficial effects of the present application are as follows:

[0040] The QFN chip packaging structure provided by the present application has the following significant technical effects and advantages compared with the prior art:

[0041] 1. The heat dissipation performance is significantly improved: the copper foil material itself has high thermal conductivity, and the middle part of the bottom substrate is filled with heat-conducting insulating material, which can effectively guide the heat generated during the operation of the chip to conduct outward, improve the heat management capability, and be suitable for high heat load application scenarios.

[0042] 2. The packaging structure is light, thin and compact: compared with the traditional thick and heavy metal block or multi-layer PCB structure, the bottom substrate formed by the copper foil array method has small thickness and light weight, which is more in line with the design requirements of miniaturization and light weight of current electronic products.

[0043] 3. Adapt to batch and low-cost manufacturing: by pre-dividing multiple packaging areas on the copper foil substrate and setting the cutting line, efficient array processing and unit packaging separation are realized, which helps to improve production efficiency and reduce manufacturing cost.

[0044] 4. Enhance the reliability of packaging: setting the filling cavity and using the solidified heat-conducting insulating material can help the synergistic effect of structural strength and thermal stress buffering, improve the stability and environmental interference resistance of packaging, and enhance the overall reliability.

[0045] 5. The protection design of the photosensitive performance is reasonable: the photosensitive chip and the filter glass are protected by the sealant ring and the filling glue ring, which ensures the stability of the optical performance and effectively isolates external impurities, moisture and other influencing factors.

[0046] In summary, the application realizes effective balance among high-efficiency heat dissipation, low-cost manufacturing and packaging reliability while maintaining compact and thin structure, and is suitable for electronic packaging applications with high performance and high integration. BRIEF DESCRIPTION OF DRAWINGS

[0047] Figure 1 is an exploded view of the QFN chip packaging structure in the application;

[0048] Figure 2 is a bottom view of the QFN chip packaging structure in the application;

[0049] Figure 3 is a planar structure diagram of the micro-channel network in the application;

[0050] Figure 4 is a side view of the elastic support layer and the heat-conducting boss in the application;

[0051] Figure 5 is a structure diagram of the annular stepped groove in the application;

[0052] Figure 6 is a step flow chart of the QFN chip packaging method in the application.

[0053] Reference signs: 1, bottom substrate; 2, photosensitive chip; 3, sealing rubber ring; 4, light filter glass; 5, filling rubber ring; 6, electrically connected pad; 8, micro-channel network; 9, elastic support layer; 10, heat-conducting boss; 11, annular stepped groove; 111, annular shallow groove; 112, annular deep groove; 12, metal shielding ring; 13, light guide tooth; 14, light guide hole; 15, annular reflection inclined surface; 16, filling cavity. DETAILED DESCRIPTION

[0054] The application will be further described in detail below in combination with the drawings and examples. Identical parts are denoted by identical reference signs. It should be noted that the words "front", "back", "left", "right", "up" and "down" used in the following description refer to the directions in the drawings, and the words "bottom surface" and "top surface", "inner" and "outer" refer to the directions towards or away from the geometric center of a specific part.

[0055] Example 1, refer to Figure 1 and Figure 2 , the first embodiment of the application provides a QFN chip packaging structure, which can significantly improve the heat dissipation efficiency while maintaining the overall structure of the package to be light and thin, comprising:

[0056] bottom substrate 1, photosensitive chip 2, sealing rubber ring 3, light filter glass 4 and filling rubber ring 5;

[0057] The bottom substrate 1 is one packaging area in a copper foil substrate array, the substrate array comprises a plurality of arrayed packaging areas, cutting lines are arranged between adjacent packaging areas, a plurality of electrical connection pads 6 are arranged at the edge position of the packaging area, and a filling cavity 16 is arranged in the middle of the bottom substrate 1, and the filling cavity 16 is filled with solidified heat-conducting insulating material;

[0058] The bottom substrate 1 is formed by cutting in a copper foil substrate array and belongs to one packaging unit area in a prefabricated array structure. A plurality of packaging areas in the array are arranged according to a preset arrangement, and laser or mechanical precision cutting lines are arranged between the packaging areas for later single segmentation. A plurality of electrical connection pads 6 are arranged at the edge of each packaging area for realizing welding connection with the photosensitive chip 2. A rectangular or special-shaped filling cavity 16 is arranged in the middle of the substrate, and the cavity is filled with solidified heat-conducting insulating material (such as heat-conducting epoxy resin or heat-conducting silica gel), which plays a role of heat conduction and electrical insulation.

[0059] The photosensitive chip 2 is fixedly arranged on the upper surface of the bottom substrate 1, the photosensitive chip 2 is fixedly arranged in the middle area of the upper surface of the bottom substrate 1 through heat-conducting insulating adhesive, the back surface of the chip is directly attached to the surface of the heat-conducting material of the filling cavity 16, and heat of the chip is conducted downward to the copper foil base and further radiated outward;

[0060] The sealing rubber ring 3 is arranged above the outer peripheral edge of the photosensitive region of the photosensitive chip 2, the sealing rubber ring 3 is made of thermosetting elastomer or silica rubber material, has the dual functions of sealing and buffering, and effectively isolates the chip from moisture, dust and other particulate matters in the external environment;

[0061] The light filtering glass 4 is arranged above the sealing rubber ring 3, the light filtering glass 4 is made of optical glass with excellent light transmission performance, can be additionally provided with a filter film layer according to requirements, realizes selective transmission of a specific waveband spectrum, and is suitable for different types of imaging scenes;

[0062] The filling rubber ring 5 is arranged around the outer periphery of the photosensitive chip 2, the sealing rubber ring 3 and the light filtering glass 4, and the photosensitive chip 2, the light filtering glass 4, the sealing rubber ring 3 and the bottom substrate 1 are fixedly connected, the filling rubber ring 5 is made of structural adhesive or low-modulus packaging adhesive, forms a stable support frame after solidification, realizes overall fixation of the upper structure, and provides mechanical protection.

[0063] The working principle of the embodiment 1 is as follows:

[0064] In the working process of the QFN chip packaging structure, the photosensitive chip 2 generates heat in the image acquisition or optical signal conversion process. Since the back surface of the chip is directly attached to the heat-conducting channel in the middle of the bottom substrate 1 through the heat-conducting insulating material, the heat first diffuses from the chip to the heat-conducting insulating material, and then is rapidly conducted to the external environment through the copper foil substrate, so that the high-efficiency heat dissipation process is completed.

[0065] The copper foil substrate can quickly discharge working heat due to its high thermal conductivity (generally more than 400 W / m·K), compared with traditional FR4 or aluminum substrate, effectively avoiding performance drift or shortening of service life caused by overheating of the chip.

[0066] Meanwhile, the substrate array structure can realize synchronous packaging of multiple chips in the process stage, and separate them through the cutting line at a later stage, which not only ensures the production efficiency, but also reduces the manufacturing cost. The optical glass 4 cooperates with the sealing structure to jointly ensure the optical purity and packaging reliability of the photosensitive area, and meets the demand for long-term stable operation in harsh environment.

[0067] Embodiment 2, refer to Figure 3 The second embodiment of the present application is different from the previous embodiment in that it provides a micro-channel network 8, which can greatly improve the heat management capability of the photosensitive chip 2, effectively reduce the working temperature of the photosensitive chip 2, slow down the accumulation of thermal noise, improve the image signal-to-noise ratio, and prolong the service life of the chip. It includes: a pre-formed micro-channel network 8 is arranged in the filling cavity 16, which is integrally formed in the substrate manufacturing stage (such as copper foil etching or laser processing), without the need for later installation or slotting, avoiding the destruction of the structural integrity;

[0068] The micro-channel network 8 includes serpentine or grid-shaped grooves that are in communication with each other, and the two ends thereof extend to the two side edges of the bottom substrate 1, respectively, and are correspondingly arranged as the inlet and outlet of the cooling fluid, so as to realize the flow of the cooling medium below the back of the chip;

[0069] The cured heat-conducting insulating material fills the cavity space outside the micro-channel network 8.

[0070] Preferably, the cross section of the micro-channel network 8 is rectangular or trapezoidal, with a depth of 50-200 μm and a width of 100-500 μm. This size interval takes into account: ensuring that the cooling fluid has good traffic capacity and preventing capillary action from hindering flow; limiting the occupation of the micro-channel to the chip mounting space, and maintaining the compactness of the overall package.

[0071] In the experiment, when the cooling flow rate is set to 0.5 mL / min and the pressure drop is kept below 10 kPa, it indicates that the cooling flow channel in this size interval has good flow performance and pressure loss control capability.

[0072] The cured heat-conducting insulating material is high-thermal-conductivity silicone grease (thermal conductivity > 1.5 W / m·K) or metal particle reinforced epoxy resin. After the cured heat-conducting insulating material is filled into the filling cavity 16, it is in close contact with the micro-channel network 8, forming a solid-liquid two-phase composite cooling channel. This material can realize close contact with the inner wall of the micro-channel network 8 during the filling process by adjusting the viscosity and fluidity, but will not penetrate into the micro-channel, so as to ensure that the fluid channel in the micro-channel remains unobstructed, and the overall solid-liquid two-phase composite cooling channel structure is formed.

[0073] Working principle of embodiment 2:

[0074] The heat generated by the photosensitive chip 2 during operation is first conducted downward to the filling cavity 16 area of the bottom substrate 1: the heat is preferentially conducted to the area below the microchannel network 8 through the high-thermal-conductivity solid-phase material in close contact with the back of the chip; at the same time, the liquid cooling medium (such as water or low-viscosity cooling oil) enters at a controlled rate from the cooling liquid inlet, flows along the serpentine or grid-shaped microchannels, and absorbs heat transferred by the heat-conductive material during the process; the heated cooling medium is discharged through the outlet, achieving heat dissipation; the entire structure realizes a synergistic mechanism of active liquid cooling (microchannels) + passive heat conduction (solid filling material), greatly improving the heat dissipation performance of the photosensitive chip 2.

[0075] Embodiment 3, refer to Figure 4 This is the second embodiment of the present application, which is different from the previous embodiment. This embodiment provides an elastic support layer 9 and a heat-conducting boss 10, which can realize the dual optimization of thermal management and mechanical protection of the functional area, wherein: an annular elastic support layer 9 is arranged between the photosensitive chip 2 and the bottom substrate 1, and the annular elastic support layer 9 has the following structural characteristics:

[0076] Shape and mounting method: the elastic support layer 9 is a closed annular structure, the upper surface of which is fixedly connected to the non-functional area at the bottom of the photosensitive chip 2, i.e. the edge area away from the photosensitive area, and the lower surface is adhered to the upper surface of the bottom substrate 1, playing a supporting and isolating role;

[0077] Material and size parameters: the thickness is controlled between 0.2mm and 0.5mm, taking into account the buffer capacity and structural space limitations; the material is selected to be silicone rubber or polyurethane elastomer with a Shore hardness of A30-A50, which has good elastic recovery and long-term stability.

[0078] Function realization: the elastic support layer 9 structure can effectively absorb mechanical impact and stress caused by thermal expansion and contraction in chip operation or packaging process, preventing the chip body or solder joints from being damaged or failing due to stress concentration in long-term work.

[0079] The solidified heat-conducting insulating material in the filling cavity 16 is upwardly protruded to form a heat-conducting boss 10, and the heat-conducting boss 10 has the following specific structure:

[0080] Position and function: the heat-conducting boss 10 is located at the center of the filling cavity 16 and is vertically aligned with the bottom of the functional area of the photosensitive chip 2;

[0081] Gap design: a non-contact gap of 10-50μm is pre-designed between the top of the heat-conducting boss 10 and the bottom surface of the functional area of the photosensitive chip 2, which fully considers the thermal expansion allowance, avoiding contact in actual operation and preventing the thermal resistance from rising sharply due to too large gap;

[0082] The boss material and shape control: the metal particle reinforced epoxy resin or ceramic filled silicone with thermal conductivity coefficient ≥ 5 W / (m·K) is selected as the material;

[0083] The heat-conducting boss 10 is integrally formed in the filling cavity 16, avoiding structural looseness or installation tolerance caused by separate structure (such as crimped heat sink);

[0084] The top flatness is controlled to be ≤ 5 μm, so as to ensure that uniform air gap heat transfer and heat radiation heat dissipation can be achieved in the non-contact state, avoiding local hot spots or non-uniform distribution of chip temperature.

[0085] Working principle of example 3:

[0086] When the photosensitive chip 2 is in working state, its bottom is cooled by two mechanisms:

[0087] Non-contact heat conduction mechanism: there is a fine air gap (10-50 μm) between the bottom of the functional area of the photosensitive chip 2 and the heat-conducting boss 10, in which air gap: heat radiation and gas molecule heat conduction are mainly used for heat dissipation, the air gap thermal resistance is limited by the gap size and flatness control, thereby maintaining a low thermal resistance, the boss is integrally connected to the bottom copper foil substrate, effectively guiding heat out of the chip body.

[0088] Stress absorption mechanism: the elastic support layer 9 forms a stable support after the chip is packaged, provides a flexible buffer zone when encountering external vibration or thermal stress changes, avoids solder cracking or chip warping, and at the same time ensures that the chip is always suspended at the optimal heat transfer position above the boss.

[0089] This embodiment is different from the traditional rigid bonding or contact heat dissipation design, and realizes the double optimization of heat management and mechanical protection of the functional area through the elastic ring support + non-contact heat-conducting boss 10;

[0090] The bottom of the chip functional area in this embodiment has no rigid contact, avoiding the risk of scratching and pressure damage; at the same time, efficient heat dissipation is realized, and the image quality and device life are improved;

[0091] This embodiment is particularly suitable for working environments with large vibration and frequent thermal cycling, such as vehicle-mounted cameras, outdoor monitoring, industrial detection imaging systems, etc.

[0092] Preferably, referring to Figure 5 , the upper surface edge of the bottom substrate 1 is provided with an annular stepped groove 11, and the annular stepped groove 11 comprises:

[0093] The inner annular shallow groove 111 has a depth of 0.1-0.3 mm and a width covering the inner edge of the pad to the mounting area of the filling rubber ring 5. The annular shallow groove 111 is used to accommodate the trace overflow during the rubber coating process of the filling rubber ring 5, and constitutes a physical barrier structure to effectively prevent the glue from flowing into the pad area and causing poor welding.

[0094] The outer annular deep groove 112 has a depth of 0.5-1.0 mm, and the groove is embedded with a metal shielding ring 12 made of copper-nickel plating, nickel-iron alloy or other metals with high electrical conductivity and high magnetic permeability. The deep groove structure provides stronger vertical peel strength and enhances the bonding force between the filling rubber ring 5 and the substrate.

[0095] The filling rubber ring 5 fills and covers the annular stepped groove 11 to form a mechanical interlocking structure.

[0096] Preferably, the top of the metal shielding ring 12 is 0.05-0.15 mm lower than the upper surface of the bottom substrate 1 to avoid interference with the chip or other packaging layers.

[0097] The lower part of the filling rubber ring 5 is embedded in the deep groove and covers the metal shielding ring 12, and the upper part extends to cover the shallow groove to form a continuous sealing ring.

[0098] The groove wall of the annular shallow groove 111 has an inclination angle of 60°-85° with the horizontal plane, which constitutes an overflow flow guide surface, helps to control the direction of glue flow, and guides the excess glue to the shallow groove instead of overflowing to the pad.

[0099] Specifically, in the filling rubber ring 5 installation and solidification process, the glue expands outward and preferentially enters the annular shallow groove 111. The inclined groove wall guides the stable flow of the glue and traps it. Even if there is a slight excess of glue, the overflow is physically limited in the annular shallow groove 111, avoiding contamination of the pad and improving the welding yield.

[0100] The lower part of the rubber ring tightly covers and embeds the metal shielding ring 12, and fills the deep groove to form a mechanical locking structure, which can effectively prevent the rubber ring from peeling, mispositioning, leakage and other failure problems during high-temperature aging or impact vibration.

[0101] The metal shielding ring 12 as a low-impedance closed-loop structure surrounds the key area of the photosensitive chip 2, and can effectively reflect or absorb external electromagnetic interference signals during high-frequency operation. The rubber ring and the metal ring are integrally coated to form an electromagnetic sealing layer, which significantly improves the EMI protection performance of the whole machine, and is suitable for application scenarios such as image systems and industrial sensing devices with high electromagnetic compatibility requirements.

[0102] Preferably, the sealing rubber ring 3 is made of transparent elastomer doped with fluorescent powder (such as modified silicone rubber or polyurethane gel), which has good light guiding and light diffusing properties; the fluorescent powder is europium (Eu) activated silicate or nitride fluorescent powder, which has excellent excitation efficiency and thermal stability; the mass fraction of the fluorescent powder is controlled at 5%-20%, which ensures the luminous brightness while taking into account the process operability; the photosensitive chip 2 can emit a weak light signal or internal excitation light (such as a status indicator LED or a laser) when it is working, the signal is guided into the sealing rubber ring 3 and excites the fluorescent powder to emit light, thereby forming a visual fluorescent ring of the device operating state; effectively replacing the external LED indication system, saving valuable packaging space.

[0103] The bottom of the sealing rubber ring 3 extends out a ring-shaped array of light guide teeth 13, which are inserted into the light guide holes 14 at the edge of the photosensitive chip 2; the height of the light guide teeth 13 is 0.2-0.5mm, the diameter is 0.1-0.3mm, and the center-to-center distance between adjacent light guide teeth 13 is 0.3-0.6mm, which ensures uniform light distribution; the material of the light guide teeth 13 is consistent with that of the main rubber ring. The light guide has a closed light energy transmission path with good light coupling characteristics, and the light signal receiving + conversion + light emitting process is linked with the working state of the chip;

[0104] Referring to Figure 4 , a 45°±2° ring-shaped reflective slope 15 is formed on the top periphery of the sealing rubber ring 3, and the slope is arranged towards the photosensitive area of the chip. The surface of the ring-shaped reflective slope 15 is coated with a layer of metal reflective film (such as aluminum, silver or aluminum-silver alloy), which has a light reflectivity of ≥90%, and the incident direction is lateral or transverse incident light (such as internal detection light or external environmental light), which is reflected by the ring-shaped reflective slope 15 and directed to the central light entrance area of the light filtering glass 4, thereby improving the lateral weak light collection efficiency.

[0105] Specifically, in this embodiment, when the photosensitive chip 2 is working, the light guide holes 14 at the edge thereof receive the weak light signal from the internal micro light source or the working state; the light guide teeth 13 act as light guide columns to transmit the signal into the sealing rubber ring 3, the doped fluorescent powder is excited to emit light, forming a ring-shaped fluorescent indication band, which is convenient for the naked eye to observe the running state of the device, and is especially suitable for occasions where the working indicator light cannot be seen in the micro package.

[0106] After the external or lateral light enters the slope area of the sealing rubber ring 3, it is adjusted in direction by the 45°±2° reflective slope and reflected to the central area of the light filtering glass 4; which can improve the light collecting ability of the photosensitive chip 2 to non-forward light sources and enhance the low-illumination response of image acquisition.

[0107] A QFN chip packaging method applied to the QFN chip packaging structure described above, referring to Figure 6 , comprising:

[0108] Step S1, providing a base substrate 1, wherein the central filling cavity 16 is connected to the outside through a glue injection hole on the side of the base substrate 1, and molten thermally conductive insulating material is injected from the glue injection hole and solidified in a vacuum environment to form a thermally conductive filling body;

[0109] Step S2, fixing the photosensitive chip 2 on the upper surface of the base substrate 1, applying liquid sealant to the peripheral edge of the photosensitive area of ​​the photosensitive chip 2, covering the filter glass 4 and then pressurizing and curing to form a sealing rubber ring 3;

[0110] Step S3, coating molten filling glue on the periphery of the stacked body formed by the photosensitive chip 2, the filter glass 4, and the sealing rubber ring 3 to cover the stacked body, and forming the filling rubber ring 5 after solidification, and cutting off the outer burr of the filling rubber ring 5.

[0111] The above are merely preferred embodiments of the present invention. The scope of protection of the present invention is not limited to the above embodiments. All technical solutions based on the principles of the present invention are within the scope of protection of the present invention. It should be noted that improvements and modifications that do not depart from the principles of the present invention are within the scope of protection of the present invention.

Claims

1. A QFN chip packaging structure, characterized in that: include: Bottom substrate (1), photosensitive chip (2), sealing rubber ring (3), filter glass (4) and filling rubber ring (5); The bottom substrate (1) is a packaging area in a copper foil substrate array, the substrate array comprises a plurality of packaging areas arranged in an array, cutting lines are provided between adjacent packaging areas, a plurality of electrical connection pads (6) are formed at the edge of the packaging area, a filling cavity (16) is provided in the middle of the bottom substrate (1), and the filling cavity (16) is filled with a solidified thermally conductive insulating material; The photosensitive chip (2) is fixedly arranged on the upper surface of the bottom substrate (1); The sealing rubber ring (3) is arranged above the peripheral edge of the photosensitive area of ​​the photosensitive chip (2); The filter glass (4) is arranged to cover the top of the sealing rubber ring (3); The filling rubber ring (5) is arranged around the periphery of the photosensitive chip (2), the sealing rubber ring (3) and the filter glass (4), and fixedly connects the photosensitive chip (2), the filter glass (4), the sealing rubber ring (3) and the bottom substrate (1).

2. The QFN chip packaging structure according to claim 1, wherein: A preformed microchannel network (8) is provided in the filling cavity (16), and the microchannel network (8) includes serpentine or grid-shaped grooves that are interconnected; both ends of the microchannel network (8) extend to the side edges of the bottom substrate (1) to form a cooling medium inlet and outlet; and the solidified thermally conductive insulating material is filled in the cavity space outside the microchannel network (8).

3. The QFN chip packaging structure according to claim 2, wherein: The cross section of the microchannel network (8) is rectangular or trapezoidal, with a depth of 50-200 μm and a width of 100-500 μm; The solidified heat-conducting insulating material is a high-heat-conducting silicone grease or a metal particle-reinforced epoxy resin. After the solidified heat-conducting insulating material is filled into the filling cavity (16), it comes into close contact with the microchannel network (8) to form a solid-fluid two-phase composite cooling channel.

4. The QFN chip packaging structure according to claim 1, wherein: An annular elastic support layer (9) is provided between the photosensitive chip (2) and the bottom substrate (1); the upper surface of the elastic support layer (9) is fixed to the bottom surface of the non-functional area of ​​the photosensitive chip (2), and the lower surface is fixed to the upper surface of the bottom substrate (1); The solidified heat-conducting insulating material in the filling cavity (16) protrudes upward to form a heat-conducting boss (10), and a gap of 10-50 μm is provided between the top surface of the heat-conducting boss (10) and the bottom surface of the functional area of ​​the photosensitive chip (2).

5. The QFN chip packaging structure according to claim 4, wherein: The elastic support layer (9) has a thickness of 0.2-0.5 mm and is made of silicone rubber or polyurethane elastomer with a Shore hardness of A30-A50; The heat-conducting boss (10) is integrally formed from a solidified heat-conducting insulating material, the top flatness deviation of which is ≤5 μm, and the material is a metal particle reinforced epoxy resin or ceramic-filled silicone grease with a thermal conductivity of ≥5 W / (m·K).

6. The QFN chip packaging structure according to claim 1, wherein: An annular stepped groove (11) is provided on the edge of the upper surface of the bottom substrate (1), and the annular stepped groove (11) comprises: The inner annular shallow groove (111) has a depth of 0.1-0.3 mm and a width covering the inner edge of the pad to the installation area of ​​the filling rubber ring (5); The outer annular deep groove (112) has a depth of 0.5-1.0 mm, and a metal shielding ring (12) is embedded in the groove; The filling rubber ring (5) fills and covers the annular stepped groove (11) to form a mechanical interlocking structure.

7. The QFN chip packaging structure according to claim 6, wherein: The top of the metal shielding ring (12) is 0.05-0.15 mm lower than the upper surface of the bottom substrate (1); The lower portion of the filling rubber ring (5) is embedded in the deep groove and covers the metal shielding ring (12), and the upper portion extends to cover the annular shallow groove (111), forming a continuous sealing ring belt; The groove wall of the annular shallow groove (111) is inclined at an angle of 60° to 85° with the horizontal plane, forming an overflow glue guide surface.

8. The QFN chip packaging structure according to claim 1, wherein: The sealing rubber ring (3) is made of a transparent elastic body doped with fluorescent powder, and light guide teeth (13) distributed in a ring array extend from the bottom thereof, and the light guide teeth (13) are inserted into the light guide holes (14) at the edge of the photosensitive chip (2); The top of the sealing rubber ring (3) forms a 45°±2° annular reflection bevel (15), and the annular reflection bevel (15) reflects the side incident light to the light incident area of ​​the filter glass (4).

9. The QFN chip packaging structure according to claim 8, wherein: The light guide teeth (13) have a height of 0.2-0.5 mm, a diameter of 0.1-0.3 mm, and a center distance between adjacent light guide teeth (13) of 0.3-0.6 mm; The phosphor is a europium-activated silicate or nitride phosphor, and its mass proportion in the sealing rubber ring (3) is 5%-20%; The surface of the annular reflective slope (15) is covered with a metal reflective film with a reflectivity of ≥90%.

10. A QFN chip packaging method, applied to the QFN chip packaging structure according to any one of claims 1 to 9, characterized in that: include: Step S1, providing a bottom substrate (1), wherein the central filling cavity (16) is connected to the outside through a glue injection hole on the side of the bottom substrate (1), and molten thermally conductive insulating material is injected from the glue injection hole and solidified in a vacuum environment to form a thermally conductive filling body; Step S2, fixing the photosensitive chip (2) on the upper surface of the bottom substrate (1), applying liquid sealant to the peripheral edge of the photosensitive area of ​​the photosensitive chip (2), covering the filter glass (4), and then pressurizing and curing to form a sealing rubber ring (3); Step S3, coating molten filling glue on the periphery of the stacked body formed by the photosensitive chip (2), the filter glass (4), and the sealing rubber ring (3) so as to cover the stacked body, forming a filling rubber ring (5) after solidification, and cutting off the outer burr of the filling rubber ring (5).