A data processing method, device, equipment and readable storage medium
By extending the Cacheable Per I/O feature in the NVMe command format and using read and write commands to determine cache tags and modes, the problem of NVMe device caching strategies being incompatible with diverse scenarios is solved. This enables efficient cache management of NVMe devices in different host applications and improves system performance.
Patent Information
- Application Number
- CN202511308473.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-09-15
- Publication Date
- 2026-01-27
- Estimated Expiration
- 2045-09-15
AI Technical Summary
Different caching algorithms in NVMe devices are incompatible with various scenarios, causing VWC to fail to achieve its maximum performance. Existing caching strategies cannot meet the diverse needs of different host applications.
By extending the Cacheable Per I/O feature in the NVMe command format, the data cache flag is determined using the command extension type field in the read and write commands. The cache mode is determined based on the cache flag, and the data to be processed is processed according to the matching cache strategy, thereby enabling the host to control the VWC behavior within the NVMe device.
This enables NVMe devices to be compatible with various scenarios, improves VWC caching efficiency, meets the caching needs of different host applications, and enhances overall system performance.
Smart Images

Figure CN120803375B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of storage technology, and in particular to a data processing method, apparatus, device, and readable storage medium. Background Technology
[0002] The NVMe (Non-Volatile Memory Express) controller achieves fast write response through VWC (Volatile Write Cache).
[0003] Because VWC has limited capacity and cannot store large amounts of data for a long time, it is necessary to implement a cache eviction algorithm and hot / cold data management. Hot data should be kept in the cache for as long as possible, and some data should be evicted to non-volatile media in a timely manner.
[0004] Different caching algorithms in NMVe devices are incompatible with various scenarios, preventing VWC from reaching its maximum performance.
[0005] In conclusion, how to effectively solve problems such as cached data management is a technical problem that urgently needs to be solved by those skilled in the art. Summary of the Invention
[0006] The purpose of this invention is to provide a data processing method, apparatus, device, and readable storage medium that enables the host to control the VWC behavior within an NVMe device, thereby allowing the NVMe device to be compatible with the needs of multiple scenarios and enabling VWC to achieve maximum performance.
[0007] To solve the above-mentioned technical problems, the present invention provides the following technical solution.
[0008] This invention provides a data processing method, comprising: receiving a read / write command sent by a host based on a non-volatile memory host controller interface protocol; determining a data cache tag for the data to be processed by using a command extension type field in the read / write command during the process of parsing the read / write command to determine the data to be processed; determining a cache mode corresponding to the data cache tag; processing the data to be processed according to a cache strategy matching the cache mode; and responding to the host.
[0009] Preferably, the data to be processed is processed according to a caching strategy matching the caching mode, and a response is sent to the host, including: when the caching mode is a forced caching mode, obtaining the cache hit status of the data to be processed; when the read / write command is a write command, if the data to be processed hits the cache completely, modifying the cached data and sending a response to the host that the data has been written; when the read / write command is a write command, if the data to be processed partially hits or misses the cache, forcibly requesting new cache space, writing the data to be processed into the cache space, and sending a response to the host that the data has been written; when the read / write command is a read command, if the data to be processed hits the cache completely, reading the data to be processed from the cache and sending a response to the host that the data to be processed is written; when the read / write command is a read command, if the data to be processed partially hits or misses the cache, forcibly requesting new cache space, moving the data to be processed from the non-volatile medium to the cache space, reading the data to be processed from the cache, and sending a response to the host that the data to be processed is written.
[0010] Preferably, forcibly requesting new cache space includes: determining whether the current cache is sufficient; if the cache is sufficient, requesting new cache space from the cache; if the cache is insufficient, evicting old data in the cache, and after evicting the old data, requesting new cache space from the cache.
[0011] Preferably, evicting old data from the cache includes deleting the oldest data written first in the cache.
[0012] Preferably, evicting old data in the cache includes: obtaining the most recently accessed timestamp of data in the cache; using the most recently accessed timestamp to determine the old data to be evicted; and deleting the old data from the cache.
[0013] Preferably, evicting old data in the cache includes: obtaining the access frequency of data in the cache; using the access frequency to determine old data to be evicted; and deleting the old data from the cache.
[0014] Preferably, processing the data to be processed according to a caching strategy matching the caching mode and responding to the host includes: when the caching mode is a bypass caching mode, bypassing the cache to process the data to be processed and responding to the host.
[0015] Preferably, bypassing the cache to process the data to be processed and responding to the host includes: when the read / write command is a write command, writing the data to be processed to a non-volatile medium and then sending a response to the host indicating that the data has been written; when the read / write command is a read command, reading the data to be processed from the non-volatile medium and sending a response to the host indicating that the data to be processed has been written.
[0016] Preferably, the data to be processed is processed according to a caching strategy matching the caching mode, and a response is sent to the host, including: when the caching mode is an attempt caching mode, obtaining the cache hit status of the data to be processed; when the read / write command is a write command, if the data to be processed fully hits the cache, modifying the cached data and sending a response to the host that the data has been written; when the read / write command is a write command, if the data to be processed partially hits or misses the cache, writing the data to be processed into non-volatile memory and sending a response to the host that the data has been written, and attempting to cache the cache again. The system attempts to request a new cache space and moves the data to be processed from the non-volatile medium to the cache space. If the read / write command is a read command and all the data to be processed hits the cache, the system reads the data to be processed from the cache and sends the data to be processed back to the host. If the read / write command is a read command and some of the data to be processed hits the cache or misses the cache, the system attempts to request a new cache space and moves the data to be processed from the non-volatile medium to the cache space. The system then reads the data to be processed from the non-volatile medium or the cache and sends the data to be processed back to the host.
[0017] Preferably, attempting to request new cache space includes: determining whether the current cache is sufficient; if the cache is sufficient, requesting new cache space from the cache; if the cache is insufficient, abandoning the request for new cache space.
[0018] Preferably, processing the data to be processed according to a caching strategy matching the caching mode and responding to the host includes: when the caching mode is the default mode, processing the data to be processed according to the default caching strategy and responding to the host.
[0019] Preferably, the data to be processed is processed according to a default caching strategy, including: caching the data to be processed according to a first-in-first-out (FIFO) principle.
[0020] Preferably, the data to be processed is processed according to a default caching strategy, including: obtaining the most recently accessed timestamp of the data to be processed; and caching the data to be processed according to the most recently accessed timestamp.
[0021] Preferably, the data to be processed is processed according to a default caching strategy, including: obtaining the access frequency of the data to be processed; and caching the data to be processed according to the access frequency.
[0022] Preferably, receiving read / write commands sent by the host based on the non-volatile memory host controller interface protocol includes: receiving read / write commands sent by the host according to the data caching requirements of the data to be processed; the data caching requirements correspond to the data caching tag, and the data caching tag is carried in the command extension type field of the read / write command.
[0023] Preferably, determining the data cache tag of the data to be processed using the command extension type field in the read / write command includes: reading the extension bit in the command extension type field to obtain the extension value; and determining the data cache tag corresponding to the extension value according to the mapping relationship between the extension value and the data cache tag.
[0024] Preferably, reading the extension bit in the command extension type field to obtain the extension value includes: reading the value in the command extension type field; if the value corresponds to enabling the cache customization function, then reading the extension bit from the command extension type field to obtain the extension value.
[0025] This invention provides a data processing apparatus, comprising: a command receiving module for receiving read / write commands sent by a host based on a non-volatile memory host controller interface protocol; a tag determination module for determining a data cache tag for the data to be processed using a command extension type field in the read / write command during the process of parsing the read / write command to determine the data to be processed; a mode determination module for determining a cache mode corresponding to the data cache tag; and a processing response module for processing the data to be processed according to a cache strategy matching the cache mode and responding to the host.
[0026] The present invention provides an electronic device, comprising: a memory for storing a computer program; and a processor for executing the computer program to implement the steps of the above-described data processing method.
[0027] The present invention provides a readable storage medium storing a computer program, which, when executed by a processor, implements the steps of the above-described data processing method.
[0028] The present invention provides a computer program product, including a computer program, which, when executed by a processor, implements the steps of any of the above-described data processing methods.
[0029] Using the method provided in this embodiment of the invention, a read / write command sent by the host based on the non-volatile memory host controller interface protocol is received; during the process of parsing the read / write command to determine the data to be processed, the data cache tag of the data to be processed is determined by using the command extension type field in the read / write command; the cache mode corresponding to the data cache tag is determined; the data to be processed is processed according to the cache strategy matching the cache mode, and a response is sent to the host.
[0030] In this invention, after receiving read / write commands sent by the host based on NVME, the read / write commands are parsed. During the parsing process to determine the data to be processed, the command extension type field in the read / write command is used to determine the data cache tag for that data. That is, when the host sends a read / write command, it includes the corresponding data cache tag. Based on the data cache tag, the corresponding caching mode can be determined. During the processing of the data to be processed, the caching strategy matching this caching mode is used to process the data, and a response is sent to the host. Since the host is the primary entity reading and writing data, its caching needs are most clearly defined. Processing the data based on the caching strategy corresponding to the cache data tag ensures that the caching effect better meets the host's caching requirements.
[0031] In other words, in this invention, the read and write commands sent by the host can control the VWC behavior within the NVMe device, thereby enabling the NVMe device to be compatible with the needs of multiple scenarios and allowing VWC to achieve maximum performance.
[0032] Accordingly, embodiments of the present invention also provide data processing apparatus, devices, readable storage media, and computer program products corresponding to the above-described data processing methods, which have the aforementioned technical effects, and will not be elaborated further here. Attached Figure Description
[0033] To more clearly illustrate the technical solutions in the embodiments of the present invention or related technologies, the drawings used in the description of the embodiments or related technologies will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0034] Figure 1 This is a flowchart illustrating an implementation of a data processing method according to an embodiment of the present invention;
[0035] Figure 2 This is a schematic diagram of data reading in an embodiment of the present invention;
[0036] Figure 3 This is a schematic diagram of data writing in an embodiment of the present invention;
[0037] Figure 4 This is a schematic diagram of the structure of a data processing device according to an embodiment of the present invention;
[0038] Figure 5 This is a schematic diagram of the structure of an electronic device according to an embodiment of the present invention;
[0039] Figure 6 This is a schematic diagram of the specific structure of an electronic device according to an embodiment of the present invention. Detailed Implementation
[0040] To enable those skilled in the art to better understand the present invention, the invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. Obviously, the described embodiments are merely some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0041] To facilitate understanding, the relevant technologies are explained below.
[0042] NVMe (Non-Volatile Memory Express) is a high-performance interface protocol for accessing non-volatile storage media, such as solid-state drives (SSDs). Designed specifically for SSDs, it features high performance (supporting multi-queue and high-concurrency operations, significantly improving data transfer speeds) and low latency (NVMe offers lower latency compared to the traditional SATA protocol).
[0043] VWC, short for Volatile Write Cache, is a caching mechanism within the storage controller primarily designed to improve data write performance. In the NVMe (Non-Volatile Memory Express) protocol, VWC resides in the controller's information structure, indicating whether the controller supports volatile write caching. When VWC is enabled, write operations are first cached in volatile storage, which speeds up writes and reduces write operations to non-volatile storage media, thus extending their lifespan.
[0044] NVMe Namespace: A namespace is a logical storage area that divides the non-volatile storage space of an NVMe device into multiple independent logical blocks. Each logical block can be formatted and presented as a standard block device. In Linux systems, each namespace typically appears as an independent block device.
[0045] The standard NVMe command format is shown in Table 1. Table 1 is a schematic table of a standard NVMe command format.
[0046] Table 1
[0047]
[0048] The NVMe TP4055 specification defines a Command Extension Type and a Command Extension Value. The extension type is located in the CDW13 field of the NVMe command, and the specific definition is shown in Table 2. Table 2 is a schematic table of CDW13 fields.
[0049] Table 2
[0050]
[0051] Among them, the CETYPE values for bits 19:16 are defined as shown in Table 3, which is a schematic table of CETYPE.
[0052] Table 3
[0053]
[0054] The NVMe controller achieves fast write response through VWC, which essentially uses volatile storage media (such as DRAM) as a high-speed cache layer. This allows the host to complete the operation directly through the cache when writing data, without waiting for the data to be persisted to non-volatile storage media (such as NAND flash memory). This mechanism significantly reduces write latency, especially in high-concurrency random write scenarios.
[0055] Because VWC has limited capacity and cannot store large amounts of data for a long time, it is necessary to implement a cache eviction algorithm and hot / cold data management. Hot data should be kept in the cache for as long as possible, while some data should be evicted to non-volatile media in a timely manner when the cache capacity is insufficient due to the limitation of cache size.
[0056] The LRU (Least Recently Used) algorithm assumes that recently accessed data is more likely to be accessed in the future, while data that has not been accessed for a long time is less likely to be accessed in the future. Therefore, when cached data is insufficient, the least recently accessed data is evicted first.
[0057] The LFU (Least Frequently Used) algorithm maintains a counter for how often data is accessed. When the cache space is insufficient, it prioritizes evicting data that is accessed least frequently.
[0058] The FIFO (First In First Out) algorithm maintains a first-in-first-out queue. When the cache space is insufficient, the cached data that entered the queue first is evicted first.
[0059] In NVMe devices, different caching algorithms are incompatible with various scenarios. For example, when an application repeatedly accesses large amounts of data, the LRU algorithm leads to frequent cache replacements, resulting in almost no cache hits and a decline in performance. In random access mode scenarios, LFU cannot effectively distinguish between hot and cold data, causing the cache to be replaced frequently and reducing the hit probability.
[0060] Different host applications have different caching strategy requirements. For example, database applications may require stricter data persistence guarantees, while streaming media applications may prioritize performance. If a device's caching algorithm cannot flexibly adapt to these diverse host application needs, it may fail to achieve the maximum performance of VWC.
[0061] In summary, considering the above factors and the existing NVMe command set specification, this invention proposes extending the VWC caching strategy to the host level. For details, please refer to... Figure 1 , Figure 1 This is a flowchart of a data processing method according to an embodiment of the present invention. The method can be applied to NVMe devices and includes the following steps.
[0062] S101. Receive read / write commands sent by the host based on the non-volatile memory host controller interface protocol.
[0063] When a host needs to write or read data from an NVMe device, it can send read or write commands based on the NVMe protocol. Specifically, the host can send read or write commands to the NVMe controller by submitting queue members.
[0064] In one specific embodiment of the present invention, receiving a read / write command sent by the receiving host based on the non-volatile memory host controller interface protocol includes: receiving a read / write command sent by the receiving host according to the data caching requirements of the data to be processed; the data caching requirements correspond to data caching tags, and the command extension type field of the read / write command carries the data caching tags.
[0065] Specifically, the host can send a command carrying a data cache tag to the NVMe device based on the specific caching requirements of the data to be processed corresponding to the current read / write command.
[0066] This data caching flag can be used to inform NVMe devices whether the data to be processed needs to be cached, and to what extent caching is required. For example, is it mandatory to cache, not required to cache, optional to cache, or does not specify caching requirements on the part of the host?
[0067] Specifically, the CETYPE field of CDW13 (command double word 13 in the NVMe protocol) in NVMe I / O read and write commands can be extended by defining the Cacheable Per I / O (CPIO) feature, thereby enabling the host to control the VWC behavior within the NVMe device. The specific extended command definition is shown in Table 4, which is a schematic table of the extended CETYPE.
[0068] Table 4
[0069]
[0070] In the I / O command, a CETYPE value of 2 in the CDW13 field indicates that Cacheable Per I / O capability is enabled. The specific meaning of CEV in CDW13 can be defined according to actual needs. For example, it can be defined as 00b for the default mode, 01b for the bypass caching mode, 10b for the forced caching mode, and 11b for the best-effort mode.
[0071] S102. In the process of parsing read and write commands to determine the data to be processed, the data cache mark of the data to be processed is determined by using the command extension type field in the read and write command.
[0072] After the NVMe device receives the read / write command sent by the host, it can parse the read / write command to determine the data to be processed, whether it is encrypted, and determine the key, etc.
[0073] It should be noted that in this embodiment, during the process of parsing read and write commands to determine the data to be processed, the data cache mark of the data to be processed needs to be determined by using the command extension type field in the read and write command.
[0074] This data cache tag indicates what type of caching processing the data to be processed needs to undergo. For example, whether caching is required, and if so, the caching strength.
[0075] In one specific embodiment of the present invention, the data cache mark of the data to be processed is determined by using the command extension type field in the read / write command, including: reading the extension bit in the command extension type field to obtain the extension value; and determining the data cache mark corresponding to the extension value according to the mapping relationship between the extension value and the data cache mark.
[0076] The process of reading the extension bit in the command extension type field to obtain the extension value includes: reading the value in the command extension type field; if the value corresponds to enabling the cache customization function, then reading the extension bit from the command extension type field to obtain the extension value.
[0077] For example, in an I / O command, a CETYPE value of 2 in the CDW13 field indicates that the Cacheable Per I / O feature is enabled, and the extended value of CEV in CDW13 corresponds to the data cache flag. If the CETYPE value in the CDW13 field is not 2 in an I / O command, it means that the Cacheable Per I / O feature is not enabled, and there is no need to read the extended value of CEV in CDW13; in this case, the default caching model can be used.
[0078] S103. Determine the cache mode corresponding to the data cache tag.
[0079] Data cache tags can be mapped to different cache modes. Different cache modes can have different data caching strategies, which can be set according to the actual situation. At least two cache modes can be set so that the corresponding cache mode can be used for different data.
[0080] For example, a data cache flag of 00b indicates that the cache mode is the default mode; a data cache flag of 01b indicates that the cache mode is the bypass cache mode; a data cache flag of 10b indicates that the cache mode is the forced cache mode; and a data cache flag of 11b indicates that the cache mode is the trial cache mode.
[0081] S104. Process the data to be processed according to the caching policy that matches the caching mode, and respond to the host.
[0082] Different caching modes can be configured with different caching strategies, and the specific settings of the caching strategy can vary depending on the actual business scenario.
[0083] Once the caching mode corresponding to the data to be processed is determined, the data can be processed according to the caching strategy matched by that caching mode, and a response can be sent to the host. If the read / write command is a read command, the response to the host can be the data read, which is the data to be processed. If the read / write command is a write command, the response to the host can be an acknowledgment that the data has been written, or an acknowledgment of write failure if the write operation fails.
[0084] In one specific embodiment of the present invention, the data to be processed is processed according to a caching strategy matching the caching mode, and a response is sent to the host. This includes: when the caching mode is a forced caching mode, obtaining the cache hit status of the data to be processed; when the read / write command is a write command, if all the data to be processed hits the cache, modifying the cached data and sending a response to the host indicating that the data has been written; when the read / write command is a write command, if some of the data to be processed hits the cache or misses the cache, forcibly requesting new cache space, writing the data to be processed into the cache space, and sending a response to the host indicating that the data has been written; when the read / write command is a read command, if all the data to be processed hits the cache, reading the data to be processed from the cache and sending a response to the host indicating that the data has been written; when the read / write command is a read command, if some of the data to be processed hits the cache or misses the cache, forcibly requesting new cache space, moving the data to be processed from the non-volatile medium to the cache space, reading the data to be processed from the cache, and sending a response to the host indicating that the data has been written.
[0085] For ease of description, the above steps will be combined below.
[0086] When the caching mode is forced caching mode, it means that the data to be processed must be cached. First, we can determine the cache hit status of the data to be processed.
[0087] If the read / write request is a write command and the cache hit status indicates that all pending data has been hit in the cache, then an acknowledgment that the data has been written can be sent to the host immediately after the cached data is modified. If the read / write request is a write command, but the pending data has not yet been fully hit in the cache, then a new cache space can be forcibly requested. After the pending data is written to the new cache space, an acknowledgment that the data has been written can be sent to the host to ensure that the data has been written to the cache.
[0088] If the read / write command is a read command and the entire data to be processed is cached, the data can be read directly from the cache and then fed back to the host. If the read / write command is a read command and the entire data to be processed is not cached, a new cache space can be forcibly requested. The data to be processed, located on non-volatile media, can then be moved to the cache space. The data can then be read from the cache and fed back to the host to ensure that the data is stored in the cache.
[0089] In one specific embodiment of the present invention, forcibly requesting new cache space includes: determining whether the current cache is sufficient; if the cache is sufficient, requesting new cache space from the cache; if the cache is insufficient, evicting old data in the cache, and after evicting the old data, requesting new cache space from the cache.
[0090] In other words, regardless of whether the current cache is sufficient, new cache space must be requested to store the data to be processed. When the cache is sufficient, new cache space is requested directly from the cache; when the cache is insufficient, old data in the cache must be evicted first, and after freeing up sufficient space, new cache space is requested from the cache.
[0091] In the event of insufficient cache space, this embodiment does not specify which old data eviction mechanism to use.
[0092] In one specific embodiment of this invention, evicting old data from the cache includes deleting the oldest data written to the cache. That is, the old data to be deleted from the cache can be determined based on a first-in, first-out (FIFO) approach.
[0093] In one specific embodiment of this invention, evicting old data from the cache includes: obtaining the most recently accessed timestamp of the data in the cache; using the most recently accessed timestamp to determine the old data to be evicted; and deleting the old data from the cache. That is, when evicting old data, it can be sorted based on the most recently accessed timestamp, and the data accessed most recently can be deleted.
[0094] In one specific embodiment of this invention, evicting old data from the cache includes: obtaining the access frequency of data in the cache; determining the old data to be evicted based on the access frequency; and deleting the old data from the cache. That is, when evicting old data, it can be sorted based on access frequency, and the data with the lowest access frequency can be deleted.
[0095] In one specific embodiment of this invention, the data to be processed is processed according to a caching strategy matching the caching mode, and a response is sent to the host. This includes: when the caching mode is a bypass caching mode, bypassing the cache to process the data to be processed and sending a response to the host. The bypass caching mode means bypassing the cache to read and write the data to be processed, thereby avoiding cache occupation. In other words, the bypass caching mode disables the caching mechanism for the data to be processed.
[0096] In one specific embodiment of the present invention, bypassing the cache to process the data to be processed and responding to the host includes: when the read / write command is a write command, writing the data to be processed to a non-volatile medium and then sending a response to the host that the data has been written; when the read / write command is a read command, reading the data to be processed from the non-volatile medium and sending a response to the host that the data to be processed has been written.
[0097] In other words, for reading and writing data, the cache is skipped directly, and data is written and read from non-volatile media without writing the data to be processed into the cache, thereby reducing the use of cache resources.
[0098] In one specific embodiment of the present invention, the data to be processed is processed according to a caching strategy matching the caching mode, and a response is sent to the host. This includes: when the caching mode is an attempt to cache, obtaining the cache hit status of the data to be processed; when the read / write command is a write command, if the data to be processed fully hits the cache, modifying the cached data and then sending a response to the host indicating that the data has been written; when the read / write command is a write command, if the data to be processed partially hits or misses the cache, writing the data to be processed into non-volatile memory and then sending a response to the host indicating that the data has been written. The system responds to the write operation and attempts to request new cache space, moving the data to be processed from the non-volatile medium to the cache space. If the read / write command is a read command, and all the data to be processed hits the cache, the system reads the data to be processed from the cache and sends the data back to the host. If the read / write command is a read command, and some of the data to be processed hits the cache or misses the cache, the system attempts to request new cache space, moves the data to be processed from the non-volatile medium to the cache space, reads the data to be processed from the non-volatile medium or the cache, and sends the data back to the host.
[0099] In other words, in the attempt caching mode (i.e., best-effort caching mode), when writing data, the controller will try its best to write the data to the cache. However, even if some or all of the data is not cached due to the controller's own algorithm or insufficient cache capacity, this controller behavior is in line with the host's expectations, and there is no need to forcibly request cache space. When reading data, if all data is hit, the data is read from the cache to the host. If there is a partial hit or a miss, the controller will try to request new cache space for the missed data and read the data from the non-volatile medium. If the space is insufficient, the controller behavior can refer to the bypass caching mode, which means reading the data to be processed from the non-volatile medium.
[0100] In one specific embodiment of the present invention, attempting to request new cache space includes: determining whether the current cache is sufficient; if the cache is sufficient, requesting new cache space from the cache; if the cache is insufficient, abandoning the request for new cache space.
[0101] In other words, when the cache is sufficient, new cache space can be requested, but when the cache is insufficient, there is no need to force the request for new cache space.
[0102] In one specific embodiment of the present invention, processing the data to be processed according to a caching strategy that matches the caching mode and responding to the host includes: when the caching mode is the default mode, processing the data to be processed according to the default caching strategy and responding to the host.
[0103] In the default mode, the host does not specify the caching requirements for the data to be processed. The controller in the NVMe can process the data according to the default caching policy and respond to the host. In this embodiment, there is no specific limitation on which algorithm is used for data caching management in the default caching policy.
[0104] In one specific embodiment of this invention, the data to be processed is processed according to a default caching strategy, including: caching the data to be processed according to a first-in-first-out (FIFO) algorithm. This algorithm maintains a first-in-first-out queue, and when cache space is insufficient, it prioritizes evicting the cached data that entered the queue first.
[0105] In one specific embodiment of this invention, the data to be processed is processed according to a default caching strategy, including: obtaining the most recently accessed timestamp of the data to be processed; and caching the data to be processed according to the most recently accessed timestamp. That is, caching is based on the LRU (Least Recently Used) algorithm, which assumes that recently accessed data has a higher probability of being accessed in the future, while data that has not been accessed for a long time has a lower probability of being accessed in the future. Therefore, when cached data is insufficient, the least recently accessed data is evicted first.
[0106] In one specific embodiment of the present invention, the data to be processed is processed according to the default caching strategy, including: obtaining the access frequency of the data to be processed; and caching the data to be processed according to the access frequency.
[0107] That is, caching is performed based on the LFU (Least Frequently Used) algorithm, which maintains a counter for the frequency of data access. When the cache space is insufficient, the least frequently accessed data is evicted first.
[0108] Using the method provided in this embodiment of the invention, a read / write command sent by the host based on the non-volatile memory host controller interface protocol is received; during the process of parsing the read / write command to determine the data to be processed, the data cache tag of the data to be processed is determined by using the command extension type field in the read / write command; the cache mode corresponding to the data cache tag is determined; the data to be processed is processed according to the cache strategy matching the cache mode, and a response is sent to the host.
[0109] In this invention, after receiving read / write commands sent by the host based on NVME, the read / write commands are parsed. During the parsing process to determine the data to be processed, the command extension type field in the read / write command is used to determine the data cache tag for that data. That is, when the host sends a read / write command, it includes the corresponding data cache tag. Based on the data cache tag, the corresponding caching mode can be determined. During the processing of the data to be processed, the caching strategy matching this caching mode is used to process the data, and a response is sent to the host. Since the host is the primary entity reading and writing data, its caching needs are most clearly defined. Processing the data based on the caching strategy corresponding to the cache data tag ensures that the caching effect better meets the host's caching requirements.
[0110] In other words, in this invention, the read and write commands sent by the host can control the VWC behavior within the NVMe device, thereby enabling the NVMe device to be compatible with the needs of multiple scenarios and allowing VWC to achieve maximum performance.
[0111] To facilitate those skilled in the art to better understand and implement the data processing method provided in the embodiments of the present invention, the data processing method will be described in detail below with reference to specific application scenarios.
[0112] When the host needs to read or write data, it acquires the characteristics of the data to be processed; based on these characteristics, it determines the caching requirements for the data; when generating read / write commands, based on these caching requirements, it expands the CETYPE field in the CDW13 field of the NVMe I / O command and assigns the corresponding expanded value in CEV according to the caching requirements. Because the host is more aware of the characteristics of the data to be processed, such as whether it is critical data or hot data, it can effectively distinguish whether subsequent accesses are frequent, which helps improve the caching command rate. For data with high reliability requirements, the NVMe controller can be controlled to skip caching, ensuring data consistency. Specifically, for the host, please refer to Table 5, which shows the correspondence between host scenarios and CPIO modes. Different CPIO (Cacheable Per I / O) configurations can be selected according to different scenarios.
[0113] Table 5
[0114]
[0115] Please refer to Figure 2The data processing method provided in this embodiment of the invention, and the process of reading data, includes: the host submits a read I / O command, and selects an extended value of CPIO according to the specific scenario of this I / O data; the value of the extended value can be referred to Table 5; the NVMe controller parses the command; the values of CETYPE and CEV are passed to the cache management module (cache linemgt); the controller uses different caching strategies according to the value of CEV to send the data to the host.
[0116] Please refer to Figure 3 The data processing method provided in this embodiment of the invention, and the process of writing data, includes: the host submits a write I / O command, and selects an extended value of CPIO according to the specific scenario of this I / O data; the value of the extended value can be referred to Table 5; the NVMe controller parses the command; the values of CETYPE and CEV are passed to the cache management module (cache linemgt); the controller processes the written data using different caching strategies according to the value of CEV and responds to the host.
[0117] By extending NVMe commands, a Cacheable Per I / O feature is defined, allowing for different caching strategies for each specific I / O operation, enabling the host to control the controller's internal cache. Specifically, the CPIO command is extended: the CETYPE field in the NVMe I / O command's CDW13 field is extended; a value of 2h indicates that the CPIO feature is enabled. The CPIO caching strategy defines different caching strategies for NVMe devices and different values for CEV in the I / O command's CDW13 field, such as default mode, bypass mode, forced mode, and best-effort mode.
[0118] The host can flexibly control the caching of specific data in the NVMe device according to different application scenarios and different levels of data popularity, thereby improving the utilization rate of the cache in the NVMe device, increasing its adaptability to different application scenarios, and improving the overall execution efficiency of the system.
[0119] Corresponding to the above method embodiments, this invention also provides a data processing apparatus, which can be referred to in correspondence with the data processing method described above.
[0120] See Figure 4 As shown, the device includes the following modules.
[0121] Command receiving module 101 is used to receive read and write commands sent by the host based on the non-volatile memory host controller interface protocol.
[0122] The tag determination module 102 is used to determine the data cache tag of the data to be processed by using the command extension type field in the read and write command during the process of parsing read and write commands to determine the data to be processed.
[0123] The mode determination module 103 is used to determine the cache mode corresponding to the data cache tag.
[0124] The response processing module 104 is used to process the data to be processed according to the caching strategy that matches the caching mode and respond to the host.
[0125] Using the apparatus provided in this embodiment of the invention, a read / write command is received from a host based on a non-volatile memory host controller interface protocol; during the process of parsing the read / write command to determine the data to be processed, the data cache tag of the data to be processed is determined using the command extension type field in the read / write command; a cache mode corresponding to the data cache tag is determined; the data to be processed is processed according to a cache strategy matching the cache mode, and a response is sent to the host.
[0126] In this invention, after receiving read / write commands sent by the host based on NVME, the read / write commands are parsed. During the parsing process to determine the data to be processed, the command extension type field in the read / write command is used to determine the data cache tag for that data. That is, when the host sends a read / write command, it includes the corresponding data cache tag. Based on the data cache tag, the corresponding caching mode can be determined. During the processing of the data to be processed, the caching strategy matching this caching mode is used to process the data, and a response is sent to the host. Since the host is the primary entity reading and writing data, its caching needs are most clearly defined. Processing the data based on the caching strategy corresponding to the cache data tag ensures that the caching effect better meets the host's caching requirements.
[0127] In other words, in this invention, the read and write commands sent by the host can control the VWC behavior within the NVMe device, thereby enabling the NVMe device to be compatible with the needs of multiple scenarios and allowing VWC to achieve maximum performance.
[0128] In one specific embodiment of the present invention, the processing response module is specifically used to: obtain the cache hit status of the data to be processed when the cache mode is forced cache mode; when the read / write command is a write command, if all the data to be processed hits the cache, modify the cache data and then send a response to the host indicating that the data has been written; when the read / write command is a write command, if some of the data to be processed hits the cache or misses the cache, force the request for new cache space, write the data to be processed into the cache space, and then send a response to the host indicating that the data has been written; when the read / write command is a read command, if all the data to be processed hits the cache, read the data to be processed from the cache and send a response to the host indicating that the data has been written; when the read / write command is a read command, if some of the data to be processed hits the cache or misses the cache, force the request for new cache space, move the data to be processed from the non-volatile medium to the cache space, read the data to be processed from the cache, and then send a response to the host indicating that the data has been written.
[0129] In one specific embodiment of the present invention, the response processing module is specifically used to determine whether the current cache is sufficient; if the cache is sufficient, new cache space is requested from the cache; if the cache is insufficient, old data in the cache is evicted, and after evicting the old data, new cache space is requested from the cache.
[0130] In one specific embodiment of the present invention, the response processing module is specifically used to delete the oldest data written first in the cache.
[0131] In one specific embodiment of the present invention, the response processing module is specifically used to obtain the most recently accessed timestamp of data in the cache; use the most recently accessed timestamp to determine the old data to be evicted; and delete the old data from the cache.
[0132] In one specific embodiment of the present invention, the response processing module is specifically used to obtain the access frequency of data in the cache; determine the old data to be eliminated using the access frequency; and delete the old data from the cache.
[0133] In one specific embodiment of the present invention, the response processing module is specifically used to bypass the cache to process the data to be processed and respond to the host when the cache mode is the bypass cache mode.
[0134] In one specific embodiment of the present invention, the processing response module is specifically used to, when the read / write command is a write command, write the data to be processed into a non-volatile medium and then send a response to the host indicating that the data has been written; when the read / write command is a read command, read the data to be processed from the non-volatile medium and send a response to the host indicating that the data has been processed.
[0135] In one specific embodiment of the present invention, the response processing module is specifically used to: obtain the cache hit status of the data to be processed when the cache mode is in the attempt cache mode; when the read / write command is a write command, if the data to be processed hits the cache completely, modify the cache data and then send a response to the host indicating that the data has been written; when the read / write command is a write command, if the data to be processed partially hits or misses the cache, write the data to be processed into non-volatile memory, send a response to the host indicating that the data has been written, attempt to request new cache space, and move the data to be processed from the non-volatile medium to the cache space; when the read / write command is a read command, if the data to be processed hits the cache completely, read the data to be processed from the cache and send a response to the host indicating that the data has been written; when the read / write command is a read command, if the data to be processed partially hits or misses the cache, attempt to request new cache space, move the data to be processed from the non-volatile medium to the cache space, read the data to be processed from the non-volatile medium or the cache, and send a response to the host indicating that the data has been written.
[0136] In one specific embodiment of the present invention, the response processing module is specifically used to determine whether the current cache is sufficient; if the cache is sufficient, it requests new cache space from the cache; if the cache is insufficient, it abandons the request for new cache space.
[0137] In one specific embodiment of the present invention, the response processing module is specifically used to process the data to be processed according to the default caching strategy and respond to the host when the caching mode is the default mode.
[0138] In one specific embodiment of the present invention, the response processing module is specifically used to perform cache processing on the data to be processed according to the first-in-first-out principle.
[0139] In one specific embodiment of the present invention, the processing response module is specifically used to obtain the most recently accessed timestamp of the data to be processed; and to cache the data to be processed according to the most recently accessed timestamp.
[0140] In one specific embodiment of the present invention, the processing response module is specifically used to obtain the access frequency of the data to be processed; and to cache the data to be processed according to the access frequency.
[0141] In one specific embodiment of the present invention, the command receiving module is specifically used to receive read and write commands sent by the host according to the data caching requirements of the data to be processed; the data caching requirements correspond to the data caching flag, and the command extension type field of the read and write command carries the data caching flag.
[0142] In one specific embodiment of the present invention, the marker determination module is specifically used to read the extension bit in the command extension type field to obtain the extension value; and determine the data cache marker corresponding to the extension value according to the mapping relationship between the extension value and the data cache marker.
[0143] In one specific embodiment of the present invention, the marker determination module is specifically used to read the value in the command extension type field; if the value corresponds to enabling the cache customization function, the extension bit is read from the command extension type field to obtain the extension value.
[0144] Corresponding to the above method embodiments, this invention also provides an electronic device. The electronic device described below and the data processing method described above can be referred to each other.
[0145] See Figure 5 As shown, the electronic device includes: a memory 332 for storing a computer program; and a processor 322 for executing the computer program to implement the steps of the data processing method described in the above method embodiment.
[0146] For details, please refer to Figure 6 , Figure 6 This is a schematic diagram of the specific structure of an electronic device provided in this embodiment. The electronic device can vary significantly due to differences in configuration or performance. It may include one or more central processing units (CPUs) (e.g., one or more processors) and a memory 332. The memory 332 stores one or more computer programs 342 or data 344. The memory 332 can be temporary or permanent storage. The program stored in the memory 332 may include one or more modules (not shown in the diagram), each module may include a series of instruction operations on the data processing device. Furthermore, the processor 322 may be configured to communicate with the memory 332 and execute the series of instruction operations stored in the memory 332 on the electronic device 301.
[0147] Electronic device 301 may also include one or more power supplies 326, one or more wired or wireless network interfaces 350, one or more input / output interfaces 358, and / or one or more operating systems 341.
[0148] The steps in the data processing method described above can be implemented by the structure of an electronic device.
[0149] The data processing method includes: receiving read / write commands sent by a host based on a non-volatile memory host controller interface protocol; determining a data cache tag for the data to be processed by using a command extension type field in the read / write command during the process of parsing the read / write command to determine the data to be processed; determining a cache mode corresponding to the data cache tag; processing the data to be processed according to a cache strategy matching the cache mode; and responding to the host.
[0150] In one specific embodiment of the present invention, the data to be processed is processed according to a caching strategy matching the caching mode, and a response is sent to the host. This includes: when the caching mode is a forced caching mode, obtaining the cache hit status of the data to be processed; when the read / write command is a write command, if all the data to be processed hits the cache, modifying the cached data and sending a response to the host indicating that the data has been written; when the read / write command is a write command, if some of the data to be processed hits the cache or misses the cache, forcibly requesting new cache space, writing the data to be processed into the cache space, and sending a response to the host indicating that the data has been written; when the read / write command is a read command, if all the data to be processed hits the cache, reading the data to be processed from the cache and sending a response to the host indicating that the data has been written; when the read / write command is a read command, if some of the data to be processed hits the cache or misses the cache, forcibly requesting new cache space, moving the data to be processed from the non-volatile medium to the cache space, reading the data to be processed from the cache, and sending a response to the host indicating that the data has been written.
[0151] In one specific embodiment of the present invention, forcibly requesting new cache space includes: determining whether the current cache is sufficient; if the cache is sufficient, requesting new cache space from the cache; if the cache is insufficient, evicting old data in the cache, and after evicting the old data, requesting new cache space from the cache.
[0152] In one specific embodiment of the present invention, eviction of old data in the cache includes: deleting the oldest data written first in the cache.
[0153] In one specific embodiment of the present invention, eviction of old data in the cache includes: obtaining the most recently accessed timestamp of the data in the cache; using the most recently accessed timestamp to determine the old data to be evicted; and deleting the old data from the cache.
[0154] In one specific embodiment of the present invention, eviction of old data in the cache includes: obtaining the access frequency of data in the cache; determining the old data to be evicted based on the access frequency; and deleting the old data from the cache.
[0155] In one specific embodiment of the present invention, processing the data to be processed according to a caching strategy that matches the caching mode and responding to the host includes: when the caching mode is a bypass caching mode, bypassing the cache to process the data to be processed and responding to the host.
[0156] In one specific embodiment of the present invention, bypassing the cache to process the data to be processed and responding to the host includes: when the read / write command is a write command, writing the data to be processed to a non-volatile medium and then sending a response to the host that the data has been written; when the read / write command is a read command, reading the data to be processed from the non-volatile medium and sending a response to the host that the data to be processed has been written.
[0157] In one specific embodiment of the present invention, the data to be processed is processed according to a caching strategy matching the caching mode, and a response is sent to the host. This includes: when the caching mode is an attempt to cache, obtaining the cache hit status of the data to be processed; when the read / write command is a write command, if the data to be processed fully hits the cache, modifying the cached data and then sending a response to the host indicating that the data has been written; when the read / write command is a write command, if the data to be processed partially hits or misses the cache, writing the data to be processed into non-volatile memory and then sending a response to the host indicating that the data has been written. The system responds to the write operation and attempts to request new cache space, moving the data to be processed from the non-volatile medium to the cache space. If the read / write command is a read command, and all the data to be processed hits the cache, the system reads the data to be processed from the cache and sends the data back to the host. If the read / write command is a read command, and some of the data to be processed hits the cache or misses the cache, the system attempts to request new cache space, moves the data to be processed from the non-volatile medium to the cache space, reads the data to be processed from the non-volatile medium or the cache, and sends the data back to the host.
[0158] In one specific embodiment of the present invention, attempting to request new cache space includes: determining whether the current cache is sufficient; if the cache is sufficient, requesting new cache space from the cache; if the cache is insufficient, abandoning the request for new cache space.
[0159] In one specific embodiment of the present invention, processing the data to be processed according to a caching strategy that matches the caching mode and responding to the host includes: when the caching mode is the default mode, processing the data to be processed according to the default caching strategy and responding to the host.
[0160] In one specific embodiment of the present invention, the data to be processed is processed according to the default caching strategy, including: caching the data to be processed according to the first-in-first-out (FIFO) principle.
[0161] In one specific embodiment of the present invention, the data to be processed is processed according to the default caching strategy, including: obtaining the most recently accessed timestamp of the data to be processed; and caching the data to be processed according to the most recently accessed timestamp.
[0162] In one specific embodiment of the present invention, the data to be processed is processed according to the default caching strategy, including: obtaining the access frequency of the data to be processed; and caching the data to be processed according to the access frequency.
[0163] In one specific embodiment of the present invention, receiving a read / write command sent by the receiving host based on the non-volatile memory host controller interface protocol includes: receiving a read / write command sent by the receiving host according to the data caching requirements of the data to be processed; the data caching requirements correspond to data caching tags, and the command extension type field of the read / write command carries the data caching tags.
[0164] In one specific embodiment of the present invention, the data cache mark of the data to be processed is determined by using the command extension type field in the read / write command, including: reading the extension bit in the command extension type field to obtain the extension value; and determining the data cache mark corresponding to the extension value according to the mapping relationship between the extension value and the data cache mark.
[0165] In one specific embodiment of the present invention, reading the extension bit in the command extension type field to obtain the extension value includes: reading the value in the command extension type field; if the value corresponds to enabling the cache customization function, then reading the extension bit from the command extension type field to obtain the extension value.
[0166] Corresponding to the above method embodiments, this invention also provides a readable storage medium. The readable storage medium described below corresponds to and can be referred to in relation to the data processing method described above.
[0167] A readable storage medium storing a computer program, wherein the computer program, when executed by a processor, implements the steps of the data processing method described in the above method embodiments.
[0168] The readable storage medium can specifically be a USB flash drive, external hard drive, read-only memory (ROM), random access memory (RAM), magnetic disk, or optical disk, or any other readable storage medium capable of storing program code.
[0169] Embodiments of the present invention also provide a computer program product, which includes a computer program that, when executed by a processor, implements the steps in any of the above data processing method embodiments.
[0170] Embodiments of the present invention also provide another computer program product, including a non-volatile computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps in any of the above-described data processing method embodiments.
[0171] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the apparatus disclosed in the embodiments, since it corresponds to the method disclosed in the embodiments, the description is relatively simple; relevant parts can be referred to in the method section.
[0172] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementations should not be considered beyond the scope of the invention.
[0173] The steps of the methods or algorithms described in conjunction with the embodiments disclosed herein can be implemented directly by hardware, a software module executed by a processor, or a combination of both. The software module can be located in random access memory (RAM), main memory, read-only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, removable disk, CD-ROM, or any other form of storage medium known in the art.
[0174] Finally, it should be noted that in this document, relationships such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "include," "contain," or any other variations are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus.
[0175] This document uses specific examples to illustrate the principles and implementation methods of the present invention. The descriptions of the above embodiments are only for the purpose of helping to understand the method and core ideas of the present invention. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of the present invention. Therefore, the content of this specification should not be construed as a limitation of the present invention.
Claims
1. A data processing method, characterized in that, include: Receive read and write commands sent by the host based on the non-volatile memory host controller interface protocol; During the process of parsing the read and write commands to determine the data to be processed, the data cache tag of the data to be processed is determined by using the command extension type field in the read and write commands. Determine the cache mode corresponding to the data cache tag; Caching modes include default mode, bypass caching mode, forced caching mode, and attempt caching mode; The data to be processed is processed according to a caching strategy that matches the caching pattern, and a response is sent to the host. The read / write commands received by the host based on the non-volatile memory host controller interface protocol include: The system receives read / write commands sent by the host based on the data caching requirements of the data to be processed; the data caching requirements correspond to the data caching flag, and the command extension type field of the read / write command carries the data caching flag; The method of determining the data cache marker of the data to be processed using the command extension type field in the read / write command includes: Read the extension bit in the command extension type field to obtain the extension value; Based on the mapping relationship between the extended value and the data cache tag, determine the data cache tag corresponding to the extended value; Specifically, reading the extension bit in the command extension type field to obtain the extension value includes: Read the value from the command extension type field; If the value corresponds to enabling the cache customization function, then the extension bit is read from the command extension type field to obtain the extension value.
2. The method according to claim 1, characterized in that, The data to be processed is processed according to a caching strategy matching the caching pattern, and a response is sent to the host, including: When the caching mode is forced caching mode, obtain the cache hit status of the data to be processed; If the read / write command is a write command, and all the data to be processed hits the cache, then after modifying the cache data, a response indicating that the data has been written is sent back to the host. When the read / write command is a write command, if the data to be processed partially hits or misses the cache, a new cache space is forcibly requested, and after the data to be processed is written into the cache space, a response indicating that the data has been written is sent back to the host. If the read / write command is a read command, and all the data to be processed hits the cache, then the data to be processed is read from the cache and fed back to the host. When the read / write command is a read command, if the data to be processed partially hits or misses the cache, a new cache space is forcibly requested, and the data to be processed located in the non-volatile medium is moved to the cache space. Then, the data to be processed is read from the cache and fed back to the host.
3. The method according to claim 2, characterized in that, Force the allocation of new cache space, including: Determine if the current cache is sufficient; If the cache is sufficient, request new cache space from the cache; If the cache is insufficient, old data in the cache will be evicted, and new cache space will be requested from the cache after the old data has been evicted.
4. The method according to claim 3, characterized in that, Evicting old data from the cache includes: Delete the oldest data written first in the cache.
5. The method according to claim 3, characterized in that, Evicting old data from the cache includes: Get the most recently accessed timestamp of data in the cache; Use the most recently accessed timestamp to determine old data to be phased out; Delete the old data from the cache.
6. The method according to claim 3, characterized in that, Evicting old data from the cache includes: Get the frequency of access to data in the cache; The access frequency is used to determine the old data to be phased out; Delete the old data from the cache.
7. The method according to claim 1, characterized in that, The data to be processed is processed according to a caching strategy matching the caching pattern, and a response is sent to the host, including: When the caching mode is bypass caching mode, the data to be processed is processed bypassing the cache, and a response is sent to the host.
8. The method according to claim 7, characterized in that, Bypassing the cache to process the data to be processed and responding to the host, including: When the read / write command is a write command, after writing the data to be processed to the non-volatile medium, a response indicating that the data has been written is sent back to the host. When the read / write command is a read command, the data to be processed is read from the non-volatile medium and the data to be processed is fed back to the host.
9. The method according to claim 1, characterized in that, The data to be processed is processed according to a caching strategy matching the caching pattern, and a response is sent to the host, including: If the cache mode is set to attempt cache mode, obtain the cache hit status of the data to be processed; If the read / write command is a write command, and all the data to be processed hits the cache, then after modifying the cache data, a response indicating that the data has been written is sent back to the host. When the read / write command is a write command, if the data to be processed partially hits or misses the cache, after writing the data to be processed into non-volatile memory, a response indicating that the data has been written is sent to the host, and an attempt is made to request new cache space, and the data to be processed located in the non-volatile medium is moved to the cache space. If the read / write command is a read command, and all the data to be processed hits the cache, then the data to be processed is read from the cache and fed back to the host. When the read / write command is a read command, if the data to be processed partially hits or misses the cache, an attempt is made to request a new cache space, and the data to be processed located in the non-volatile medium is moved to the cache space. The data to be processed is then read from the non-volatile medium or the cache and fed back to the host.
10. The method according to claim 9, characterized in that, Try requesting new cache space, including: Determine if the current cache is sufficient; If the cache is sufficient, request new cache space from the cache; If the cache is insufficient, then the request for new cache space will be abandoned.
11. The method according to claim 1, characterized in that, The data to be processed is processed according to a caching strategy matching the caching pattern, and a response is sent to the host, including: When the caching mode is the default mode, the data to be processed is processed according to the default caching policy, and a response is sent to the host.
12. The method according to claim 11, characterized in that, The data to be processed is processed according to the default caching strategy, including: The data to be processed is cached according to the first-in-first-out (FIFO) principle.
13. The method according to claim 11, characterized in that, The data to be processed is processed according to the default caching strategy, including: Obtain the most recently accessed timestamp of the data to be processed; The data to be processed is cached according to the most recently accessed timestamp.
14. The method according to claim 11, characterized in that, The data to be processed is processed according to the default caching strategy, including: Obtain the access frequency of the data to be processed; The data to be processed is cached according to the access frequency.
15. A data processing apparatus, characterized in that, include: The command receiving module is used to receive read and write commands sent by the host based on the non-volatile memory host controller interface protocol; The tag determination module is used to determine the data cache tag of the data to be processed by using the command extension type field in the read and write command during the process of parsing the read and write command to determine the data to be processed. A mode determination module is used to determine the cache mode corresponding to the data cache tag; Caching modes include default mode, bypass caching mode, forced caching mode, and attempt caching mode; The response processing module is used to process the data to be processed according to a caching strategy that matches the caching mode, and to respond to the host. Specifically, the command receiving module is used to receive read and write commands sent by the host according to the data caching requirements of the data to be processed; the data caching requirements correspond to the data caching flag, and the command extension type field of the read and write commands carries the data caching flag; The marker determination module is specifically used to read the extension bit in the command extension type field to obtain the extension value; and to determine the data cache marker corresponding to the extension value according to the mapping relationship between the extension value and the data cache marker. Specifically, reading the extension bit in the command extension type field to obtain the extension value includes: reading the value in the command extension type field; if the value corresponds to enabling the cache customization function, then reading the extension bit from the command extension type field to obtain the extension value.
16. An electronic device, characterized in that, include: Memory, used to store computer programs; A processor for executing the computer program to implement the steps of the data processing method as described in any one of claims 1 to 14.
17. A readable storage medium, characterized in that, The readable storage medium stores a computer program that, when executed by a processor, implements the steps of the data processing method as described in any one of claims 1 to 14.
Citation Information
Patent Citations
Data caching method and terminal device
CN107992432A