Data reporting method and system of slave device and storage medium

Abstract

The invention relates to the technical field of data processing, in particular to a data reporting method and system for slave devices and a storage medium, and the method comprises the steps: generating a clock signal before slave selection signals corresponding to a plurality of slave devices enter a low level; when the falling edge of the slave selection signal identifies that the clock signal is at a low level, controlling the levels of the MISO ports of the plurality of slave devices to be in a high impedance state; wherein the plurality of slave devices are provided with corresponding identification information; the master device sends the candidate identification information to the slave devices through the MOSI port, so that the plurality of slave devices compare the candidate identification information with own identification information; if the candidate identification information is matched with the identification information of the candidate slave device, the candidate slave device is adopted to adjust the MISO port from the high resistance state to the low level based on the candidate identification information, and a notification message representing the data sending requirement is reported. According to the method, the access of one master device to a plurality of slave devices can be realized without adding chip selection and GPIO (General Purpose Input / Output).

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of data processing, in particular to a data reporting method and system of a slave device and a storage medium. BACKGROUND

[0002] Serial Peripheral Interface (SPI) is widely used for communication interaction between multiple devices or multiple chips. In many scenarios, a master device needs to connect multiple slave devices. Since the clock and chip selection are controlled by the master device, the slave device cannot directly communicate with the master device. The slave device needs to notify the master device to read data through the General Purpose Input / Output (GPIO) mode, which is generally implemented as an interrupt mode. Therefore, when multiple slave devices are connected to the SPI bus, each slave device needs a chip selection and an interrupt GPIO to connect the master device. When the number of slave devices is large, the demand for GPIO is large, which increases the cost and the running burden of the master device. SUMMARY

[0003] The purpose of the present application is to provide a data reporting method and system of a slave device and a storage medium, and the technical solution adopted is as follows: In a first aspect, the present application provides a data reporting method of a slave device, which comprises: generating a clock signal before a slave selection signal corresponding to a plurality of slave devices enters a low level; when the falling edge of the slave selection signal identifies that the clock signal is at a low level, entering a chip selection timing, and controlling the level of the MISO port of the plurality of slave devices to be in a high impedance state; wherein the plurality of slave devices are each provided with corresponding identification information; using a master device to send candidate identification information to the slave device through a MOSI port, so that the plurality of slave devices compare whether the candidate identification information and the identification information of the slave device match; if the candidate identification information matches the identification information of the candidate slave device, using the candidate slave device to adjust the MISO port from the high impedance state to a low level based on the candidate identification information, to report a notification message representing data transmission demand to the master device.

[0004] In a second aspect, the present application provides a data reporting system of a slave device, which comprises: a generating module configured to generate a clock signal before a slave selection signal corresponding to a plurality of slave devices enters a low level; The control module is used for entering a chip selection timing when a falling edge of the slave selection signal identifies that the clock signal is low, and controlling a level of the MISO port of the plurality of slave devices to be in a high impedance state. The comparison module is used for sending candidate identification information from the master device to the slave devices through the MOSI port, so that the plurality of slave devices compare whether the candidate identification information and the identification information of the slave devices are matched. The adjustment module is used for adjusting the MISO port from the high impedance state to a low level based on the candidate identification information by the candidate slave device, if the candidate identification information is matched with the identification information of the candidate slave device, to report a notification message representing a data transmission requirement to the master device.

[0005] In a third aspect, a computer program product is provided, which includes computer program code, when the computer program code is run on a computer, so that the computer executes the method of the first aspect.

[0006] In a fourth aspect, a computer readable storage medium is provided, which stores computer program code, when the computer program code is run on a computer, so that the computer executes the method of the first aspect.

[0007] The application has the following beneficial effects: the clock signal is generated before the plurality of slave devices corresponding to the slave selection signal enter a low level; thus, before the clock signal is generated, the plurality of slave devices corresponding to the slave selection signal are pulled low, so that the serial-parallel interface can be simultaneously compatible. Then, when a falling edge of the slave selection signal identifies that the clock signal is low, the chip selection timing is entered, and the level of the MISO port of the plurality of slave devices is controlled to be in a high impedance state; wherein the plurality of slave devices are each provided with corresponding identification information; and the master device sends candidate identification information to the slave devices through the MOSI port, so that the plurality of slave devices compare whether the candidate identification information and the identification information of the slave devices are matched; if the candidate identification information is matched with the identification information of the candidate slave device, the MISO port is adjusted from the high impedance state to the low level based on the candidate identification information by the candidate slave device, to report the notification message representing the data transmission requirement to the master device. In this way, the access of one master device to a plurality of slave devices can be realized without increasing the chip selection and GPIO, and an effective way is provided for the slave device to report data. The slave device can inform the master device of the need for data transmission through the reporting of the flag bit, and then the master device selects the slave device for communication through the specific chip selection timing. BRIEF DESCRIPTION OF DRAWINGS

[0008] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, and the advantages thereof, the following will briefly introduce the drawings required by the embodiments or prior art description. Obviously, the drawings in the following description only show some embodiments of the present application, and for those skilled in the field, other drawings can be obtained based on these drawings without any creative effort.

[0009] Figure 1 is a SPI communication structure diagram of a master device and a slave device provided in the related art; Figure 2 is a SPI communication timing diagram of a master device and a slave device provided in the related art; Figure 3 is an implementation flow diagram of a data reporting method of a slave device provided in an embodiment of the present application; Figure 4 is a SPI communication timing diagram of a data reporting method of a slave device provided in an embodiment of the present application; Figure 5 is another timing diagram of SPI communication of a data reporting method of a slave device provided in an embodiment of the present application; Figure 6 is still another timing diagram of SPI communication of a data reporting method of a slave device provided in an embodiment of the present application; Figure 7 is another implementation flow diagram of a data reporting method of a slave device provided in an embodiment of the present application; Figure 8 is a SPI communication structure diagram of a data reporting method of a slave device provided in an embodiment of the present application; Figure 9 is still another timing diagram of SPI communication of a data reporting method of a slave device provided in an embodiment of the present application; Figure 10 is a component structure diagram of a data reporting system of a slave device provided in an embodiment of the present application; Figure 11 is a structure diagram of a computer device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0010] In order to further illustrate the technical means and effects taken by the present application to achieve the predetermined purposes, the following will combine the drawings and the preferred embodiments to specifically describe a data reporting method of a slave device according to the present application, the specific implementation, structure, features and effects thereof, in detail. In the following description, different "one embodiment" or "another embodiment" do not necessarily refer to the same embodiment. In addition, the specific features, structures or characteristics in one or more embodiments can be combined by any suitable form.

[0011] In the description of the embodiments of the application, unless otherwise specified, " / " represents the meaning of or, for example, A / B can represent A or B: "and / or" in the text is only a description of the association relationship of the associated objects, which means that there can be three relationships, for example, A and / or B, which can represent: A exists alone, A and B exist together, and B exists alone, in addition, in the description of the embodiments of the application, "multiple" means two or more than two.

[0012] Hereinafter, the terms "first", "second" are only for descriptive purposes, and cannot be understood as implying or implying relative importance or implicitly indicating the number of indicated technical features. Therefore, the features defined with "first", "second" can explicitly or implicitly include one or more features.

[0013] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as understood by a person skilled in the art to which the application belongs.

[0014] In some embodiments, SPI is a synchronous serial interface technology, which is a high-speed, full-duplex, synchronous communication bus. SPI communication works in a master-slave mode, which usually has one master device and one or more slave devices. The SPI interface is often referred to as a 4-wire serial bus, which is: Master Output, Slave Input (MOSI): master device data output, slave device data input; Master Input, Slave Output (MISO): master device data input, slave device data output; Serial Clock (SCK): clock signal, generated by the master device; Slave Select (SS): slave device enable signal, controlled by the master device.

[0015] In addition, in order to facilitate the slave device to inform the master device that there is data to be sent, a GPIO is generally added to access the interrupt source of the master device. In normal operation, in order to improve the driving capability, a pull-up resistor is generally added to the bus, so the bus level is in high state in idle condition.

[0016] In the related art, the basic structure of SPI with N slave devices, as shown in Figure 1 The master device 101 communicates with the slave device 1 through the GPIO1, the master device 101 communicates with the slave device 2 through the GPIO2, and the master device 101 communicates with the slave device N through the GPION.

[0017] InFigure 1 The SPI timing is as shown in the following figure based on the above-mentioned principle: Figure 2 When the master device wants to communicate with a certain slave device, the SS chip selection pin corresponding to the slave device is first enabled (the default low level is valid) in the level. SCK is the clock signal of SPI, which is generated by the master device. MISO and MOSI are data transmission pins, and the reception and transmission of data bits are synchronized with the SCK clock. The MOSI pin of the master device sends data to the MOSI pin of the slave device, and the MISO pin of the master device receives data sent by the MISO pin of the slave device. Figure 2 The timing shown in the following figure takes BYTE (8 bytes) as an example, and the actual SPI configuration should be used for reference. Figure 2 As can be seen from the figure, the master device sends N BYTE data to the slave device through MOSI, and at the same time, the slave device also sends N BYTE data to the master device through MISO.

[0018] The slave device informs the master device that there is data to be sent through the GPIO, and the timing diagram takes the low level as an example. The slave device pulls down the GPIO to inform the master device to obtain data through the SPI bus. In this way, when multiple slave devices are connected to the SPI bus, each slave device needs a chip selection and an interrupt GPIO to connect the master device. When the number of slave devices is large, the demand for GPIO is large, which increases the cost on the one hand, and also increases the running burden of the master device on the other hand.

[0019] Based on this, the embodiment of the application provides a data reporting method of a slave device, each slave device is assigned a unique identity (Identity document, ID) code, the access of one master device to multiple slave devices is realized through chip selection timing, and the reporting of data of the slave device is provided with an effective way through reporting flag timing. The slave device can inform the master device that data needs to be sent in this way, and then the master device selects the slave device through chip selection timing for communication.

[0020] The specific scheme of the data reporting method of the slave device provided by the application will be described in detail below with reference to the accompanying drawings. Please refer to Figure 3 , which shows an implementation flowchart of a data reporting method of a slave device provided by an embodiment of the application, and the method comprises the following steps: 301, before the slave selection signals corresponding to multiple slave devices enter a low level, a clock signal is generated.

[0021] Here, the case that SCK is pulled down before the SS signal is pulled down is set as the start identification of the chip selection timing, so that general SPI can be simultaneously compatible.

[0022] 302, when the falling edge of the slave selection signal identifies that the clock signal is in a low level, the chip selection timing is entered, and the level of the MISO port of the multiple slave devices is controlled to be in a high impedance state.

[0023] The multiple slave devices are each provided with corresponding identification information; each slave device is given an identification information (i.e. ID code). When the SS falling edge identifies that the SCK is at low level, the chip select sequence is entered, and the MISO of all slave devices is in high impedance state.

[0024] 303. The master device sends candidate identification information to the slave device through the MOSI port, so that the multiple slave devices compare whether the candidate identification information and the identification information of the slave device itself match.

[0025] Here, the master device sends an 8-bit ID code through MOSI (the number of bits can be determined according to the actual number of slave devices, 8 bits can represent 256 devices, which is enough in normal cases), and the slave device compares its own ID code after receiving the ID code to determine whether they match.

[0026] 304. If the candidate identification information matches the identification information of the candidate slave device, the candidate slave device adjusts the MISO port from the high impedance state to the low level based on the candidate identification information, to report a notification message representing data transmission demand to the master device.

[0027] Here, if the candidate identification information matches the identification information of the candidate slave device, it means that the ID code sent by the master device through MOSI is consistent with the ID code of the candidate slave device itself. After the candidate slave device determines that the received candidate identification information matches the identification information of the slave device itself, it enters the normal SPI process, that is, the MISO output is controlled to be low, and the master device can notify the CPU through internal SPI interruption to process the subsequent data reading after the master device recognizes that the slave device has data transmission demand. The timing sequence of the SPI communication of the chip select ID matching is as shown in Figure 4 The master device sends N bytes (BYTE) of data to the slave device through the MOSI port, and the slave device also sends N bytes of data to the master device through the MISO port.

[0028] If the candidate identification information does not match the identification information of the slave device, the SPI communication is exited in the chip select period corresponding to the chip select sequence, and the levels of the MISO port of the slave device and the MOSI port of the master device are adjusted to the high impedance state.

[0029] Here, the slave device compares its own identification information after receiving the candidate identification information, and if they do not match, the SPI communication is exited in the chip select period, so that the port level of MOSI and the port level of MISO are both in the high impedance state. The timing sequence of the SPI communication of the chip select ID not matching is as shown in Figure 5 The port level of MOSI and the port level of MISO are both in the high impedance state.

[0030] In some embodiments, if the candidate identification information is a preset identification, the master device selects the plurality of slave devices; the master device broadcasts to the plurality of slave devices, and controls the level of the MISO port of the plurality of slave devices to be high impedance. Wherein, the preset identification can be all F (i.e. normal broadcast identification in network communication), then the master device selects all slave devices for broadcasting, at this time, the MISO of all slave devices should be high impedance, as shown in Figure 6 , the level of the MISO port of all slave devices is high impedance, and the MOSI port of the master device realizes data output through broadcasting.

[0031] In some possible implementations, the above step 304 can be implemented by the steps shown in Figure 7 . 701, the plurality of slave devices send the notification message to the master device by pulling down the level of the MISO port.

[0032] Here, when the SPI bus is idle, i.e. SS is high, the master device sets MISO as input to listen whether there is a slave device to send data. The slave device notifies the master device that there is data to send by pulling down the MISO level, and sets its own MOSI as input to listen the state of the MOSI pin. At this time, multiple slave devices can pull down MISO at the same time.

[0033] 702, in the case where the master device identifies that the level of the MISO port is low, pull down the pin of the MOSI port and send the reporting instruction to the plurality of slave devices, and output the clock signal.

[0034] Here, the reporting instruction is used to indicate the plurality of slave devices to report the identification information of itself; the master device identifies that the MISO is low, and pulls down the MOSI pin to inform all slave devices to prepare to report the flag bit. Then the master device controls SCK to start outputting the clock signal.

[0035] In some possible implementation manners, the level of the MISO port of the plurality of slave devices is pulled down, the MOSI port of the slave device is set as input, and the pin state of the MOSI port is listened to; and when the master device identifies that the level of the MISO port is low, the pin state of the MOSI port is pulled down to send a reporting indication to the plurality of slave devices. Here, the slave device informs the master device of its data sending requirement by pulling down the level of the MISO port, and sets its MOSI port as input to identify the low level of the MOSI port by listening to the pin state of the MOSI port. The plurality of slave devices can pull down the level of the MISO port synchronously. After identifying the low level of the MISO port, the master device informs all the slave devices of the reporting flag by pulling down the pin state of the MOSI port, and the master device controls the SCK to generate and output a clock signal.

[0036] 703, in a case where the plurality of slave devices identify that the level of the MOSI port of the master device is low, the level of the MISO port of the plurality of slave devices is set as high impedance.

[0037] Here, after the plurality of slave devices identify that the level of the MOSI port is low, the level of the MISO port of the slave device is high impedance.

[0038] 704, the master device identifies a candidate slave device having a data sending requirement in the plurality of slave devices based on the clock signal, the MOSI port and the identification information of the plurality of slave devices.

[0039] Here, the master device controls the flow of communication with the slave device by controlling the number of clock signals, so as to determine the candidate slave device whose identification information is equal to the number of clock signals by comparing the number of clock signals with the identification information of the slave device. In some possible implementation manners, the plurality of slave devices start counting based on the clock signal to obtain a count value of the clock signal; and when the count value matches the identification information of the slave device, the MISO port outputs a low level to enable the master device to identify the candidate slave device having the data sending requirement in the plurality of slave devices.

[0040] Here, after the slave device identifies that the MOSI is low, the slave device sets its MISO to high impedance, at which time all slave devices MISO should be high impedance. Then all slave devices start counting according to the SCK clock, and when the count value is equal to the ID code of the slave device, the MISO output is controlled to be low, that is, when the count value is equal to the ID code of the candidate slave device, the MISO of the candidate slave device is controlled to output low to inform the master device that the candidate slave device has data transmission requirements. In this way, the slave device sends a notification message to the master device by pulling down the pin of the MOSI port, and after the master device identifies that the level of the MISO port is low, the pin of the MOSI port is pulled down and the multiple slave devices are sent a reporting instruction, and a clock signal is output. When the master device identifies that the level of the MOSI port is low, the level of the MISO port of the multiple slave devices is set to high impedance; in this way, when the count value of the clock signal is equal to the identification information of the candidate slave device, the level of the MISO port is pulled down, so as to inform the master device that the candidate slave device has data transmission requirements.

[0041] In some embodiments, the master device controls the clock signal to output multiple clock signals; when the number of the multiple clock signals is greater than or equal to the number of the multiple slave devices, the MOSI port of the master device is pulled high to the high impedance state.

[0042] Here, the master device controls the SCK clock to output a number of clock signals greater than or equal to the total number of slave devices, and then ends the current process by pulling the level of the MOSI port high. In the case where the master device identifies a candidate slave device having data transmission requirements, the master device sends an interrupt information to a central processing unit based on an internal SPI of the master device; and the central processing unit processes the data transmission requirements of the candidate slave device in response to the interrupt information.

[0043] Here, the master device can obtain a current reporting flag, and each bit of the flag represents each slave device, and a certain bit being 0 indicates that the slave device has data to send. After identifying that the slave device has data transmission requirements, the master device can notify the CPU through an internal SPI interrupt to process the subsequent data reading. In SPI communication, the basic structure of one master device with N slave devices is as shown in Figure 8 The slave devices 1-N are all provided with identification information, that is, the identification information of the slave device 1 is ID0, the identification information of the slave device 2 is ID1, and the identification information of the slave device N is IDN. The access of one master device to multiple slave devices is realized through a chip selection sequence, and the master device is informed of the need to send data through a reporting flag sequence, and then the master device selects the slave device for communication through the chip selection sequence.

[0044] In some embodiments, if the master device identifies that at least two candidate slave devices have data transmission requirements based on the identification information reported by the plurality of slave devices, the priority order of the at least two candidate slave devices is determined; then, based on the priority order, the data transmitted by the at least two candidate slave devices is read one by one.

[0045] Here, when the master device identifies that a plurality of slave devices have data to be transmitted through the reporting flag, the master device can read the data of the slave devices one by one according to a specific priority. The priority can be set, for example, that the smaller the ID code, the higher the priority, or the priority is grouped (ID0~3 is the highest, ID4~7 is the second, and so on), or each ID is equipped with a configurable priority register.

[0046] In a specific example, the following takes 8 slave devices as an example, the slave devices of ID1 and ID5 have data to be transmitted, and the reporting flag obtained by the master device is b11011101. The relevant timing is as shown in Figure 9 The high impedance state is 1, and the low level is 0. The low level means that the slave device has data transmission requirements, so that the master device notifies the CPU through the internal SPI interrupt for processing the subsequent data reading for the slave device corresponding to the low level.

[0047] In the embodiment of the application, before the clock signal is generated, the slave selection signals corresponding to the plurality of slave devices are pulled low, so that the serial and parallel interfaces can be simultaneously compatible. Then, when the falling edge of the slave selection signal identifies that the clock signal is at a low level, the chip selection timing is entered, and the level of the MISO port of the plurality of slave devices is controlled to be in a high impedance state; wherein the plurality of slave devices are each provided with corresponding identification information; and the master device sends candidate identification information to the slave device through the MOSI port, so that the plurality of slave devices compare whether the candidate identification information and the identification information of the slave device match; if the candidate identification information matches the identification information of the candidate slave device, the candidate slave device adjusts the MISO port from the high impedance state to the low level based on the candidate identification information, to report a notification message representing data transmission requirements to the master device. In this way, the access of one master device to a plurality of slave devices can be realized without increasing the chip selection and GPIO, and an effective way is provided for the slave device to report data. The slave device can inform the master device that data needs to be transmitted through the reporting flag, and then the master device selects the slave device for communication through a specific chip selection timing.

[0048] The embodiment of the application provides a data reporting system of a slave device, please refer to Figure 10The system 1000 comprises a generating module 1001 configured to generate a clock signal before a plurality of slave selection signals corresponding to a plurality of slave devices enter a low level; a control module 1002 configured to enter a chip selection timing when a falling edge of the slave selection signal identifies that the clock signal is in a low level, and control a level of a MISO port of the plurality of slave devices to be in a high impedance state; wherein the plurality of slave devices are each provided with corresponding identification information; a comparison module 1003 configured to send candidate identification information from a master device to the plurality of slave devices through a MOSI port, so that the plurality of slave devices compare whether the candidate identification information and the identification information of the plurality of slave devices match; and an adjusting module 1004 configured to, if the candidate identification information matches the identification information of the candidate slave device, adjust the MISO port from the high impedance state to a low level based on the candidate identification information of the candidate slave device, so as to report a notification message representing a data sending demand to the master device.

[0049] In some possible implementation manners, the adjusting module 1004 is further configured to send the notification message from the plurality of slave devices to the master device by pulling down the level of the MISO port; in a case where the master device identifies that the level of the MISO port is in a low level, pull down a pin of the MOSI port and send a reporting instruction to the plurality of slave devices, and output a clock signal; wherein the reporting instruction is used to instruct the plurality of slave devices to report the identification information of the plurality of slave devices; in a case where the plurality of slave devices identify that the level of the MOSI port of the master device is in a low level, set the level of the MISO port of the plurality of slave devices to be in a high impedance state; and identify a candidate slave device having a data sending demand from the plurality of slave devices based on the clock signal, the MOSI port and the identification information of the plurality of slave devices reported by the plurality of slave devices.

[0050] In some possible implementation manners, the adjusting module 1004 is further configured to pull down the level of the MISO port of the plurality of slave devices, and set the MOSI port of the slave device to be an input, and listen to a pin state of the MOSI port; in a case where the master device identifies that the level of the MISO port is in a low level, pull down the pin state of the MOSI port, so as to send a reporting instruction to the plurality of slave devices.

[0051] In some possible implementation manners, the adjusting module 1004 is further configured to start counting based on the clock signal by the plurality of slave devices, to obtain a count value of the clock signal; and when the count value matches the identification information of the slave device, control the MISO port to output a low level, so that the master device identifies a candidate slave device having a data sending demand from the plurality of slave devices.

[0052] In some possible implementations, the adjustment module 1004 is further configured to use the master device to control the clock signal to send multiple clock signals; when the number of the multiple clock signals is greater than or equal to the number of the multiple slave devices, pull the MOSI port of the master device to the high-impedance state.

[0053] In some possible implementations, the adjustment module 1004 is also used to determine the priority order of the at least two candidate slave devices if the master device identifies that at least two candidate slave devices have data sending requirements based on the identification information reported by the multiple slave devices; and read the data sent by the at least two candidate slave devices one by one based on the priority order.

[0054] In some possible implementations, the adjustment module 1004 is further configured to, if the candidate identification information does not match the identification information of the slave device, exit SPI communication within the chip select period corresponding to the chip select timing; and adjust the levels of the MISO port of the slave device and the MOSI port of the master device to the high impedance state.

[0055] In some possible implementations, the adjustment module 1004 is further used to, if the candidate identification information is a preset identification, use the master device to select the multiple slave devices; use the master device to broadcast to the multiple slave devices, and control the levels of the MISO ports of the multiple slave devices to a high impedance state.

[0056] Optionally, the transmission medium may be a wired link (such as, but not limited to, coaxial cable, optical fiber, and digital subscriber line (DSL)) or a wireless link (such as, but not limited to, wireless Fidelity (WIFI), Bluetooth, and mobile device network). It should be noted that the system provided in the above embodiment is only illustrated by the division of the above functional modules. In actual applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the computer device can be divided into different functional modules to complete all or part of the functions described above. In addition, the method embodiments provided in the above embodiments belong to the same concept. The specific implementation process is detailed in the method embodiments and will not be repeated here.

[0057] Figure 11 FIG. 1 is a schematic diagram of the structure of a computer device provided by an embodiment of the present invention. For example, Figure 11As shown, the computer device 1100 comprises a memory 1101, a processor 1102, and a computer program 1103 stored in the memory 1101 and running on the processor 1102, wherein the processor 1102 executes the computer program 1103, so that the computer device can execute the aforementioned any one device data reporting method.

[0058] In addition, the embodiments of the present application also protect a system, which can comprise a memory and a processor, wherein the memory stores executable program code, and the processor is configured to invoke and execute the executable program code to execute the device data reporting method provided by the embodiments of the present application. The embodiments can divide the system into functional modules according to the method examples described above, for example, each functional module can be corresponding, or two or more functions can be integrated in one processing module, and the integrated module can be implemented in the form of hardware. It should be noted that the division of modules in the embodiments is illustrative, and is only a logical function division, and another division mode can be used in actual implementation. It should be noted that all related contents of each step involved in the above method embodiments can be cited to the function description of the corresponding functional module, and will not be described here.

[0059] It should be understood that the system provided by the embodiments is used to execute the above device data reporting method, and thus can achieve the same effect as the above implementation method. In the case of integrated units, the system can comprise a processing module and a storage module. When the system is applied to a device, the processing module can be used to control and manage the actions of the device. The storage module can be used to support the device to execute related program codes and the like. The processing module can be a processor or a controller, which can realize or execute various exemplary logical blocks, modules and circuits described in combination with the disclosure. The processor can also be a combination of computing functions, such as one or more microprocessor combinations, a combination of digital signal processing (DSP) and microprocessor, and the like, and the storage module can be a memory.

[0060] In addition, the system provided by the embodiments of the present application can be a chip, a component or a module, the chip can comprise a connected processor and a memory; wherein the memory is used to store instructions, when the processor invokes and executes the instructions, the chip can execute the device data reporting method provided by the above embodiments. The embodiments also provide a computer readable storage medium, the computer readable storage medium stores computer program code, when the computer program code runs on the computer, the computer executes the above related method steps to realize the device data reporting method provided by the above embodiments.

[0061] The embodiment further provides a computer program product, which, when running on a computer, enables the computer to execute the above related steps to implement the data reporting method of the device provided in the above embodiment. The system, computer readable storage medium, computer program product or chip provided in the embodiment are used to execute the corresponding method provided above, and thus the beneficial effects achieved thereby can refer to the beneficial effects of the corresponding method provided above, which will not be described here again. Through the above description of the implementation manner, those skilled in the art can understand that, for the convenience and brevity of description, only the division of the above functional modules is taken as an example for illustration, and in actual application, the above functions can be completed by different functional modules according to needs, that is, the internal structure of the system is divided into different functional modules to complete all or part of the functions described above. In the embodiments provided in the application, it should be understood that the disclosed system and method can be implemented in other ways. For example, the system embodiments described above are merely illustrative, for example, the division of the modules or units is only a logical function division, and actual implementation can have another division manner, for example, a plurality of units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the coupling or direct coupling or communication connection between the displayed or discussed each other can be through some interface, indirect coupling or communication connection between the system or unit, which can be electrical, mechanical or other forms.

[0062] It should be noted that the above sequence of the embodiments of the application is only for description, and does not represent the advantages and disadvantages of the embodiments. The processes depicted in the drawings do not necessarily require the specific order or continuous order shown to achieve the desired results. In some embodiments, multiple task processing and parallel processing are also possible or can be advantageous. Each embodiment in the specification is described in a progressive manner, and the same or similar parts of each embodiment can be referred to each other, and each embodiment mainly describes the differences from other embodiments. The above is only a specific implementation manner of the application, but the protection scope of the application is not limited thereto, and any person skilled in the art can easily think of changes or replacements within the technical range disclosed in the application, which should be covered within the protection scope of the application.

Claims

1. A method for reporting data from a device, characterized in that: The data reporting method of the slave device includes: Before slave selection signals corresponding to the plurality of slave devices enter a low level, a clock signal is generated; When the falling edge of the slave selection signal identifies that the clock signal is at a low level, a chip selection sequence is entered, and the levels of the MISO ports of the multiple slave devices are controlled to be in a high-impedance state; wherein the multiple slave devices are each provided with corresponding identification information; The master device sends candidate identification information to the slave devices through the MOSI port, so that the multiple slave devices compare the candidate identification information with their own identification information to see whether they match; If the candidate identification information matches the identification information of the candidate slave device, the candidate slave device adjusts the MISO port from the high impedance state to a low level based on the candidate identification information to report a notification message indicating a data transmission requirement to the master device.

2. A data reporting method from a device according to claim 1, characterized in that: If the candidate identification information matches the identification information of the candidate slave device, using the candidate slave device to adjust the MISO port from the high-impedance state to a low level based on the candidate identification information to report a notification message indicating a data transmission requirement to the master device, including: Using the multiple slave devices to send the notification message to the master device by pulling down the level of the MISO port; When the master device recognizes that the level of the MISO port is low, it pulls down the pin of the MOSI port and sends a reporting instruction to the multiple slave devices, and outputs a clock signal; wherein the reporting instruction is used to instruct the multiple slave devices to report their own identification information; When the multiple slave devices recognize that the levels of the MOSI ports of the master device are low, setting the levels of the MISO ports of the multiple slave devices to a high-impedance state; The master device identifies a candidate slave device having a data transmission requirement among the multiple slave devices based on the clock signal, the MOSI port, and the identification information of the multiple slave devices.

3. A data reporting method from a device according to claim 2, characterized in that: When the master device recognizes that the level of the MISO port is low, pulling down the pin of the MOSI port and sending a reporting indication to the multiple slave devices, and outputting a clock signal, includes: Pull down the levels of the MISO ports of the multiple slave devices, set the MOSI ports of the slave devices as inputs, and monitor the pin states of the MOSI ports; When the master device recognizes that the level of the MISO port is low, it pulls down the pin state of the MOSI port to send a reporting indication to the multiple slave devices.

4. A data reporting method from a device according to claim 2, characterized in that: The master device identifies, based on the clock signal, the MOSI port, and identification information of the slave devices themselves reported by the slave devices, a candidate slave device having a data transmission requirement from the slave devices, including: Using the multiple slave devices to start counting based on the clock signal to obtain a count value of the clock signal; When the count value matches the identification information of the slave device itself, the MISO port is controlled to output a low level, so that the master device identifies a candidate slave device having a data transmission requirement among the multiple slave devices.

5. A data reporting method from a device according to claim 2 or 3, characterized in that: The method further comprises: Using the master device to control the clock signal to send multiple clock signals; When the number of the multiple clock signals is greater than or equal to the number of the multiple slave devices, the MOSI port of the master device is pulled up to the high-impedance state.

6. A data reporting method from a device according to claim 1, characterized in that: The method further comprises: If the master device identifies, based on the identification information reported by the multiple slave devices, that at least two candidate slave devices have data transmission requirements, determining a priority order of the at least two candidate slave devices; Based on the priority order, data sent by the at least two candidate slave devices are read one by one.

7. A data reporting method from a device according to claim 1, characterized in that: The method further comprises: If the candidate identification information does not match the identification information of the slave device, exiting the SPI communication within the chip selection period corresponding to the chip selection timing; The levels of the MISO port of the slave device and the MOSI port of the master device are adjusted to the high impedance state.

8. A data reporting method from a device according to claim 1, characterized in that: The method further comprises: If the candidate identification information is a preset identification, the master device is used to select the multiple slave devices; The master device is used to broadcast to the multiple slave devices, and the levels of the MISO ports of the multiple slave devices are controlled to be in a high impedance state.

9. A data reporting system from a device, characterized in that: The data reporting system of the slave device includes: A generating module, configured to generate a clock signal before slave selection signals corresponding to the plurality of slave devices enter a low level; A control module, configured to enter a chip select sequence and control the levels of the MISO ports of the plurality of slave devices to be in a high-impedance state when the falling edge of the slave select signal recognizes that the clock signal is at a low level, wherein the plurality of slave devices are each provided with corresponding identification information; a comparison module, configured to use a master device to send candidate identification information to the slave devices through a MOSI port, so that the multiple slave devices compare the candidate identification information with their own identification information to see whether they match; An adjustment module is configured to, if the candidate identification information matches the identification information of the candidate slave device, use the candidate slave device to adjust the MISO port from the high impedance state to a low level based on the candidate identification information, so as to report a notification message indicating a data transmission requirement to the master device.

10. A computer-readable storage medium, characterized in that The computer-readable storage medium stores a computer program, and when the computer program is executed, the method according to any one of claims 1 to 8 is implemented.

Images