Method and system for calculating number of devices meeting conditions
By obtaining layout and device information, the function leSearchHierachy is used to directly calculate the number of devices in the CIW window or Virtuoso, which solves the problems of tedious calculations and errors in layout drawing and realizes efficient and accurate device quantity calculation.
Patent Information
- Application Number
- CN202511308156.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-09-15
- Publication Date
- 2025-10-17
- Estimated Expiration
- 2045-09-15
AI Technical Summary
When drawing a layout, calculating the number of a certain type of device is tedious and error-prone, resulting in low efficiency. This is especially true when filling capacitor devices in blank areas, requiring the generation of a tree file or a global search, and manual calculation errors can lead to multiple operations.
Provided is a method and system for calculating the number of qualified devices. By obtaining layout and device information, the function leSearchHierachy is used to directly calculate the number of devices in the CIW window or Virtuoso, reducing unnecessary operation steps. The result can be obtained by directly entering device properties in the dialog box.
It improves layout drawing efficiency, reduces manual calculation errors, is applicable to different processes and technologies, simplifies the operation process, and improves calculation accuracy and efficiency.
Smart Images

Figure CN120805827A_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of data processing, in particular to a method and system for calculating the number of qualified devices. BACKGROUND
[0002] Layout drawing is the process of realizing the logical functions of a circuit through physical levels, similar to the design of architectural drawings. It defines the shape, size, and position of each process layer through EDA tools (Electronic Design Automation tools), and different levels of process patterns are superimposed on each other to form a complete integrated circuit structure through arrangement and wiring. Layout drawing plays a key role in information visualization, helping to clearly and efficiently present complex information. A well-designed layout can greatly improve the effectiveness of information transmission, helping the audience to understand and absorb information more quickly. In the semiconductor industry, layout design is the process of realizing the logical functions of a circuit through physical levels, including chip layout layout, wiring, and size determination.Layout device types mainly include the following: Resistor: In analog layout design, resistor is one of the most common devices. Capacitor: Capacitor also plays an important role in analog layout design. The type and design requirements of capacitor are similar to those of resistor, and the specific design method also involves two-terminal connection and dummy layer addition. Triode and diode: These devices are used for signal amplification and rectification in analog circuits. The design of triode needs to consider the connection mode of its base, emitter and collector, while diode is mainly used for unidirectional conduction. Inductor: Inductor is commonly used in high-frequency circuits for filtering and matching networks. Its design needs to consider the number of turns, diameter and spacing of the coil. Special devices such as ESD devices, PAD, SEAL_RING, FUSE: These devices also play an important role in chip design, such as ESD devices for protecting circuits from static damage, SEAL_RING for chip packaging protection, FUSE for overcurrent protection, etc.
[0003] When performing layout drawing, there is often a need to calculate the number of devices of a certain type, such as capacitor devices to fill the blank area. However, according to the conventional operation, it may be necessary to generate a tree file or perform a global search function and then manually calculate, which is prone to calculation errors during the operation, and the steps are cumbersome and inefficient. SUMMARY
[0004] The present application aims to provide a method and system for calculating the number of qualified devices, which can improve the layout execution efficiency, reduce unnecessary operation steps, and meet the same functional requirements in different processes. The script can be loaded in the ciw window or added to the shortcut key of virtuoso, and the operator does not need to generate a tree file or manually calculate after global search. Only the call dialog box needs to be called, and the required device properties can be entered to obtain the required results.
[0005] A method for calculating the number of qualified devices, comprising: Obtaining layout information; Obtaining device information that needs to be calculated; Calculating the number of qualified devices according to the layout information and the device information that needs to be calculated.
[0006] Preferably, the obtaining layout information comprises: Obtaining the size structure, design rules, process, and layout requirements of the layout.
[0007] Preferably, the obtaining device information that needs to be calculated comprises: Obtaining the device name and device properties.
[0008] Preferably, the calculating the number of qualified devices according to the layout information and the device information that needs to be calculated comprises: Defining the device properties that need to be calculated; Setting the metal level of the device; Setting the insertion range of the device; Calculating the number of qualified devices according to the set conditions.
[0009] Preferably, the defining the device properties that need to be calculated comprises: Defining the library name, cell name, and view name of the device.
[0010] Preferably, the setting the metal level of the device comprises: Selecting the metal level of the device as the current layer or the current layer to the bottom layer.
[0011] Preferably, the setting the insertion range of the device comprises: Selecting the insertion range of the device as global or partial area.
[0012] Preferably, the calculating the number of qualified devices according to the set conditions comprises: Assigning the properties of the device to the function variable; Taking the metal level and the insertion range as the limiting conditions; The function leSearchHierachy is used to search the device meeting the condition. The number of devices meeting the condition is outputted.
[0013] A system for calculating the number of devices meeting the condition comprises: A layout information acquisition module is configured to acquire layout information. A device information acquisition module is configured to acquire device information for which the number is to be calculated. An information processing module is configured to calculate the number of devices meeting the condition according to the layout information and the device information for which the number is to be calculated.
[0014] An electronic device comprises a chip, a processor and a memory, the memory is configured to store computer program code, the computer program code comprises computer instructions, when the chip executes the computer instructions, the electronic device executes a method for calculating the number of devices meeting the condition.
[0015] The present application has the beneficial effects of improving layout execution efficiency, reducing unnecessary operation steps, and allowing operators to call a dialog box, enter any required device attributes, and obtain the required results without generating a tree file or manually calculating after loading the script in a ciw window or adding the script to the shortcut keys of virtuoso. BRIEF DESCRIPTION OF DRAWINGS
[0016] The accompanying drawings, which are incorporated herein and constitute part of the specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.
[0017] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the accompanying drawings needed to be used in the embodiments or prior art description will be briefly introduced as follows. Obviously, for those of ordinary skill in the art, other drawings can also be obtained based on these drawings without any creative effort.
[0018] Figure 1 A flowchart of a method for calculating the number of devices meeting the condition according to the present application; Figure 2 A hardware structure schematic diagram of an electronic device according to the present application. DETAILED DESCRIPTION
[0019] With reference to the drawings and the embodiments of the present application, the technical solutions in the embodiments of the present application will be clearly and completely described. Obviously, the described embodiments are only a part of the embodiments of the present application, but not all the embodiments of the present application. Based on the embodiments of the present application, all the other embodiments obtained by a person of ordinary skill in the art without creative work fall within the protection scope of the present application.
[0020] It should be noted that all the direction indications (such as up, down, left, right, front, back, etc.) in the embodiments of the present application are only used to explain the relative position relationship, movement condition, etc. between components in a certain posture (as shown in the drawings), and if the certain posture changes, the direction indications also change accordingly.
[0021] In addition, the descriptions of “first”, “second” and the like in the present application are only for the purpose of description, and cannot be understood as indicating or implying the relative importance of the indicated technical features or implicitly indicating the number of the indicated technical features. Therefore, the features defined as “first”, “second” can explicitly or implicitly include at least one of the features. In addition, the technical solutions of each embodiment can be combined with each other, but it must be based on the realization of a person of ordinary skill in the art, and when the combination of technical solutions contradicts each other or cannot be realized, it should be considered that the combination of technical solutions does not exist, and is not within the protection scope of the present application.
[0022] When performing layout drawing, there is often a need to calculate the number of a certain type of device, such as a capacitor device for filling a blank area. However, according to the conventional operation, it may be necessary to generate a tree file or manually calculate after global search function, and during this period, it is easy to cause multiple operations due to calculation errors, and the steps are complicated and the efficiency is low.
[0023] The present application can improve the layout execution efficiency, reduce unnecessary operation steps, and can meet the same requirements of functions in different processes and processes. The script can enable the operator to load the script in the ciw window or add it to the shortcut key of virtuoso without generating a tree file or manually calculating after global search. Only the call dialog box needs to be called, and the required device properties can be entered to obtain the required results.
[0024] Embodiment 1 A method for calculating the number of devices meeting the conditions, referring to Figure 1 , comprising: S100, obtaining layout information; The circuit layout information includes size of the integrated circuit, topology definition of each layer and all physical information about the device. In the embodiment of the present application, the obtained layout information is the layout information of the device whose quantity needs to be calculated. The quantity of the device is calculated according to the current input information, which can greatly improve the layout drawing efficiency.
[0025] S200, obtaining device information whose quantity needs to be calculated; S300, calculating the quantity of the device meeting the condition according to the layout information and the device information whose quantity needs to be calculated.
[0026] In the embodiment of the present application, the quantity of the device meeting the condition can be quickly calculated by only obtaining the layout information and the device information whose quantity needs to be calculated, which can greatly save the calculation time and improve the calculation accuracy.
[0027] Preferably, S100, the obtained layout information includes: size structure, design rule, process and layout requirement of the layout.
[0028] In circuit design, the layout information that affects the number of components mainly includes: device size and structure: transistor size: channel length (L) and width (W) directly affect the number of devices and area. Source / drain area: the size of the diffusion area affects the device layout density. Design rule constraints: minimum spacing rule: the minimum spacing between devices (such as metal, polysilicon, diffusion spacing) limits the layout density. Layer alignment rule: the alignment requirement of contact holes (Contact / Via) and active areas may affect device arrangement. Isolation rule: the isolation area (such as STI, N / P well spacing) between devices occupies additional area. Interconnection resources: number of metal layers: more metal layers can reduce wiring congestion, indirectly allowing higher device density. Wire width and spacing: wide wires or large spacing will occupy area, limiting the number of devices. Via layout: vias connecting different layers need to meet design rules, which may affect device arrangement. Matching and symmetry requirements: matching devices: such as differential pairs or current mirrors require strict symmetric layout, which may increase redundant space. Co-center layout: high-performance circuits require devices to be arranged in a cross pattern, sacrificing area to reduce process variation. Power consumption and heat dissipation: heat dissipation channels: high-power devices need to reserve space for heat dissipation (such as increasing spacing or adding Dummy devices). Power / ground line width: wide metal lines are required for high-current paths, occupying wiring resources. Process-related factors Process node: advanced processes (such as 7nm, 5nm) allow smaller device spacing, but may introduce additional rules (such as the number of fins for FinFET). Layered devices: such as 3D IC or stacked transistors can vertically integrate devices, increasing density. Cell library and IP modules: standard cell height: the height of standard cells in digital circuits (such as 12T, 9T) determines the number of devices per row. Hard-core IP: pre-designed IP modules (such as SRAM, ADC) occupy fixed area, affecting remaining space. Redundancy and yield optimization: redundant devices: to improve yield, spare devices (such as redundant cells in memory) may be added. Dummy devices: fill the edges to ensure uniformity of etching, increasing the total number of devices. Packaging limitations: I / O layout: pads and ESD devices occupy the edge area, limiting the number of core area devices.
[0029] Thermal dissipation package: the packaging heat dissipation capability may limit the feasibility of high-density devices.
[0030] Preferably, S200, obtaining the device information required for calculating the number includes: Obtaining device names and device attributes.
[0031] Device properties are key parameters that define the physical structure, electrical characteristics and process constraints of a device. These properties directly affect the performance, matching, reliability and layout of the device. Device properties include: geometric properties, electrical properties, process-related properties: layer information: the process layer to which it belongs (such as Poly, Diffusion, Metal1, etc.) and its lithography mask definition. Design rule constraints: minimum spacing, minimum width, enclosure, etc. Antenna effect rules: proportion limit of gate connection area and metal area. Functional and labeling properties: device type: NMOS, PMOS, resistor, capacitor, diode, etc. Label: device name, network connection relationship. Simulation parameters: parameters in SPICE model (such as L / W scaling factor defined by PDK).
[0032] Preferably, S300, according to the layout information and the device information that needs to be calculated, the number of devices that meet the conditions is calculated, including: S310, define the device properties that need to be calculated; S320, set the metal level of the device; S330, set the insertion range of the device; In the embodiment of the present application, before searching for the number of devices that meet the conditions, the properties of the device, the metal level of the device and the insertion range of the device need to be input first, so as to accurately search. The present application does not need manual calculation, but only needs to use a unified script to complete the calculation of the number of all types of devices, and can meet different processes and different technologies, so the application range is very wide, the calculation efficiency is very high, and multiple operations caused by manual calculation errors can be avoided, so the calculation efficiency of the device is greatly improved.
[0033] S340, calculate the number of devices that meet the conditions according to the set conditions.
[0034] The editable areas of the dialog box from top to bottom are lib_name, cell_name, view_name, level, and selection. The first three lists correspond to the device properties that need to be calculated: library name, cell name, and view name, whose default value is "nil" (empty). After deleting "nil", fill in the corresponding dialog box list according to actual needs. The fourth list, level, has two modes to choose from, with the default value being currentlv, which is the current layer; the other layer is crtobtlv, which is the current layer to the bottom layer. The fifth list is selection, which has two modes to choose from, with the default value being full_selection, which is global selection; the other mode is scope_selection, which is range selection. The selections in the fourth and fifth lists can be paired.
[0035] In the embodiment of the present application, it is first determined whether the search form has been defined: procedure (mosaic_statistics() let ((lbnm cenm vinm levelcyclic selectcyclic searchform) if (!boundp ('searchform) || (searchform == nil) then.
[0036] Preferably, S310, the device properties that need to be calculated are defined, including: The library name, cell name and view name of the device are defined.
[0037] In integrated circuit design (especially when using EDA tools), the library name, cell name and view name are key identifiers for hierarchically organizing design data, used to uniquely distinguish different design units and their manifestations. The library is a container that stores related design units, usually classified by project, process node or functional module. The library name includes: a process library, a standard cell library or a custom IP library. The library name is used to manage design units of different sources or purposes (such as PDK library provided by process manufacturers vs. user-defined library). The cell is the basic design unit in the library, representing a specific circuit or physical structure. For example: an inverter, an operational amplifier or a memory module, in hierarchical design, the Cell can nest other Cells. The view is a different manifestation or abstraction level of the Cell, used for different design stages. Common view types include: schematic: circuit schematic (logical connection). layout: physical layout (geometric shape and process layer). symbol: symbol representation (used for schematic call). abstract: abstract view (such as LEF view for P&R). verilog: RTL or gate-level netlist. spice: transistor-level netlist (for simulation).
[0038] In the embodiment of the present application, right-click on the desktop, click Open Terminal Here, start virtuoso in Terminal, and load the script for calculating the number of devices that meet the conditions, (1) in virtuoso, open the layout that needs to be edited, define the library name: lbnm = hiCreateStringField ( ? name 'lbnm ? prompt "lib_name" ? defValue "nil" ).
[0039] Define cell name: cenm = hiCreateStringField( ?name ‘cenm ?prompt “cell_name” ?defValue “nil” ).
[0040] Define view name: vinm = hiCreateStringField( ?name ‘vinm ?prompt “view_name” ?defValue “nil” ).
[0041] Preferably, S320, setting the metal level of the device includes: Selecting the metal level of the device as the current layer or the current layer to the bottom layer.
[0042] The metal level of the device refers to the interconnection metal layer used to connect devices (such as transistors, resistors, capacitors, etc.) and modules in the chip manufacturing process. The number and structure of metal levels directly affect the performance, power consumption, area and manufacturing cost of the chip. Metal levels can provide electrical connections (such as signals, power, ground) between devices. Reduce wiring congestion and improve integration density. Optimize signal transmission speed (by reducing RC delay). Each layer of metal is composed of metal lines (Metal Traces) and vias (Via) (vertical channels connecting different metal layers). Metal levels include: signal layer: transmit logic signals (usually narrower, with small spacing). Power / ground layer (Power / Ground): provides a global power and ground network (usually wider, reduces IR drop and electromigration risk). Clock layer: dedicated high-frequency clock wiring (requires low impedance and shielding design). Modern processes (such as 7nm, 5nm) usually have 10-15 layers of metal, while mature processes (such as 28nm) may only have 6-9 layers. Some processes introduce intermediate layers or semi-global layers. Metal levels are the core of chip interconnection, and their design needs to balance performance (RC delay), power consumption, area (wiring density) and cost (number of layers).
[0043] In an embodiment of the present application, two levels can be provided for user selection: levelcyclic = hiCreateCyclicField( ?name ‘levelcyclic prompt "level" value "currentlv" choices list("currentlv" "crtobtlv") ).
[0044] Preferably, S330, setting the insertion range of the device includes: Selecting the insertion range of the device as global or partial area.
[0045] In the embodiment of the present application, the fifth list is selection, i.e. area selection, and there are two modes for selection, and the default value is full_selection, i.e. global selection; the other mode is scope_selection, i.e. range selection.
[0046] In the embodiment of the present application, two ranges can be provided for user selection: selectcyclic = hiCreateCyclicField( name'selectcyclic prompt "selection" value "full_selection" choices list("full_selection" "scope_selection") ).
[0047] Preferably, S340, calculating the number of devices meeting the condition according to the set condition includes: S341, assigning the attribute of the device to a function variable; S342, taking the metal level and the insertion range as the limited condition; S343, searching for the device meeting the condition by using the function leSearchHierachy; S344, outputting the number of devices meeting the condition.
[0048] Defining the displayed dialog box: searchform = hiCreateAppForm( name'searchform formTitle "mosatic_statistics" fields list(lbnm cenm vinm levelcyclic selectcyclic) ?call back “sandc()” ?buttonLayout ‘OKCancel ) );;if hiDisplayForm(‘searchform) );;let );;pro。
[0049] Get the ID of cll, window number, library name, cell name, view name and level, range information from the dialog box and assign them to variables: procedure(sandc() let((cv win insts libname cellname viewname level selection obj obj_insts obj_mosaic cord x1 x2 y1 y2 comb_insts nu) cv=geGetEditRep() win=hiGetCurrentWindow() libname=searchform->lbnm->value cellname=searchform->cenm->value viewname=searchform->vinm->value level=searchform->levelcyclic->value selection=searchform->selectcyclic->value cond(。
[0050] The level selection is the current level: (level==”currentlv” cond( The range selection is global: (selection==”full_selection” insts=cv->instances Assign the insts that match the criteria to obj. If the objtype is inst, assign the insts to obj insts. If the objtype is mosaic, assign the mosaic to obj mosaic: obj=setof(obj11 insts obj11~>libName==libname&&obj11~>cellName== cellname&&obj11~>viewName==viewname) obj_insts=setof(obj11 obj obj11~>objType==”inst”) obj_mosaic=setof(obj11 obj obj11~>objType==“mosaic”) nu=0 foreach(obj11 obj_mosaic nu=nu+(obj11~>rows)* (obj11~>columns)) Add the two quantities: nu=nu+length(obj_insts) ) Scope selection is local: (selection==”scope_selection” cord=enterBox() The user selects a range and gets the bbox: x1=caar(cord) y1=cadar(cord) x2=caadr(cord) y2=cadadr(cord) comb_insts=mapcar(‘list cv~>instances cv~>instances~>bBox) Combine the insts' IDs and his bbox into a new list: insts=setof(inst11 comb_insts caar(nth(1 inst11))>=x1&& cadar(nth(1 inst11))>=y1&&caadr(nth(1 inst11))<=x2&& cadadr(nth(1 inst11))<=y2) obj=setof(obj11 insts nth(0 obj11)~>libName==libname&& nth(0 obj11)~>cellName==cellname&&nth(0 obj11)~>viewName==viewname) obj_insts=setof(obj11 obj nth(0 obj11)~>objType==”inst”) obj_mosatic=setof(obj11 obj nth(0 obj11)~>objType==”mosaic”) nu=0 foreach(obj11 obj_mosaic nu=nu+(nth(0 obj11)~>rows)*(nth(0 obj11)~>columns)) nu=nu+length(obj_insts) ) ) ) The level selection is from current to bottom: (level==”crtobtlv” cond( Select Global as the scope: (selection==”full_selection” cord=cv~>bBox Use the function leSearchHierachy to get the corresponding condition cell and filter it. The cord value is the overall size of the cellview: obj_insts=leSearchHierachy(cv cord 32 “inst” list(list(“cell name” “==” cellname))) obj_insts=setof(obj11 obj_insts obj11~>libName==libname&& obj11~>cellName==cellname&&obj11~>viewName==viewname) obj insts = leSearchHierachy(cv cord 32 "inst" list(list("cell name" "==" cellname))) obj insts = setof(obj11 obj insts obj11~>libName==libname&& obj11~>cellName==cellname&&obj11~>viewName==viewname) nu = 0 foreach(obj11 obj insts nu=nu+(obj11~>rows)*(obj11~>columns)) nu = nu + length(obj insts) ) Scope selection is local: (selection==”scope_selection” cord = enterBox() Use function leSearchHierachy to get the corresponding conditions cell and filter, cord value is the size of the user box selection: obj insts = leSearchHierachy(cv cord 32 "inst" list(list("cell name" "==" cellname))) obj insts = setof(obj11 obj insts obj11~>libName==libname&& obj11~>cellName==cellname&&obj11~>viewName==viewname) obj_mosaic=leSearchHierachy(cv cord 32 “array” list(list(“cell name”“==” cellname))) obj_mosaic=setof(obj11 obj_mosaic obj11~>libName==libname&& obj11~>cellName==cellname&&obj11~>viewName==viewname) nu = 0 foreach (obj1 1 obj_mosaic nu = nu + (obj1 1 ->rows) * (obj1 1 ->columns)) nu = nu + length (obj_insts) ) ) ) ) Pop-up display search, calculation results: nu_insts = sprint (sc1 "number of insts == %d" nu) hiDisplayAppDBox ( ?name 'nu_insts ?dboxText nu_insts ) );;let );;pro。
[0051] Embodiment 2 A system for calculating the number of devices meeting the conditions, comprising: a layout information acquisition module, configured to acquire layout information; a device information acquisition module, configured to acquire device information for which the number needs to be calculated; an information processing module, configured to calculate the number of devices meeting the conditions according to the layout information and the device information for which the number needs to be calculated.
[0052] Embodiment 3 An electronic device, comprising a chip, a processor and a memory, the memory being configured to store computer program code, the computer program code comprising computer instructions, in a case where the chip executes the computer instructions, the electronic device performs a method for calculating the number of devices meeting the conditions.
[0053] Reference Figure 2 The electronic device 2 comprises a processor 21, a memory 22, an input device 23 and an output device 24. The processor 21, the memory 22, the input device 23 and the output device 24 are coupled through a connector, which comprises various interfaces, transmission lines or buses, etc., and the embodiments of the present application do not limit this. It should be understood that in various embodiments of the present application, coupling means mutual contact in a specific way, including direct connection or indirect connection through other devices, for example, connection through various interfaces, transmission lines, buses, etc.
[0054] The processor 21 can be one or more graphics processing units (GPU), which can be a single-core GPU or a multi-core GPU in the case of a single GPU. Alternatively, the processor 21 can be a processor group composed of multiple GPUs, which are coupled with each other through one or more buses. Alternatively, the processor can also be other types of processors, etc., and the embodiments of the present application are not limited thereto.
[0055] The memory 22 can be used to store computer program instructions, and various types of computer program codes for executing the schemes of the present application. Alternatively, the memory includes, but is not limited to, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read only memory (EPROM), or a compact disc read-only memory (CD-ROM), which is used for relevant instructions and data.
[0056] The input device 23 is used to input data and / or signals, and the output device 24 is used to output data and / or signals. The output device 24 and the input device 23 can be independent devices, or can be an integral device.
[0057] The present application can improve the layout execution efficiency, reduce unnecessary operation steps, and can meet the same requirements of functions in different processes and processes. The script can enable the operator to load the script in the ciw window or add it to the shortcut key of virtuoso, without generating a tree file or manually calculating after global search. Only the call dialog box needs to be called, and the required results can be obtained by entering any required device properties.
[0058] The above description is only a specific implementation of the present application, which enables those skilled in the art to understand or implement the present application. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application will not be limited to these embodiments shown herein, but will conform to the widest range consistent with the principles and novel features applied herein.
Claims
1. A method for calculating the number of devices that meet the conditions, characterized in that: include: Get layout information; Obtain the device information that needs to be calculated; The number of devices that meet the conditions is calculated according to the layout information and the information of the devices whose number needs to be calculated.
2. The method for calculating the number of devices that meet the conditions according to claim 1, wherein: The obtaining of layout information includes: Obtain the layout's dimensional structure, design rules, process, and layout requirements.
3. The method for calculating the number of devices that meet the conditions according to claim 1, wherein: The obtaining of the device information requiring the calculation of the quantity includes: Get the device name and device properties.
4. The method for calculating the number of devices that meet the conditions according to claim 1, wherein: Calculating the number of devices that meet the conditions according to the layout information and the device information whose number needs to be calculated includes: Define the device properties that need to be calculated; Set the metal level of the device; Set the insertion range of the device; Calculate the number of devices that meet the conditions according to the set conditions.
5. The method for calculating the number of devices that meet the conditions according to claim 4, wherein: The device properties that need to be calculated in this definition include: Define the library name, cell name, and view name of the device.
6. The method for calculating the number of devices that meet the conditions according to claim 4, wherein: The metal level of the device is set up including: Select the metal level of the device as the current layer or the current layer to the bottom layer.
7. The method for calculating the number of devices that meet the conditions according to claim 4, characterized in that: The insertion range of the setting device includes: Select the device insertion scope as global or partial area.
8. The method for calculating the number of devices that meet the conditions according to claim 4, wherein: Calculating the number of devices that meet the conditions according to the set conditions includes: Assign the device's properties to function variables; Use metal level and insertion range as qualification conditions; Use the function leSearchHierachy to search for devices that meet the conditions; Output the number of devices that meet the conditions.
9. A system for calculating the number of devices that meet a condition, characterized in that: include: A layout information acquisition module is used to obtain layout information; A device information acquisition module is used to obtain device information that needs to be calculated; An information processing module is used to calculate the number of devices that meet the conditions based on the layout information and the information of the devices whose number needs to be calculated.
10. An electronic device, characterized in that: include: A chip, a processor and a memory, wherein the memory is used to store computer program code, the computer program code includes computer instructions, and when the chip executes the computer instructions, the electronic device executes a method for calculating the number of qualified devices as described in any one of claims 1 to 8.
Citation Information
Patent Citations
Method for quickly modifying layout hierarchy of selected graphic into metal layout hierarchy
CN107862118A
Power device layout design method, chip and terminal
CN114742009A
Layout method of layout, layout, electronic equipment and computer readable storage medium
CN115329706A
Electrical element layout method and system capable of reducing burnout
CN117421791A
Virtuoso-based integrated circuit instance design method
CN118761375A