Electronic fuse packaging level test system

Abstract

The invention provides an electronic fuse packaging level test system. The electronic fuse packaging level test system comprises a host, a mainboard, a test daughter board, an arbitrary waveform signal generator, a multi-channel direct-current power supply and an oscilloscope, the mainboard is connected with the host and is used for receiving a test instruction sent by the host and returning a test result to the host; the test daughter board is connected with the main board, is connected with a multi-channel direct-current power supply, an arbitrary waveform generator and an oscilloscope, and is used for executing the test signal sent by the main board to test an electronic fuse test chip arranged on the test daughter board; and the host is connected with the multi-channel direct-current power supply, the arbitrary waveform signal generator and the oscilloscope and is used for controlling the multi-channel direct-current power supply to independently output different test power supplies to the test daughter board, controlling the arbitrary waveform signal generator to output different voltage amplitude waveforms to the test daughter board and receiving and processing sampling data of the oscilloscope. According to the invention, the dynamic characteristics of the electronic fuse can be accurately tested, and the basic test of the electronic fuse is considered at the same time.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor chip testing, and particularly relates to an electronic fuse package-level testing system. BACKGROUND

[0002] An electronic fuse (eFuse) is a non-volatile storage technology based on the principle of electromigration, which realizes one-time programming (OTP) by physically fusing metal wires inside a chip, and is mainly used for chip parameter configuration, repair and function customization.

[0003] Current eFuse testing mainly relies on wafer-level CP testing (Chip Probing), which can complete static parameter verification (such as fuse resistance value, logic state), but for dynamic characteristic indicators, CP testing cannot meet the requirements in terms of measurability and accuracy. eFuse mainly involves the following three types of dynamic characteristic indicators that need to be accurately measured in operation:

[0004] 1) Current characteristics of the power-on process: eFuse samples dual power supply (working voltage VDD and programming voltage VQPS). During the system power-on process, there may be an unstable state in the internal control logic of the eFuse, which may cause a large current to appear. Therefore, it is necessary to obtain the current change and state during the power-on process of the power supply;

[0005] 2) Programming operation current characteristics: eFuse programming operation is a physical process of electromigration or fusing of the fuse, and in this process, the resistance value change process of the fuse is fast and the change is complex, resulting in a corresponding dramatic change in the programming current. Understanding the current change during programming will help determine whether the working environment and settings are reasonable and improve the programming reliability of the fuse;

[0006] 3) Current characteristics of the read operation: When the eFuse performs a read operation, multiple amplifiers in the eFuse work simultaneously with the appearance of a start signal, and the pulse current generated by the collection of each read current is much larger than the average current of the read operation. The power supply of the eFuse comes from other power supply modules (such as LDO modules) in the chip. If the pulse current (occurring when the read starts) of the eFuse exceeds the design indicators of the power supply module, it may lower the output voltage of the power supply module, not only causing abnormal states of the eFuse, but also possibly causing changes or even failures in other modules related to the power supply. Therefore, it is also necessary to measure the pulse current value and current change of the eFuse read operation.

[0007] In addition, when performing dynamic current testing, the eFuse has a writing duration of ns level, and the power supply may reach hundreds of mA, which cannot be met by general laboratory power supplies and signal generators, and the dynamic characteristic waveforms of the eFuse cannot be accurately tested.

[0008] The package test has advantages in obtaining dynamic characteristics and accurate data measurement of the electronic fuse, especially in high-quality measurement of transient change information of various currents and voltages, which helps to understand the actual working process of the electronic fuse test chip, and greatly helps to analyze and solve problems and special phenomena in the working process of the electronic fuse and improve the working efficiency. Therefore, it is necessary to establish a complete package-level test system for testing the dynamic characteristics of the electronic fuse. SUMMARY

[0009] The electronic fuse package test system can solve the problem that the CP test cannot meet the requirements of the dynamic characteristic indexes of the electronic fuse in terms of measurability and accuracy.

[0010] In order to achieve the above-mentioned purpose, the electronic fuse package test system comprises a host computer, a mainboard, a test subboard, an arbitrary waveform signal generator, a multi-channel direct current power supply and an oscilloscope.

[0011] The mainboard is connected with the host computer, and is used for receiving a test instruction sent by the host computer and returning a test result to the host computer.

[0012] The test subboard is connected with the mainboard, and is connected with the multi-channel direct current power supply, the arbitrary waveform generator and the oscilloscope. The test subboard is used for testing an electronic fuse test chip arranged thereon by executing a test signal sent by the mainboard.

[0013] The host computer is connected with the multi-channel direct current power supply, the arbitrary waveform signal generator and the oscilloscope, and is used for controlling the multi-channel direct current power supply to independently output different test power to the test subboard, controlling the arbitrary waveform signal generator to output different voltage amplitude waveforms to the test subboard, and receiving and processing sampling data of the oscilloscope.

[0014] Optionally, the mainboard is integrated with a microcontroller and a field programmable gate array connected with each other. The field programmable gate array is connected with the test subboard. The microcontroller is connected with the host computer to receive the test instruction, and sends the test signal to the test subboard through the field programmable gate array. The test subboard executes the test signal and returns a result to the field programmable gate array.

[0015] Optionally, the field programmable gate array comprises a register file and an SPI interface, a register file, a Strobe pulse width generator and an address / data IO module connected with the register file, the microcontroller and the field programmable gate array are connected through the SPI interface, the register file is used for storing the test mode and control parameters of the electronic fuse test chip, the Strobe pulse width generator is used for generating a ns-level programming pulse signal, and the address / data IO control module is used for outputting address information and control signals of the electronic fuse test chip.

[0016] Optionally, the test subboard is integrated with a high-speed large-current operational amplifier and a multiplexer.

[0017] The high-speed large-current operational amplifier is connected with the arbitrary waveform signal generator at an input end and connected with the multiplexer at an output end, and is used for outputting a required programming voltage waveform.

[0018] The multiplexer is connected with the output end of the high-speed large-current operational amplifier at a first input, connected with the multi-channel direct current power supply at a second input, and connected with the electronic fuse test chip at a third input, and is used for switching the arbitrary waveform signal generator or the multi-channel direct current power supply as a programming voltage source of the electronic fuse test chip.

[0019] Optionally, the test subboard is further integrated with a resistor and a decoupling capacitor, the resistor is connected in series in a programming voltage loop of the electronic fuse test chip and is used for measuring transient current, and the decoupling capacitor is connected in parallel with the resistor in the programming voltage loop of the electronic fuse test chip and is used for providing transient current compensation.

[0020] Optionally, the decoupling capacitor and the resistor are arranged close to the electronic fuse test chip.

[0021] Optionally, the decoupling capacitor is a tantalum capacitor.

[0022] Optionally, the oscilloscope selects a current probe or a voltage probe for dynamic current test.

[0023] Optionally, the electronic fuse package-level test system further comprises a high-low temperature impact box connected with the host computer and the electronic fuse test chip, and is used for providing different temperature environments for the electronic fuse test chip.

[0024] Optionally, the host is connected with the mainboard in bidirectional communication through a USB line, and the electronic fuse package level test system further comprises a USB-GPIB converter, the host is connected with the USB-GPIB converter through a USB line, and the USB-GPIB converter is connected with the multi-channel direct current power supply, the arbitrary waveform signal generator, the oscilloscope and the high-low temperature impact box through a GPIB bus.

[0025] The application provides an electronic fuse package level test system, which can accurately test the dynamic characteristics of electronic fuse programming and reading and improve test efficiency. BRIEF DESCRIPTION OF DRAWINGS

[0026] Those skilled in the art will understand that the provided drawings are for the purpose of better illustrating the present application and do not constitute any limitation on the scope of the present application. Among them:

[0027] Figure 1 The programming and reading current model of the electronic fuse provided by an embodiment of the application;

[0028] Figure 2 The structural block diagram of the electronic fuse package level test system provided by an embodiment of the application;

[0029] Figure 3 The structural block diagram of the electronic fuse package level test system provided by a specific example of the application;

[0030] Figure 4 The programming current waveform diagram provided by a specific example of the application. DETAILED DESCRIPTION

[0031] The electronic fuse is a kind of semiconductor fuse circuit, such as Figure 1 As shown in the figure, the bit line is used as the control of the programming tube P0, the word line is used as the control of the gating tube N0, the fuse is located between the programming tube P0 and the gating tube N0 when the electronic fuse is programmed, in the read operation (Read), the programming tube P0 is closed, the word line is selected, the gating tube N0 is opened, the external reading power supply is VDD, the sensitive amplifier (SA) starts to work in the read operation, and the read working state and read current of the fuse in the chip are controlled.

[0032] In programming, the word line signal is a pulse signal. The bit line and the word line are fixed control signals, and need to be fixed during the entire programming and read current. Since different types of electronic fuses have different principles during programming, the current waveform flowing through the electronic fuse during the entire programming and reading period needs to be understood in detail to have a deeper study on the physical properties of the electronic fuse material.

[0033] Based on this, the application provides an electronic fuse package level test system, which can accurately test the dynamic characteristics of electronic fuse programming and reading, and improve the test efficiency.

[0034] To make the objects, advantages and features of the present application more clear, the following further describes the present application in detail with reference to the drawings and specific embodiments. It should be noted that the drawings are very simplified and not drawn to scale, and are only used to facilitate and clarify the purpose of assisting the description of the embodiments of the present application. In addition, the structures shown in the drawings are often part of the actual structures. In particular, different scales are sometimes used in the drawings to show different focuses.

[0035] As used in the present application, the singular forms "a", "an" and "the" include plural referents unless the content clearly dictates otherwise. As used in the present application, the term "or" is generally used in the sense of "and / or" unless the content clearly dictates otherwise. As used in the present application, the term "several" is generally used in the sense of "at least one" unless the content clearly dictates otherwise. As used in the present application, the term "at least two" is generally used in the sense of "two or more" unless the content clearly dictates otherwise. In addition, the terms "first", "second", "third" are only used for description purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined with "first", "second", "third" can explicitly or implicitly include one or at least two features.

[0036] Please refer to Figure 2 The embodiment provides an electronic fuse package level test system, which comprises a host computer, a mainboard, a test subboard, an arbitrary waveform signal generator, a multi-channel direct current power supply and an oscilloscope.

[0037] The mainboard is connected with the host computer, and is used for receiving test instructions sent by the host computer and returning test results to the host computer.

[0038] The test subboard is connected with the mainboard, and is connected with the multi-channel direct current power supply, the arbitrary waveform generator and the oscilloscope. The test subboard is used for testing the electronic fuse test chip arranged thereon by executing the test signals sent by the mainboard.

[0039] The host computer is connected with the multi-channel direct current power supply, the arbitrary waveform signal generator and the oscilloscope, and is used for controlling the multi-channel direct current power supply to independently output different test power to the test subboard, controlling the arbitrary waveform signal generator to output different voltage amplitude waveforms to the test subboard, and receiving and processing the sampling data of the oscilloscope.

[0040] The electronic fuse package level test system provided by the embodiment is a general package test system for evaluating an electronic fuse test chip (eFuse IP), is an embedded hardware environment with a test subboard and a mainboard, and realizes centralized control of the whole system to realize automatic testing by combining a LabVIEW (graphical programming language) software program.

[0041] In the embodiment, the mainboard and the test subboard are both PCB boards, the two PCB boards are connected through a high-speed interface, the mainboard is an embedded control system, and is used for generating control signals and data acquisition. The test subboard and external instruments complete the evaluation of the electronic fuse test chip, the external instruments include an arbitrary waveform signal generator (AWG), a multi-channel direct current power supply, an oscilloscope, a high-low temperature impact box, a current probe, and the like. The whole system can be centrally controlled by the graphical software LabVIEW deployed on the host computer, according to different test projects, the LabVIEW sends a test command through a USB line to communicate with the mainboard, the mainboard receives the test command, generates control signals, and is connected to the test subboard through the high-speed interface, and finally realizes the test of the electronic fuse test chip.

[0042] Specifically, the mainboard is integrated with a microcontroller (MCU) and a field programmable gate array (FPGA) connected to each other, the field programmable gate array is connected to the test subboard, the microcontroller is connected to the host computer to receive a test instruction, and sends a test signal to the test subboard through the field programmable gate array, the test subboard executes the test signal and returns the result to the field programmable gate array.

[0043] In the embodiment, the field programmable gate array includes a register file, an SPI interface connected to the register file, a register file (REG file), a Strobe pulse width generator, and an address / data IO module, the microcontroller and the field programmable gate array are connected through the SPI interface, the register file is used for storing a test mode and control parameters of the electronic fuse test chip, the Strobe pulse width generator is used for generating a ns-level programming pulse signal, and the address / data IO control module is used for outputting address information and control signals of the electronic fuse test chip.

[0044] The microcontroller and the field programmable gate array in the mainboard are connected through an SPI interface, the microcontroller is an SPI master device, the field programmable gate array is an SPI slave device (SPI slave), the two communicate through the SPI interface, the use of the serial SPI interface can reduce the connection IO ports between interfaces, the field programmable gate array receives the test mode or instruction transmitted by the microcontroller, the electronic fuse test chip starts to work under the control and returns the result to the field programmable gate array, after a delay, the field programmable gate array reads out the test result and saves it in the register file, the microcontroller will subsequently read out the test result from the field programmable gate array and return it to the host, realizing automatic testing.

[0045] The register file is connected with each module inside the field programmable gate array, receives and saves the test instruction of the microcontroller, the register file is connected with the address / data IO control module, outputs the address information and control signal of the electronic fuse test chip, and the register file is also connected with the Strobe pulse width generator, controls the generation and stop of the pulse width. The address / data IO control module selects the specific electronic fuse unit and working mode to be operated, and controls the electronic fuse test chip together with the Strobe pulse width generator.

[0046] The Strobe pulse width generator is an electronic device combining the Strobe (gating) signal control function and the pulse width modulation (PWL) technology, can realize the pulse width precision of 8ns step, and can realize the maximum ms pulse width programming.

[0047] The high-speed large-current operational amplifier (OP) and the multiplexer (MUX) are integrated on the test subboard, wherein,

[0048] The high-speed large-current operational amplifier is connected with the arbitrary waveform signal generator at the input end and connected with the multiplexer at the output end, and is used for outputting the required programming voltage waveform;

[0049] The multiplexer is connected with the output end of the high-speed large-current operational amplifier at the first input, connected with the multi-channel direct current power supply at the second input, and connected with the electronic fuse test chip at the third input, and is used for switching the arbitrary waveform signal generator or the multi-channel direct current power supply as the programming voltage source of the electronic fuse test chip.

[0050] In this embodiment, the high-speed and high-current operational amplifier is used to generate the programming voltage (VQPS) power supply, the input of which is derived from an arbitrary waveform signal generator, which can provide complex electronic fuse programming voltage waveform, further verify the correlation of electronic fuse relative to programming voltage-time, the host uses GPIB422 protocol to control the arbitrary waveform signal generator to generate voltage amplitude waveform through the USB-GPIB converter, and generates suitable programming voltage waveform according to the electronic fuse test chip. When the programming voltage does not need to change rapidly, a multi-channel DC power supply can be externally connected to generate the programming voltage by a multiplexer.

[0051] Further, the test sub-board also integrates a resistor R and a decoupling capacitor. The resistor R is connected in series in the programming voltage loop of the electronic fuse test chip and is used to measure the transient current. The decoupling capacitor is connected in parallel with the resistor R in the programming voltage loop of the electronic fuse test chip and is used to provide transient current compensation. The purpose of the decoupling capacitor is to decouple the electronic fuse test chip. When the high-speed and high-current operational amplifier cannot provide high-frequency current for the electronic fuse test chip, the decoupling capacitor is used to provide high-frequency bypass. The decoupling capacitor is connected in parallel with the resistor R in the programming voltage loop of the electronic fuse test chip, so that a more real transient current can be obtained at the resistor R. The decoupling capacitor and the high-speed and high-current operational amplifier provide a driving power supply for the programming voltage in parallel.

[0052] Preferably, the decoupling capacitor and the resistor are arranged close to the electronic fuse test chip. In order to reduce the influence of parasitic PCB lines and packaging parasitics, the multiplexer, the decoupling capacitor and the resistor R are arranged as close to the electronic fuse test chip as possible. The decoupling capacitor can be selected as a tantalum capacitor, and the capacitance value thereof is determined according to the obtained stable waveform. The two ends of the resistor can be connected to the current probe of an oscilloscope, and the current probe is used for dynamic current test, so that more accurate test results can be obtained.

[0053] The electronic fuse test chip also has other group power supplies, which are provided by a multi-channel DC power supply, such as VDD for electronic fuse test chip read operation power supply, VDDC for electronic fuse test chip IO core power supply, and VDDH for electronic fuse test chip IO external chip connection power supply.

[0054] Further, the electronic fuse package level test system also includes a high-low temperature impact box connected with the host and the electronic fuse test chip, which is used to provide different temperature environments for the electronic fuse test chip, so as to evaluate the performance of the electronic fuse test chip under different temperature conditions.

[0055] In the embodiment, the host is connected with the mainboard through the USB line in bidirectional communication, the electronic fuse package level test system further comprises a USB-GPIB converter, the host is connected with the USB-GPIB converter through the USB line, and the USB-GPIB converter is connected with the multi-channel direct current power supply, the arbitrary waveform signal generator, the oscilloscope and the high-low temperature impact box through the GPIB bus. The host is connected with the multi-channel power supply, the arbitrary waveform signal generator, the oscilloscope and the high-low temperature impact box through the USB-GPIB converter, the control of the power supply such as VQPS, VDD, VDDC and VDDH is realized, and the test instruction is output under the cooperation of the mainboard, so that the electronic fuse test chip works under the conditions of different voltage amplitudes and different programming and read pulse widths, and the basic function test and the automatic test of the electronic fuse test chip are met.

[0056] In order to realize the characteristic research of the electronic fuse, the programming voltage, the voltage of VDD and the pulse width precision control are required, the whole electronic fuse test chip is an array composed of many basic electronic fuse units, the selection mechanism depends on the combined addressing of the bit line and the word line, when the read operation is performed, the sensitive amplifier samples the fuse link current and compares with the reference value to judge whether the output result read out is "1" or "0". The fuse link of the electronic fuse is a small resistance before burning, and the data read out through the sensitive amplifier is 0;

[0057] In the signal combination setting of the burning mode, the address of the fuse link to be burned is set, a pulse (~10us) is given to the clock signal STROBE, the LINK is burned through a ~40mA current (VQPS power supply) (the actual resistance is 10k-∞Ohms), and the burning is completed.

[0058] In the signal combination setting of the read mode, the address of the word to be read out is set, a pulse (5ns-50ms) is given to the selection communication signal STROBE, and the sensitive amplifier compares the difference between the resistance of the selected fuse link and the reference resistance. If it is a large resistance after burning, the output Q is 1.

[0059] Figure 3 The embodiment provides a preferred embodiment of an electronic fuse package level test system, which is a low-cost embodiment based on an embedded system, a mainboard microcontroller selects ST STMF04, a field programmable gate array selects AMD SP701, a main high-speed interface selects a SAMTEC 180PIN QTH-090-07-F-D connecting seat, a test subboard selects a SAMTEC 180PIN QSH-090-01-F-D-A-GP connecting head, and actually, Figure 3The schematic signals STROBE, A_P[12:0] address, Q data output, CSB chip select, PWL power mode control signal are connected through high-speed connectors. The test sub-board includes high-speed large-current operational amplifier TI LT1210, three jumper caps J1, J2, J3, and a large-capacity tantalum capacitor C1 22uF, R1 is a programming voltage current sampling resistor 10mOhm, etc. The high-speed large-current operational amplifier is provided with a 5V power supply, which can meet the highest voltage requirement of the general electronic fuse test chip programming voltage. Since the laboratory power supply and signal generator cannot simultaneously meet the requirements of large current and high bandwidth, the high-speed large-current operational amplifier TI-LT121 is used instead, which can provide 1A, 35MHz bandwidth capability, especially suitable for testing the dynamic current waveform of electronic fuse programming.

[0060] The external instruments used are as follows: arbitrary waveform signal generator TEK AWG3102, multi-channel DC power supply KEYSIGHT N6705C, high-bandwidth oscilloscope TEK MSO70804C, and high-low temperature impact box Temptrinic TPQ4310.

[0061] The general test procedure is as follows: after all the instruments are connected, the software LabVIEW deployed on the host computer is used for centralized control to realize different test items of the electronic fuse test chip. First, the host computer analyzes the test items to be executed through the LabVIEW program, and decomposes them into instrument device control instructions and test item excitation test items. The instrument device control instructions communicate with different address devices through GPIB 422, and send control commands.

[0062] First, the temperature value of the electronic fuse test chip is controlled, which is generally isolated from external devices by a temperature heating cover. The host computer controls the high-low temperature impact box to the appropriate temperature value through the GPIB interface, and after 5 minutes of heat exchange, the temperature of the electronic fuse test chip is basically stable.

[0063] Then control the various power supply voltage and excitation output of the electronic fuse test chip, the various power supply voltage includes the programmed voltage of the arbitrary waveform signal generator, the direct current power supply controlled by the multi-channel direct current power supply control, such as VDDH, VDDC, VDD or VQPS, etc., and the trigger position of the oscilloscope is configured, the oscilloscope can select the current probe or the voltage probe, when the current probe is selected, the resistance R1 is removed, and the current probe is connected in series between the two ends of the resistance R1, when the voltage probe is selected, one end of the voltage probe is grounded, and the other end is connected to the first end or the second end of the resistance R1. The excitation output is generated by the field programmable gate array, and is transmitted to the test subboard and then to the electronic fuse test chip through the high-speed connecting piece after the host computer transmits the control command to the mainboard microcontroller through the USB interface, and then the microcontroller analyzes the command according to the solidified program flow to generate various control signals such as row address, programming or reading pulse of the electronic fuse test chip.

[0064] In the executed test project, if it is a read instruction, LabVIEW reads the output Q value of the electronic fuse test chip from the microcontroller, the microcontroller previously reads the Q value saved in the register file through the SPI interface, and the field programmable gate array previously collects data from the output Q channel of the electronic fuse test chip through the high-speed interface and saves the data in the register file. If it is necessary to test the programming current value, LabVIEW also needs to control the test channel of the oscilloscope to the set trigger value, collect the current programming current, and LabVIEW saves the current current collection waveform to the host computer through the GPIB or other communication interface. LabVIEW controls the power-down sequence of the whole system at the end of the test. Since the power supply and the mainboard in the test system are controlled by LabVIEW, the power-on and power-down sequence of the system can be well controlled. In order to reduce the packaging parasitic parameters of the electronic fuse test chip, a small parasitic packaging form such as COB packaging can be selected. Based on the above process, the whole electronic fuse test chip is tested under the centralized control of LabVIEW.

[0065] The electronic fuse packaging level test system provided by the embodiment of the application can accurately and stably complete all test projects of the electronic fuse test chip, and can obtain a programming current waveform of ns level, such as Figure 4 As shown in the figure, the test conditions are as follows: programming mode, 25℃, VQPS=1.7V, VDD=0.9V, programming pulse width 50us; programming current: max-200mA (40 times amplification).

[0066] In summary, the electronic fuse packaging level test system provided by the embodiment of the present application meets the basic programming and reading functions, and further includes dynamic characteristics, especially programming and reading current waveform test. In addition, in order to meet the programming requirements of the electronic fuse test chip with different load models, a high-bandwidth strong-driving operational amplifier is used to replace the conventional laboratory power supply device, which is especially suitable for the test of the dynamic current waveform of the electronic fuse programming. In addition, a programmable pulse generation module is combined, the parasitic parameters of the test link are optimized from the packaging selection and the PCB, and the automation control of the instrument and the control system is realized by using LabVIEW, so as to improve the test efficiency.

[0067] The above is only the preferred embodiment of the present application, and does not limit the present application in any way. Any person skilled in the art can make any equivalent replacement, modification or change of the technical scheme and technical content disclosed by the present application without departing from the scope of the technical scheme of the present application, which still belongs to the protection scope of the present application.

Claims

1. An electronic fuse package level test system, characterized in that: Includes host, main board, test daughter board, arbitrary waveform signal generator, multi-channel DC power supply and oscilloscope; The mainboard is connected to the host and is used to receive a test instruction sent by the host and return a test result to the host; The test sub-board is connected to the main board and is connected to the multi-channel DC power supply, the arbitrary waveform generator and the oscilloscope. The test sub-board is used to execute the test signal sent by the main board to test the electronic fuse test chip provided thereon; The host is connected to the multi-channel DC power supply, the arbitrary waveform signal generator and the oscilloscope, and is used to control the multi-channel DC power supply to independently output different test power supplies to the test sub-board, control the arbitrary waveform signal generator to output different voltage amplitude waveforms to the test sub-board, and receive and process the sampling data of the oscilloscope.

2. The electronic fuse package-level test system according to claim 1, wherein: The main board integrates a connected microcontroller and a field programmable gate array, the field programmable gate array is connected to the test sub-board, the microcontroller is connected to the host to receive the test instructions, and sends the test signal to the test sub-board through the field programmable gate array, and the test sub-board executes the test signal and returns the result to the field programmable gate array.

3. The electronic fuse package-level test system according to claim 2, wherein: The field programmable gate array includes a register file and an SPI interface connected to the register file, a register file, a strobe pulse width generator, and an address / data I / O module. The microcontroller and the field programmable gate array are connected via the SPI interface. The register file is used to store the test mode and control parameters of the electronic fuse test chip. The strobe pulse width generator is used to generate nanosecond-level programming pulse signals. The address / data I / O control module is used to output address information and control signals of the electronic fuse test chip.

4. The electronic fuse package-level test system according to claim 1, wherein: The test sub-board is integrated with a high-speed, high-current operational amplifier and a multiplexer: wherein, The high-speed, high-current operational amplifier has an input end connected to the arbitrary waveform signal generator and an output end connected to the multiplexer, and is used to output the required programming voltage waveform; The multiplexer has a first input connected to the output end of the high-speed, high-current operational amplifier, a second input connected to the multi-channel DC power supply, and a third input connected to the electronic fuse test chip, and is used to switch the arbitrary waveform signal generator or the multi-channel DC power supply as the programming voltage source of the electronic fuse test chip.

5. The electronic fuse package-level test system according to claim 4, wherein: The test sub-board also integrates a resistor and a decoupling capacitor. The resistor is connected in series in the programming voltage loop of the electronic fuse test chip and is used to measure transient current. The decoupling capacitor is connected in parallel with the resistor in the programming voltage loop of the electronic fuse test chip and is used to provide transient current compensation.

6. The electronic fuse package-level test system according to claim 5, wherein: The decoupling capacitor and the resistor are arranged close to the electronic fuse test chip.

7. The electronic fuse package-level test system according to claim 5, wherein: The decoupling capacitor is a tantalum capacitor.

8. The electronic fuse package-level test system according to claim 5, wherein: The oscilloscope uses a current probe or a voltage probe to perform dynamic current testing.

9. The electronic fuse package-level test system according to claim 1, wherein: The electronic fuse package-level test system further includes a high and low temperature shock box connected to the host and the electronic fuse test chip, for providing different temperature environments for the electronic fuse test chip.

10. The electronic fuse package-level test system according to claim 9, wherein: The host is connected to the mainboard for bidirectional communication via a USB cable. The electronic fuse package-level test system also includes a USB-GPIB converter. The host is connected to the USB-GPIB converter via a USB cable. The USB-GPIB converter is connected to the multi-channel DC power supply, the arbitrary waveform signal generator, the oscilloscope and the high and low temperature shock box via a GPIB bus.

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