Substrate processing apparatus and substrate processing method

Abstract

The present disclosure provides a substrate processing apparatus and a substrate processing method, which can obtain high throughput and prevent an increase in size of the apparatus. The substrate processing apparatus includes: a first processing unit and a second processing unit which are connected to a first exposure machine and a second exposure machine for exposing a substrate, respectively, and each of which includes a processing module for processing the substrate; a first carrying-in and carrying-out port and a second carrying-in and carrying-out port which are provided in the first processing unit and the second processing unit, respectively, and which carry in and carry out a substrate to a carrying container for carrying the substrate; a connecting part, which is provided with a coating module for coating the substrate with the chemical liquid to form a film, and is connected with the first processing part and the second processing part; and a common conveying mechanism which is shared by the substrates which are respectively conveyed into the first processing part and the second processing part from the first carrying-in and carrying-out port and the second carrying-in and carrying-out port, and is arranged on the connecting part to transfer the substrates to the coating module.

Description

Technical Field

[0001] The present disclosure relates to a substrate processing apparatus and a substrate processing method. Background Art

[0002] In the manufacturing process of semiconductor devices, a semiconductor wafer (hereinafter referred to as a wafer) serving as a substrate is transported within an apparatus, and a coating liquid is supplied to the wafer to form a coating film and perform various processes on the coating film. Patent Document 1 describes a substrate processing apparatus (coating and developing apparatus) that forms a resist film serving as a coating film and forms a pattern by developing the resist film after exposure.

[0003] Prior art literature

[0004] Patent Literature

[0005] Patent Document 1: Japanese Patent Application Laid-Open No. 2022-83851 Summary of the Invention

[0006] Problems to be solved by the invention

[0007] The present disclosure provides a technology capable of achieving high throughput in photolithography while preventing an apparatus from being enlarged.

[0008] Solutions for solving problems

[0009] The substrate processing apparatus disclosed herein comprises:

[0010] a first processing unit and a second processing unit, wherein the first processing unit and the second processing unit are respectively connected to a first exposure machine and a second exposure machine for exposing a substrate, and each includes a processing module for processing the substrate;

[0011] a first loading / unloading port and a second loading / unloading port, wherein the first loading / unloading port and the second loading / unloading port are respectively provided in the first processing section and the second processing section for loading and unloading the substrates into and out of a transport container for transporting the substrates;

[0012] a connecting portion, in which a coating module for coating a chemical solution on the substrate to form a film is provided, the connecting portion being connected to the first processing portion and the second processing portion; and

[0013] The shared transport mechanism is shared by the substrates respectively transported into the first processing unit and the second processing unit from the first loading / unloading port and the second loading / unloading port, and is provided at the connection portion to deliver each substrate to the coating module.

[0014] Effects of the Invention

[0015] The present disclosure provides a technology capable of achieving high throughput in photolithography while preventing an apparatus from being enlarged. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 It is a schematic plan view showing a coating and developing device according to the embodiment.

[0017] Figure 2 It is a longitudinal sectional side view showing the coating and developing device.

[0018] Figure 3 It is a front view showing the coating and developing device.

[0019] Figure 4 It is a longitudinal sectional front view showing the coating and developing device.

[0020] Figure 5 It is a longitudinal sectional side view showing a connection portion of the coating and developing device. DETAILED DESCRIPTION

[0021] Refer to Figure 1 Cross-sectional top view, Figure 2 A longitudinal side view of Figure 3 Main view, Figure 4 The longitudinal section view of Figure 5 A coating and developing device 1 according to an embodiment of a substrate processing device disclosed herein will be described with reference to a longitudinal sectional side view of FIG. Figure 2 、 Figure 4 、 Figure 5 The cross sections at different positions of the device are shown. In the description using these figures, the XYZ coordinate system is used for the description. Figure 1 In the present invention, the X direction in which the first processing unit D1 and the second processing unit D2 are arranged is sometimes referred to as the left-right direction, the side where the first processing unit D1 is located is sometimes referred to as the left, and the side where the second processing unit D2 is located is sometimes referred to as the right. Furthermore, the Y direction is sometimes referred to as the front-back direction, and the side where the carrier block 11 is located is sometimes referred to as the front, and the side where the interface block 13 is located is sometimes referred to as the rear.

[0022] like Figure 1As shown, the coating and developing apparatus 1 is configured, for example, to form a resist pattern on a wafer W that has been loaded into a transport container C called a FOUP (Front Opening Unify Pod). The coating and developing apparatus 1 primarily forms the resist pattern by supplying a resist solution as a chemical to the wafer W to form a resist film as a coating film, thermally treating the wafer W before exposure (PAB), thermally treating the resist film after exposure by the exposure machine EX (PEB), and developing the resist film. The coating and developing apparatus 1 of this example, which is internally equipped with various processing modules 51 to 54 that perform these processes, is connected to, for example, two exposure machines EX.

[0023] The coating and developing device 1 is composed of a first processing section D1, a second processing section D2, and a connecting section D3 that connects these processing sections D1 and D2. These D1 to D3 are arranged in a clean room, for example, along the left-right direction, and are arranged in a U-shape when viewed from above. The processing sections D1 and D2 are separated from each other in the left-right direction and are arranged facing each other, and the distance between them is the width of the connecting section D3 in the left-right direction. The width of the connecting section D3 is shorter than the widths of the processing sections D1 and D2 in the same direction. Figure 2 As shown, the first treatment portion D1, the second treatment portion D2, and the connecting portion D3 have substantially the same length in the Z direction, ie, height.

[0024] A module for forming an anti-etching film, namely a coating processing module 51, is provided in the connection part D3. On the other hand, the first processing part D1 and the second processing part D2 respectively have various processing modules other than the coating processing module 51 and a loading and unloading port for the wafer W, and are connected to different exposure machines EX.

[0025] The first processing unit D1 and the second processing unit D2 have the same structure except that the first processing unit D1 and the second processing unit D2 have, for example, loading ports, conveying mechanisms provided inside, conveying areas for wafers W moved by the conveying mechanisms, and modules, which are symmetrical on the left and right. However, as will be described later, there are modules stacked in the up and down directions, but the number of stacking modules can be the same or different between the first processing unit D1 and the second processing unit D2. Specifically, the first processing unit D1 and the second processing unit D2 are composed of blocks 11 to 13 in which conveying areas (conveying paths) for wafers W are provided. The blocks 11 to 13 are arranged in order from front to back, each having a shell and having an internal space divided from each other.

[0026] The carrier block 11 is configured to transport wafers W between the transport container C and the processing block 12, where processing modules 53 and 54 are located. The interface block 13 is connected to the exposure machine EX and is used to transport wafers W between the exposure machine EX and the processing block 12. Thus, the first processing unit D1 and the second processing unit D2 are configured to independently load and unload the transport container C, are connected to the exposure machine EX, and perform similar processing.

[0027] Next, the details of the processing block 12 are described. The processing block 12 is composed of four layers 12a to 12d stacked on each other, which are divided into four parts in the longitudinal direction. Each layer 12a to 12d is roughly the same in structure. As a representative example, Figure 1 In the uppermost layer 12 d shown, a transfer area for wafers W extending in the front-rear direction is provided in the center portion in the left-right direction, and a transfer mechanism 41 is provided in the transfer area.

[0028] The transport mechanism 41 includes a base 41a that can freely move along the transport area, freely rise and fall, and freely rotate about a vertical axis, and a wafer W holder 41b that can freely advance and retreat on the base. The transport mechanism 41 can transfer wafers W to and from processing modules 53 and 54 surrounding the transport area. The transport mechanisms 42 to 45 described below also have the same structure as the transport mechanism 41.

[0029] Of the layers 12a to 12d each having such a transfer area, for example, the lowest layer 12a constitutes an outward path for transferring wafers W from the carrier block 11 to the interface block 13. The layers 12b to 12d other than layer 12a constitute a return path for transferring wafers W exposed by the exposure unit EX from the interface block 13 to the carrier block 11. In particular, in order to enable the layers 12b to 12d constituting the return path to perform the same processing on wafers W, for example, the same type of processing modules, such as the processing modules 53 and 54, are arranged.

[0030] A processing module 54 is disposed on each of the layers 12b to 12d, on the inner side of the transfer area in the left-right direction, that is, on the side closer to the connection portion D3. The processing module 54 is a development processing module 54 that develops the resist film by supplying a developer to the exposed wafer W. Hereinafter, it may also be referred to as the development module 54. The development module 54 has a substantially similar structure to the coating processing module 51 described below, except that the chemical solution supplied to the wafer W is the developer.

[0031] Furthermore, multiple processing modules 53 are arranged on the outer sides of the transfer area in the left-right direction, for example, in a stacked manner in the vertical direction. The processing modules 53 perform a heat treatment (post-exposure bake: PEB) on the wafers W after the resist film is exposed. Three of these stacked processing modules 53 are arranged in the front-to-back direction. Hereinafter, the processing modules 53 may also be referred to as thermal treatment modules 53. The thermal treatment modules 53 have the same structure as the thermal treatment modules 52 described below.

[0032] The interface block 13 is provided with a tower T3 and a transfer mechanism 45 having the same structure as the tower T1 and transfer mechanism 41 described later. The tower T3 extends vertically across each of the sections 12a to 12d and is located behind the transfer area of ​​each section 12a to 12d. The tower T3 can transfer wafers W to the transfer mechanism 41 and the transfer mechanism 45. The transfer mechanism 45 can transfer wafers W between the tower T3 and the exposure unit EX and is located inside the tower T3, for example, in the left-right direction.

[0033] Below, refer to Figure 3 Main view, Figure 4 The carrier block 11 will be described with reference to a longitudinal sectional front view of FIG. A transfer container C, which is transported by an external transfer mechanism for carriers (not shown) provided within the clean room where the coating and developing apparatus 1 is installed, is placed on the carrier block 11. The carrier block 11 is used to load and unload wafers W from the transfer container C and to transfer wafers W to the processing block 12 and the interface block 13.

[0034] The shell that constitutes the carrier block 11 is set to 21. The shell 21 is formed into a roughly rectangular parallelepiped shape, and is recessed in a manner such that a part of the corner side of the outer side in the left and right directions at the front side of its upper part and in the left and right directions is cut off. That is, recesses are formed in the upper part of the left side in front of the carrier block 11 of the first processing unit D1 and the upper part of the right side in front of the carrier block 11 of the second processing unit D2, respectively, and these recesses form a rectangular parallelepiped shape that is long in the vertical direction and long in the left and right directions. Moreover, in the shell 21, the part located on the lower side of the recess is constituted as a loading platform 22, and a loading platform 23 is provided on the loading platform 22. The loading platform 23, together with the wafer W loading and unloading port 25A and the door 25 described later, constitute a loading port, and the conveying container C is placed on the loading port to carry the wafer W into and out of the carrier block 11.

[0035] A transfer unit 31 is provided in front of each loading platform 22. A transfer mechanism 32 and a temporary loading platform 33 are provided in the transfer unit 31. The temporary loading platform 33 is stacked in two layers, for example, and a plurality of, for example, two, loading platforms 34 are provided in parallel in the left-right direction on each layer, and the conveying container C is placed on each loading platform 34. The external conveying mechanism delivers the conveying container C to the loading platform 34 of the temporary loading platform 33 on the upper layer. The transfer mechanism 32 includes a multi-jointed arm 32a, not shown, capable of holding a held portion provided on the upper portion of the conveying container C, and a moving mechanism, not shown, capable of moving the multi-jointed arm 32a up and down and to the left and right. The transfer mechanism 32 transfers the conveying container C between each loading platform 34 and each loading platform 23 provided on the loading platform 22. The transfer container C loaded on the stage 23 and loaded with wafers W unloaded from the device is transferred to the stage 34 of the transfer unit 31, thereby temporarily withdrawing from the stage 23 and returning to the stage 23 when the wafers W processed by the device are to be stored.

[0036] The stage 23 is described in further detail. For example, two stages 23 are arranged in the left and right directions. The stage 23 moves between a loading position on the rear side for moving the wafer W in and out and an unloading position on the front side for transferring the container C to and from the transfer mechanism 32.

[0037] A loading / unloading port 25A (see FIG. 2A ) for loading and unloading the wafer W into and out of the carrier block 11 is formed on the side wall of the front side of the housing 21 . Figure 1 、 Figure 4 ), the loading / unloading opening 25A is disposed opposite to the conveying container C placed on the loading platform 23. A door 25 is provided at each loading / unloading opening 25A. The door 25 is capable of holding a lid of the conveying container C on the loading platform 23 at the aforementioned loading position, and is movable while holding the lid to open and close the loading / unloading opening 25A.

[0038] Since the housing 21 of the bearing block 11 is formed with a recess as described above, the height direction of the recess is as follows: Figure 1 As shown, within the housing 21, the inner side (connection portion D3 side) in the left-right direction is wider than the outer side in the front-back direction. Multiple processing modules (heating modules) 52 are arranged in front of this wide space. Processing modules 52 are, for example, heat-treating substrates before exposure to heat them after resist coating (Post Apply Bake: PAB), and are hereinafter sometimes referred to as heat-treating modules 52.

[0039] The heat treatment module 52 includes a flat rectangular parallelepiped housing that is long in the front-to-back direction, and a wafer W loading and unloading port is formed on a relatively small surface located on the rear side of the housing. Figure 1 、 Figure 4 As shown, the heat treatment modules 52 are arranged in a manner such that two are arranged in a horizontal direction and a plurality of them are stacked in a vertical direction. The plurality of heat treatment modules 52 can be stacked, for example, up to the vicinity of the upper wall of the housing 21 .

[0040] When viewed from above, the front side of the stack of heat treatment modules 52 is positioned forward of the loading / unloading port 25A. The stack of heat treatment modules 52 and the stage 23 are arranged side by side in the left-right direction, with the rear side positioned further back than the loading / unloading port 25A. This configuration positions the front side of the stack forward of the loading / unloading port 25A, meaning that the stage 23 is not positioned in front of the stack. This reduces the length of the carrier block 11 in the front-to-back direction, thereby reducing the footprint of the coating and developing apparatus 1. The sides of the stack serve as space for the transport mechanism 42, described later, to move.

[0041] Furthermore, a hot plate is provided on the front side of the heat treatment module 52 to place and heat the wafer W. A movable body, provided on the rear side of the heat treatment module 52, moves toward the hot plate along with the wafer W to transfer the wafer W to and from the transport mechanism 43 (described later). The movable body is provided with a flow path for a cooling fluid and also serves to cool the wafer W after being heated by the hot plate before it is moved to the rear side of the heat treatment module 52. Similar to the heat treatment module 52, other heat treatment modules, such as the heat treatment module 53, also have a structure comprising a hot plate and a movable body.

[0042] The conveying area within the carrier block 11 is an area within the shell 21. The heat treatment module 52 is arranged in the area on the inner side (connection portion D3 side) in the left-right direction. Therefore, the inner area is narrower in the front-to-back direction than the outer area. The narrow area in the front-to-back direction is set as the conveying area 26, and the wide area in the front-to-back direction is set as the conveying area 27. A conveying mechanism 42 for carrying wafers W in and out of the conveying container C is provided in the conveying area 27. The conveying area 27 constitutes the upstream and downstream ends of the conveying path of the wafer W in the coating and developing device 1. In the shell 21, the tower T1, the conveying mechanism (first conveying mechanism) 43, and the tower T2 are arranged in order toward the inner side in the left-to-right direction. The tower T2 and the conveying mechanism 43 are provided in the conveying area 26. The tower T1 is provided in the conveying area 27 and faces the conveying area 26 and the conveying area of ​​the processing block 12.

[0043] Tower T1, like Tower T3, is configured to extend vertically across each of the stages 12a to 12d. It is located in front of the transfer areas of each of the stages 12a to 12d and is capable of delivering wafers W to the transfer mechanisms 42 and 43 and the transfer mechanisms 41 of each of the stages 12a to 12d. A plurality of wafer delivery ports (not shown) are formed in Tower T1 in the vertical direction so as to be accessible to the transfer mechanisms 41 of each of the stages 12a to 12d.

[0044] The wafer transfer section may be composed of, for example, a transfer module for temporarily placing individual wafers W and a temperature adjustment module. The transfer module may include, for example, a plurality of pins arranged horizontally as a transfer section, to which wafers W are transferred by transport mechanisms 41 to 43. For example, a temperature adjustment module may be included within a stage serving as the transfer section, and a refrigerant flow path may be provided within the stage to cool the temporarily placed wafers W. Tower T2 also has the same structure as Tower T1.

[0045] The transport mechanism 42 transports wafers between the transport container C on the stage 23 at the aforementioned loading position and the tower T1. Furthermore, the transport mechanism 42 accesses the tower T1 from the outside in the left-right direction (the side opposite to the side where the connection portion D3 is provided). The transport mechanism 43 transports wafers W between the tower T1, the tower T2, and the heat treatment module 52. Figure 1 In FIG, the flow of wafers W taken out of the transfer container C in the second processing unit D2 and directed to the connection unit D3 is indicated by two-dot chain arrows. Wafers W are also transferred in the first processing unit D1 in the same manner as in the second processing unit D2.

[0046] As shown in the figure, transport areas 26 and 27, connected to a loading / unloading port 25A forming the load port and a transport mechanism 44 serving as a shared transport mechanism provided at the connection portion D3, form a transport path. Furthermore, a transport mechanism 43 is provided within the transport area 26, which accesses the thermal processing module 52. Specifically, by having the transport mechanism 43 perform both transport of wafers W from the load port to the connection portion D3 and transport to the thermal processing module 53, an increase in the manufacturing cost of the device due to an increase in the number of transport mechanisms is prevented.

[0047] The connection section D3 (connection block) is provided to connect the carrier blocks 11 of the first processing section D1 and the second processing section D2. Furthermore, the connection section D3 includes a housing 24, which is provided to connect the housings 21 located on the left and right sides of the housing 24. A tower T2 is provided to span the housings 24 and 21.

[0048] In the housing 24 , a conveying mechanism 44 is disposed at the rear side, and a plurality of coating process modules 51 are stacked in front thereof. The coating process modules 51 are arranged in the same row as the heat treatment modules 52 of each carrier block 11 in a plan view.

[0049] The transport mechanism 44 is positioned between the towers T2 of the first processing unit D1 and the second processing unit D2. It has access to both towers T2 and the coating process module 51, and is used to transport wafers W thereto. For example, the transport mechanism 44 transports wafers W received from either tower T2 to the coating process module 51. After the coating process is complete, the wafers W are transported back to the tower T2 that received them, following the reverse process of the wafers W transferred to the coating process module 51. Thus, the transport mechanism 44 and the coating process module 51 form a shared transport mechanism and a shared coating module shared by the first processing unit D1 and the second processing unit D2.

[0050] use Figure 1 、 Figure 4 The coating processing module 51 is briefly described. The coating processing module 51 has two areas for performing coating processing, and the two areas are arranged in the left and right directions ( Figure 4 Specifically, the coating processing module 51 includes two cups 56, a rotating holding disk 57, and a supply mechanism (not shown). The rotating holding disk 57 is disposed in each cup 56. The supply mechanism (not shown) supplies a resist as a chemical solution to the wafer W. The rotating holding disk 57 suction-holds the wafer W conveyed from behind the cup 56 by the conveying mechanism 44 and rotates it about a vertical axis.

[0051] The supply mechanism of the coating module 51 includes a movable portion that moves horizontally by a motor drive, and a nozzle mounted on the movable portion. The nozzle is movable between a processing position above the rotating holding disk 57 and a standby position located outside the cup 56 when viewed from above. The resist is supplied from the processing position to the wafer W and rotated to perform spin coating, thereby forming a resist film. The coating area described above and the various components contained therein, such as the cup 56, are not limited to the number described and may be greater or less than the number described.

[0052] The coating and developing device 1 includes a control unit 100. The control unit 100 is composed of a computer having a CPU and a storage unit, and is used to control the various parts of the coating and developing device 1. The storage unit records a program that includes a group of steps (commands) for controlling the operation of various processing modules and conveying mechanisms 41 to 45, the opening and closing of the door 25, etc. The control unit 100 includes one or more control circuits to be able to execute the steps of the program. The program is stored in a storage medium such as a hard disk, an optical disk, a magneto-optical disk, a memory card, a non-volatile memory, etc., and is installed from these storage media to the computer. The installed program outputs control signals from the control unit 100 to the various parts of the coating and developing device 1, thereby controlling the operation of the various parts of the device as described above.

[0053] Next, the transport path of the wafer W in the coating and developing apparatus 1 and the processing performed by each module are described. Figure 1 The wafer W is removed from the transfer container C placed on the stage 34 of the first processing unit D1 or the second processing unit D2 by the transfer mechanism 42 and transferred to the tower T1 → tower T2 → coating processing module 51. The wafer W with the resist film formed in the coating processing module 51 is transferred to the tower T2 → heat treatment module 52 for PAB.

[0054] After PAB, wafers W pass through tower T1, the lowest layer 12a, and are transported to tower T3, where they are exposed to the exposure unit EX. The exposed wafers W are then transported through tower T3 to the thermal treatment module 53 on any of the layers 12b-12d, where they are then transported to the development module 54 for PAB and development. Wafers W, after development, with resist patterns formed, return to tower T1 and are then transported to the transport container C.

[0055] As described above, in the coating and developing apparatus 1, a connection portion D3 equipped with a coating process module 51 is provided between the first processing section D1 and the second processing section D2, each of which performs processes other than resist film formation. The coating process module 51 is shared between the first and second processing sections D1 and D2. The reason for this configuration will be explained. For the purpose of this description, two coating and developing apparatuses are used as a comparative example, with a layer comprising the aforementioned developing module 54 and the thermal treatment module 53 for PEB and a layer comprising the coating process module 51 and the thermal treatment module 52 for PAB stacked on top of each other for processing block 12. These two coating and developing apparatuses move the wafer W between the layers using the exposure unit EX and the interface block 13 to form and develop the resist film, without being connected via the connection portion D3. Thus, in this comparative example, the two coating and developing apparatuses must each have a coating process module 51 installed for each processing block 12.

[0056] The developing module 54 supplies developer to the wafer W to progress the development reaction of the resist film, and removes the developer by supplying a cleaning solution, so the required residence time L1 of the wafer W is relatively long. In contrast, the required residence time L2 of the wafer W in the coating processing module 51 is relatively short, shorter than the required residence time L1 mentioned above. In addition, the required residence time of the wafer W (hereinafter referred to as the required residence time) is the time from the time the wafer W is placed on the module to the time when the conveying mechanism can move out the processed wafer W. With respect to the coating processing module 51 and the developing module 54, since the wafer W is placed on the rotating holding disk 57, it is the time from the time the wafer W is placed on the rotating holding disk 57 to the time when the rotating holding disk 57 stops rotating and the processed wafer W can be released.

[0057] Furthermore, if the number of coating process modules 51 increases, the state of the formed resist film may vary between wafers W due to individual differences between modules. To suppress this variation, there is a concern that a considerable amount of time may be required to adjust the module's behavior before processing. In other words, compared to providing a coating process module 51 for each processing block 12 as in the comparative example, sharing coating process modules 51 between processing blocks 12 to reduce the number of modules installed can prevent the aforementioned variation in processing between wafers W and the prolonged module adjustment time, and is therefore ideal.

[0058] Moreover, even if the number of wafers mounted is reduced by sharing the coating process module 51, since the required residence time in the coating process module 51 is short as described above, it is possible to suppress processing delays of wafers W after the coating process module 51. Therefore, the coating and developing device 1 is configured such that the coating process module 51 is shared between the first processing unit D1 and the second processing unit D2 as described above. In addition, from the perspective of being able to reduce the manufacturing cost and operating cost of the device, it is also preferable to reduce the number of wafers mounted by sharing the coating process module 51. In addition, corresponding to the sharing of the coating process module 51, the conveying mechanism that accesses the coating process module 51 is also shared as the conveying mechanism 44 by the first processing unit D1 and the second processing unit D2, which is preferable from the perspective of reducing the manufacturing cost of the device.

[0059] Supplementary explanation will be given on preventing delays in the processes after the coating process module 51. Specifically, the multiple developing modules 54 provided in one process block 12 are described as one unit (first unit). The required residence time in each heat treatment module is set to a relatively short time.

[0060] Assuming that wafers W can be transported to the exposure unit EX with a relatively short loading interval (Case 1), in the section after the exposure unit EX in the transport path of the wafers W in the coating and developing apparatus 1, the longer of the interval between the wafers W unloading from the exposure unit EX and the wafers W unloading from the first unit affects the transport interval for the wafers W to be transported to the transport container C. In other words, the throughput of the coating and developing apparatus 1 is affected by the unloading interval of the wafers W from the exposure unit EX or the first unit.

[0061] On the other hand, when the loading interval for wafers W into the exposure machine EX is relatively long (Case 2), the transport interval for transferring wafers W to the exposure machine EX and the modules that perform post-exposure processing becomes longer, and the interval from the time a wafer W is processed by the exposure machine EX and these modules until the next wafer W is processed becomes longer. In other words, processing in the exposure machine and the modules that perform post-exposure processing is delayed. In Case 2, when this state occurs, the loading interval for wafers W into the exposure machine EX, rather than the unloading interval for wafers W from the exposure machine EX or the first unit, affects the transport interval for transferring wafers W into the transfer container C. This also increases compared to Case 1. In other words, the throughput of the coating and developing apparatus 1 decreases. However, because the required dwell time in the coating processing module 51 is short, the coating and developing apparatus 1 can transfer wafers W to the exposure machine EX with a relatively short loading interval, thereby ensuring high throughput.

[0062] Furthermore, in the coating and developing apparatus 1, by placing the coating processing module 51 between the processing section D1 and the processing section D2, the number of layers containing the developing modules 54 can be increased compared to the number of layers in the comparative example when the coating and developing apparatus 1 is installed in a clean room with limited installation height. As described above, the required residence time of the developing modules 54 is relatively long, so ensuring sufficient throughput of the coating and developing apparatus 1 may require a relatively large number of modules. When the number of modules is increased, the number of developing modules 54 arranged in the front-to-back direction of the coating and developing apparatus 1 can be reduced. Consequently, the length of the processing block 12 in the front-to-back direction can be reduced, thereby reducing the footprint of the coating and developing apparatus 1. Furthermore, in the case of a large number of developing modules 54 arranged in the front-to-back direction, the height of the coating and developing apparatus 1 can be reduced. In other words, the structure of the coating and developing apparatus 1 allows for high throughput while preventing the apparatus from becoming larger in size by reducing the footprint and height of the apparatus.

[0063] In addition, in the connection portion D3, a plurality of coating process modules 51 can be stacked, for example, near the upper wall of the housing 24. Therefore, other coating process modules that perform other processes before the exposure process can also be stacked together with the coating process module 51 as needed. In other words, other coating process modules for forming a coating film can be provided to replace a portion of the coating process modules 51 for forming a resist film, which are shown as being provided in a plurality. Specific examples include a coating process module 58 (not shown) for forming a lower layer film formed on the lower layer of a resist film such as an anti-reflective film, and a coating process module 59 (not shown) for forming a protective film formed to cover and protect the resist film when performing liquid immersion exposure.

[0064] Coating process modules 58 and 59 apply a different type of chemical solution (coating liquid) to wafer W than the resist, but otherwise have the same structure as coating process module 51. Therefore, the required dwell time in these coating process modules 58 and 59 is the same as that in coating process module 51 and shorter than that in developing module 54, thereby preventing a reduction in throughput due to the shared use of processing units D1 and D2. Furthermore, wafer W is processed in each of these coating process modules 58 and 59, and then undergoes PAB in thermal treatment module 52. Therefore, when coating process modules 58 and 59 are provided, wafer W is transported in the following sequence: coating process module 58 → thermal treatment module 52 → coating process module 51 → thermal treatment module 52 → coating process module 59 → thermal treatment module 52, and then transported toward exposure unit EX.

[0065] In addition, regarding the coating processing module 51, it is described that the coating processing module 51 is shared by the first processing unit D1 and the second processing unit D2, but it is not limited to sharing like this. Two coating processing modules 51 are arranged in the left-right direction in the connection unit D3. Even if the coating processing module 51 on the left is set as a module dedicated to processing the wafer W transported from the first processing unit D1, and the coating processing module 51 on the right is set as a module dedicated to processing the wafer W transported from the second processing unit D2, the effect of the device described above can be obtained. Therefore, as long as a common connection unit D3 is set for the first processing unit D1 and the second processing unit D2, and the structure of the conveying mechanism 43 of the connection unit D3 is shared by the wafers W transported from the first processing unit D1 and the wafers W transported from the second processing unit D2, it will be sufficient.

[0066] (Variation)

[0067] In the present disclosure, the blocks of the first processing section D1 and the second processing section D2, as well as the connection section D3, are preferably formed as zones demarcated by the housing to optimize manufacturing efficiency of the coating and developing device 1. However, this is not limiting. For example, a single housing may contain multiple access zones, each separated by a partition wall, or the access zones may not be separated by a partition wall. As an example, two carrier blocks 11 and the connection section D3 may be formed in a single housing, and the processing block 12 and the interface block 13 may be formed in a single housing. These blocks and the connection section D3 may be separated by partition walls as needed.

[0068] From the perspective of optimizing the throughput of the coating and developing device 1 and suppressing the large-scale application, it is preferred to configure the first processing section D1, the second processing section D2, and the connecting section D3 as disclosed herein, but it is not limited thereto. For example, in this example, the first processing sections D1 and D2 are arranged facing each other when viewed from above, but the area other than the supporting block 11 connected by the connecting section D3 can also be arranged in a manner such that the first processing section D1 extends on the front side and the second processing section D2 extends on the rear side, or in a manner such that the first processing section D1 extends on the left side and the second processing section D2 extends on the right side. In addition, the coating and developing device 1 disclosed herein includes two processing sections D1 and D2, but may also include three or more processing sections. In this case, the connecting sections D3 are respectively provided in a manner such that adjacent processing sections are connected.

[0069] In addition, if Figure 1 As shown, the process modules, transport mechanisms, towers, etc. are arranged bilaterally symmetrically in the first processing sections D1 and D2 with the connection section D3 as a reference, but this is not limiting. For example, the process modules 53 and 54 of each processing block 12 may be arranged at the same position when viewed from above. For example, the process module 53, which is a heat treatment module, may be arranged on the left side of the transport area, and the process module 54, which is a development module, may be arranged on the right side of the transport area. Furthermore, the arrangement, arrangement, and number of process modules are merely examples and are arbitrary.

[0070] The types of processing modules configured are not limited to the examples described above, and processing modules for performing processes other than those described above can be configured as needed. For example, the following modules may also be provided: a hydrophobic treatment module that supplies a processing gas for performing a hydrophobic treatment to the wafer before forming the resist film or the underlying film to perform the hydrophobic treatment; a heat treatment module that performs a post-bake to heat the wafer W after development; a pre-exposure cleaning module that cleans the wafer W before exposure after forming the resist film; a post-exposure cleaning module that cleans the wafer W before PEB after exposure; and a camera module that photographs the surface of the wafer W before or after the series of processes described in the coating and developing device 1 to inspect the wafer W, etc.

[0071] About the hydrophobization module, for example, in the carrier block 11, a part of the multiple heat treatment modules 52 stacked is replaced by the hydrophobization module. In the case of a hydrophobization treatment module being set like this, after hydrophobization treatment, wafer W is transported to the connection portion D3 and the formation of a resist or an anti-reflective film is carried out. About the heat treatment module for post-baking, for example, a part of the heat treatment module 53 used by multiple PEBs is replaced by the module. About each cleaning module, by being arranged in the interface block 13 or by replacing a part of the developing module 54 of the processing block 12 with the cleaning module to set. Each camera module is, for example, arranged in the free space in the carrier block 11 such as the rear side of the conveying mechanism 42.

[0072] The arrangement of the processing modules in each layer 12a-12d may also vary. Layer 12a, which forms the outbound path of the transport path, may not have processing modules 53 and 54, or may instead have processing modules that perform pre-exposure processing. Furthermore, the processing block 12 need not consist of layers 12a-12d. For example, the processing block 12 may be configured such that a plurality of transport mechanisms 41 are provided in a transport area extending to the upper portion of the processing block 12, with the thermal treatment modules 53 and developing modules 54 stacked in multiple layers, arranged on the left and right sides of the transport area. The developing modules 54 utilize a developer solution, but this is not limited to this. Development may also be performed using a developing gas, or both a developer solution and a developing gas may be provided.

[0073] Alternatively, the processing block 12 may be configured to perform processes such as post-exposure cleaning without developing or PEB and development, and the processes not performed by the coating and developing apparatus 1 in PEB and development may be performed by an apparatus serving as the transport destination of the transport container C. Therefore, the substrate processing apparatus of the present technology may also have an apparatus configuration without the development module 54.

[0074] The loading platform 22 is formed as the upper surface of the protruding lower portion of the shell 21, so that only one layer is formed in the vertical direction. However, the present invention is not limited to this. The loading platform can also be installed in the recessed portion of the upper portion of the shell 21 to form two or more layers, and the loading platform 23 can be arranged on each layer. In other words, multiple layers of loading ports can be provided in the vertical direction. Moreover, the loading platform 22 can also be formed in a manner that only the lower portion of the shell 21 protrudes forward without recessing the upper portion of the rectangular shell 21. In addition, the loading platform 22 can also be provided on the outer side of the shell 21 in the left-right direction. Moreover, the transfer container C is not limited to being transferred to the loading platform 34 of the temporary loading platform 33 on the upper layer by an external transfer mechanism. The transfer container C can also be directly transferred to the loading platform 23. Therefore, the transfer unit 31 can also be omitted.

[0075] In addition, the coating and developing device 1 described so far is a device structure in which a connecting portion D3 connects two processing units D1 and D2, but it can also be a structure in which two or more connecting portions D3 connect three or more processing units. For example, a processing unit D4 having the same structure as processing units D1 and D2 is set between processing unit D1 and processing unit D2, and processing units D1 and D4 are connected by one connecting portion D3, and processing units D4 and D2 are connected by another connecting portion D3. A resist film is formed on a portion of wafer W brought into the device from processing unit D4 and a wafer W brought into the device from processing unit D1 by one connecting portion D3. A resist film is formed on the other portion of wafer W brought into the device from processing unit D4 and a wafer W brought into the device from processing unit D2 by another connecting portion D3. Moreover, a structure can also be configured in which each wafer W is developed by the developing module 54 of the processing unit into which each wafer W is brought. Furthermore, the number of process modules such as the heat treatment modules 52 and 53, the coating process module 51, and the developing module 54 is not limited to the number described above and shown in the drawings, and may be increased or decreased as appropriate. For example, such an increase or decrease can be achieved by appropriately changing the number or size of the blocks in which the process modules are arranged.

[0076] Furthermore, the wafer W is not limited to a wafer and may also be other substrates such as substrates used in flat panel display manufacturing. Furthermore, the embodiments disclosed herein should be considered in all respects to be illustrative rather than restrictive. The above embodiments may be omitted, replaced, modified, and combined in various ways without departing from the scope of the appended claims and their spirit.

[0077] Description of Reference Numerals

[0078] C: transport container; D1: first processing unit; D2: second processing unit; D3: connection unit; EX: exposure machine; W: wafer; 1: coating and developing device; 25A: loading and unloading port; 44: transport mechanism; 51: coating processing module; 53: heat treatment module; 54: developing module.

Claims

1. A substrate processing apparatus comprising: a first processing unit and a second processing unit, wherein the first processing unit and the second processing unit are respectively connected to a first exposure machine and a second exposure machine for exposing a substrate, and each includes a processing module for processing the substrate; a first loading / unloading port and a second loading / unloading port, wherein the first loading / unloading port and the second loading / unloading port are respectively provided in the first processing section and the second processing section for loading and unloading the substrates into and out of a transport container for transporting the substrates; a connecting portion, in which a coating module for coating the substrate with a chemical solution to form a coating film is provided, the connecting portion being connected to the first processing portion and the second processing portion; as well as The shared transport mechanism is shared by the substrates respectively transported into the first processing unit and the second processing unit from the first loading / unloading port and the second loading / unloading port, and is provided at the connection portion to deliver each substrate to the coating module.

2. The substrate processing apparatus according to claim 1, wherein: The processing module includes a heating module for heating the substrate on which the coating film is formed. A first conveying mechanism for delivering the substrate to and from the heating module is provided in the substrate conveying path connecting each of the first and second loading / unloading ports and the common conveying mechanism.

3. The substrate processing apparatus according to claim 1 or 2, wherein: The coating module is shared by the substrates respectively carried into the first processing unit and the second processing unit from the first loading / unloading port and the second loading / unloading port. The first processing unit and the second processing unit each include a developing module as the processing module for developing the exposed substrate. The first processing unit includes a first loading / unloading block provided with the first loading / unloading port, and the second processing unit includes a second loading / unloading block provided with the second loading / unloading port. The developing modules are respectively installed between the first loading / unloading block and the first exposure machine and between the second loading / unloading block and the second exposure machine.

4. The substrate processing apparatus according to claim 2, wherein: The heating modules are respectively provided between the first loading / unloading port and the coating module and between the second loading / unloading port and the coating module in a plan view.

5. A substrate processing method comprising the following steps: The substrate is processed by processing modules respectively provided in a first processing unit and a second processing unit, wherein the first processing unit and the second processing unit are respectively connected to a first exposure machine and a second exposure machine for exposing the substrate; loading and unloading the substrate into and out of a transport container for transporting the substrate through a first loading / unloading port and a second loading / unloading port provided in the first processing unit and the second processing unit, respectively; forming a coating film by applying a chemical solution to the substrate through a coating module provided at a connection portion connected to the first processing portion and the second processing portion; as well as The substrates are delivered to the coating module by a common transport mechanism provided at the connection portion and shared by the substrates respectively transported into the first processing unit and the second processing unit from the first loading / unloading port and the second loading / unloading port.

6. The substrate processing method according to claim 5, wherein: The method comprises the following steps: heating the substrate on which the coating film is formed by a heating module included in the processing module, The method includes the step of transferring the substrate to the heating module by a first transport mechanism provided in a substrate transport path connecting the first and second transport ports to the common transport mechanism.

7. The substrate processing method according to claim 5 or 6, wherein: The coating module is shared by the substrates carried in from the first and second loading / unloading ports. The substrate processing method includes the following steps: developing the exposed substrate by using the developing modules as the processing modules respectively provided in the first processing unit and the second processing unit; The first processing unit includes a first loading / unloading block provided with the first loading / unloading port, and the second processing unit includes a second loading / unloading block provided with the second loading / unloading port. The developing modules are respectively installed between the first loading / unloading block and the first exposure machine and between the second loading / unloading block and the second exposure machine.

8. The substrate processing method according to claim 6, wherein: The heating modules are respectively provided between the first loading / unloading port and the coating module and between the second loading / unloading port and the coating module in a plan view.

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