Mapping table management method, storage device and electronic device

Abstract

The invention provides a mapping table management method, storage equipment and electronic equipment, the method is applied to the storage equipment, the storage equipment comprises a static random access memory and a flash memory, the static random access memory stores a first mapping table, and the flash memory stores a second mapping table. The method comprises the following steps: when first data corresponding to a target data block is loaded from a second mapping table to a first mapping table and no residual cache space exists in a cache region of the first mapping table, screening out a preset data block from the cache region based on a preset cache replacement algorithm, determining a free bit formed in the cache region after the preset data block is screened out; the first data is stored in the idle bit; compressing the preset data block to obtain second data; and storing the second data to the compression area of the first mapping table. The method can improve the data access rate.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of storage, in particular to a mapping table management method, a storage device and an electronic device. BACKGROUND

[0002] The storage device is usually configured with a mapping table for storing the physical address of a logical block in the flash memory. Generally, the mapping table is stored in the flash memory, and the cache area (Logical address To Physical address cache, L2P cache) of the mapping table is stored in the static random access memory. If the storage device receives a data reading instruction sent by the host computer or other devices, such as obtaining data from the logical block of the storage device, the storage device will first search the cache area of the mapping table during the running of the storage device. If the physical address corresponding to the logical block is found in the cache area, the data in the logical block is read based on the physical address. However, the cache space of the cache area is limited, and all data in the mapping table cannot be placed in the cache area, which reduces the probability of directly finding the physical address corresponding to the logical block in the cache area. Therefore, the mapping table needs to be loaded in the flash memory, which results in long loading time and prolongs the data access time. SUMMARY

[0003] The embodiments of the present application disclose a mapping table management method, a storage device and an electronic device, which solve the technical problem that the limited storage space of the cache area of the mapping table reduces the success rate of querying data in the cache area and affects the data access rate.

[0004] The present application provides a mapping table management method applied to a storage device, wherein the storage device comprises a static random access memory and a flash memory, the static random access memory stores a first mapping table, and the flash memory stores a second mapping table. The method comprises the following steps: when loading the first data corresponding to a target data block from the second mapping table to the first mapping table, and there is no remaining cache space in the cache area of the first mapping table, screening a preset data block from the cache area based on a preset cache replacement algorithm, determining the idle bits formed in the cache area after screening the preset data block; storing the first data in the idle bits; compressing the preset data block to obtain second data; and storing the second data to the compression area of the first mapping table.

[0005] In some embodiments of the present application, the compressing the preset data block comprises: obtaining a serial number corresponding to each pair of mapping relationships in the preset data block, the serial number being determined based on a physical address in the corresponding mapping relationship; dividing pairs of mapping relationships with continuous serial numbers into a same group based on the serial numbers to obtain at least one group; determining a target group from the at least one group; and compressing data corresponding to each pair of mapping relationships in the target group based on a preset compression format.

[0006] In some embodiments of the present application, the compression format comprises a logical address, a physical address, and a continuous length between the logical address and the physical address.

[0007] In some embodiments of the present application, the storing the second data into the compression area of the first mapping table further comprises: obtaining a preset number of the preset data block, and a capacity of the compression area, the preset number being determined according to a logical address of the preset data block; and determining a first storage location of the second data in the compression area according to the preset number and the capacity.

[0008] In some embodiments of the present application, the method further comprises: if the second data has a historical storage location in the compression area, replacing the historical storage location with the first storage location.

[0009] In some embodiments of the present application, the method further comprises: receiving a data reading instruction, the data reading instruction carrying a target logical address of a logical block to be read; converting the target logical address into a query number; searching in the cache area based on the query number; if the cache area does not include a target physical address matching the target logical address, determining a second storage location of the compression area based on the query number and the capacity of the compression area; and if a number corresponding to the second storage location is the same as the query number, searching for the target physical address corresponding to the target logical address in the second storage location.

[0010] In some embodiments of the present application, the method further comprises: if the target physical address is not found in the second storage location, loading data of the second mapping table into the cache area, and searching the loaded cache area.

[0011] In some embodiments of the present application, the converting the target logical address into a query number comprises: determining the query number based on the target logical address and a preset value.

[0012] The present application also provides a storage device, wherein a computer program stored in the storage device is executed by a processor to implement the mapping table management method.

[0013] The application further provides an electronic device, comprising a storage device and a processor, wherein the processor is configured to execute a computer program stored in the storage device to implement the mapping table management method.

[0014] In the mapping table management method provided by the application, the storage device comprises a static random access memory and a flash memory, the static random access memory stores a first mapping table, and the flash memory stores a second mapping table. When corresponding data cannot be queried from the first mapping table, data needs to be loaded from the second mapping table to the first mapping table. When a first data corresponding to a target data block is loaded from the second mapping table to the first mapping table, and there is no remaining cache space in a cache area of the first mapping table, a preset data block is selected from the cache area based on a preset cache replacement algorithm, so as to free an idle bit to store the first data. In order to improve the success rate of data query, the preset data block is compressed into a second data and stored in a compression area, so that the storage space of the data is reduced by compression. In addition, the first mapping table is a copy of the second mapping table, and is usually used to store data in the second mapping table which is accessed more frequently. After the preset data block is selected from the cache area, the preset data block is not discarded directly, but is stored in the compression area by compression, so that the success rate of data query in the first mapping table and the efficiency of data access are improved to a certain extent. BRIEF DESCRIPTION OF DRAWINGS

[0015] Figure 1 FIG. 1 is a schematic diagram of an application scenario of the mapping table management method provided by the embodiments of the application.

[0016] Figure 2 FIG. 2 is a flowchart of the mapping table management method provided by the embodiments of the application.

[0017] Figure 3 FIG. 3 is a schematic diagram of the second mapping table provided by the embodiments of the application.

[0018] Figure 4 FIG. 4 is a schematic diagram of the compression area provided by the embodiments of the application.

[0019] Figure 5 FIG. 5 is a schematic diagram of the compression area provided by the embodiments of the application.

[0020] Figure 6 FIG. 6 is a schematic diagram of compression provided by the embodiments of the application.

[0021] Figure 7 FIG. 7 is a flowchart of the mapping table management method provided by another embodiment of the application. DETAILED DESCRIPTION

[0022] For the convenience of understanding, exemplary descriptions of some concepts related to the embodiments of the application are given for reference.

[0023] It should be noted that "at least one" in the present application means one or more, and "multiple" means two or more than two. The "and / or" describes the association relationship of the associated objects, which means that there can be three kinds of relationships, for example, A and / or B can represent: A exists alone, A and B exist together, and B exists alone, where A and B can be singular or plural. The terms "first", "second", "third", "fourth" and the like (if any) in the specification and claims of the present application and the drawings are used to distinguish similar objects, and are not used to describe a specific order or sequence.

[0024] In order to better understand the mapping table management method, the storage device and the electronic device provided by the embodiments of the present application, first of all, the application scenario of the mapping table management method of the present application is described.

[0025] Figure 1 The figure is a schematic diagram of the application scenario of the mapping table management method provided by the embodiments of the present application. The mapping table management method provided by the embodiments of the present application is applied to the storage device 10, and the storage device 10 can be embedded in the electronic device 20 (as shown in the figure), and can also be connected with the electronic device 20 in the form of external connection, which is not limited by the present application. Figure 1

[0026] The storage device 10 includes but is not limited to a static random access memory 12, a flash memory 13 and at least one processor 14 connected through a communication bus 11. The static random access memory 12 includes a first mapping table, the first mapping table includes a cache area and a compression area, the flash memory 13 includes a second mapping table, and the first mapping table stores part of the more active data of the second mapping table,

[0027] The electronic device 20 can be a mobile phone, a notebook computer, a tablet computer, a server and other computer devices.

[0028] ​In some embodiments of the present application, the electronic device 20 internally stores a firmware, when the firmware is running, the electronic device 20 can automatically trigger a data access instruction based on the running of the firmware, or the electronic device 20 receives a data access instruction issued by the host computer, and the present application does not limit this. In response to the received data access instruction or in response to the automatically triggered data access instruction, the electronic device 20 can issue the data access instruction to the storage device 10, and the data access instruction carries a logical address, which is used to instruct the processor 14 to query the physical address corresponding to the logical address. In response to the data access instruction, the processor 14 queries the data in the cache area of the static random access memory 12, if the physical address matching the logical address is not found in the cache area, the data in the compression area is continuously queried, if the physical address matching the logical address is not found in the compression area, the data is loaded from the second mapping table to the first mapping table, and the query is continued.

[0029] In some embodiments of the present application, when the first data is loaded from the second mapping table to the first mapping table, and the cache area of the first mapping table has no remaining cache space, the preset data block is selected from the cache area, so that the first data is stored in the idle bit corresponding to the preset data block. The preset data block is compressed and stored in the compression area. Through the compression mode, the data storage capacity of the first mapping table is increased, and the efficiency of data access is improved.

[0030] The schematic diagram Figure 1 is only an example of the storage device 10 and does not constitute a limitation on the storage device 10, and can include more or fewer components than the diagram, or combine certain components, or different components, for example, the storage device 10 can also include an input / output device, a network access device, etc.

[0031] Figure 2 is a flowchart of the mapping table management method provided by the embodiments of the present application, which is applied in a storage device (for example, the storage device 10 of Figure 1 ). According to different needs, the order of steps in the flowchart can be changed, and some steps can be omitted.

[0032] Step S201, when the first data corresponding to the target data block is loaded from the second mapping table to the first mapping table, and the cache area of the first mapping table has no remaining cache space, the preset data block is selected from the cache area based on the preset cache replacement algorithm, and the idle bit formed in the cache area after the preset data block is selected is determined.

[0033] In some embodiments of the present application, the static random access memory (SRAM) is a kind of random access memory, and the data stored in it can be kept permanently as long as power is kept on. And the static random access memory is the storage space that the processor of the electronic device can directly address, with the characteristics of fast access speed and low power consumption. Therefore, the first mapping table with cache characteristics is arranged in the static random access memory, and the first mapping table is used to store data with mapping relationship, which is derived from the second mapping table in the flash memory.

[0034] In some embodiments of the present application, the flash memory is a form of electrically erasable programmable read-only memory (EEPROM), which belongs to the storage space that can be directly addressed. The second mapping table is arranged in the flash memory, which stores the mapping relationship of all data stored in the flash memory. Because it takes a long time to load the flash memory, and the data access speed of the static random access memory is greater than that of the flash memory, the mapping relationship with more active access can be stored in the first mapping table, for example, the mapping relationship between physical address A and logical address A, so as to improve the data access rate of the storage device.

[0035] Figure 3 The second mapping table provided by the embodiments of the present application is shown in the schematic diagram as Figure 3 Taking the size of the data block in the second mapping table as 4K as an example, each 4K unit is called a data block (such as Figure 3 PPT3 number0, PPT3 number1 in ), a PPT3 number contains 1024 pairs of mapping relationship, LBA represents logical address, PPA represents physical address, and the mapping relationship represents the corresponding relationship between logical address and physical address.

[0036] In some embodiments of the present application, in order to reduce the access frequency of the flash memory and improve the data access efficiency, the data of the second mapping table is usually loaded into the first mapping table for data access. For example, when the target data block does not exist in the first mapping table, the first data corresponding to the target data block needs to be loaded from the second mapping table to the first mapping table. The first mapping table includes a cache area and a compression area, and the data storage priority of the cache area is higher than that of the compression area.

[0037] In some embodiments of the present application, when the first data is loaded into the first mapping table, the storage state of the cache area is preferentially acquired, and when the cache area has no remaining cache space, the swapping-in and swapping-out operation of the storage device needs to be performed, and specifically, the swapping-out operation includes: screening a preset data block from the cache area based on a preset cache replacement algorithm, wherein the cache replacement algorithm can be one or a combination of multiple of First In First Out (FIFO) and Least Recently Used (LRU), and the present application does not limit this. The purpose of screening the preset data block from the cache area is to form a free bit in the cache area, and the free bit is used to store the first data loaded from the second mapping table.

[0038] Step S202, storing the first data into the free bit.

[0039] In some embodiments of the present application, when the cache area has a free bit, the swapping-in operation can be performed: storing the first data into the free bit. Storing the first data loaded from the second mapping table in the cache area indicates that the first data is currently more active data, and storing the more active first data in the cache area can improve the addressing efficiency of the subsequent storage device.

[0040] Step S203, compressing the preset data block to obtain second data.

[0041] In some embodiments of the present application, the storage space of the compression area is smaller than the storage space of the cache area. When the preset data block is determined, part or all of the data in the preset data block can be compressed, so that the number of query success rate of accessing the first mapping table can be effectively increased.

[0042] In some embodiments of the present application, the preset data block contains at least one pair of data with a mapping relationship, and the mapping relationship is the corresponding relationship between the logical address and the physical address. Each pair of mapping relationship has a corresponding serial number, and the serial number is determined based on the physical address in the corresponding mapping relationship. In an example, the physical address is 0x0000, and the serial number can be 0000. The physical address is 0x0001, and the serial number can be 0001. In other embodiments, the serial number can also be determined based on the logical address, and the present application does not limit this.

[0043] In some embodiments of the present application, the data stored in the preset data block may not be continuous in sequence number due to dynamic storage, allocation, and file fragmentation. Therefore, based on the sequence number, a plurality of mapping relationships with continuous sequence numbers are divided into the same group to obtain at least one group. In an example, assuming that the sequence numbers 1 (simplified description of sequence number) to 49 are continuous, and the sequence numbers 100 to 159 are continuous, the sequence numbers 1 to 49 are divided into the same group, denoted as group 1, and the sequence numbers 100 to 159 are divided into the same group, denoted as group 2.

[0044] In some embodiments of the present application, due to the limited storage space of the compression area, the data in the preset data block may not be completely compressed in the compression process of the preset data block, and then lossy compression may occur. In order to maximize the preservation of the data of the preset data block selected from the cache area, a target group is determined from the at least one group, and the number N of mapping relationship pairs contained in the target group depends on the storage space of the compression area.

[0045] In some embodiments of the present application, the target group can be a group with a larger number of continuous mapping relationships (such as group 2 in the above example), can be a group with an earlier sequence number (such as group 1 in the above example), can be a group with a later sequence number (such as group 2 in the above example), and can be a group with part of the data with continuous mapping relationships (such as part of the data in group 1 or group 2 in the above example), which is not limited in the present application.

[0046] In some embodiments of the present application, after determining the target group, the data corresponding to each mapping relationship pair in the target group is compressed based on a preset compression format to obtain second data, wherein the compression format includes a logical address LBA (or start LBA offset), a physical address PPA (or start PPA), and a continuous length length between the logical address and the physical address.

[0047] In an example, a pair of data with mapping relationship is denoted as L2P descriptor, and after the target group is compressed based on the compression format, the second data is (LBA, PPA, length).

[0048] Figure 4 is a schematic diagram of the compression area provided by the embodiments of the present application, as Figure 4As shown, the PPT3 number represents a preset number corresponding to the preset data block, which is converted according to a logical address corresponding to the preset data block. Assuming that N = 3, the second data contains 3 pairs of mapping relationships, which are L2P descriptor 0, L2P descriptor 1, and L2P descriptor 2, respectively. Each pair of mapping relationships is compressed according to the compression format of (start LBA offset, start PPA, length).

[0049] In step S204, the second data is stored in the compressed region of the first mapping table.

[0050] In some embodiments of the present application, the compressed region includes a plurality of compressed sub-regions, and it is necessary to determine the storage position of the second data in the compressed region. The preset number (PPT3 number) of the preset data block and the capacity M of the compressed region are obtained, and according to the preset number PPT3 number and the capacity M, the first storage position index of the second data in the compressed region can be calculated, index = (PPT3 number) % M.

[0051] Figure 5 FIG. 1 is a schematic diagram of mapping table management provided by an embodiment of the present application, as shown in Figure 5 As shown, the cache region (PPT3 Region Cache) includes storage units of Region 0 to Region N-1, and the compressed region (PPT3 Node Cache) includes storage units of Node 0 to Node M-1. In order to quickly locate the position of a certain PPT3 region (4KB) in the PPT3 Region Cache, the present embodiment provides a PPT3 Region cache Hash Table, which can quickly query the position of the PPT3 region (4KB) cached in the PPT3 Region Cache according to the PPT3 number. As shown in Figure 5 As shown, the PPT3 Region cache Hash Table is provided for managing the mapping table. When the first data is loaded from the second mapping table to the cache region, and there is no remaining storage space in the cache region, the preset data block filtered out from the cache region is stored in the compressed region. Assuming that index = 0, as shown in Figure 5 As shown, the second data is stored at the compressed sub-region Node 0, and the second data carries the preset number (PPT3 number). The second data compresses 4 pairs of mapping relationships, as shown in Figure 5(offset0, ppa0, len0), (offset1, ppa1, len1), (offset2, ppa2, len2), (offset3, ppa3, len3).

[0052] In some embodiments of the present application, if the second data has a historical storage location in the compression region, the first storage location is used to replace the historical storage location.

[0053] In an embodiment of the present application, the storage device includes a static random access memory and a flash memory. The static random access memory stores a first mapping table, and the flash memory stores a second mapping table. When the corresponding data cannot be found in the first mapping table, the data needs to be loaded from the second mapping table to the first mapping table. When the first data corresponding to the target data block is loaded from the second mapping table to the first mapping table, and there is no remaining cache space in the cache region of the first mapping table, a preset data block is selected from the cache region based on a preset cache replacement algorithm, so as to free up the idle bits to store the first data. In order to improve the success rate of data query, the preset data block is compressed into second data and stored in the compression region. In this way, the storage space of the data is reduced by compression. In addition, the first mapping table is a copy of the second mapping table, and is usually used to store the data in the second mapping table that is accessed more frequently. After the preset data block is selected from the cache region, the preset data block is not discarded directly, but is compressed and stored in the compression region. In this way, the success rate of data query in the first mapping table and the efficiency of data access are improved to a certain extent.

[0054] In other embodiments of the present application, the preset data block selected from the cache region is compressed and stored in the compression region in a smaller storage space. In an example, it is assumed that the size of the preset data block PPT3 region selected from the cache region is 4K, and the PPT3 region includes the mapping relationship of 1024 LBAs. The PPT3 region is compressed into second data PPT3 node. The storage space occupied by the PPT3 node in the storage device is smaller than that of the PPT3 region. For example, a continuous 4KB region (both LBA and PPA are continuous) can be compressed into a 10-byte L2P descriptor (4B LBA, 4B PPA, 2B length).

[0055] Figure 6 is a schematic diagram of compression provided by an embodiment of the present application, as Figure 6 shown, the mapping relationship of 1024 LBAs only needs to occupy a storage space of 10B after compression.

[0056] Figure 7 is a flowchart of a mapping table management method provided by another embodiment of the present application, asFigure 7 As shown, after the cache area and the compression area are divided, when accessing the data of the storage device, you can use the following Figure 7 The steps to access are as follows:

[0057] Step S701: receiving a data read instruction.

[0058] In some embodiments of the present application, when an electronic device needs to read data, for example, it needs to read program execution data stored in a storage device, it first determines the logical address of the data and sends a data read instruction to the storage device. The data read instruction is used to instruct the storage device to address based on a mapping table, thereby quickly reading the data in the storage device.

[0059] In another embodiment of the present application, the electronic device can be connected to a host computer. The host computer can send a data read instruction to the electronic device according to a preset data acquisition requirement, and the electronic device forwards the data read instruction to the storage device.

[0060] Step S702: Convert the target logical address into a query number.

[0061] In some embodiments of the present application, when processing a data read instruction, the firmware converts the target logical address carried by the data read instruction into a query number, and the query number can be determined by the target logical address and a preset value. For example, the preset value can be 1024, which represents the number of mapping relationship pairs stored in a PPT3 region, then the query number PPT3 number = LBA / 1024.

[0062] Step S703: Search the cache area based on the query number.

[0063] In some embodiments of the present application, a search is performed in the cache area based on the query number to query whether there is a physical address that has a mapping relationship with the target logical address.

[0064] Step S704 : If the cache area does not include the target physical address that matches the target logical address, a second storage location of the compressed area is determined based on the query number and the capacity of the compressed area.

[0065] In some embodiments of the present application, if the corresponding target physical address is not found in the cache area, the compressed area is searched. When searching the compressed area, a second storage location of the compressed area is calculated based on the query number PPT3 number and the capacity M of the compressed area. For example, second storage location index = PPT3 number % M. In step S705, if the number corresponding to the second storage location is the same as the query number, the target physical address corresponding to the target logical address is searched in the second storage location.

[0066] In some embodiments of the present application, after determining the second storage position index of the compression region, the number corresponding to the second storage position is obtained. If the number PPT3 number recorded in the second storage position is the same as the query number PPT3 number, it indicates that the position is the compression sub-region corresponding to the cache region, and then the target physical address corresponding to the target logical address is searched in the second storage position.

[0067] In other embodiments of the present application, if the target physical address is not found in the second storage position, the data of the second mapping table is loaded into the cache region, and the steps of the embodiment shown in Figure 2 are executed, for example, the third data of the second mapping table is loaded into the cache region. If there is no remaining cache space in the cache region, a preset data block is screened out based on a preset cache replacement algorithm, so as to form a free bit in the cache region, the third data is stored in the free bit, and the loaded cache region is obtained. The loaded cache region is queried by using the query number in step S702, and the target physical address is queried based on the query number. Figure 7

[0068] After the preset data block is compressed and stored in the compression region, the success rate of data query is increased when the steps of the embodiment shown in Figure 7 are executed subsequently.

[0069] In embodiments of the present application, when the corresponding target physical address is not found in the cache region, the compression region is continuously searched, and the success rate of data query is increased to a certain extent by two levels of data query, the number of flash memory loading is reduced, and the random storage performance of the system is improved.

[0070] Please continue to refer to Figure 1 In the present embodiment, the storage device 10 can be an internal memory of the electronic device 20, that is, a memory built-in the electronic device 20. In other embodiments, the storage device 10 can also be an external memory of the electronic device 20, that is, a memory externally connected to the electronic device 20.

[0071] In some embodiments, the storage device 10 is used to store program codes and various data, and to automatically complete the access of programs or data at high speed during the running process of the storage device 10.

[0072] The storage device 10 can include a random access memory, and can also include a non-volatile memory, for example, a hard disk, a memory, a plug-in hard disk, a smart media card (SMC), a secure digital (SD) card, a flash card, at least one disk storage device, a flash storage device, or other volatile solid-state storage devices.​

[0073] In an embodiment, the processor of the electronic device 20 can be a central processing unit (CPU), and can also be other general-purpose processors, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, or the like. The general-purpose processor can be a microprocessor, or the processor can also be any other conventional processor.

[0074] The program code and various data in the storage device 10, if implemented in the form of software functional units and sold or used as independent products, can be stored in a computer-readable storage medium. Based on such understanding, all or part of the processes in the above-mentioned embodiments can be implemented by a computer program to instruct related hardware, and the computer program can be stored in a computer-readable storage medium. When the computer program is executed by a processor, the steps of the above-mentioned various method embodiments can be implemented. The computer program includes computer program code, which can be in the form of source code, object code, executable files, or some intermediate forms, etc. The computer-readable medium can include any entity or device capable of carrying the computer program code, recording medium, U disk, mobile hard disk, magnetic disk, optical disk, computer memory, read-only memory (ROM), etc.

[0075] It can be understood that the above-described module division is a logical function division, and another division manner can be used in actual implementation. In addition, each functional module in each embodiment of the present application can be integrated in the same processing unit, or each module can be physically present alone, or two or more modules can be integrated in the same unit. The integrated module can be realized in the form of hardware or hardware plus software function module.

[0076] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application and are not limiting. Although the present application has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical solutions of the present application can be modified or replaced by equivalents without departing from the spirit and scope of the technical solutions of the present application.

Claims

1. A mapping table management method applied to a storage device, characterized by, The storage device includes a static random access memory and a flash memory, the static random access memory stores a first mapping table, and the flash memory stores a second mapping table, and the method comprises: When loading first data corresponding to a target data block from the second mapping table into the first mapping table, and if there is no remaining cache space in a cache area of the first mapping table, filtering a preset data block from the cache area based on a preset cache replacement algorithm, determining an idle bit formed in the cache area after filtering the preset data block; storing the first data into the idle bit; compressing the preset data block to obtain second data; storing the second data into a compression area of the first mapping table.

2. The mapping table management method according to claim 1, characterized by, The compression of the preset data block comprises: obtaining a serial number corresponding to each pair of mapping relationships in the preset data block, the serial number being determined based on a physical address in the corresponding mapping relationship; based on the serial number, dividing multiple pairs of mapping relationships with continuous serial numbers into a same group to obtain at least one group; determining a target group from the at least one group; based on a preset compression format, compressing data corresponding to each pair of mapping relationships in the target group.

3. The mapping table management method according to claim 2, characterized by, The compression format comprises a logical address, a physical address, and a continuous length between the logical address and the physical address.

4. The mapping table management method according to claim 2, characterized by, The storage of the second data into the compression area of the first mapping table further comprises: obtaining a preset number of the preset data block and a capacity of the compression area, the preset number being determined according to a logical address of the preset data block; determining a first storage location of the second data in the compression area according to the preset number and the capacity.

5. The mapping table management method according to claim 4, characterized by, The method further comprises: if there is a historical storage location of the second data in the compression area, replacing the historical storage location with the first storage location.

6. The mapping table management method of claim 1, wherein The method further comprises: receiving a data reading instruction, the data reading instruction carrying a target logical address of a logical block to be read; converting the target logical address into a query number; based on the query number, searching in the cache area; if the cache area does not include a target physical address matching the target logical address, determining a second storage location of the compression area based on the query number and the capacity of the compression area; if a number corresponding to the second storage location is the same as the query number, searching for the target physical address corresponding to the target logical address in the second storage location.

7. The mapping table management method according to claim 6, characterized by, The method further comprises: if the target physical address is not searched in the second storage location, loading data of the second mapping table into the cache area, and searching the loaded cache area.

8. The mapping table management method according to claim 6, characterized by, The conversion of the target logical address into a query number comprises: determining the query number based on the target logical address and a preset value.

9. A storage device, comprising: The computer program stored in the storage device, when executed by a processor, implements the mapping table management method of any one of claims 1 to 8. The computer program stored in the storage device, when executed by a processor, implements the mapping table management method of any one of claims 1 to 8.

10. An electronic device, comprising: The electronic device includes the storage device according to claim 9 and a processor configured to execute a computer program stored in the storage device to implement the mapping table management method.

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