Manufacturing method of FMM and FMM manufactured by manufacturing method

Abstract

The present invention relates to a method for manufacturing an FMM and an FMM manufactured by the same, the method comprising the steps of: (a) depositing protective thin films on the upper and lower surfaces of a silicon substrate; (b) depositing a conductive layer on the upper surface of the silicon substrate on which the protective films are deposited on the upper and lower surfaces; (c) depositing an invar alloy plating layer on the conductive layer deposited on the invar alloy plating layer; (d) removing a part of the protective film on the lower surface, performing back etching on the lower surface of the silicon substrate, forming an open part by removing the central region of the silicon substrate from the surface shape, forming a support part by using the silicon substrate in the peripheral region which is not removed, and forming an alignment hole by removing the peripheral region of the silicon substrate from the hole shape; and (e) performing dry etching on the invar alloy plating layer, the conductive layer, and the protective thin film exposed in the open portion to form pattern holes clustered at the center of the open portion and dummy holes surrounding the clustered pattern holes, while penetrating the positions of the alignment holes.

Description

Technical Field

[0001] This invention relates to a method for manufacturing an FMM and an FMM manufactured by the same method, and more specifically to a method for manufacturing an FMM by electroplating an Invar alloy mask on a silicon wafer, using the silicon wafer as the frame of the mask. Compared to the rolling process of Invar alloy sheets, this method enables the mask to be manufactured with a thinner thickness while reducing thickness deviation, and eliminates the need for welding the mask to an additional frame or stretching the mask, thereby simplifying the manufacturing process and reducing manufacturing costs. Background Technology

[0002] In the current manufacturing of Organic Light-Emitting Diode (OLED) panels, a high-precision fine metal mask (FMM), an essential component, plays a role similar to a mask in RGB deposition. The FMM is a thin sheet of iron formed from Invar alloy raw material. To be used inside the depositor, it needs to be combined with a robust frame. Previously, this was achieved by physically stretching and laser welding to combine the mask with the frame.

[0003] In other words, the traditional stretching and welding method involves stretching the FMM (Flat Metal Mask) using a stretching machine while simultaneously welding it with a laser. This method suffers from alignment issues when using large-area masks. Furthermore, during the welding and fixing process to the frame, the mask thickness is too thin and the area is large, causing the physical stretching force and load to lead to mask sagging or twisting, resulting in errors in pixel positioning accuracy (PPA).

[0004] In the ultra-high-definition OLED manufacturing process, even a tiny alignment error of a few μm can lead to pixel deposition failure. Therefore, it is currently necessary to develop technologies that can prevent deformation such as mask sagging or bending and can accurately align the pixels.

[0005] On the other hand, micro displays, which are recently used in augmented reality (AR) or virtual reality (VR) devices, have received much attention.

[0006] To display images directly in front of users in AR / VR devices, microdisplays need to have a smaller screen size than existing displays, achieving high definition within a smaller frame. Therefore, compared to the masks used in existing ultra-high-definition OLED manufacturing processes, the pattern aperture size and pitch are reduced, thus creating an urgent need for even smaller arrays of masks before the pixel deposition process. Summary of the Invention

[0007] The present invention is proposed to solve the problems described above, and its object is to provide a method for manufacturing an FMM by electroplating an Invar alloy mask on a silicon wafer, using the silicon wafer as the frame of the mask, which can manufacture the mask with a thinner thickness and reduce thickness deviation compared to the rolling method of Invar alloy sheet, and can eliminate the process of welding the mask to an additional frame or the stretching process of the mask, thereby simplifying the manufacturing process and reducing manufacturing costs, and an FMM manufactured by the method.

[0008] According to the present invention, a method for manufacturing an FMM is provided, characterized by comprising: step (a) depositing a protective film on both the upper and lower surfaces of a silicon substrate; step (b) depositing a conductive layer on the upper surface of the silicon substrate on which the protective films are deposited on both the upper and lower surfaces; step (c) depositing an Invar alloy plating layer on the conductive layer deposited on the upper surface; step (d) removing a portion of the lower protective film, performing back-side etching on the lower surface of the silicon substrate to remove the central region of the silicon substrate by a face shape to form an open portion, and simultaneously forming a support portion using the unremoved peripheral region of the silicon substrate while removing the peripheral region of the silicon substrate by a hole shape to form an alignment hole; and step (e) performing dry etching on the Invar alloy plating layer, the conductive layer, and the protective film exposed in the open portion to form patterned holes clustered at the central portion of the open portion and virtual holes clustered around the clustered patterned holes, while simultaneously penetrating the position of the alignment hole.

[0009] According to another aspect of the present invention, a method for manufacturing an FMM is provided, characterized by comprising: step (A), depositing a protective film on both the upper and lower surfaces of a silicon substrate; step (B), depositing a conductive layer on the upper surface of the silicon substrate on which the protective films are deposited on both the upper and lower surfaces; step (C), forming a light pattern layer on the conductive layer deposited on the upper surface at the positions of patterned holes clustered at the center and virtual holes clustered around the clustered patterned holes; step (D), depositing an Invar alloy plating layer on the conductive layer on which the light pattern layer is formed; step (E), removing a portion of the lower protective film, performing back-side etching on the lower surface of the silicon substrate, removing the central region of the silicon substrate by a face shape to form an open portion, forming a support portion using the unremoved peripheral region of the silicon substrate, and simultaneously removing the peripheral region of the silicon substrate by a hole shape to form an alignment hole; and step (F), performing dry etching on the conductive layer and protective film exposed in the open portion, and simultaneously penetrating the positions of the patterned holes and virtual holes in the open portion, thereby penetrating the positions of the alignment holes by allowing the Invar alloy plating layer, the conductive layer, and the protective film to penetrate the support portion.

[0010] Preferably, the present invention is characterized in that the silicon substrate is a silicon wafer or a quartz wafer, formed with a thickness of 50 to 700 μm.

[0011] Preferably, the protective film of the present invention is a SiNx inorganic film deposited with a thickness of 10 to 50 nm.

[0012] Preferably, the present invention is characterized in that the conductive layer is formed of TiN or Ti-Cu and deposited with a thickness of 100 to 400 nm.

[0013] Preferably, the present invention is characterized in that the above-mentioned Invar alloy coating is formed of Invar alloy (Ni-Fe) or super Invar alloy (Ni-Fe-Co) with a coefficient of thermal expansion (CTE) of less than 3 PPM / ℃, and is electroplated with a thickness of 2 to 5 μm.

[0014] Preferably, the present invention is characterized in that the inner side of the support portion dividing the above-mentioned open portion is formed in a conical shape.

[0015] Preferably, the present invention is characterized in that the diameter of the above-mentioned patterned hole is 3 μm or less, and it is machined with a pitch of 8 μm or less.

[0016] Preferably, the present invention is characterized in that the virtual holes are formed in an ellipse having a longer major axis and a shorter minor axis, individual virtual holes are arranged apart from adjacent virtual holes along the major axis direction, and multiple virtual hole rows are arranged along the radial direction of the silicon substrate, wherein the spaced virtual hole rows are arranged such that the major axes of adjacent individual virtual holes are staggered along the radial direction.

[0017] Preferably, the present invention is characterized in that the virtual hole and the patterned hole are formed simultaneously, or the virtual hole is formed first and then the patterned hole is formed.

[0018] Preferably, the present invention is characterized in that the Invar alloy coating formed on the conductive layer is heat-treated before the back etching process.

[0019] On the other hand, according to another aspect of the present invention, an FMM is provided, which is manufactured by a manufacturing method of an FMM according to any one of the above features, characterized in that it comprises: a silicon substrate; a protective film deposited on the upper and lower surfaces of the silicon substrate; a conductive layer deposited on the upper surface of the silicon substrate on which the protective film is deposited on both the upper and lower surfaces; an Invar alloy plating layer deposited on the conductive layer deposited thereon; an open portion is formed by removing the central region of the lower surface of the silicon substrate by a surface shape; a support portion is formed by the silicon substrate in the outer peripheral region that is not removed; a plurality of patterned holes are formed by a through-shaped cluster at the center of the open portion; and a plurality of virtual holes are formed by a through-shaped cluster from the outermost part of the patterned holes clustered in the form of surrounding the clustered patterned holes to the region of the support portion.

[0020] Preferably, the present invention is characterized in that the inner side of the support portion in the silicon substrate is formed in a conical shape.

[0021] Preferably, the present invention is characterized in that an alignment hole is formed in the support portion of the silicon substrate, and the alignment hole penetrates the protective film, conductive layer and Invar alloy coating including the support portion in the vertical direction.

[0022] According to the present invention, the following effects can be obtained: when an Invar alloy mask is formed on a silicon wafer by electroplating, and the silicon wafer is used as the frame of the mask, the mask can be manufactured with a thinner thickness and the thickness deviation can be reduced compared to the rolling method of Invar alloy sheet.

[0023] Furthermore, it can eliminate the need for processes such as welding the mask to an additional frame or stretching the mask, thereby simplifying the manufacturing process and reducing manufacturing costs. Attached Figure Description

[0024] Figure 1 A diagram illustrating a method for manufacturing an OLED using an FMM according to the prior art.

[0025] Figure 2 and Figure 3 A diagram illustrating a manufacturing method for an FMM according to the prior art.

[0026] Figure 4 A diagram illustrating a method for manufacturing an FMM according to a first embodiment of the present invention.

[0027] Figure 5 A diagram illustrating a method for manufacturing an FMM according to a second embodiment of the present invention.

[0028] Figure 6 This is a diagram illustrating the virtual hole structure of an FMM according to an embodiment of the present invention.

[0029] Figure 7 This is a diagram illustrating the external structure of the FMM according to an embodiment of the present invention.

[0030] Figure 8 and Figure 9 A diagram illustrating the physical structure of an FMM manufactured according to an embodiment of the present invention.

[0031] Explanation of reference numerals in the attached figures

[0032] 300: FMM; 310: Silicon substrate

[0033] 320: Protective film; 330: Conductive layer

[0034] 340: Invar alloy coating; 350: Alignment hole

[0035] 360: Virtual hole; 370: Patterned hole

[0036] 380: Light Pattern Layer Detailed Implementation

[0037] This invention can be modified in various ways and may have multiple embodiments. Specific embodiments are illustrated in the figures and described in detail in the specific description. However, it should be understood that this invention is not limited to the specific implementation, but includes all modifications, equivalent technical solutions, and even alternative technical solutions contained within the concept and technical scope of this invention. In the description of the various figures, similar reference numerals are used for similar structural elements.

[0038] The terms "first," "second," "A," and "B," etc., can be used to describe various structural elements, but the aforementioned structural elements are not limited to these terms. These terms are used only for the purpose of distinguishing one structural element from another. For example, without departing from the scope of the invention, a first structural element may be named a second structural element, and similarly, a second structural element may be named a first structural element. And / or this term includes a combination of multiple related descriptions or any one of multiple related descriptions.

[0039] When it is mentioned that a structural element is "connected" or "linked" to another structural element, it should be understood that it can be directly connected or linked to that other structural element, but there may also be other structural elements in between. Conversely, when it is mentioned that a structural element is "directly connected" or "directly linked" to another structural element, it should be understood that there are no other structural elements in between.

[0040] The terminology used in this application is for illustrative purposes only and does not limit the invention. Singular expressions include plural expressions unless the context clearly distinguishes them. In this application, it should be understood that terms such as "comprising" or "having" are used to specify the presence of features, numbers, steps, actions, structural elements, components, or combinations thereof described in the specification, without precluding the presence or additional possibilities of one or more other features or numbers, steps, actions, structural elements, components, or combinations thereof.

[0041] Unless otherwise defined, all terms used herein, including technical or scientific terms, shall have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. Terms as defined in commonly used dictionaries shall be interpreted as having a meaning consistent with the context of the relevant art, and shall not be construed as having an ideal or overly formal meaning unless expressly defined herein.

[0042] Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

[0043] Figure 1A diagram illustrating a method for manufacturing an OLED using an FMM according to the prior art.

[0044] In the following figures relating to embodiments of the prior art and the present invention, for ease of understanding, the size or thickness of structural elements is indicated by being excessively large (or thick) or excessively small (or thin), or by simplification, but this should not be construed as limiting the scope of protection of the present invention to this.

[0045] Reference Figure 1 An OLED manufacturing apparatus that realizes an OLED manufacturing method using an FMM according to the prior art includes: a magnet plate 10, a magnet 11 housed therein, and a cooling water line 12; and a deposition source supply unit 40 that supplies an organic source 41 from the lower part of the magnet plate 10.

[0046] The object substrate 20, such as glass, on which the organic source 41 is deposited, can be positioned between the magnet plate 10 and the deposition source supply section 40. The FMM 30, on which the organic source 41 is deposited at different pixel levels, can be disposed on the object substrate 20 in a close or very close manner. The magnet 11 generates a magnetic field, and the attraction caused by the magnetic field allows the FMM 30 to be tightly adhered to the object substrate 20.

[0047] The aforementioned FMM 30 needs to be aligned before being attached to the target substrate 20. One or more masks may be combined with the frame 35. The frame 35 is fixedly disposed within the OLED manufacturing apparatus, and the masks may be combined with the frame 35 through additional attachment and soldering processes.

[0048] The deposition source supply unit 40 can reciprocate left and right paths to supply organic material source 41. The organic material source 41 supplied in the deposition source supply unit 40 can be deposited on one side of the target substrate 20 through the patterned holes 32 formed in the FMM 30. The organic material source 41 deposited through the pattern of the FMM 30 can serve as a pixel 21 of the OLED.

[0049] To prevent uneven deposition of pixel 21 caused by the shadow effect, the pattern aperture 32 of the FMM 30 can be formed obliquely (S) [or tapered (S)]. The organic source 4 passing through the pattern aperture 32 along the oblique direction can also form pixel 21, so that the overall thickness of pixel 21 can be deposited uniformly.

[0050] Figure 1 The FMM30 can perform pixel deposition processes on large-area object substrates 20.

[0051] The manufacturing method of this FMM30 is described below.

[0052] Figure 2 and Figure 3 A diagram illustrating a manufacturing method for an FMM according to the prior art.

[0053] First, such as Figure 2 As shown in (a), a thinner Invar alloy (INVA R) substrate 30a is prepared by rolling.

[0054] The aforementioned Invar alloy substrate 30a is formed by adding nickel (Ni) to iron (Fe) at a specified ratio, and is made of an alloy with a small coefficient of thermal expansion.

[0055] The thickness of this initially rolled Invar alloy substrate 30a can be approximately 25 μm. To manufacture the FMM for AR / VR OLED manufacturing, an Invar alloy substrate 30a with a thickness of approximately 5 μm is required, but there are limitations to using a rolling method.

[0056] Therefore, as Figure 2 As shown in (b), the surface of the Invar alloy substrate 30a is manufactured into a thinner plate shape by half etching. The thickness of the half-etched Invar alloy substrate 30a can be about 5 μm.

[0057] At this point, the target thickness of the Invar alloy substrate can be achieved through semi-etching, but due to the characteristics of the etching process, a severe thickness deviation occurs, resulting in an overall dispersion of 5μm±3μm.

[0058] And, as Figure 2 As shown in (c), tiny patterned holes 32 are drilled through the Invar alloy substrate 30a in the form of a thin plate for processing.

[0059] To manufacture a 3000 PPI FMM, patterned holes 32 with a diameter of 3 μm are processed by laser or etching with a pitch of 8 μm. During this process, the thickness deviation of the Invar alloy substrate 30a needs to be less than ±3 μm. However, as mentioned above, the thickness deviation of the Invar alloy substrate 30a, which is adjusted by rolling and semi-etching, is large, making it difficult to manufacture the patterned holes 32 uniformly.

[0060] After that, as Figure 2 As shown in (d), an Invar alloy substrate 30a, which is stretched to form a thin plate shape with patterned holes 32, is welded to a frame 35 to manufacture an FMM 30.

[0061] The above stretching process is used to adjust the accurate distance (PPA) between the pattern holes 32, so as... Figure 3 The method shown in (b) is combined as follows Figure 3 After forming the Invar alloy substrate 30a and frame 35 with patterned holes 32 as shown in (a), the Invar alloy substrate 30a is laser-welded to the frame 35 while being pulled from all four sides. At this time, the pitch is measured in real time to ensure that the deviation in distance between the patterned holes 32 is within ±3 μm, and welding is performed. Afterwards, as shown in (a), Figure 3As shown in (c), the side portion of the Invar alloy substrate 30a is cut to complete the FMM 30 product.

[0062] like Figure 2 As shown in (e), with the FMM30 thus manufactured in close contact with the target substrate 20, an organic source 41 is supplied in the deposition source supply section 40. The organic source 41 can be deposited on one side of the target substrate 20 through the patterned holes 32 formed in the FMM30. The organic source 41 deposited through the pattern of the FMM30 can function as a pixel 21 of the OLED.

[0063] The manufacturing method of FMM according to this prior art has the following problems.

[0064] 1) Thinning is achieved through rolling and semi-etching, making it difficult to thin the Invar alloy substrate 30a to a level suitable for manufacturing AR / VR OLEDs. Even if it is thinned, there will be overall thickness deviation, which reduces product reliability.

[0065] 2) In order to combine the Invar alloy substrate 30a and the frame 35, a precise physical stretching process is required, which makes the productization process very difficult. The Invar alloy substrate 30a used for AR / VR OLED manufacturing is very thin, making it difficult to precisely distribute the stretching force, resulting in a large PPA error and reducing the yield.

[0066] 3) Since the dissimilar Invar alloy substrate 30a and frame 35 are joined by laser welding, the bonding strength at the joint is reduced, and the durability decreases when the FMM is used repeatedly.

[0067] 4) Because the Invar alloy substrate 30a is very thin, sagging or deformation occurs on the frame 35, which reduces the positional accuracy of the pattern hole 32 and ultimately leads to a decrease in deposition accuracy.

[0068] The FMM manufacturing method according to the embodiments of the present invention described below is used to overcome the problems of the prior art described above. It is characterized in that an Invar alloy mask is formed on a silicon wafer by electroplating, and the silicon wafer is used as the frame of the mask. Compared with the rolling method of Invar alloy sheet, the mask can be manufactured with a thin thickness while reducing thickness deviation. The process of welding the mask and an additional frame or the stretching process of the mask can be omitted, which simplifies the manufacturing process and reduces manufacturing costs.

[0069] Figure 4 A diagram illustrating a method for manufacturing an FMM according to a first embodiment of the present invention.

[0070] First, such as Figure 4 As shown in (a), a silicon substrate 310 is prepared.

[0071] The silicon substrate 310 described above can be made of silicon wafer (Si) or quartz wafer (SiO2), as long as it is a material with a coefficient of thermal expansion (CTE) of 3 PPM / ℃, and can be used without being limited to the above examples.

[0072] The thickness of this silicon substrate 310 can be formed in the range of 50 to 700 μm.

[0073] And, as Figure 4 As shown in (b), a protective film 320 is deposited on both the upper and lower surfaces of the silicon substrate 310.

[0074] The aforementioned protective film 320 can be a SiNx inorganic film with high barrier properties and excellent adhesion. This SiNx inorganic film is coated on the outer surface of the silicon substrate 310 to prevent the silicon substrate 310 from reacting with the electroplating solution during the electroplating process described later.

[0075] The aforementioned SiNx inorganic film can be deposited using a vacuum sputtering device, achieving a thickness of approximately 10–50 nm, preferably approximately 30 nm.

[0076] After that, as Figure 4 As shown in (c), a conductive layer 330 is deposited on top of a silicon substrate 310 on which protective films 320 are deposited on both the top and bottom surfaces.

[0077] Basically, since the silicon substrate 310 is an insulator, it must be conductively treated for electroplating. Furthermore, for Invar alloy (Ni-Fe) or super Invar alloy (Ni-Fe-Co) electroplating, which will be described later, there is a requirement for high resistance and low conductivity of the conductor during the electroplating process.

[0078] In an embodiment of the present invention, a conductive layer 330 is deposited to impart conductivity to the silicon substrate 310 by electroplating. The conductive layer 330 may be formed of TiN or Ti-Cu, and any material that can impart conductivity to the silicon substrate 310 can be used, not limited to the examples described above.

[0079] When the conductive layer 330 is formed of TiN, the TiN layer can be deposited using a vacuum sputtering device, and can be deposited with a thickness of about 100 to 400 nm, preferably about 200 nm.

[0080] Furthermore, when the conductive layer 330 is formed of Ti-Cu, a Ti layer is deposited for the first time (to ensure silicon-Cu adhesion), and a Cu layer is deposited a second time (to ensure low conductivity). The Ti and Cu layers can be deposited using a vacuum sputtering apparatus. The Ti layer can be deposited at a thickness of approximately 10–50 nm, preferably approximately 30 nm. The Cu layer can be deposited at a thickness of approximately 100–300 nm, preferably approximately 200 nm.

[0081] In this way, when a Cu layer is deposited on the surface, the adhesion between Cu-Invar alloy layers or Cu-Super Invar alloy layers becomes very high, thus ensuring a stable adhesion between the silicon substrate 310 and the Invar alloy coating 340.

[0082] After that, as Figure 4 As shown in (d), an Invar alloy coating 340 is deposited on the conductive layer 330 deposited thereon.

[0083] According to existing technology, the representative production method for Invar alloy (Ni-Fe) or super Invar alloy (Ni-Fe-Co) used to manufacture FMM is cold rolling. However, in order to obtain thin plates with a thickness of less than 50μm by cold rolling, multiple rolling processes are required, which are long and complex and have the disadvantage of high manufacturing cost.

[0084] Recently, a manufacturing method for Invar alloy for FMMs using electroplating has been developed. The general electroplating method for Invar alloy for FMMs using this electroplating method comprises the following steps: Anode electrode plates and a base material serving as the cathode are arranged in a parallel configuration facing each other inside the electroplating tank. After supplying an electroplating solution (electrolyte) into the electroplating tank, an anode power supply and a cathode power supply are connected to the anode electrode plates and the base material, respectively, and an electric current is applied to them, forming a plating layer (Invar alloy) on one side of the base material.

[0085] Invar alloy sheets or super-Invar alloy sheets manufactured by electroplating have a very low coefficient of thermal expansion (CTE), thus minimizing concerns about thermal deformation of the mask pattern shape. They are primarily used in the manufacture of high-resolution OLEDs. A low coefficient of thermal expansion (CTE) is a primary qualification requirement for Invar alloy raw materials used in FMMs.

[0086] According to another prior art, examples of using monocrystalline silicon as a base material for electroplating exist in the literature (Korean Patent Application No. 2017-0067396, etc.). This base material is used as a conductive substrate by subjecting the monocrystalline silicon to a high-concentration doping treatment, either entirely or on its surface. It involves a process where, once electroplating is complete, the plating layer and the base material are separated, and an additional framework is re-bonded to the separated plating layer. However, because the adhesion between the plating layer and the monocrystalline silicon base material is very high, the process of separating the two is difficult, requiring additional physicochemical treatments for separation. This leads to problems such as complicated processes and damage to the plating layer.

[0087] In an embodiment of the present invention, an Invar alloy plating layer 340 is directly deposited on the conductive layer 330 deposited on the silicon substrate 310, and is used directly as a frame (refer to the open portion 311 and the support portion 312) without separating the silicon substrate 310. This has the advantage that the separation process of the silicon substrate 310 and the conductive layer 330 can be omitted, and the conductive layer 330 can be kept in the electroplated state unchanged.

[0088] The aforementioned Invar alloy coating 340 can be formed by electroplating a binary or ternary alloy with a coefficient of thermal expansion (CTE) of 3 PPM / ℃ or less, and can be electroplated to a thickness of 2 to 5 μm. Furthermore, due to the electroplating method, the thickness deviation may be ±0.3 μm.

[0089] At this point, the deposited Invar alloy coating 340 can be heat-treated.

[0090] Because the Invar alloy coating 340 formed by electroplating has a dense structure, it can be heat-treated at high temperature to soften the crystal structure, thereby increasing the elongation.

[0091] Furthermore, the crystal structure contains a mixture of body-centered cubic (BCC) and face-centered cubic (FCC) structures. In order to reduce the coefficient of thermal expansion (CTE), the BCC structure is changed to an FCC structure by heating for more than 1 hour above the critical temperature (about 450°C).

[0092] In particular, during this heat treatment process, a compressive tension is generated between the silicon substrate 310 and the Invar alloy coating 340, which can prevent the Invar alloy coating 340 exposed after the back etching process described later from sagging or wrinkling.

[0093] Furthermore, during this heat treatment process, the alloy coating 340 undergoes volume change and is subjected to compressive stress, which can be relieved by using the virtual hole 360 ​​formed during the dry etching process described later.

[0094] After that, as Figure 4 As shown in (e), the silicon substrate 310 is removed in the lower protective film 320, and the protective film 320, which is the central region of the surface shape to be formed of the opening 311 and the peripheral region to be formed of the alignment hole 350, is removed by the hole shape, thus opening the lower part of the silicon substrate 310.

[0095] After that, as Figure 4As shown in (f), back etching is performed on the underside of the silicon substrate 310. The central region of the silicon substrate 310 is removed by the surface shape to form the open portion 311, while the peripheral region is removed by the hole shape to form the alignment hole 350.

[0096] An open portion 311 is formed by removing the central region from the silicon substrate 310 through this back-side etching, and a support portion 312 is formed on the portion of the silicon substrate 310 that is not removed from the peripheral region. An alignment hole 350 in the shape of a hole is formed on the peripheral support portion 312.

[0097] The support portion 312, manufactured by this back-side etching, directly serves as a frame supporting the Invar alloy plating layer 340. Furthermore, the opening portion 311 formed on the inner side of the support portion 312 serves to directly expose the Invar alloy plating layer 340 in the downward direction.

[0098] Furthermore, through this back-side etching process, since the edge (support 312) of the silicon substrate 310 replaces the existing bonding frame, the processes of stretching the Invar alloy coating on the additional bonding frame and welding the frame to the Invar alloy coating, which must be performed in the existing process, can be omitted.

[0099] At this time, the inner side of the support portion 312 of the aforementioned silicon substrate 310 can be formed in an inclined shape, or more precisely, in a conical shape.

[0100] After that, as Figure 4 As shown in (g), while performing dry etching on the Invar alloy plating 340, conductive layer 330 and protective film 320 to remove the open portion 311 of silicon substrate 310 to form virtual hole 360 ​​and patterned hole 370, the position of the aforementioned alignment hole 350 is penetrated.

[0101] The aforementioned dry etching process can be achieved by using a pico laser to process the holes or by using plasma etching.

[0102] The aforementioned alignment hole 350 is an alignment hole used to accurately align the OLED onto the substrate being manufactured.

[0103] To achieve a high resolution of 3000 PPI or higher, the diameter of the aforementioned patterned holes 370 can be approximately 3 μm or less, machined with a pitch of 8 μm or less. These patterned holes 370 can generally have a tapered shape, providing a path for the organic source 410 of the deposition source supply section 400 to pass through. The aforementioned patterned holes 370 can be clustered at the center of the Invar alloy coating 340.

[0104] The aforementioned virtual holes 360 are formed in a cluster surrounding the cluster of patterned holes 370. The aforementioned virtual holes 360 are formed in the region from the outermost part of the cluster of patterned holes 370 to the aforementioned support portion 312.

[0105] Reference Figure 6 In (a), each virtual aperture 360 ​​is formed in a generally elliptical shape with a longer major axis and a shorter minor axis. Furthermore, the individual virtual apertures 360 are arranged spaced apart from adjacent virtual apertures 360 along their major axes, forming multiple rows of virtual apertures 360 along the radial direction of the silicon substrate 310. Moreover, the spaced-apart rows of virtual apertures 360 are arranged such that the major axes of adjacent individual virtual apertures 360 are staggered along the radial direction.

[0106] This virtual hole 360 ​​is formed at the location where it contacts the opening 311 of the silicon substrate 310, relieving the compressive stress applied to the Invar alloy plating 340 in that location. More specifically, as... Figure 6 The virtual hole 360 ​​shown in (a) is subjected to tension in the Invar alloy plating 340 in the horizontal radial direction (refer to the arrow), as Figure 6 As shown in (b), the short axis of the virtual hole 360 ​​is easily deformed, thereby relieving the compressive stress.

[0107] Therefore, the virtual hole 360 ​​and the patterned hole 370 can be formed simultaneously by a dry etching process, but preferably, as shown in the example... Figure 6 As shown in (c), the virtual hole 360 ​​is formed first to relieve the compressive stress, and then the patterned hole 370 is formed, which can reduce the positional deformation of the patterned hole 370 caused by the compressive stress when processing the patterned hole 370.

[0108] Among them, the back-side etching process below the silicon substrate 310 (refer to...) Figure 4 (f) and the dry etching process of Invar alloy plating 340, conductive layer 330 and protective film 320 (refer to) Figure 4 (g)) The figure shows the order of the dry etching process after the back etching process, but conversely, the order of the dry etching process after the back etching process can also be shown.

[0109] The FMM300 can be manufactured using the process described in this first embodiment.

[0110] Figure 7 (a) is the top side view of the FMM300. Figure 7 (b) is a bottom view of the FMM300. By electroplating an Invar alloy coating 340 onto the silicon substrate 310 and etching the lower part of the silicon substrate 310 on the back side, as described above, additional stretching or welding processes can be omitted, and the silicon substrate 310 directly serves as a frame.

[0111] and, Figure 8 and Figure 9 A diagram illustrating the physical structure of an FMM manufactured according to an embodiment of the present invention.

[0112] like Figure 8 As shown, an Invar alloy coating 340 is formed on the silicon substrate 310, such as... Figure 9 As shown, the silicon substrate 310 supporting the Invar alloy coating 340 has a structure that exposes the coating 340 to the underside of the Invar alloy through back-side etching while simultaneously supporting the Invar alloy coating 340 on the underside.

[0113] on the other hand, Figure 5 A diagram illustrating a method for manufacturing an FMM according to a second embodiment of the present invention.

[0114] Reference Figure 5 The product manufactured by the FMM manufacturing method according to the second embodiment of the present invention is the same as the product manufactured by the first embodiment, but the manufacturing process differs. In the following description related to the second embodiment, descriptions that are repeated with those of the first embodiment are abbreviated or omitted, and the differences are focused on.

[0115] First, prepare silicon substrate 310 (refer to...) Figure 5 (a) After depositing the protective film 320 on both the upper and lower surfaces of the silicon substrate 310 (refer to (a)). Figure 5 (b) A conductive layer 330 is deposited on top of a silicon substrate 310 on which protective films 320 are deposited on both sides (see reference). Figure 5 (c)).

[0116] The silicon substrate 310 can be made of silicon wafer (Si) or quartz wafer (SiO2), as long as it is a material with a coefficient of thermal expansion (CTE) of 3 PPM / ℃, and is not limited to the examples described above. This silicon substrate 310 can be formed with a thickness of 50 to 700 μm.

[0117] Furthermore, the aforementioned protective film 320 can be a SiNx inorganic film with high barrier properties and excellent adhesion. The aforementioned SiNx inorganic film can be deposited using a vacuum sputtering device, and can be deposited with a thickness of about 10 to 50 nm, preferably about 30 nm.

[0118] Furthermore, the conductive layer 330 can be formed of TiN or Ti-Cu; any material capable of imparting conductivity to the silicon substrate 310 can be used, not limited to the examples described above. When the conductive layer 330 is formed of TiN, the TiN layer can be deposited using a vacuum sputtering apparatus, achieving a thickness of approximately 100–400 nm, preferably approximately 200 nm. When the conductive layer 330 is formed of Ti-Cu, a Ti layer is deposited first (to ensure silicon-Cu adhesion), followed by a second Cu layer deposition (to ensure low conductivity). Both the Ti and Cu layers can be deposited using a vacuum sputtering apparatus. The Ti layer can be deposited with a thickness of approximately 10–50 nm, preferably approximately 30 nm. The Cu layer can be deposited with a thickness of approximately 100–300 nm, preferably approximately 200 nm.

[0119] After that, as Figure 5 As shown in (d), a photo pattern layer 380 is formed on the conductive layer 330 deposited thereon.

[0120] The aforementioned light pattern layer 380 is formed by thickly coating with photoresist, and the Invar alloy plating layer 340, described later, is formed in the areas where the pattern is opened. That is, this light pattern layer 380 is formed at the locations of the pattern hole 370 and the virtual hole 360.

[0121] After that, as Figure 5 As shown in (e), an Invar alloy coating 340 is deposited on a conductive layer 330 on which a light pattern layer 380 is formed.

[0122] In this process, the Invar alloy coating 340 is formed in the open pattern portion of the light pattern layer 380, and the light pattern layer 380 is removed.

[0123] Through this process, the Invar alloy coating 340 naturally includes patterned holes 370 and virtual holes 360.

[0124] To achieve a high resolution of 3000 PPI or higher, the diameter of the aforementioned patterned holes 370 can be approximately 3 μm or less, and they can be machined with a pitch of 8 μm or less. These patterned holes 370 can be formed in a generally tapered shape, providing a path for the organic source 410 of the deposition source supply section 400 to pass through. The aforementioned patterned holes 370 can be clustered at the center of the Invar alloy coating 340.

[0125] The aforementioned virtual holes 360 are formed in a cluster surrounding the cluster of patterned holes 370. The aforementioned virtual holes 360 are formed in the region from the outermost part of the cluster of patterned holes 370 to the support portion 312 of the silicon substrate 310, which will be described later.

[0126] Furthermore, each virtual aperture 360 ​​is formed in a generally elliptical shape with a longer major axis and a shorter minor axis. The individual virtual apertures 360 are arranged spaced apart from adjacent virtual apertures 360 along their major axes, and multiple rows of virtual apertures 360 are arranged radially toward the silicon substrate 310. Moreover, the spaced rows of virtual apertures 360 are arranged radially such that the major axes of adjacent individual virtual apertures 360 are staggered.

[0127] The aforementioned Invar alloy coating 340 can be formed by electroplating a binary or ternary alloy with a coefficient of thermal expansion (CTE) of 3 PPM / ℃ or less, and can be electroplated to a thickness of 2 to 5 μm. Furthermore, due to the electroplating method, the thickness deviation may be ±0.3 μm.

[0128] At this point, the deposited Invar alloy coating 340 can be heat-treated. The relevant methods and effects of this heat treatment have already been described above, and therefore will not be repeated here.

[0129] After that, as Figure 5 As shown in (f), the silicon substrate 310 is removed in the lower protective film 320, and the protective film 320, which is the central region of the surface shape to be formed of the opening portion 311 and the peripheral region to be formed of the alignment hole 350, is removed by the hole shape, thus opening the lower part of the silicon substrate 310.

[0130] After that, as Figure 5 As shown in (g), back-side etching is performed on the underside of the silicon substrate 310. The central region of the silicon substrate 310 is removed by the surface shape to form an open portion 311, while the peripheral region is removed by the hole shape to form an alignment hole 350.

[0131] An open portion 311 is formed by removing the central region from the silicon substrate 310 through this back-side etching, and a support portion 312 is formed on the portion of the silicon substrate 310 that is not removed from the peripheral region. An alignment hole 350 in the shape of a hole is formed on the peripheral support portion 312.

[0132] The support portion 312, manufactured by this back-side etching, directly serves as a frame supporting the Invar alloy plating layer 340. Furthermore, the opening portion 311 formed on the inner side of the support portion 312 serves to directly expose the Invar alloy plating layer 340 in the downward direction.

[0133] Furthermore, through this back-side etching process, since the edge (support 312) of the silicon substrate 310 replaces the existing bonding frame, the processes of stretching the Invar alloy coating on the additional bonding frame and welding the frame to the Invar alloy coating, which must be performed in the existing process, can be omitted.

[0134] At this time, the inner side of the support portion 312 of the aforementioned silicon substrate 310 can be formed in an inclined shape, or more precisely, in a conical shape.

[0135] After that, as Figure 5 As shown in (h), dry etching is performed on the conductive layer 330 and the protective film 320 in the open portion 311, thereby removing the position of the virtual hole 360 ​​and the patterned hole 370 in the open portion 311 of the silicon substrate 310, while dry etching is performed on the Invar alloy plating layer 340, the conductive layer 330 and the protective film 320 in the support portion 312 to penetrate the position of the alignment hole 350.

[0136] The aforementioned dry etching process can be achieved by using a pico laser to process the holes or by using plasma etching.

[0137] Among them, the back-side etching process below the silicon substrate 310 (refer to...) Figure 5 The dry etching process of (g) and conductive layer 330 and protective film 320 (refer to) Figure 5 The figure shows the order of the dry etching process after the back etching process, but conversely, the order of the dry etching process after the back etching process can also be shown.

[0138] The FMM300 can be manufactured using the process described in this second embodiment.

[0139] First, the FMM300 manufactured according to an embodiment of the present invention has the structural feature of directly forming an Invar alloy coating 340 on a silicon substrate 310, with the silicon substrate 310 replacing the frame.

[0140] Upon closer inspection of the structural features, a protective film can be deposited on both the upper and lower surfaces of the aforementioned silicon substrate 310.

[0141] Furthermore, the conductive layer 330 can be deposited on the silicon substrate 310 on both the upper and lower surfaces where protective films 320 are deposited.

[0142] Furthermore, the Invar alloy coating 340 can be deposited on the conductive layer 330 deposited thereon.

[0143] The deposited Invar alloy coating 340 can be heat-treated.

[0144] Furthermore, the bottom surface of the aforementioned silicon substrate 310 is back-etched, and the central region of the silicon substrate 310 is removed by the surface shape to form an open portion 311. At the same time, a support portion 312 is formed on the portion of the silicon substrate 310 that has not been removed from the peripheral region, and an alignment hole 350 in the shape of a hole is formed on the peripheral support portion 312.

[0145] The support portion 312, manufactured by this back-side etching, directly serves as a frame supporting the Invar alloy plating layer 340. Furthermore, the opening portion 311 formed on the inner side of the support portion 312 serves to directly expose the Invar alloy plating layer 340 in the downward direction.

[0146] At this time, the inner side of the support portion 312 of the aforementioned silicon substrate 310 can be formed in an inclined shape, or more accurately, in a conical shape.

[0147] Among them, the Invar alloy plating layer 340, conductive layer 330 and protective film 320 disposed at the center of the open portion 311 of the silicon substrate 310 can form multiple patterned holes 370 by clustering in a through shape.

[0148] Furthermore, from the outermost part of the patterned holes 370 clustered in the form of surrounding clustered patterned holes 370 to the area of ​​the aforementioned support portion 312, a plurality of virtual holes 360 are formed by the through-shaped clustering.

[0149] As described above, preferred embodiments are disclosed in the accompanying drawings and description. Specific terminology is used herein, but it is for illustrative purposes only and not intended to limit the meaning or scope of the invention as set forth in the claims. Therefore, those skilled in the art will understand that various modifications and equivalent embodiments can be achieved therein. Consequently, the true scope of protection of this invention depends on the technical concept of the appended claims.

Claims

1. A method for manufacturing an FMM, characterized in that, include: Step (a) involves depositing a protective film on both the top and bottom surfaces of a silicon substrate; Step (b) involves depositing a conductive layer on top of a silicon substrate on which protective films have been deposited on both the top and bottom surfaces; Step (c) involves depositing an Invar alloy coating onto the conductive layer deposited thereon; Step (d): Remove a portion of the lower protective film, perform back-side etching on the lower side of the silicon substrate, remove the central region of the silicon substrate by the face shape to form an open portion, and use the unremoved peripheral region of the silicon substrate to form a support portion while removing the peripheral region of the silicon substrate by the hole shape to form an alignment hole; as well as Step (e) involves dry etching the Invar alloy plating, conductive layer, and protective film exposed in the open portion to form patterned holes clustered at the center of the open portion and virtual holes clustered around the patterned holes, while simultaneously penetrating the position of the alignment hole.

2. A method for manufacturing an FMM, characterized in that, include: Step (A) involves depositing a protective film on both the top and bottom surfaces of a silicon substrate; Step (B) involves depositing a conductive layer on top of a silicon substrate on which protective films have been deposited on both the top and bottom surfaces. Step (C) involves forming a light pattern layer on the conductive layer deposited thereon at the locations of patterned holes clustered at the center and virtual holes clustered around the patterned holes. Step (D) involves depositing an Invar alloy coating onto a conductive layer on which an optical pattern layer has been formed; Step (E): Remove a portion of the underlying protective film, perform back-side etching on the underside of the silicon substrate, remove the central region of the silicon substrate by the face shape to form an open portion, and use the unremoved peripheral region of the silicon substrate to form a support portion while removing the peripheral region of the silicon substrate by the hole shape to form an alignment hole; as well as In step (F), dry etching is performed on the conductive layer and protective film exposed in the open portion to penetrate the positions of the patterned holes and virtual holes in the open portion, while simultaneously penetrating the Invar alloy plating, conductive layer and protective film in the support portion to penetrate the positions of the aligned holes.

3. The manufacturing method of the FMM according to claim 1 or 2, characterized in that, The silicon substrate is a silicon wafer or a quartz wafer, formed with a thickness of 50 to 700 μm.

4. The manufacturing method of FMM according to claim 1 or 2, characterized in that, The protective film is a SiNx inorganic film, deposited with a thickness of 10–50 μm.

5. The method for manufacturing an FMM according to claim 1 or 2, characterized in that, The conductive layer is formed of TiN or Ti-Cu and deposited with a thickness of 100–400 μm.

6. The method for manufacturing an FMM according to claim 1 or 2, characterized in that, The Invar alloy coating is formed from Invar alloy (Ni-Fe) or super Invar alloy (Ni-Fe-Co) with a coefficient of thermal expansion (CTE) of less than 3 PPM / ℃, and is electroplated with a thickness of 2 to 5 μm.

7. The method for manufacturing an FMM according to claim 1 or 2, characterized in that, The inner side of the support portion that divides the open portion is tapered.

8. The method for manufacturing an FMM according to claim 1 or 2, characterized in that, The diameter of the patterned hole is less than 3μm, and it is machined with a pitch of less than 8μm.

9. The method for manufacturing an FMM according to claim 1 or 2, characterized in that, The virtual holes are formed in an ellipse with a longer major axis and a shorter minor axis. Individual virtual holes are arranged separately from adjacent virtual holes along the major axis direction. Multiple rows of virtual holes are arranged along the radial direction of the silicon substrate. The separated rows of virtual holes are arranged along the radial direction such that the major axes of adjacent individual virtual holes are staggered.

10. The method for manufacturing an FMM according to claim 1 or 2, characterized in that, The virtual hole and the patterned hole are formed simultaneously, or the virtual hole is formed first and then the patterned hole is formed.

11. The method for manufacturing an FMM according to claim 1 or 2, characterized in that, The Invar alloy coating formed on the conductive layer is heat-treated before the back-side etching process.

12. An FMM manufactured by the manufacturing method of an FMM according to claim 1 or 2, characterized in that, include: Silicon substrate; A protective film is deposited on the upper and lower surfaces of the silicon substrate; A conductive layer is deposited on top of a silicon substrate on which protective films are deposited on both the top and bottom surfaces; The Invar alloy coating is deposited on top of the conductive layer. The central region beneath the silicon substrate is removed by shaping the surface to form an open portion, while the remaining peripheral region of the silicon substrate forms a support portion. Multiple patterned holes are formed by a cluster of through-shaped clusters at the center of the open portion, and multiple virtual holes are formed by a cluster of through-shaped clusters from the outermost part of the patterned holes that are clustered in the shape of surrounding the clustered patterned holes to the area of ​​the support portion.

13. The FMM according to claim 12, characterized in that, The inner side of the support portion in the silicon substrate is tapered.

14. The FMM according to claim 12, characterized in that, Alignment holes are formed in the support portion of the silicon substrate, and the alignment holes penetrate the protective film, conductive layer and Invar alloy coating, including the support portion, in the vertical direction.

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