A variable frequency resonance test circuit

Abstract

The application discloses a variable frequency resonance test circuit, which comprises a plurality of operational amplifiers, a plurality of inverters, a plurality of triodes, a plurality of resistors and capacitors. The operational amplifier U1 in the plurality of operational amplifiers is connected with the same-phase end of the operational amplifier U6, one end of the capacitor C1, one end of the resistor R4, one end of the resistor R5 and the 1_2 end; the opposite-phase end is connected with the output end of the operational amplifier U7, one end of the resistor R7 and one end of the resistor R13; the output end is connected with the opposite-phase end of the operational amplifier U3, the input end of the inverter U2 and one end of the resistor R1; the output end of the inverter U2 is connected with the base of the triode Q2; the same-phase end of the operational amplifier U3 is connected with one end of the resistor R2 and one end of the resistor R3 and the 1_4 end; and the output end is connected with the input end of the inverter U4; and the output end of the inverter U4 is connected with the base of the triode Q1.

Description

Technical Field

[0001] This invention relates to the field of insulation condition testing technology, and in particular to a frequency conversion resonant test circuit. Background Technology

[0002] The resonant withstand voltage test is a test method that uses frequency tuning to bring the circuit to a resonant state, thereby generating a high voltage on the device under test to evaluate its insulation performance. The test method uses a frequency converter to output a sweep signal, which is coupled and boosted by an excitation transformer and then input to the resonant circuit. At the same time, the equivalent capacitance of the device under test is connected in parallel to a capacitor divider. When the power supply output frequency matches the circuit's inherent resonant frequency, the required test voltage can be obtained across the capacitor under test. However, it is necessary to continuously collect voltage parameters during the resonance process and repeatedly read and write and compare parameters to determine the maximum peak value at the resonant point. This results in high resource consumption and is prone to measurement failures. Therefore, a resonant test circuit that can be detected by a single read and write operation is proposed. Summary of the Invention

[0003] To address the aforementioned technical problems, the purpose of this invention is to provide a frequency conversion resonant test circuit, comprising several operational amplifiers, several inverters, several transistors, several resistors, and capacitors. Among the operational amplifiers, the non-inverting input of operational amplifier U1 is connected to the non-inverting input of operational amplifier U6, one end of capacitor C1, one end of resistor R4, one end of resistor R5, and terminals I-2; the inverting input is connected to the output terminal of operational amplifier U7, one end of resistor R7, and one end of resistor R13; the output terminal is connected to the inverting input of operational amplifier U3, the input terminal of inverter U2, and one end of resistor R1; the output terminal of inverter U2 is connected to the base of transistor Q2; the non-inverting input of operational amplifier U3 is connected to one end of resistor R2, one end of resistor R3, and terminals I-4; the output terminal is connected to the input terminal of inverter U4; the output terminal of inverter U4... Connect the base of transistor Q1; connect the non-inverting input of op-amp U5 to one end of resistor R8 and one end of resistor R9, connect the inverting input to one end of resistor R6 and the other end of resistor R7, and connect the output to the other end of resistor R6 and terminal 1-3; connect the inverting input of op-amp U6 to one end of resistor R12, and connect the output to the other end of resistor R8 and the other end of resistor R12; connect the non-inverting input of op-amp U7 to terminal 1-1, and connect the inverting input to the other end of resistor R13; connect the collector of transistor Q1 to the other end of resistor R5; connect the emitter of transistor Q2 to the other end of resistor R4; connect the collector of transistor Q2 and the other end of resistor R2 to the power supply; connect the other ends of resistor R1, resistor R3, resistor R9, the emitter of transistor Q1, and the other end of capacitor C1 to ground.

[0004] Furthermore, it also includes several operational amplifiers, several diodes, several transistors, several resistors, and inverters. Among the operational amplifiers, the non-inverting input of operational amplifier U8 is connected to terminals 1-3, and its output is connected to the anode of diode D1 and terminals 1-5. Operational amplifier U9 has its non-inverting input connected to the cathodes of diodes D1 and D2, one end of resistor R16, and one end of resistor R17; its inverting input is connected to the cathode of diode D3, one end of resistor R18, and one end of resistor R19; and its output is connected to the anode of diode D2 and the base of transistor Q4. The input terminal of amplifier U10 is connected to the collector of transistor Q3 and one end of resistor R10, and the output terminal is connected to terminals 1-4; the inverting input of operational amplifier U11 is connected to terminals 1-2, and the output terminal is connected to the anode of diode D3; the base of transistor Q3 is connected to the collector of transistor Q4; the emitter of transistor Q4 is connected to one end of resistor R11; the emitter of transistor Q3, the other end of resistor R16, and the other end of resistor R19 are connected to the power supply; the other ends of resistors R10, R11, R17, and R18 are grounded.

[0005] Furthermore, it also includes several resistors, wherein one end of resistor R15 is connected to one end of resistor R14, the tap end, and the inverting input of operational amplifier U8, and the other end is connected to the power supply; the other end of resistor R14 is grounded.

[0006] Furthermore, it also includes several resistors, one end of which is connected to the non-inverting input of the operational amplifier U11, one end of which is connected to the power supply; the other end of which is connected to the power supply.

[0007] Furthermore, it also includes several resistors, one end of which, resistor R20, is connected to one end of resistor R21 and I_1, and the other end is connected to the current sampling signal I1 of the resonant circuit; the other end of the current sampling signal I1 of the resonant circuit and the other end of resistor R21 are grounded.

[0008] Furthermore, the resistor R14 is an adjustable resistor.

[0009] Furthermore, it also includes a processing unit, which includes a processor.

[0010] Furthermore, it also includes a processing unit, which is equipped with a stop-test reference signal. The processor samples the signal at terminal 1_3 and compares it with the stop-test signal. When 1_4 is at a high level and less than the stop-test signal, it reads the voltage parameter 1_2 and outputs a low-level signal to 1_4. When capacitor C1 is at its initial potential, it outputs a high-level signal to 1_4 again to reset the circuit.

[0011] Furthermore, the processor reads the current signal parameter 1_2 after the 1_5 feedback signal.

[0012] The advantages of this invention compared to the prior art are:

[0013] This invention can screen the maximum current at the resonant point in a resonant circuit by detecting a single reverse-current check. Compared with the traditional replacement and comparison detection method, the screening can be completed with just one reading. Furthermore, it provides a control method that can automatically screen based on current changes, enabling closed-loop control without the need for input signals or restarting the circuit. Attached Figure Description

[0014] To more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings used in the prior art and embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0015] Figure 1 A schematic diagram of the variable frequency resonant test circuit provided by the present invention.

[0016] Figure 2 A schematic diagram of the high-current limiting sampling circuit for the resonant circuit provided by the present invention.

[0017] Figure 3 A schematic diagram of the current sampling points of the resonant circuit provided by the present invention. Detailed Implementation

[0018] To make the objectives and advantages of the present invention clearer, the present invention will be specifically described below in conjunction with embodiments. It should be understood that the following text is only used to describe one or more specific embodiments of the present invention and does not strictly limit the scope of protection specifically claimed by the present invention.

[0019] This invention discloses a frequency conversion resonant test circuit, comprising several operational amplifiers, several inverters, several transistors, several resistors, and capacitors. Among the operational amplifiers, the non-inverting input of operational amplifier U1 is connected to the non-inverting input of operational amplifier U6, one end of capacitor C1, one end of resistor R4, one end of resistor R5, and terminals I-2; the inverting input is connected to the output terminal of operational amplifier U7, one end of resistor R7, and one end of resistor R13; the output terminal is connected to the inverting input of operational amplifier U3, the input terminal of inverter U2, and one end of resistor R1; the output terminal of inverter U2 is connected to the base of transistor Q2; the non-inverting input of operational amplifier U3 is connected to one end of resistor R2, one end of resistor R3, and terminals I-4; the output terminal is connected to the input terminal of inverter U4; the output terminal of inverter U4 is connected to transistor Q1. Base; the non-inverting input of op-amp U5 is connected to one end of resistor R8 and one end of resistor R9, the inverting input is connected to one end of resistor R6 and the other end of resistor R7, and the output is connected to the other end of resistor R6 and terminal 1-3; the inverting input of op-amp U6 is connected to one end of resistor R12, and the output is connected to the other end of resistor R8 and the other end of resistor R12; the non-inverting input of op-amp U7 is connected to terminal 1-1, and the inverting input is connected to the other end of resistor R13; the collector of transistor Q1 is connected to the other end of resistor R5; the emitter of transistor Q2 is connected to the other end of resistor R4; the collector of transistor Q2 and the other end of resistor R2 are connected to the power supply; the other ends of resistor R1, resistor R3, resistor R9, the emitter of transistor Q1, and the other end of capacitor C1 are grounded.

[0020] Specifically, it also includes several operational amplifiers, several diodes, several transistors, several resistors, and an inverter. Among the operational amplifiers, the non-inverting input of operational amplifier U8 is connected to terminals 1-3, and its output is connected to the anode of diode D1 and terminals 1-5. Operational amplifier U9 has its non-inverting input connected to the cathodes of diodes D1 and D2, one end of resistor R16, and one end of resistor R17; its inverting input is connected to the cathode of diode D3, one end of resistor R18, and one end of resistor R19; and its output is connected to the anode of diode D2 and the base of transistor Q4. The input terminal of amplifier U10 is connected to the collector of transistor Q3 and one end of resistor R10, and the output terminal is connected to terminals 1-4; the inverting input of operational amplifier U11 is connected to terminals 1-2, and the output terminal is connected to the anode of diode D3; the base of transistor Q3 is connected to the collector of transistor Q4; the emitter of transistor Q4 is connected to one end of resistor R11; the emitter of transistor Q3, the other end of resistor R16, and the other end of resistor R19 are connected to the power supply; the other ends of resistors R10, R11, R17, and R18 are grounded.

[0021] Specifically, it also includes several resistors, one end of which, resistor R15, is connected to one end of resistor R14, the tap terminal, and the inverting input of operational amplifier U8, and the other end is connected to the power supply; the other end of resistor R14 is grounded.

[0022] Specifically, it also includes several resistors, one end of which is connected to the non-inverting input of the operational amplifier U11, one end of which is connected to the power supply; the other end of which is connected to the power supply.

[0023] Specifically, it also includes several resistors, one end of which, resistor R20, is connected to one end of resistor R21 and I_1, and the other end is connected to the current sampling signal I1 of the resonant circuit; the other end of the current sampling signal I1 of the resonant circuit and the other end of resistor R21 are grounded.

[0024] Specifically, the resistor R14 is an adjustable resistor.

[0025] Specifically, it also includes a processing unit, which includes a processor.

[0026] Specifically, it also includes a processing unit, which is further provided with a stop test reference signal. The processor samples the signal at terminal 1_3 and compares it with the stop test signal. When 1_4 is at a high level and less than the stop test signal, the voltage parameter of 1_2 is read and a low level signal is output to 1_4. When capacitor C1 is at the initial potential, a high level signal is output to 1_4 again to reset the circuit.

[0027] Specifically, the processor reads the current signal parameter 1_2 after the 1_5 feedback signal.

[0028] 1_1 is the input terminal of the resonant circuit current sampling signal corresponding to the current sample capacitor, used to sample the voltage parameter of the sample capacitor in the resonant circuit. The resonant circuit current sampling signal I1 is the current parameter signal in the resonant circuit. Figure 3 1_2 is the voltage parameter signal terminal of the current test sample capacitor XC terminal (obtained through a current transformer or coupling). It is used to obtain the voltage parameter signal of the current resonant point when the frequency converter is input to the resonant circuit through the excitation transformer. 1_3 is the voltage signal terminal corresponding to the frequency change range after the resonant point reaches the maximum voltage. It is used to determine whether to stop the test after the maximum resonant point voltage parameter of the test sample capacitor in the current test spectrum range is selected. 1_4 is the stop test signal input terminal. 1_5 is the sampling indication signal. When the signal input of 1_5 exists, the parameter of 1_2 is sampled.

[0029] In one embodiment, the goal is to achieve the screening and reset of the maximum resonant voltage in a single read / write operation. This eliminates multiple sampling and comparisons. Since frequency increases or decreases after reaching the maximum resonant voltage will cause a decrease in the resonant current, a reversal prevention mechanism is implemented before the resonant current decreases and before reading. When the current decreases, the processor reads the corresponding parameter signal after the reversal prevention and then writes it. In this scheme, the current value in the resonant circuit is first sampled by a current transformer and fed back to I_1. After the circuit is powered on, a high-level signal is input to I_4. The I_1 signal is then fed back to operational amplifier U7. After isolation by resistor R13, one path is fed back to the inverting input of operational amplifier U1, and the other path is input to the inverting input of operational amplifier U5 via resistor R7. The non-inverting input of operational amplifier U1 samples the capacitor C1. The voltage signal is fed back from the low-level output of op-amp U1 to inverter U2 and to the inverting input of op-amp U3. The initial feedback voltage at the non-inverting input of op-amp U3 is set by resistors R2 and R3, and this voltage parameter is less than the maximum voltage parameter of op-amp U1 when it outputs a high level. The low-level signal output by op-amp U1 is inverted by inverter U2 and input to the base of transistor Q2, turning on transistor Q2. The collector power supply of transistor Q2 is input to capacitor C1 via its emitter and resistor R4, causing the voltage across capacitor C1 to rise. The other path feeds back to the collector of transistor Q1 via resistor R5. As the frequency of the inverter power supply is adjusted, the current gradually increases during the process of reaching the maximum resonant point of the resonant circuit. After mutual inductance or coupling, the current is fed back to the I_I signal parameter, causing it to rise. This, along with the above circuit, causes the capacitor... When the voltage of C1 rises, and the frequency of the inverter power supply exceeds the maximum resonant point of the resonant circuit, the current gradually decreases. The high-level output of operational amplifier U1 is fed back to inverter U2. After inverter U2 is inverted, transistor Q2 is cut off. At the same time, the high-level signal output from 1_4 is fed back to the non-inverting input of operational amplifier U3. The voltage at the non-inverting input of operational amplifier U3 is greater than the high-level output voltage parameter of operational amplifier U1. Operational amplifier U3 outputs a low-level signal to inverter U4. After inverter U4 is inverted, it is input to the base of transistor Q1. Transistor Q1 is cut off, cutting off the circuit of capacitor C1. At this time, the voltage at the end of capacitor C1 is still the maximum resonant point voltage corresponding to the current resonant circuit after sampling the transformation ratio by the current transformer, thus completing the reverse protection. At the same time, the voltage at the end of capacitor C1 is input to the non-inverting input of operational amplifier U6. Operational amplifier U6 is fed back through resistor R12 and then... The signal is isolated and then input to the non-inverting input of operational amplifier U5 via resistors R8 and R9 and a grounding loop. The output of operational amplifier U5 is differentially divided after negative feedback via resistor R6 and output to the host processor (1_3). The host processor sets a stop reference signal and compares it with 1_3. If the signal is less than 1_3, it reads the signal at terminal 1_2 and inputs a low-level signal to 1_4. At this time, operational amplifier U1 outputs a high-level signal to operational amplifier U3. Operational amplifier U3 samples the voltage at the connection point of resistors R2 and R3 and outputs a high-level signal. After being inverted by inverter U4, transistor Q1 conducts. Capacitor C1 passes through resistor R5, the collector and emitter of transistor Q1, and the grounding loop. When the potential of capacitor C1 is discharged to the initial potential, a high-level signal is input to 1_4 again to complete the reset and complete the entire screening process.

[0030] In one embodiment, based on the above scheme, an automatic closed-loop control method based on resonant current transformation is proposed. This eliminates the need for signal input and circuit restart by the processor. The host processor receives signal 1_5 and reads signal 1_2. In this scheme, signal 1_3 is fed back to the non-inverting input of operational amplifier U8, and the inverting input of operational amplifier U8 is set with a stop-test reference signal. Operational amplifier U8 replaces the host processor for output. The output of operational amplifier U8 is fed back to operational amplifier U9 via diode D1, which is used for reverse polarity protection. The inverting input of operational amplifier U9 is set with an initial reference signal. When the amplitude is greater than the low level output of operational amplifier U8, the power supply passes through resistor R16 and resistor R1... The reference voltage set at the non-inverting input of op-amp U9 (pair 7) ensures that op-amp U9 is in a low-level output state after power-on. When the voltage parameter 1-3 is greater than that at the inverting input of op-amp U8, the output signal of op-amp U8 is fed back to the non-inverting input of op-amp U9 via diode D1. The high-level signal of op-amp U9 is fed back to the base of transistor Q4, turning on transistor Q4. The emitter power supply of transistor Q3 is then turned on after passing through the collector, emitter, and resistor R11 of transistor Q4. The emitter power supply of transistor Q3 is then fed back to the inverter U10 after passing through the collector, resistor R10, and ground, and then fed back to the non-inverting input of op-amp U3 via 1-4. At this point, op-amp U1 outputs a high-level signal to op-amp U3. Op-amp U3 samples the voltage across resistors R2 and R3, and outputs a high-level signal. After being inverted by inverter U4, transistor Q1 conducts. Capacitor C1 passes through resistor R5, the collector and emitter of transistor Q1, and ground. When voltage parameter 1_1 is lower than 1_2 and its amplitude is less than the inverting input of op-amp U8, op-amp U8 is cut off. The output of op-amp U9 is fed back to the non-inverting input of op-amp U9 via diode D2, closing the loop. The voltage across capacitor C1 is continuously pulled down through resistor R5, the collector and emitter of transistor Q1, and ground. Simultaneously, the signal at capacitor C1 is fed back to the op-amp U3. The inverting input of op-amp U11 is connected to the non-inverting input, where a reference signal is set. When the potential of capacitor C1 is lower than the reference voltage at the non-inverting input of op-amp U11, the output signal of op-amp U11 is fed back to op-amp U9 via diode D3. Op-amp U9 outputs a low-level signal to the base of transistor Q4. Transistor Q4 cuts off the emitter-base circuit of transistor Q3. After transistor Q3 is cut off, the signal is fed back to inverter U10 for inversion and output as a high-level signal. This signal is fed back to the non-inverting input of op-amp U3 via 1_4, and op-amp U3 outputs again. When the current transformer or coupling transformer signal is input to 1_1 again, the circuit is restarted, completing the closed-loop control.

[0031] In one embodiment, when the current exceeds the non-rail voltage sampling range of op-amp U7, a proportional transformer is used or the turns ratio of the coupling primary and secondary sides is adjusted. The reference signals of the inverting input of op-amp U8 and the non-inverting input of op-amp U11 are provided by an adjustable power supply in addition to voltage division. Resistor R14 can be set as an adjustable resistor. The stop measurement reference signal of the frequency range after manually adjusting the maximum voltage of the resonant point is used. When the current of the resonant circuit current sampling signal I1 is too large, it can be current-limited by resistor R20 and then input to I_1 through resistor R21. When using parallel or series-parallel resonance for testing, the conversion between resistors R20 and R21 is removed, and a voltage transformer with the corresponding ratio is used.

[0032] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above, and that the invention can be implemented in other specific forms without departing from its spirit or essential characteristics. Therefore, the embodiments should be considered in all respects as exemplary and non-limiting, and the scope of the invention is defined by the appended claims rather than the foregoing description. Thus, all variations falling within the meaning and scope of equivalents of the claims are intended to be included within the present invention. No markings in the claims should be construed as limiting the scope of the claims.

Claims

1. A variable frequency resonant test circuit, characterized by, The op-amp U1 in the plurality of op-amps is connected to the same-phase end of the op-amp U6, one end of the capacitor C1, one end of the resistor R4, one end of the resistor R5, and the current resonant point voltage parameter signal 1_2 end, and is connected to the opposite-phase end of the op-amp U7, one end of the resistor R7, and one end of the resistor R13, and is connected to the opposite-phase end of the op-amp U3, the input end of the inverter U2, and one end of the resistor R1; the output end of the inverter U2 is connected to the base of the triode Q2; the same-phase end of the op-amp U3 is connected to one end of the resistor R2 and one end of the resistor R3 and the stop-measuring signal input end 1_4, and is connected to the input end of the inverter U4; the output end of the inverter U4 is connected to the base of the triode Q1; the same-phase end of the op-amp U5 is connected to one end of the resistor R8 and one end of the resistor R9, and is connected to one end of the resistor R6 and the other end of the resistor R7, and is connected to the other end of the resistor R6 and the resonant point to the maximum voltage after the frequency change range corresponding voltage signal 1_3 end; the opposite-phase end of the op-amp U6 is connected to one end of the resistor R12, and the output end is connected to the other end of the resistor R8 and the other end of the resistor R12; the same-phase end of the op-amp U7 is connected to the current resonant circuit current sampling signal input 1_1 end corresponding to the current test product capacitor, and the opposite-phase end is connected to the other end of the resistor R13; the collector of the triode Q1 is connected to the other end of the resistor R5; the emitter of the triode Q2 is connected to the other end of the resistor R4; the collector of the triode Q2 and the other end of the resistor R2 are connected to the power supply; the other end of the resistor R1, the other end of the resistor R3, the other end of the resistor R9, the emitter of the triode Q1, and the other end of the capacitor C1 are connected to the ground.

2. The variable frequency resonant test circuit of claim 1, wherein, The op-amp U8 in the plurality of op-amps is connected to the resonant point to the maximum voltage after the frequency change range corresponding voltage signal 1_3 end, and is connected to the anode of the diode D1 and the sampling indication signal 1_5 end; the same-phase end of the op-amp U9 is connected to the cathode of the diode D1, the cathode of the diode D2, one end of the resistor R16, and one end of the resistor R17, and is connected to the cathode of the diode D3, one end of the resistor R18, and one end of the resistor R19, and is connected to the anode of the diode D2 and the base of the triode Q4; the input end of the inverter U10 is connected to the collector of the triode Q3 and one end of the resistor R10, and the output end is connected to the stop-measuring signal input end 1_4; the opposite-phase end of the op-amp U11 is connected to the current resonant point voltage parameter signal 1_2 end, and the output end is connected to the anode of the diode D3; the base of the triode Q3 is connected to the collector of the triode Q4; the emitter of the triode Q4 is connected to one end of the resistor R11; the emitter of the triode Q3, the other end of the resistor R16, and the other end of the resistor R19 are connected to the power supply; the other end of the resistor R10, the other end of the resistor R11, the other end of the resistor R17, and the other end of the resistor R18 are connected to the ground.

3. The variable frequency resonant test circuit of claim 2, wherein, The resistor R15 in the plurality of resistors is connected to one end of the resistor R14, a tap end, and the opposite-phase end of the op-amp U8, and the other end is connected to the power supply; the other end of the resistor R14 is connected to the ground.

4. The variable frequency resonant test circuit of claim 2, wherein, The resistor R23 in the plurality of resistors is connected to the same-phase end of the op-amp U11 and one end of the resistor R22, and the other end is connected to the power supply; the other end of the resistor R22 is connected to the ground.

5. The variable frequency resonant test circuit of claim 1, wherein, Also include several resistors, the resistor R20 one end of the resistor R21 one end, the current sampling signal input 1_1 end corresponding to the resonant circuit of the current sample signal of the current test product capacitor, the other end of the resonant circuit current sampling signal I1; the other end of the resonant circuit current sampling signal I1, the other end of the resistor R21 is grounded.

6. The variable frequency resonant test circuit of claim 3, wherein, The resistor R14 is an adjustable resistor.

7. The variable frequency resonant test circuit of claim 1, wherein, Also include a processing unit, the processing unit includes a processor.

8. The variable frequency resonant test circuit of claim 7, wherein, Also include a processing unit, the processing unit is also provided with a stop measurement reference signal, the processor samples the voltage signal 1_3 corresponding to the frequency variation range after the resonant point reaches the maximum voltage and compares with the stop measurement signal, when the stop measurement signal input end 1_4 is at high level and less than the stop measurement signal, the current resonant point voltage parameter signal 1_2 voltage parameter is read and output low level signal to the stop measurement signal input end 1_4, when the capacitor C1 is at the initial potential, output high level signal to the stop measurement signal input end 1_4 again to reset the circuit.

9. The variable frequency resonant test circuit of claim 7, wherein, The processor reads the current signal parameter of the current resonant point voltage parameter signal 1_2 after sampling the feedback signal of the indication signal 1_5.

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