Data format conversion apparatus and method, electronic device, computer storage medium

Abstract

The embodiment of the application discloses a data format conversion device and method, electronic equipment and computer storage medium, the data format conversion device comprises: a first shift module, which is used for first extended shift of a normalized format number to be converted integer, and obtains a shift integer; the bit number of the shift integer is n times of the bit number of the integer to be converted; n is a positive integer; a second shift module is used for second extended shift of a normalized format number to be converted decimal, and obtains a shift decimal; an addition module is used for adding the shift integer and the shift decimal, and obtains a shift number; a floating point conversion module is used for floating point format conversion of the shift number, and obtains a floating point format number of the shift number; the floating point format number of the shift decimal is a target floating point number.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of computer, and particularly relates to a data format conversion device and method, an electronic device and a computer storage medium. BACKGROUND

[0002] At present, electronic devices usually need to perform various floating point operations on pixels through a graphics processing unit (GPU) to realize image processing and rendering, so that the GPU needs to convert normalized format data into floating point format data and then perform processing. However, the GPU can usually only convert normalized format integers into floating point format data, and the precision of data format conversion of the GPU is low for normalized format data with decimals. SUMMARY

[0003] The embodiments of the present application provide a data format conversion device and method, an electronic device and a computer storage medium, which can convert normalized format data with decimals into floating point format data and improve the precision of data format conversion.

[0004] The technical scheme of the present application is implemented as follows:

[0005] The embodiments of the present application provide a data format conversion device, which comprises:

[0006] A first shift module is configured to perform first extended shifting on a normalized format number to be converted integer to obtain a shifted integer; the number of bits of the shifted integer is n times the number of bits of the to-be-converted integer; n is a positive integer;

[0007] A second shift module is configured to perform second extended shifting on a normalized format number to be converted decimal to obtain a shifted decimal; the number of bits of the shifted decimal is the sum of n-1 times the number of bits of the to-be-converted integer and the number of bits of the to-be-converted decimal.

[0008] An addition module is configured to add the shifted integer and the shifted decimal to obtain a shifted number.

[0009] A floating point conversion module is configured to perform floating point format conversion on the shifted number to obtain a floating point format number of the shifted number; the floating point format number of the shifted decimal is a target floating point number.

[0010] The embodiments of the present application provide a data format conversion method, which comprises:

[0011] The first extension module is used for performing first extension shift on the normalized format number to be converted integer to obtain a shifted integer; the bit number of the shifted integer is n times of the bit number of the integer to be converted; n is a positive integer; the second extension module is used for performing second extension shift on the normalized format number to be converted decimal to obtain a shifted decimal; the bit number of the shifted decimal is (n-1) times of the sum of the bit number of the integer to be converted and the bit number of the decimal to be converted; the addition module is used for adding the shifted integer and the shifted decimal to obtain a shifted number; the floating point conversion module is used for performing floating point format conversion on the shifted number to obtain a floating point format number of the shifted number; and the floating point format number of the shifted decimal is the target floating point number.

[0012] The embodiment of the present application provides a processor, and the processor comprises the data format conversion device.

[0013] The embodiment of the present application provides a chip product, and the chip product comprises the processor, and the processor comprises the data format conversion device.

[0014] The embodiment of the present application provides an electronic device comprising a processor, and the processor comprises the data format conversion device.

[0015] The embodiment of the present application provides a data format conversion device and method, an electronic device and a computer storage medium, because the integer part and the decimal part of the normalized format number to be converted data are processed respectively to obtain a floating point number, the format conversion of the normalized format data is realized, and the precision of the conversion of the normalized format data into the floating point number can be improved. BRIEF DESCRIPTION OF DRAWINGS

[0016] Figure 1 A structure diagram of the data format conversion device provided by the embodiment of the present application Figure 1 ;

[0017] Figure 2 A process diagram for determining the shifted number provided by the embodiment of the present application Figure 1 ;

[0018] Figure 3 A process diagram for determining the shifted number provided by the embodiment of the present application Figure 2 ;

[0019] Figure 4 A structure diagram of the data format conversion device provided by the embodiment of the present application Figure 2 ;

[0020] Figure 5 A structure diagram of the floating point format number provided by the embodiment of the present application

[0021] Figure 6 A structure diagram of the data format conversion device provided by the embodiment of the present application Figure 3;

[0022] Figure 7 A flowchart of a data format conversion method provided by an embodiment of the present application is shown in FIG. 1.

[0023] Figure 8 A hardware structure schematic diagram of an electronic device provided by an embodiment of the present application is shown in FIG. 2. DETAILED DESCRIPTION

[0024] In order to make the objects, technical solutions and advantages of the present application clearer, the present application will be further described in detail below with reference to the accompanying drawings, and the described embodiments should not be regarded as limiting the present application, and all other embodiments obtained by those skilled in the art without creative labor fall within the scope of protection of the present application.

[0025] In the following description, “some embodiments” are described, which describe a subset of all possible embodiments, but it can be understood that “some embodiments” can be the same subset or different subsets of all possible embodiments, and can be combined with each other without conflict.

[0026] In the following description, the terms “first\second\third” are only to distinguish similar objects, and do not represent a specific order of the objects, and it can be understood that “first\second\third” can be interchanged in a specific order or sequence as allowed, so that the embodiments of the present application described herein can be implemented in an order other than that illustrated or described herein.

[0027] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the present application belongs. The terms used herein are only for the purpose of describing the embodiments of the present application, and are not intended to limit the present application.

[0028] In order to facilitate the understanding of the present application, before the embodiments of the present application are described, the application background in the embodiments of the present application is described.

[0029] In the process of performing graphics processing, the GPU often needs to perform interpolation calculation such as linear filtering on unsigned normalized (UNORM) data. When the GPU performs interpolation calculation on multiple unsigned normalized data, a decimal unsigned normalized data can be generated. At this time, the GPU needs to convert the decimal unsigned normalized data into floating point data, and then perform floating point operation based on the floating point data to realize image rendering and processing.

[0030] In the related art, the GPU can only convert the unsigned normalized integer into a floating-point number, but cannot process the unsigned normalized data with decimals. Therefore, for the unsigned normalized data with decimals, the GPU usually needs to round the data to obtain approximate integer unsigned normalized data, and then convert the data. However, the rounding process will cause data errors, resulting in insufficient accuracy of the converted floating-point data, and thus affecting the calculation accuracy of the GPU.

[0031] To solve the above problems, an embodiment of the present application provides a data format conversion device, Figure 1 The structure of a data format conversion device provided by an embodiment of the present application is shown in Figure 1 As shown in Figure 1 , the device can include: a first shift module 10 configured to perform a first extended shift on a to-be-converted integer of to-be-converted data in a normalized format to obtain a first shifted integer; the number of bits of the first shifted integer is n times the number of bits of the to-be-converted integer; n is a positive integer; a second shift module 20 configured to perform a second extended shift on a to-be-converted decimal of the to-be-converted data to obtain a second shifted decimal; the number of bits of the second shifted decimal is 2n-1 times the number of bits of the to-be-converted decimal; an addition module 30 configured to add the shifted integer and the shifted decimal to obtain a shifted decimal; and a floating-point conversion module 40 configured to perform floating-point format conversion on the shifted decimal to obtain a floating-point format number of the shifted decimal; the floating-point format number of the shifted decimal is a target floating-point number.

[0032] In the embodiment of the present application, the normalized format number can be of any bit number. The normalized format number of any bit number includes a to-be-converted integer and a to-be-converted decimal, the to-be-converted integer is denoted by a and has a bit number A, and the to-be-converted decimal is denoted by b and has a bit number B; the normalized format number can be represented as "a.b", and the value of the normalized format number is the sum of a and b; wherein A and B are positive integers. The value range of the normalized format number of an A-bit integer is [0, 2 A -1], that is, when "a.b" is 0, the value of the floating-point format number thereof is 0.0; and when "a.b" is 2 A -1, the value of the floating-point format number thereof is 1.0.

[0033] It should be noted that the to-be-converted integer and the to-be-converted decimal are both original code data. If the normalized format number is a negative number, the integer part and the decimal part thereof are both complements, and the normalized format number needs to be restored to the original code, so as to obtain the to-be-converted integer and the to-be-converted decimal.

[0034] For example, the format of the normalized format number is UNORM8, the normalized format number is "11000101.1101", with 4-bit decimals, the to-be-converted integer is "11000101", and the to-be-converted decimal is "1101".

[0035] In the embodiment of the present application, the relationship between the normalized format number "a.b" and the target floating-point number float can be represented by formula (1).

[0036] Formula (1)

[0037] In the embodiment of the present application, since the division calculation unit is very complex, the normalized format number "a.b" is converted into the floating-point number float by division, which can usually be implemented by a shift operation. Formula (1) can be represented by formula (2).

[0038] Formula (2)

[0039] As can be seen from formula (2), the decimal point of the normalized format number can be shifted to the left by A bits to obtain an approximate floating-point number float1, which is used as the target floating-point number float. Here, the larger A is, the more similar the values of the approximate floating-point number float1 and the floating-point number float are, and the higher the conversion accuracy is.

[0040] In the embodiment of the present application, the normalized format number with A-bit integer bits can be expanded to have an integer bit number of A integer multiples, for example, 2A bits, 3A bits, etc. By expanding the integer bit number, the conversion accuracy can be improved, but the calculation complexity is also increased. Here, the expanded integer bit number can be set according to requirements, and the embodiment of the present application does not make any limitation. The expanded integer bit number is nA, n is a positive integer, and nA represents n multiplied by A.

[0041] In the embodiment of the present application, the target floating-point number float of the normalized format number with nA-bit integer bits can be converted by formula (3).

[0042] Formula (3)

[0043] In formula (3), the denominator can be factorized to obtain formula (4).

[0044] Formula (4)

[0045] According to formula (4), formula (2) can be represented by formula (5).

[0046] Formula (5)

[0047] In formula (5), the denominator can be factorized to obtain formula (6).

[0048] Formula (6)

[0049] Formula (7);

[0050] According to Formula (5) and Formula (2), Formula (8) can be obtained to represent the approximate floating point number float1.

[0051] Formula (8);

[0052] As can be seen from Formula (5) and Formula (8), the larger n is, the closer the value of the approximate floating point number float1 is to the value of the target floating point number float. The data format conversion device can perform a first extension shift on the to-be-converted integer a according to Formula (5) to obtain a shifted integer ; and perform a second extension shift on the to-be-converted decimal b to obtain a shifted decimal . The first extension shift is to splice and extend the to-be-converted integer a itself and n-1 shifted to-be-converted integers a, and the shift number of the to-be-converted integer a is an integer multiple of A; therefore, the bit number of the shifted integer is n times the bit number of the to-be-converted integer a. The second extension shift is to splice and extend the to-be-converted decimal b and n-1 shifted to-be-converted decimals b, and the shift number of the to-be-converted decimal b is an integer multiple of A; therefore, the bit number of the shifted decimal is 2n-1 times the bit number of the to-be-converted decimal.

[0053] In the embodiment of the present application, the first extension shift and the second extension shift are different. The data format conversion device can perform the first extension shift on the to-be-converted integer a through the first shift module 10 to obtain the shifted integer, and perform the second extension shift on the to-be-converted decimal b through the second shift module 20 to obtain the shifted decimal.

[0054] In the embodiment of the present application, the first shift module 10 obtains the shifted integer , and then the shifted integer can be output to the addition module 30. The second shift module 20 obtains the shifted decimal , and then the shifted decimal can be output to the addition module 30; the addition module 30 can perform addition processing on the shifted decimal and the shifted integer to obtain the shift number.

[0055] In the embodiment of the present application, after obtaining the shift number, the data format conversion device can perform floating point format conversion on the shift number through the floating point conversion module 40 to convert the shift number into a floating point format number to obtain the target floating point number.

[0056] It can be understood that the data format conversion device can perform integer part processing and decimal part processing on the normalized format data to be converted respectively, so as to obtain a floating point format number of the data to be converted, and the format conversion of the normalized format data with decimals is realized, and the precision of the conversion of the normalized format data into a floating point number can be improved.

[0057] In some embodiments of the present application, the first shift module 10 is further configured to fill the integer to be converted from low bits to high bits n times to obtain a shifted integer.

[0058] In the embodiments of the present application, the first shift module 10 can fill the integer to be converted a from low bits to high bits n times in sequence to obtain a shifted integer . According to formula (6), the first filling of the integer to be converted a from low bits to high bits is a itself, the second filling is to fill a from the next bit of a, which is equivalent to left shifting a by A bits, and the n-th filling is to fill a from the next bit of the (n-1)-th filling of a, which is equivalent to left shifting a by (n-1) times of A bits. The n times of filling obtains data splicing, which is equivalent to adding the data obtained by n times of filling to obtain a shifted integer . The number of bits of the shifted integer is nA.

[0059] For example, the integer to be converted a is "u7u6u5u4u3u2u1u0", and the number of bits A is equal to 8. If n is 2, the first shift module 10 can fill a continuously for 2 times, which is equivalent to adding "u7u6u5u4u3u2u1u0" and "u7u6u5u4u3u2u1u000000000", that is, adding a and to obtain a shifted integer "u7u6u5u4u3u2u1u0u7u6u5u4u3u2u1u0". If n is 3, the first shift module 10 can fill a continuously for 3 times, which is equivalent to adding "u7u6u5u4u3u2u1u0", "u7u6u5u4u3u2u1u000000000" and "u7u6u5u4u3u2u1u00000000000000000", that is, adding a, a and , and to obtain a shifted integer "u7u6u5u4u3u2u1u0u7u6u5u4u3u2u1u0u7u6u5u4u3u2u1u0".

[0060] It can be understood that the first shift module 10 can fill the integer to be converted a continuously for n times to realize the first extended shift of a, and the shifted integer is obtained, which is simple and can improve the calculation efficiency.

[0061] In some embodiments of the present application, the second shift module 20 is further configured to adjust the bit number of the to-be-converted decimal number to obtain a padding number; pad the padding number for n-1 times from low bits to high bits to obtain integer bits of the shifted decimal number; and take the to-be-converted decimal number as the decimal bits of the shifted decimal number. In some embodiments of the present application, the second shift module 20 is further configured to adjust the bit number of the to-be-converted decimal number to obtain a padding number; pad the padding number for n-1 times from low bits to high bits to obtain integer bits of the shifted decimal number; and take the to-be-converted decimal number as the decimal bits of the shifted decimal number. In some embodiments of the present application, the second shift module 20 is further configured to adjust the bit number of the to-be-converted decimal number to obtain a padding number; pad the padding number for n-1 times from low bits to high bits to obtain integer bits of the shifted decimal number; and take the to-be-converted decimal number as the decimal bits of the shifted decimal number. In some embodiments of the present application, the second shift module 20 is further configured to adjust the bit number of the to-be-converted decimal number to obtain a padding number; pad the padding number for n-1 times from low bits to high bits to obtain integer bits of the shifted decimal number; and take the to-be-converted decimal number as the decimal bits of the shifted decimal number.

[0062] In some embodiments of the present application, the second shift module 20 is further configured to adjust the bit number of the to-be-converted decimal number to obtain a padding number; pad the padding number for n-1 times from low bits to high bits to obtain integer bits of the shifted decimal number; and take the to-be-converted decimal number as the decimal bits of the shifted decimal number.

[0063] In some embodiments of the present application, the second shift module 20 is further configured to adjust the bit number of the to-be-converted decimal number to obtain a padding number; pad the padding number for n-1 times from low bits to high bits to obtain integer bits of the shifted decimal number; and take the to-be-converted decimal number as the decimal bits of the shifted decimal number.

[0064] In some embodiments of the present application, the second shift module 20 is further configured to adjust the bit number of the to-be-converted decimal number to obtain a padding number; pad the padding number for n-1 times from low bits to high bits to obtain integer bits of the shifted decimal number; and take the to-be-converted decimal number as the decimal bits of the shifted decimal number.

[0065] In some embodiments of the present application, the second shift module 20 is further configured to adjust the bit number of the to-be-converted decimal number to obtain a padding number; pad the padding number for n-1 times from low bits to high bits to obtain integer bits of the shifted decimal number; and take the to-be-converted decimal number as the decimal bits of the shifted decimal number.

[0066] In some embodiments of the present application, the second shift module 20 is further configured to adjust the bit number of the to-be-converted decimal number to obtain a padding number; pad the padding number for n-1 times from low bits to high bits to obtain integer bits of the shifted decimal number; and take the to-be-converted decimal number as the decimal bits of the shifted decimal number.

[0067] In the embodiment of the present application, in the case that the bit number A of the integer to be converted is greater than or equal to the bit number B of the decimal to be converted, A-B is a non-negative number, at this time, the second shift module 20 needs to left shift the decimal to be converted by A-B bits to adjust the bits to obtain the filling number; the removed adjustment bits are filled with 0.

[0068] For example, the normalized format number is "u7u6u5u4u3u2u1u0.f3f2f1f0", the bit number A of the integer to be converted is 8, the decimal to be converted b is "f3f2f1f0", and the bit number B is equal to 4. The decimal to be converted is left shifted by 4 bits to adjust the bits to obtain the filling number "f3f2f1f00000". If n is 2, the integer bit of the shifted decimal is "f3f2f1f00000", the decimal bit of the shifted decimal is "f3f2f1f0", and the shifted decimal is "f3f2f1f00000.f3f2f1f0", that is, the result of and If n is 3, the integer bit of the shifted decimal is "f3f2f1f00000f3f2f1f00000", the decimal bit of the shifted decimal is "f3f2f1f0", and the shifted decimal is "f3f2f1f00000f3f2f1f00000.f3f2f1f0", that is, the result of , and .

[0069] For example, the normalized format number is "u7u6u5u4u3u2u1u0.f2f1f0", the bit number A of the integer to be converted is 8, the decimal to be converted b is "f2f1f0", and the bit number B is equal to 3. The decimal to be converted is left shifted by 5 bits to adjust the bits to obtain the filling number "f2f1f000000". If n is 2, the integer bit of the shifted decimal is "f2f1f000000", the decimal bit of the shifted decimal is "f3f2f1f0", and the shifted decimal is "f2f1f000000.f2f1f0". If n is 3, the integer bit of the shifted decimal is "f2f1f000000f2f1f000000", the decimal bit of the shifted decimal is "f3f2f1f0", and the shifted decimal is "f2f1f000000f2f1f000000.f2f1f0".

[0070] It can be understood that the second shift module 20 can adjust the decimal to be converted to obtain the filling number according to the comparison result of the bit number of the integer to be converted and the bit number of the decimal to be converted. In the case that the bit number of the integer to be converted is greater than or equal to the bit number of the decimal to be converted, the filling number is accurately obtained to fill to obtain the decimal bit of the shifted decimal.

[0071] In some embodiments of the present application, the second shift module 20 is further configured to, in the case that the number of bits of the integer to be converted is less than the number of bits of the decimal to be converted, right shift the decimal to be converted to the same number of bits as the integer to be converted to obtain the padding number.

[0072] In the embodiments of the present application, in the case that the number of bits A of the integer to be converted is less than the number of bits B of the decimal to be converted, A-B is negative, at this time, the second shift module 20 needs to right shift the decimal to be converted by B-A bits to adjust the bits to obtain the padding number.

[0073] In the embodiments of the present application, the padding number obtained by the first padding of the second shift module 20 is equivalent to , and the padding number obtained by the second padding is equivalent to the low bits of which are right shifted and the high bits are reserved, such as the following example in which the shifted decimal should be f5f4f3f2. f5f4f3f2.

[0074] For example, the normalized format number is "u3u2u1u0.f5f4f3f2f1f0", the number of bits A of the integer to be converted is 4, the number of bits B of the decimal to be converted is 6, the decimal to be converted is right shifted by 2 bits to adjust the bits to obtain the padding number "f5f4f3f2". If n is 2, the integer bits of the shifted decimal are "f5f4f3f2", the decimal bits of the shifted decimal are "f5f4f3f2", and the shifted decimal is "f5f4f3f2.f5f4f3f2", that is, the sum of and . If n is 3, the integer bits of the shifted decimal are "f5f4f3f2f5f4f3f2", the decimal bits of the shifted decimal are "f5f4f3f2", and the shifted decimal is "f5f4f3f2f5f4f3f2.f5f4f3f2", that is, the sum of , and .

[0075] It can be understood that the second shift module 20 can adjust the decimal to be converted to obtain the padding number according to the comparison result of the number of bits of the integer to be converted and the number of bits of the decimal to be converted. In the case that the number of bits of the integer to be converted is less than the number of bits of the decimal to be converted, the padding number is accurately obtained to fill to obtain the decimal bits of the shifted decimal.

[0076] In some embodiments of the present application, the addition module 30 is further configured to add the integer bits of the shifted decimal to the shifted integer to obtain the integer bits of the shifted number; and take the decimal bits of the shifted decimal as the decimal bits of the shifted number.

[0077] In the embodiment of the present application, the addition module 30 can align the lowest bit of the (n-1) A-bit integer bit of the shifted decimal number with the lowest bit of the n A-bit shifted integer, and then add them to obtain the integer bit of the shifted number; the integer bit of the shifted number is n A-bit. The decimal bit of the shifted decimal number is the decimal bit of the shifted number. The integer bit of the shifted number and the decimal bit of the shifted number are combined to be the shifted number.

[0078] Figure 2 A process for determining a shifted number provided by the embodiment of the present application Figure 1 As shown in Figure 2 , the normalized format number is "u7u6u5u4u3u2u1u0.f3f2f1f0", the bit number A of the integer to be converted is 8, and the bit number B of the decimal to be converted is 4. The first shifting module 10 obtains the shifted integer "u7u6u5u4u3u2u1u0u7u6u5u4u3u2u1u0" and the shifted decimal "f3f2f1f00000.f3f2f1f0", and adds them to obtain the normalized format number "16.4", wherein 16 represents the bit number of the integer bit of the shifted number, and 4 represents the bit number of the decimal bit of the shifted number. The shifted number includes the integer bit u16 of the shifted number and the decimal bit fix4 of the shifted number. Figure 3 A process for determining a shifted number provided by the embodiment of the present application Figure 2 As shown in Figure 3 , the normalized format number is "u7u6u5u4u3u2u1u0.f3f2f1f0", the bit number A of the integer to be converted is 8, and the bit number B of the decimal to be converted is 4. The first shifting module 10 obtains the shifted integer "u7u6u5u4u3u2u1u0u7u6u5u4u3u2u1u0u7u6u5u4u3u2u1u0" and the shifted decimal "f3f2f1f00000f3f2f1f00000.f3f2f1f0", and adds them to obtain the normalized format number "24.4", wherein 24 represents the bit number of the integer bit of the shifted number, and 4 represents the bit number of the decimal bit of the shifted number. The shifted number includes the integer bit u24 of the shifted number and the decimal bit fix4 of the shifted number.

[0079] It can be understood that the shifted integer and the integer bit of the shifted decimal can be aligned by the addition module 30, and then added bit by bit to obtain the expanded normalized format number; and the precision of converting the normalized format number into the floating-point number can be improved.

[0080] Based on Figure 1 , Figure 4 A structure of a data format conversion device provided by the embodiment of the present application Figure 2 As shown in Figure 4As shown, the floating-point conversion module 40 further includes a third shift module 401, an exponent addition module 402, and a floating-point splicing module 403. The third shift module 401 is configured to left-shift the decimal point of the shift number to the left side of the highest bit of the shift number to obtain a left-shifted number, right-shift the decimal point of the left-shifted number until the integer bit is a preset integer value to obtain a right-shifted number, and determine the mantissa based on the right-shifted number. The mantissa has the same number of bits as the mantissa of the target floating-point number. The exponent addition module 402 is configured to add the number of bits of the right-shifted number to the bias value of the target floating-point number to obtain the exponent of the target floating-point number. The floating-point splicing module 403 is configured to combine the mantissa, the exponent, and the sign number corresponding to the to-be-converted data to obtain the target floating-point number.

[0081] In the embodiments of the present application, the shift number is obtained by expanding the normalized format number, and the decimal point of the shift number needs to be left-shifted to keep the value of the normalized format number unchanged. According to formula (5), the shift number needs to be right-shifted by nA bits, that is, the decimal point of the shift number needs to be left-shifted by nA bits to obtain the approximate floating-point number as the target floating-point number.

[0082] In the embodiments of the present application, the number of integer bits of the shift number is the same as the number of integer bits of the shift number, that is, nA bits. The third shift module 401 moves the decimal point of the shift number to the left side of the highest bit, which is equivalent to moving nA bits. At this time, the value of the left-shifted number obtained is the value of the approximate floating-point number float1, which can be used as the value of the target floating-point number float.

[0083] In the embodiments of the present application, after obtaining the left-shifted number, the third shift module 401 needs to right-shift the decimal point of the left-shifted number until the integer bit is a preset integer value to obtain a right-shifted number. The third shift module 401 can determine the mantissa of the target floating-point number according to the decimal bit of the right-shifted number.

[0084] For example, the left-shifted number is “0.00001100101”, the preset integer value is 1, and the decimal point is right-shifted by 5 bits to obtain the right-shifted number “1.100101”. The mantissa “100101” of the right-shifted number can be used to determine the mantissa.

[0085] In some embodiments of the present application, the third shift module 401 is further configured to perform rounding processing on the right-shifted number to obtain the mantissa of the target floating-point number when the number of bits of the decimal point of the right-shifted number is greater than or equal to the number of bits of the mantissa of the target floating-point number.

[0086] In the embodiment of the present application, the value of the decimal part of the right shift number is equal to the value of the mantissa of the target floating-point number. After obtaining the right shift number, the third shift module 401 can first determine whether the decimal part of the right shift number is greater than or equal to the number of digits of the mantissa of the target floating-point number. If yes, the right shift number is rounded to obtain the mantissa of the target floating-point number. The rounding process can include any one of the following: rounding, taking even rounding, or directly rounding, etc. The present application does not limit the embodiment.

[0087] In some embodiments, the third shift module 401 can determine whether the digit after the highest mantissa digit of the decimal part of the right shift number is greater than or equal to the first preset threshold. If yes, the highest mantissa digit of the decimal part of the right shift number is incremented by 1 to obtain the mantissa. Otherwise, the highest mantissa digit of the decimal part of the right shift number is directly taken as the mantissa.

[0088] For example, the number of digits of the mantissa of the target floating-point number is 5, the digit after the highest 5 digits of the decimal part of the right shift number "1.100101" is 1, which is equal to the first preset threshold 1, and the highest 5 digits of the mantissa of the right shift number "10010" is incremented by 1 to obtain "10011", which is the mantissa.

[0089] In some embodiments, the third shift module 401 can determine whether the two digits after the highest mantissa digit of the decimal part of the right shift number are greater than the second preset threshold. If yes, the highest mantissa digit of the decimal part of the right shift number is incremented by 1 to obtain the mantissa. Otherwise, it is determined whether the two digits after the highest mantissa digit of the decimal part of the right shift number are less than the second preset threshold. If yes, the highest mantissa digit of the decimal part of the right shift number is directly taken as the mantissa. Otherwise, it is determined that the two digits after the highest mantissa digit of the decimal part of the right shift number are equal to the second preset threshold, and it is determined whether the highest mantissa digit of the decimal part of the right shift number is odd. If yes, the highest mantissa digit of the decimal part of the right shift number is incremented by 1 to obtain the mantissa. Otherwise, the highest mantissa digit of the decimal part of the right shift number is directly taken as the mantissa.

[0090] For example, the number of digits of the mantissa of the target floating-point number is 5, the two digits after the highest 5 digits of the decimal part of the right shift number "1.100101" are 10, which is equal to the second preset threshold 10. In the case that the highest 5 digits "10010" of the decimal part of the right shift number "1.100101" is even, "10010" is directly taken as the mantissa.

[0091] In some embodiments, the third shift module 401 can directly take the highest mantissa digit of the decimal part of the right shift number as the mantissa.

[0092] It can be understood that the third shift module 401 can determine the processing manner of the decimal place of the right shift number according to the number of decimal places of the right shift number and the number of the mantissa of the target floating-point number. In the case that the number of decimal places of the right shift number is greater than or equal to the number of the mantissa of the target floating-point number, the accuracy of determining the number of the mantissa of the target floating-point number is improved.

[0093] In some embodiments of the present application, the third shift module 401 is further configured to perform a padding processing on the right shift number to obtain the mantissa of the target floating-point number in the case that the number of bits of the right shift number is less than the number of the mantissa of the target floating-point number. The padding processing is to pad the right shift number with 0s after the decimal place of the right shift number. The number of the padded 0s is the difference between the number of the mantissa of the target floating-point number and the number of the decimal place of the right shift number.

[0094] In some embodiments of the present application, in the case that the number of decimal places of the right shift number is less than the number of the mantissa of the target floating-point number, 0s are padded after the decimal place of the right shift number until the number of decimal places of the right shift number is the same as the number of the mantissa of the target floating-point number. Here, the number of the padded 0s is the difference between the number of the mantissa of the target floating-point number and the number of the decimal place of the right shift number.

[0095] For example, the number of the mantissa of the target floating-point number is 8, and the number of the decimal place of the right shift number "1.100101" is 5. Three 0s are padded after the decimal place of the right shift number to obtain "100101000" as the mantissa.

[0096] It can be understood that the third shift module 401 can determine the processing manner of the decimal place of the right shift number according to the number of decimal places of the right shift number and the number of the mantissa of the target floating-point number. In the case that the number of decimal places of the right shift number is less than the number of the mantissa of the target floating-point number, the accuracy of determining the number of the mantissa of the target floating-point number is improved.

[0097] In some embodiments of the present application, the third shift module 401 can record the number of right shift after performing the right shift on the left shift number, and send the number of right shift to the exponent addition module 402. At this time, the exponent addition module 402 can perform an addition processing on the number of right shift and the bias value of the target floating-point number to obtain the exponent of the target floating-point number. The bias value of the target floating-point number corresponds to the number of the exponent of the target floating-point number. For example, the number of the exponent of the target floating-point number is 8, and the bias value is 127; the number of the exponent of the target floating-point number is 5, and the bias value is 15.

[0098] For example, Figure 5 A structure diagram of a floating-point format number is provided in some embodiments of the present application. As shown in FIG. 1, the floating-point format number includes a sign bit, an exponent and a mantissa. Figure 5As shown, the UNORM32 has 32 bits, in which the highest bit is a sign bit, the next 8 bits are exponent bits, and the next 23 bits are mantissa bits. The value of the floating-point format number is "1.23" x 2 （指数值-偏置值） ; in which 23 represents 23 mantissa bits. For example, if the sign bit of the UNORM32 is "1", indicating a negative number, the exponent bits are "10000010", and the mantissa bits are "11100000000000000000000", then the value is -1.11100000000000000000000 x 2 （130-127） , that is, -1.875 x 8 = -15. Therefore, after determining that the target floating-point number is "1. mantissa x 2 右移的位数 ", the value of the exponent bits can be determined by adding the number of bits of the right shift to the bias value.

[0099] In the embodiment of the present application, after the exponent addition module 402 determines the exponent of the target floating-point number, the exponent is sent to the floating-point splicing module 403; after the third shift module 401 determines the mantissa, the mantissa is also sent to the floating-point splicing module 403; in this way, the floating-point splicing module 403 can splice the mantissa, the exponent, and the sign number after obtaining the sign number of the normalized format number, to obtain the target floating-point number.

[0100] In the embodiment of the present application, the sign number of the normalized format number is a preset sign positive number, indicating that the normalized format number is a signed normalized format and is a positive number; the floating-point splicing module 403 can splice the preset sign positive number, the exponent, and the mantissa together in the order from high bits to low bits, to obtain the target floating-point number. The sign number of the normalized format number is a preset sign negative number, indicating that the normalized format number is a signed normalized format and is a negative number; the floating-point splicing module 403 can splice the preset sign negative number, the exponent, and the mantissa together in the order from high bits to low bits, to obtain the target floating-point number. The sign number of the normalized format number does not exist, indicating that the normalized format number is an unsigned normalized format, and it can be determined that the normalized format number is a positive number. The floating-point splicing module 403 can splice the preset sign positive number, the exponent, and the mantissa together in the order from high bits to low bits, to obtain the target floating-point number.

[0101] For example, the sign number is 1, indicating that the normalized format number is a negative number, and the sign number is 0 or does not exist, indicating that the normalized format number is a positive number. If the sign number of the normalized format number is 0, 0, the exponent, and the mantissa can be spliced to obtain the target floating-point number. If the sign number of the normalized format number is 1 or does not exist, 1, the exponent, and the mantissa can be spliced to obtain the target floating-point number.

[0102] It can be understood that the mantissa bits of the target floating-point number can be determined by the third shift module 401, and the exponent bits of the target floating-point number can be determined by the exponent addition module 402; thus, the mantissa bits, the exponent bits and the sign number can be spliced according to the floating-point format by the floating-point splicing module 403 to obtain the target floating-point number, so that the floating-point format conversion process is simplified, and the conversion efficiency is improved.

[0103] Based on Figure 3 , Figure 6 The structure of a data format conversion device provided by an embodiment of the present application is shown in Figure 3 . As shown in Figure 6 , the data format conversion device can further include a format splitting module 50 configured to split a to-be-converted integer and a to-be-converted decimal from the to-be-converted data.

[0104] In the embodiment of the present application, the format splitting module 50 can split the integer part and the decimal part of the normalized format number to obtain the to-be-converted integer and the to-be-converted decimal. The to-be-converted integer is transmitted to the first shift module 10, and the to-be-converted decimal is transmitted to the second shift module 20.

[0105] It can be understood that the format splitting module 50 can enable the first shift module 10 to quickly obtain the to-be-converted integer from any normalized format number, and enable the second shift module 20 to quickly obtain the to-be-converted decimal from any normalized format number; thus, the intelligence of the data format conversion device in performing format conversion on any normalized format number can be improved.

[0106] In some embodiments of the present application, the format splitting module 50 is further configured to, in the case that the normalized format number is negative, convert the normalized format number into original code data to obtain original code normalized format number; and split the to-be-converted integer and the to-be-converted decimal from the original code normalized format number.

[0107] In the embodiment of the present application, after obtaining the normalized format number, the format splitting module 50 can first determine whether the normalized format number is negative. If yes, it indicates that the normalized format number is complement code data, which needs to be restored to original code data to obtain original code normalized format number; and then the original code normalized format number is split to obtain the to-be-converted integer and the to-be-converted decimal; otherwise, it indicates that the normalized format number itself is original code data, which can be directly split to obtain the to-be-converted integer and the to-be-converted decimal.

[0108] It can be understood that the to-be-converted integer and the to-be-converted decimal of the original code can be split from any normalized format number by the format splitting module 50; thus, the mantissa processed and obtained by the first shifting module 10, the second shifting module 20, the addition module 30 and the floating-point conversion module 40 is the original code format, which can be directly used as the mantissa of the target floating-point number, simplifying the processing process of the floating-point conversion module 40. Moreover, the intelligence of the data format conversion device in performing format conversion on any normalized format number can be improved.

[0109] Based on the above data format conversion device, Figure 7 A flowchart of a data format conversion method provided by an embodiment of the present application is shown in FIG. 2. Figure 7 As shown in FIG. 2, the method can include the following steps.

[0110] S101, a first extension shift is performed on a to-be-converted integer of a normalized format number with any bit number by a first shifting module to obtain a shifted integer; the bit number of the shifted integer is n times of the bit number of the to-be-converted integer; n is a positive integer.

[0111] S102, a second extension shift is performed on a to-be-converted decimal of the normalized format number by a second shifting module to obtain a shifted decimal; the bit number of the shifted decimal is the sum of n-1 times of the bit number of the to-be-converted integer and the bit number of the to-be-converted decimal.

[0112] S103, the shifted integer and the shifted decimal are added by an addition module to obtain a shifted number.

[0113] S104, a floating-point format conversion is performed on the shifted number by a floating-point conversion module to obtain a floating-point format number of the shifted number; the floating-point format number of the shifted decimal is used as a target floating-point number.

[0114] It should be noted that the description of S101-S104 can refer to the description of the data format conversion device above, which will not be repeated here.

[0115] It can be understood that the extension shift of the integer part of the normalized format number by the first shifting module and the extension shift of the decimal part of the normalized format number by the second shifting module not only consider the influence of the decimal part on the value of the target floating-point number, but also can reduce the error between the target floating-point number and the normalized format number, thereby improving the accuracy of data format conversion.

[0116] In some embodiments, the method further includes: filling the to-be-converted integer from low bits to high bits continuously n times by the first shifting module to obtain the shifted integer.

[0117] In some embodiments, the method further comprises: adjusting, by the second shift module, the bit number of the decimal number to be converted to obtain a padding number; padding the padding number from low bit to high bit for n-1 times to obtain the integer bit of the shifted decimal number; and taking the decimal number to be converted as the decimal bit of the shifted decimal number.

[0118] In some embodiments, the method further comprises: in the case that the bit number of the integer number to be converted is greater than or equal to the bit number of the decimal number to be converted, shifting the decimal number to be converted to the left to the same bit number as the integer number to be converted by the second shift module to obtain the padding number.

[0119] In some embodiments, the method further comprises: in the case that the bit number of the integer number to be converted is less than the bit number of the decimal number to be converted, shifting the decimal number to be converted to the right to the same bit number as the integer number to be converted by the second shift module to obtain the padding number.

[0120] In some embodiments, the method further comprises: adding, by the addition module, the integer bit of the shifted decimal number to the shifted integer number to obtain the integer bit of the shifted number; and taking the decimal bit of the shifted decimal number as the decimal bit of the shifted number.

[0121] In some embodiments, the floating point conversion module further comprises a third shift module, an exponent addition module and a floating point splicing module; and the method further comprises: shifting the decimal point of the shifted number to the left of the leftmost bit of the shifted number by the third shift module to obtain a left shifted number; right shifting the decimal point of the left shifted number until the integer bit is a preset integer value to obtain a right shifted number; determining the mantissa bit of the floating point number based on the right shifted number; adding, by the exponent addition module, the bit number of the right shifted number to the bias value of the target floating point number to obtain the exponent of the target floating point number; and splicing, by the floating point splicing module, the mantissa, the exponent and the sign number according to the sign number corresponding to the normalized format number to obtain the target floating point number.

[0122] In some embodiments, the method further comprises: in the case that the bit number of the decimal of the right shifted number is greater than or equal to the mantissa bit number of the target floating point number, rounding the right shifted number to obtain the mantissa of the target floating point number by the third shift module.

[0123] In some embodiments, the method further includes: using the third shift module, when the number of decimal places in the right-shifted number is less than the number of mantissa places in the target floating-point number, performing padding processing on the right-shifted number to obtain the mantissa of the target floating-point number; the padding processing involves adding a number of zeros after the decimal place of the right-shifted number; the number of zeros added is the difference between the number of mantissa places in the target floating-point number and the number of decimal places in the right-shifted number.

[0124] In some embodiments, the method further includes: splitting the integer to be converted and the decimal to be converted from the normalized format number using a format splitting module.

[0125] In some embodiments, the method further includes: converting the normalized format number into original code data to obtain the original code normalized format number when the normalized format number is negative, using the format splitting module; and then splitting the integer to be converted and the decimal to be converted from the original code normalized format number.

[0126] The following uses Unorm8 as an example to illustrate the data format conversion method provided in the embodiments of this application.

[0127] Unorm8.4 has a 4-bit decimal part. According to the following formula, unorm8.4 can be equivalently transformed into unorm16.4, where u8 is the integer part of unorm8.4 and fix4 is the decimal part.

[0128]

[0129] If represented in hardware, it involves using shifters and adders to transform an Unorm 8.4 into an Unorm 16.4.

[0130] like Figure 2 As shown, the longer the unorm8.4 extension, the closer the extended unorm value with decimals and the corresponding fix value will be. For example, the precision of unorm8.4 extended to unorm24.4 and then converted to fix28 is higher than that of the original unorm8.4 converted to fix12.

[0131] The following example uses Unorm 8.4 extended to Unorm 24.4 to illustrate the subsequent conversion to float format.

[0132] First, unorm24.4 is regarded as fix28, and the current fix28 is 0.28 format, then the original 0.28 fix is changed to the data with integer bit being 1 by right shifting the decimal point, the initial index value is 0, and the index value is reduced by 1 every time the decimal point is right shifted by 1 bit. When the decimal point is shifted to the integer bit being 1, the shifting is stopped, and the decimal part of the current fix value is saved to the mantissa bit of the float, and the index value is added by 127 and saved to the index bit. Finally, the converted float value is obtained.

[0133] It should be noted that the embodiment of the present application provides a method for expanding the unorm type (corresponding to the above data format conversion method), and converts the expanded data into the float type. Wherein, the width of unorm and float is not limited, and any width of unorm can be converted into any width of float. The same method can be used for snorm, but the original code needs to be converted back first, then the original code is expanded, and finally 1 is filled in the sign bit of the float to represent negative numbers.

[0134] The embodiment of the present application provides a processor, which comprises the above data format conversion device.

[0135] The embodiment of the present application provides a chip product, which comprises a processor, and the processor comprises the above data format conversion device.

[0136] The embodiment of the present application provides an electronic device, which comprises a processor, and the processor comprises the above data format conversion device.

[0137] Figure 8 A hardware structure schematic diagram of an electronic device provided by the embodiment of the present application is shown in FIG. 17. Figure 8 As shown in FIG. 17, the electronic device 170 comprises a memory 1707, a processor 1708, and a computer program stored in the memory 1707 and capable of running on the processor 1708; wherein the processor 1708 is used to run the computer program, and executes the data format conversion method in the above embodiment.

[0138] It can be understood that the electronic device 170 further comprises a bus system 1709; and various components in the electronic device 170 are coupled together through the bus system 1709. It can be understood that the bus system 1709 is used to realize the connection and communication between the components. In addition to the data bus, the bus system 1709 also comprises a power bus, a control bus and a state signal bus.

[0139] It is understood that the memory in the embodiments of this application can be volatile memory or non-volatile memory, or both. Specifically, non-volatile memory can be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), magnetic random access memory (FRAM), flash memory, magnetic surface memory, optical disc, or compact disc read-only memory (CD-ROM); magnetic surface memory can be disk storage or magnetic tape storage. Volatile memory can be random access memory (RAM), which is used as an external cache. By way of example, but not limitation, many forms of RAM are available, such as Static Random Access Memory (SRAM), Synchronous Static Random Access Memory (SSRAM), Dynamic Random Access Memory (DRAM), Synchronous Dynamic Random Access Memory (SDRAM), Double Data Rate Synchronous Dynamic Random Access Memory (DDRSDRAM), Enhanced Synchronous Dynamic Random Access Memory (ESDRAM), SyncLink Dynamic Random Access Memory (SLDRAM), and Direct Rambus Random Access Memory (DRRAM).The memory described in the embodiments of the present application is intended to include, but not limited to, these and any other suitable type of memory.

[0140] The method disclosed in the embodiments of the present application can be applied in a processor or implemented by the processor. The processor can be an integrated circuit chip with a processing capability. In the implementation process, each step of the above method can be completed by integrated logic circuits or instructions in the form of software in the processor. The processor described above can be a general processor, a DSP, or other programmable logic device, discrete gate or transistor logic device, discrete hardware component, etc. The processor can implement or execute the disclosed methods, steps and logic block diagrams in the embodiments of the present application. The general processor can be a microprocessor or any conventional processor, etc. In combination with the steps of the method disclosed in the embodiments of the present application, the hardware decoding processor can be directly embodied to execute the above method, or the hardware and software modules in the decoding processor can be combined to execute the above method. The software module can be located in a storage medium, which is located in a memory, and the processor reads the signal in the memory to combine the hardware to complete the steps of the above method.

[0141] In several embodiments provided in the present application, it should be understood that the disclosed devices and methods can be implemented in other ways. The device embodiments described above are only schematic. For example, the division of the modules is only a logical function division. In actual implementation, there can be another division manner, such as: a plurality of modules or components can be combined, or integrated into another system, or some features can be ignored or not executed. In addition, the coupling or direct coupling or communication connection between the displayed or discussed components can be indirect coupling or communication connection through some interfaces, devices or modules, which can be electrical, mechanical or other forms.

[0142] The above description is only some embodiments of the present application, and is not intended to limit the protection scope of the present application. Any modification, equivalent replacement and improvement within the spirit and scope of the present application shall be included in the protection scope of the present application.

Claims

1. A data format conversion device, characterized in that, The data format conversion device includes: The first shift module is used to perform a first extended shift on the integer to be converted from the normalized format number to obtain a shifted integer; the number of bits of the shifted integer is n times the number of bits of the integer to be converted; n is a positive integer; The second shift module is used to perform a second extended shift on the decimal to be converted from the normalized format number to obtain a shifted decimal; the number of bits in the shifted decimal is 2n times the number of bits in the decimal to be converted. 1 times; The addition module is used to add the shifted integer and the shifted decimal to obtain the shifted number; A floating-point conversion module is used to convert the shifted number to a floating-point format to obtain a floating-point format number of the shifted number; the floating-point format number of the shifted number is the target floating-point number; The second shift module is further configured to adjust the number of digits of the decimal to be converted to obtain a filler number; fill the filler number n-1 times from the least significant digit to the most significant digit to obtain the integer digits of the shifted decimal; and use the decimal to be converted as the decimal digits of the shifted decimal.

2. The data format conversion device according to claim 1, characterized in that, The first shift module is further configured to continuously fill the integer to be converted from the least significant bit to the most significant bit n times to obtain the shifted integer.

3. The data format conversion device according to claim 1, characterized in that, The second shift module is further configured to, when the number of digits of the integer to be converted is greater than or equal to the number of digits of the decimal to be converted, shift the decimal to be converted to the left to the same number of digits as the integer to be converted, thereby obtaining the filler number.

4. The data format conversion device according to claim 1, characterized in that, The second shift module is further configured to, when the number of digits of the integer to be converted is less than the number of digits of the decimal to be converted, shift the decimal to be converted to the right until the number of digits is the same as the number of digits of the integer to be converted, thereby obtaining the filler number.

5. The data format conversion device according to claim 1, characterized in that, The addition module is further configured to add the integer part of the shifted decimal to the shifted integer to obtain the integer part of the shifted number; and use the decimal part of the shifted decimal as the decimal part of the shifted number.

6. The data format conversion apparatus according to any one of claims 1 to 5, characterized in that, The floating-point conversion module also includes: The third shift module is used to shift the decimal point of the shifted number to the left of the highest bit of the shifted number to obtain the left shifted number; shift the decimal point of the left shifted number to the right until the integer part is a preset integer value to obtain the right shifted number; and determine the mantissa of the floating-point number based on the right shifted number. The exponent addition module is used to add the number of bits shifted to the right to the bias value of the target floating-point number to obtain the exponent of the target floating-point number; The floating-point concatenation module is used to concatenate the mantissa, the exponent, and the sign number according to the sign number corresponding to the normalized format number to obtain the target floating-point number.

7. The data format conversion device according to claim 6, characterized in that, The third shift module is further configured to round the right-shifted number to obtain the mantissa of the target floating-point number when the number of decimal places of the right-shifted number is greater than or equal to the number of mantissa places of the target floating-point number.

8. The data format conversion device according to claim 6, characterized in that, The third shift module is further configured to perform padding on the right-shifted number when the number of decimal places of the right-shifted number is less than the number of mantissa places of the target floating-point number, so as to obtain the mantissa of the target floating-point number; the padding is to add a number of zeros after the decimal place of the right-shifted number; the number of zeros added is the difference between the number of mantissa places of the target floating-point number and the number of places of the right-shifted number.

9. The data format conversion apparatus according to any one of claims 1 to 5, characterized in that, The data format conversion device further includes: The format splitting module is used to split the integer to be converted and the decimal to be converted from the normalized format number.

10. The data format conversion device according to claim 9, characterized in that, The format splitting module is further configured to convert the normalized format number into original code data to obtain the original code normalized format number when the normalized format number is negative; and then split the integer to be converted and the decimal to be converted from the original code normalized format number.

11. A data format conversion method, characterized in that, The data format conversion method includes: The first shift module performs a first extended shift on the normalized format number to be converted, resulting in a shifted integer; the number of bits in the shifted integer is n times the number of bits in the integer to be converted; n is a positive integer; The normalized format number to be converted is subjected to a second extended shift using the second shift module to obtain a shifted decimal; the number of bits in the shifted decimal is 2n times the number of bits in the decimal to be converted. 1 times; The shifted integer and the shifted decimal are added together using the addition module to obtain the shifted number. The floating-point conversion module performs floating-point format conversion on the shifted number to obtain the floating-point format number of the shifted number; the floating-point format number of the shifted number is the target floating-point number. The data format conversion method further includes: adjusting the number of digits of the decimal to be converted through a second shift module to obtain a filler number; filling the filler number n-1 times from the least significant digit to the most significant digit to obtain the integer digits of the shifted decimal; and using the decimal to be converted as the decimal digits of the shifted decimal.

12. A processor, characterized in that, The processor includes a data format conversion device as described in any one of claims 1 to 10.

13. A chip product, characterized in that, The chip product includes a processor, and the processor includes a data format conversion device as described in any one of claims 1 to 10.

14. An electronic device, characterized in that, The electronic device includes a processor, the processor including a data format conversion device as described in any one of claims 1 to 10.

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