DDR (Double Data Rate) storage chip testing method, device and equipment and computer readable storage medium
By installing a test application with its own operating system in the DDR memory chip test device, obtaining device identification information and performing identification, the problem of DDR memory chip testing relying on the Windows system is solved, and efficient cross-platform testing is achieved.
Patent Information
- Application Number
- CN202511024386.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-07-24
- Publication Date
- 2025-10-28
AI Technical Summary
Existing DDR memory chip testing methods rely on the Windows system, resulting in low testing efficiency.
By installing a first memory chip test application and a first operating system in a DDR memory chip test device, a communication connection with a device under test is established, device identification information is obtained, and when a designated device is identified, the first operating system is used for testing.
It improves test efficiency, shortens test time, reduces computer startup time, and has cross-platform versatility without relying on the Windows system.
Smart Images
Figure CN120849201A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of storage technology, and in particular to a method, apparatus, device and computer-readable storage medium for testing DDR memory chips. Background Art
[0002] DDR memory chips, specifically Double Data Rate Synchronous Dynamic Random Access Memory (DDR SDRAM), are a memory specification developed from Synchronous Dynamic Random-Access Memory (SDRAM). Traditional testing methods for DDR memory chips require the use of a Windows system. However, considering computer boot time and performance limitations, this reduces testing efficiency. Therefore, improving testing efficiency without relying on Windows is a crucial issue that needs to be addressed. Summary of the Invention
[0003] This application provides a method, apparatus, device, and computer-readable storage medium for testing DDR memory chips, which can improve testing efficiency without relying on the Windows system.
[0004] In a first aspect, embodiments of this application provide a DDR memory chip testing method, applied to a DDR memory chip testing device, wherein the DDR memory chip testing device is equipped with a first memory chip testing application and a first operating system; the method includes:
[0005] When establishing a communication connection between the DDR memory chip testing device and the device under test, the first device identification information of the device under test is obtained; the device under test includes a second operating system and a DDR memory chip.
[0006] Detect whether the first device identification information exists in the first preset device identification information set;
[0007] When the first device identification information exists in the first preset device identification information set, the first storage chip test application is run through the first operating system to test the DDR storage chip.
[0008] Secondly, embodiments of this application provide a DDR memory chip testing device, wherein a first memory chip testing application and a first operating system are installed in the DDR memory chip testing device; the DDR memory chip testing device includes: an acquisition module, a detection module, and a testing module.
[0009] The acquisition module is used to acquire first device identification information of the device under test when a communication connection is established between the DDR memory chip testing device and the device under test; the device under test includes a second operating system and a DDR memory chip.
[0010] The detection module is used to detect whether the first device identification information exists in the first preset device identification information set;
[0011] The testing module is used to test the DDR memory chip by running the first memory chip test application through the first operating system when the first device identification information exists in the first preset device identification information set.
[0012] Thirdly, embodiments of this application provide a computer device, including:
[0013] A memory, a processor, and executable program code stored in the memory and executable on the processor, wherein the processor executes the executable program code to perform the method as described in any one of the first aspects.
[0014] Fourthly, embodiments of this application provide a computer-readable storage medium storing a DDR memory chip test program, the DDR memory chip test program including execution instructions for performing the method as described in any one of the first aspects.
[0015] By implementing the embodiments of this application, the DDR memory chip testing device installs a first memory chip testing application and a first operating system. When establishing a communication connection between the DDR memory chip testing device and the device under test, it obtains the first device identification information of the device under test. The device under test includes a second operating system and a DDR memory chip. It detects whether the first device identification information exists in a first preset device identification information set. When the first device identification information exists in the first preset device identification information set, it runs the first memory chip testing application through the first operating system to test the DDR memory chip. The DDR memory chip testing device has its own system and identification attributes. It cannot power on and test for devices under test that it does not recognize or is not paired with. It only allows testing when the specified device under test is identified. In this way, the testing time can be shortened, the computer boot time can be reduced, and it has strong versatility and can perform testing across platforms. Attached Figure Description
[0016] To more clearly illustrate the technical solutions in the embodiments of this application or the background art, the accompanying drawings used in the embodiments of this application or the background art will be described below.
[0017] Figure 1This is an architecture diagram of a DDR memory chip testing system provided in an embodiment of this application;
[0018] Figure 2 This is a flowchart of a DDR memory chip testing method provided in an embodiment of this application;
[0019] Figure 3 This is a structural diagram of a DDR memory chip testing device provided in an embodiment of this application;
[0020] Figure 4 This is a structural diagram of a test device provided in an embodiment of this application;
[0021] Figure 5 This is another structural diagram of a DDR memory chip testing device provided in an embodiment of this application;
[0022] Figure 6 This is a structural diagram of a computer device provided in an embodiment of this application. Detailed Implementation
[0023] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present application, and not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative effort should fall within the scope of protection of the present application.
[0024] The terms "first," "second," etc., in the specification, claims, and accompanying drawings of this application are used to distinguish different objects, not to describe a specific order. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to these processes, methods, products, or apparatuses.
[0025] It should be understood that the term "and / or" in this document is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. Additionally, the character " / " in this document indicates that the preceding and following related objects are in an "or" relationship. In the embodiments of this application, "multiple" refers to two or more.
[0026] In the embodiments of this application, "at least one item" or its similar expression refers to any combination of these items, including any combination of a single item or a plurality of items. "One or more" means one or more, while "multiple" means two or more. For example, "at least one item" of a, b, or c can represent the following seven cases: a, b, c; a and b; a and c; b and c; a, b, and c. Each of a, b, and c can be an element or a set containing one or more elements.
[0027] In this application, the term "connection" refers to various connection methods, such as direct connection or indirect connection, to achieve communication between devices. This application does not impose any limitations on this.
[0028] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.
[0029] In this application embodiment, the computer device may include any computer used for testing DDR memory chips of the device under test. The computer device may include at least one of the following: smartphones (such as Android phones, iOS phones, Windows Phones, HarmonyOS phones, etc.), tablet computers, PDAs, laptops, video matrices, monitoring platforms, mobile internet devices (MIDs) or wearable devices, USB flash drives, smart hard drives, etc., without limitation.
[0030] In the embodiments of this application, the device under test may include any computer that includes a DDR memory chip. The device under test may include at least one of the following: smart DDR memory chip, smartphone (such as Android phone, iOS phone, Windows Phone, HarmonyOS phone, etc.), tablet computer, handheld computer, laptop computer, video matrix, monitoring platform, mobile internet device (MID) or wearable device, USB flash drive, smart hard drive, etc., without limitation.
[0031] To address the shortcomings of existing technologies, this application provides a DDR memory chip testing method, applied to a DDR memory chip testing device, wherein a first memory chip testing application and a first operating system are installed in the DDR memory chip testing device; the method includes the following steps:
[0032] When establishing a communication connection between the DDR memory chip testing device and the device under test, the first device identification information of the device under test is obtained; the device under test includes a second operating system and a DDR memory chip.
[0033] Detect whether the first device identification information exists in the first preset device identification information set;
[0034] When the first device identification information exists in the first preset device identification information set, the first storage chip test application is run through the first operating system to test the DDR storage chip.
[0035] In this embodiment, the DDR memory chip testing device has its own system and identification attributes. It cannot power on and test devices that are not recognized or not paired. Testing is only allowed when the specified device under test is identified. This can shorten the testing time, reduce computer boot time, and has strong versatility, enabling testing across platforms.
[0036] Please see Figure 1 , Figure 1 This is an architecture diagram of a DDR memory chip testing system provided in an embodiment of this application. The DDR memory chip testing system 100 includes a DDR memory chip testing device 101 and a device under test 102. The DDR memory chip testing device 101 is equipped with a first memory chip testing application and a first operating system. The device under test 102 includes a second operating system and a DDR memory chip.
[0037] Specifically, when the DDR memory chip testing device 101 and the device under test 102 establish a communication connection, the device under test obtains the first device identification information of the device under test. If the first device identification information exists in the first preset device identification information set, it means that testing of the device under test is allowed. That is, the first memory chip testing application can be run through the first operating system to test the DDR memory chip. The DDR memory chip testing device has identification attributes and can test the specified device under test. In addition, since it does not need to use a second operating system for testing, but directly uses the first operating system for testing, the testing time can be shortened, the computer boot time can be reduced, and it has strong versatility and can be tested across platforms.
[0038] Among them, such as Figure 2 As shown, the DDR memory chip testing device may include a first memory chip testing application and a first operating system. The first operating system can be understood as a testing operating system, and the first memory chip testing application can be understood as an application used to implement the test.
[0039] Among them, such as Figure 3As shown, the device under test may include a second operating system and a DDR memory chip. The second operating system can be understood as the operating system of the device under test, and the first memory chip test application is used to test the DDR memory chip.
[0040] The first operating system may include any of the following: Windows operating system, Android operating system, iOS operating system, or HarmonyOS operating system.
[0041] The second operating system may include any of the following: Windows operating system, Android operating system, iOS operating system, or HarmonyOS operating system.
[0042] For example, the DDR memory chip testing device 101 may include a USB flash drive, and the device under test 102 may include a computer (e.g., a desktop computer) with a Windows operating system installed. When testing the DDR memory chip, the USB flash drive is connected to the computer's USB port. Traditional testing requires a Windows system, but in this embodiment, DDR memory chip testing can be performed without a Windows system. The USB flash drive contains its own operating system and has identification attributes. For computers that do not recognize or are not paired with it, it cannot be powered on and tested. Even if the system on the USB flash drive is recognized and the relevant information is successfully copied, testing is still not possible. This shortens testing time, reduces computer boot time, and offers strong versatility, enabling cross-platform testing.
[0043] Based on this, this application provides a method, apparatus, device, and computer-readable storage medium for testing DDR memory chips. The following is a detailed description of this application in conjunction with the accompanying drawings.
[0044] Please see Figure 4 , Figure 4 This is a flowchart of a DDR memory chip testing method provided in an embodiment of this application, such as... Figure 4 As shown, a method is applied to a DDR memory chip testing device, wherein a first memory chip testing application and a first operating system are installed on the DDR memory chip testing device; the method includes the following steps:
[0045] S401: When establishing a communication connection between the DDR memory chip testing device and the device under test, the first device identification information of the device under test is obtained; the device under test includes a second operating system and a DDR memory chip.
[0046] The DDR memory chip testing device can establish a wireless or wired communication connection with the device under test. For example, the DDR memory chip testing device and the device under test can communicate via Bluetooth technology, or they can communicate via a data cable.
[0047] The first device identification information can be used to uniquely identify the device under test. The first device identification information may include any of the following: device number, hardware address, IP address, etc., without limitation.
[0048] The DDR memory chip testing device is equipped with a first memory chip testing application and a first operating system. The device under test includes a second operating system and a DDR memory chip. The first operating system and the second operating system may be the same or different.
[0049] S402: Detect whether the first device identification information exists in the first preset device identification information set.
[0050] The first preset device identification information set can be preset or defaulted to by the system. The first preset device identification information set can include at least one device identification information, and each device identification information corresponds to one device.
[0051] S403: When the first device identification information exists in the first preset device identification information set, the first storage chip test application is run through the first operating system to test the DDR storage chip.
[0052] In specific implementation, when the first device identification information exists in the first preset device identification information set, the first storage chip test application is run through the first operating system to test the DDR storage chip. That is, the first storage chip test application can be run through the first operating system to test the DDR storage chip. The DDR storage chip test device has identification attributes and tests the specified device under test. In addition, since it does not need to use a second operating system for testing, but directly uses the first operating system for testing, the testing time can be shortened, the computer boot time can be reduced, and it has strong versatility and can be tested across platforms.
[0053] In one possible example, the following steps may also be included:
[0054] If the first device identification information does not exist in the first preset device identification information set, the step of running the first memory chip test application through the first operating system to test the DDR memory chip will not be executed.
[0055] or,
[0056] When the first device identification information does not exist in the first preset device identification information set, the second operating system is invoked to run the first storage chip test application to test the DDR storage chip.
[0057] In specific implementation, if the first device identification information does not exist in the first preset device identification information set, it means that it is not the designated device under test. Therefore, the step of running the first memory chip test application through the first operating system to test the DDR memory chip is not executed. In this way, the security of DDR memory chip testing can be guaranteed, that is, DDR memory chip testing is only performed on the designated device under test.
[0058] Alternatively, if the first device identification information does not exist in the first preset device identification information set, it means that it is not the designated device under test. The second operating system is called to run the first storage chip test application to test the DDR storage chip. That is, the second operating system of the device under test can be used to run the first storage chip test application to test the DDR storage chip. In other words, the DDR storage chip is tested in accordance with the traditional DDR storage chip test method. In this way, the flexibility of DDR storage chip testing can be guaranteed.
[0059] In one possible example, the following steps may also be included:
[0060] Obtain the second device identification information of the DDR memory chip testing device;
[0061] Detect whether the second device identification information exists in the second preset device identification information set;
[0062] When the second device identification information exists in the second preset device identification information set, the step of running the first memory chip test application through the first operating system to test the DDR memory chip is executed.
[0063] The second preset device identification information set can be preset or set by system default. The second preset device identification information set can include at least one device identification information, and each device identification information corresponds to one device.
[0064] In specific implementation, when the second device identification information exists in the second preset device identification information set, the first storage chip test application is run through the first operating system to test the DDR storage chip. That is, the device identification of the DDR storage chip test device is bound to the second operating system and the first storage chip test application. Even if the second operating system and the first storage chip test application are copied to other devices, DDR storage chip testing cannot be performed. Instead, it is necessary to ensure that the device identification of the DDR storage chip test device corresponds to the second operating system and the first storage chip test application before DDR storage chip testing is allowed. In this way, not only can the test time be shortened and the computer boot time reduced, but it also has strong versatility and can be used for cross-platform testing, while ensuring test security.
[0065] In one possible example, the following steps may also be included:
[0066] If the second device identification information does not exist in the second preset device identification information set, the step of running the first memory chip test application through the first operating system to test the DDR memory chip will not be executed.
[0067] or,
[0068] When the second device identification information does not exist in the second preset device identification information set, the second operating system is invoked to run the first storage chip test application to test the DDR storage chip.
[0069] In specific implementation, if the second device identification information does not exist in the second preset device identification information set, it means that the DDR memory chip testing device is not the designated DDR memory chip testing device. Therefore, the step of running the first memory chip testing application through the first operating system to test the DDR memory chip is not executed. In this way, the security of DDR memory chip testing can be guaranteed, that is, only the designated DDR memory chip testing device is allowed to perform DDR memory chip testing.
[0070] Alternatively, if the second device identification information does not exist in the second preset device identification information set, it indicates that the DDR memory chip testing device is not the designated DDR memory chip testing device. The second operating system is then called to run the first memory chip testing application to test the DDR memory chip. In other words, the second operating system of the device under test can be used to run the first memory chip testing application to test the DDR memory chip. This is to perform DDR memory chip testing in accordance with the traditional DDR memory chip testing method, thus ensuring the flexibility of DDR memory chip testing.
[0071] In one possible example, step S402, running the first memory chip test application through the first operating system to test the DDR memory chip, can be implemented as follows:
[0072] Receive a first test instruction, which carries a first test mode and a first test case;
[0073] Determine the first configuration parameter corresponding to the first test mode;
[0074] Configure the first operating system according to the first configuration parameters;
[0075] The first test case is run by the first operating system based on the first storage chip to obtain the first test result.
[0076] The first configuration parameter may include at least one of the following: memory resource size, number of threads, number of processes, data transfer rate, cache range size or location, etc., which are not limited here.
[0077] In practice, the user can input a first test command, which carries a first test mode and a first test case. The DDR memory chip testing device receives the first test command.
[0078] In specific implementation, a pre-stored mapping relationship between preset test modes and configuration parameters can be used. Based on this mapping relationship, the first configuration parameter corresponding to the first test mode can be determined. In this way, the corresponding configuration parameters can be configured based on different test modes, and the first operating system can be configured according to the first configuration parameter to ensure the running environment of the first operating system. Then, the first test case is run by the test application based on the first storage chip through the first operating system to obtain the first test result. This can ensure the test environment, further shorten the test time, reduce the computer boot time, and has strong versatility, enabling cross-platform testing.
[0079] Furthermore, the first test result includes the first runtime of the first test case, obtaining the reference runtime of the DDR memory chip, determining the first deviation between the first runtime and the reference runtime, where the first deviation = (first runtime - reference runtime) / reference runtime, and pre-storing a mapping relationship between the deviation and the test score value. Based on this mapping relationship, the first test score value corresponding to the first deviation is determined. In this way, the test result of the qualified DDR memory chip can be used as a benchmark, and the degree of deviation between the actual test result (first runtime) and the benchmark can be dynamically determined to determine the corresponding test score value, thereby accurately determining the quality of the test result.
[0080] The reference runtime can be the average runtime of the first test case for the DDR memory chips that passed the test. Specifically, the runtime of the first test case for multiple DDR memory chips that passed the test within a preset time period can be obtained to get multiple runtimes. The average of these multiple runtimes can be determined to obtain the reference runtime. This means that the test benchmark can be determined based on big data technology to ensure that the quality of the test results can be accurately determined in the future.
[0081] The preset time period can be set in advance or set by the system default.
[0082] In one possible example, the above step of calling the second operating system to run the first memory chip test application to test the DDR memory chip can be implemented as follows:
[0083] Receive a second test instruction, which carries a second test mode and a second test case;
[0084] Determine the second configuration parameters corresponding to the second test mode;
[0085] Configure the second operating system according to the second configuration parameters;
[0086] The second operating system is invoked to run the second test case based on the first storage chip test application, and the second test result is obtained.
[0087] The second configuration parameter may include at least one of the following: memory resource size, number of threads, number of processes, data transfer rate, cache range size or location, etc., which are not limited here.
[0088] In practice, the user can input a second test command, which carries a second test mode and a second test case. The DDR memory chip testing device receives the second test command.
[0089] In specific implementation, a pre-stored mapping relationship between preset test modes and configuration parameters can be used. This mapping relationship can be used to determine the second configuration parameters corresponding to the second test mode. In this way, the corresponding configuration parameters can be configured based on different test modes. Then, the second operating system can be configured according to the second configuration parameters to ensure the running environment of the second operating system. Next, the second test case is run on the first memory chip test application through the second operating system to obtain the second test result. This ensures the test environment. Then, the DDR memory chip is tested according to the traditional DDR memory chip test method. In this way, the flexibility of DDR memory chip testing can be guaranteed.
[0090] By implementing the embodiments of this application, the DDR memory chip testing device installs a first memory chip testing application and a first operating system. When establishing a communication connection between the DDR memory chip testing device and the device under test, it obtains the first device identification information of the device under test. The device under test includes a second operating system and a DDR memory chip. It detects whether the first device identification information exists in a first preset device identification information set. When the first device identification information exists in the first preset device identification information set, it runs the first memory chip testing application through the first operating system to test the DDR memory chip. The DDR memory chip testing device has its own system and identification attributes. It cannot power on and test for devices under test that it does not recognize or is not paired with. It only allows testing when the specified device under test is identified. In this way, the testing time can be shortened, the computer boot time can be reduced, and it has strong versatility and can perform testing across platforms.
[0091] Please see Figure 5 , Figure 5 This is another structural schematic diagram of a DDR memory chip testing device provided in an embodiment of this application, as shown below. Figure 5 As shown, the DDR memory chip testing device is equipped with a first memory chip testing application and a first operating system; the DDR memory chip testing device 500 includes: an acquisition module 510, a detection module 520, and a testing module 530.
[0092] The acquisition module 510 is used to acquire first device identification information of the device under test when a communication connection is established between the DDR memory chip testing device and the device under test; the device under test includes a second operating system and a DDR memory chip.
[0093] The detection module 520 is used to detect whether the first device identification information exists in the first preset device identification information set;
[0094] The test module 530 is used to test the DDR memory chip by running the first memory chip test application through the first operating system when the first device identification information exists in the first preset device identification information set.
[0095] In one possible example, the DDR memory chip testing apparatus 500 is also specifically used for:
[0096] If the first device identification information does not exist in the first preset device identification information set, the step of running the first memory chip test application through the first operating system to test the DDR memory chip will not be executed.
[0097] or,
[0098] When the first device identification information does not exist in the first preset device identification information set, the second operating system is invoked to run the first storage chip test application to test the DDR storage chip.
[0099] In one possible example, the DDR memory chip testing apparatus 500 is also specifically used for:
[0100] Obtain the second device identification information of the DDR memory chip testing device;
[0101] Detect whether the second device identification information exists in the second preset device identification information set;
[0102] When the second device identification information exists in the second preset device identification information set, the step of running the first memory chip test application through the first operating system to test the DDR memory chip is executed.
[0103] In one possible example, the DDR memory chip testing apparatus 500 is also specifically used for:
[0104] If the second device identification information does not exist in the second preset device identification information set, the step of running the first memory chip test application through the first operating system to test the DDR memory chip will not be executed.
[0105] or,
[0106] When the second device identification information does not exist in the second preset device identification information set, the second operating system is invoked to run the first storage chip test application to test the DDR storage chip.
[0107] In one possible example, regarding the running of the first memory chip test application via the first operating system to test the DDR memory chip, the test module 530 is specifically used for:
[0108] Receive a first test instruction, which carries a first test mode and a first test case;
[0109] Determine the first configuration parameter corresponding to the first test mode;
[0110] Configure the first operating system according to the first configuration parameters;
[0111] The first test case is run by the first operating system based on the first storage chip to obtain the first test result.
[0112] It is understandable that the specific functional implementation of the DDR memory chip testing device 500 is described above. Figure 4 The description of the DDR memory chip testing method illustrates that, for example, the acquisition module 510 is used to implement the relevant content of execution step S401, the detection module 520 is used to implement the relevant content of execution step S402, and the testing module 530 is used to implement the relevant content of execution step S403. Each unit or module in the DDR memory chip testing device 500 can be individually or entirely merged into one or more other units or modules, or some of the units or modules can be further divided into multiple functionally smaller units or modules. This achieves the same operation without affecting the technical effects of the embodiments of the present invention. The aforementioned units or modules are based on logical function division. In practical applications, the function of one unit (or module) is implemented by multiple units (or modules), or the function of multiple units (or modules) is implemented by one unit (or module).
[0113] Based on the description of the above method embodiments and related device embodiments, please refer to... Figure 6 The present invention provides a schematic diagram of the structure of a computer device 600. Figure 6 The computer device 600 shown includes a processor 601, a memory 602, a communication interface 603, and a bus 604. The processor 601, memory 602, and communication interface 603 are interconnected via the bus 604.
[0114] Optionally, the memory 602 can be ROM, a static storage device, a dynamic storage device, or RAM.
[0115] Memory 602 can store programs. When the executable program code stored in memory 602 is executed by processor 601, processor 601 and communication interface 603 are used for execution. Figure 2 The various steps of the DDR memory chip testing method in the illustrated embodiment.
[0116] The processor 601 employs a general-purpose CPU, microprocessor, application-specific integrated circuit (ASIC), GPU, or one or more integrated circuits to execute relevant programs to perform the DDR memory chip testing method of the method embodiment of this application.
[0117] The processor 601 can also be an integrated circuit chip with signal processing capabilities. In implementation, each step of the DDR memory chip testing method of this application can be completed through the integrated logic circuitry in the hardware of the processor 601 or through software instructions. Optionally, the processor 601 can be a general-purpose processor, DSP, ASIC, FPGA, or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components. The processor can implement or execute the methods, steps, and logic block diagrams disclosed in the embodiments of this application. The general-purpose processor is a microprocessor or any conventional processor, etc. The steps of the methods disclosed in the embodiments of this application can be directly embodied in the execution of a hardware decoding processor, or can be executed by a combination of hardware and software modules in the decoding processor. Optional software modules are located in random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, registers, or other mature storage media in the art. The storage medium is located in memory 602. Processor 601 reads the information in memory 602 and, in conjunction with its hardware, performs the functions required by the acquisition module 510, detection module 520 and test module 530 included in the DDR memory chip test device 500 of this application embodiment, or executes the DDR memory chip test method of this application method embodiment.
[0118] Communication interface 603 uses transceiver-related devices such as, but not limited to, transceivers.
[0119] Bus 604 may include a pathway for transmitting information between various components of computer device 600 (e.g., memory 602, processor 601, communication interface 603).
[0120] It should be noted that, although Figure 6 The computer device 600 shown only illustrates the memory, processor, and communication interface. However, those skilled in the art should understand that in specific implementations, the computer device 600 may also include other components necessary for normal operation. Furthermore, based on specific needs, those skilled in the art should understand that the computer device 600 may also include hardware components for implementing other additional functions. Moreover, those skilled in the art should understand that the computer device 600 may only include the components necessary for implementing the embodiments of this application, and may not necessarily include... Figure 6 All the devices shown.
[0121] This application provides a computer-readable storage medium storing a computer program for electronic data interchange. The computer program includes execution instructions for performing some or all of the steps of any of the DDR memory chip testing methods described in the above embodiments of the DDR memory chip testing method. The computer includes a computer device.
[0122] This application provides a computer program product, which includes a computer program operable to enable a computer to perform some or all of the steps of any DDR memory chip testing method described in the above method embodiments. The computer program product may be a software installation package.
[0123] It should be noted that, for the sake of simplicity, each of the aforementioned embodiments of the DDR memory chip testing method is described as a series of actions. However, those skilled in the art should understand that this application is not limited to the described order of actions, as some steps may be performed in other orders or simultaneously according to this application. Furthermore, those skilled in the art should also understand that the embodiments described in the specification are preferred embodiments, and the actions involved are not necessarily essential to this application.
[0124] The embodiments of this application have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of a DDR memory chip testing method, apparatus, computer, and storage medium of this application. The descriptions of the above embodiments are only for the purpose of helping to understand the method and its core ideas of this application. At the same time, for those skilled in the art, based on the ideas of a DDR memory chip testing method, apparatus, computer, and storage medium of this application, there will be changes in the specific implementation methods and application scope. Therefore, the content of this specification should not be construed as a limitation of this application.
[0125] This application is described with reference to flowchart illustrations and / or block diagrams of methods, hardware products, and computer program products according to embodiments of this application. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart... Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.
[0126] These computer program instructions may also be stored in a computer readable memory that can direct a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 One or more processes and / or boxes Figure 1The functions specified in one or more boxes. Memory may include: flash drives, read-only memory (ROM), random access memory (RAM), hard disks or optical disks, etc.
[0127] Although this application has been described herein in conjunction with various embodiments, those skilled in the art, by reviewing the accompanying drawings, disclosure, and appended claims, will understand and implement other variations of the disclosed embodiments in carrying out the claimed application. In the claims, the word "comprising" does not exclude other components or steps, and "a" or "an" does not exclude multiple instances. While different dependent claims may recite certain measures, this does not mean that these measures cannot be combined to produce a good effect.
[0128] Those skilled in the art will understand that all or part of the steps in the various methods of any of the above-described DDR memory chip testing method embodiments can be implemented by a program instructing related hardware. The program can be stored in a computer-readable storage device, which may include: flash drive, read-only memory (ROM), random access memory (RAM), disk or optical disk, etc.
[0129] It is understood that any product that is controlled or configured to execute the processing method described in the flowchart of an embodiment of a DDR memory chip testing method of this application, such as the apparatus and computer program product of the above flowchart, falls within the scope of the related products described in this application.
[0130] Obviously, those skilled in the art can make various modifications and variations to the DDR memory chip testing method, apparatus, computer, and storage medium provided in this application without departing from the spirit and scope of this application. Therefore, if these modifications and variations of this application fall within the scope of the claims of this application and their equivalents, this application also intends to include these modifications and variations.
Claims
1. A method for testing DDR memory chips, characterized in that, A testing device for DDR memory chips is used, wherein the DDR memory chip testing device is equipped with a first memory chip testing application and a first operating system; The DDR memory chip testing method includes: When establishing a communication connection between the DDR memory chip testing device and the device under test, the first device identification information of the device under test is obtained; the device under test includes a second operating system and a DDR memory chip. Detect whether the first device identification information exists in the first preset device identification information set; When the first device identification information exists in the first preset device identification information set, the first storage chip test application is run through the first operating system to test the DDR storage chip.
2. The DDR memory chip testing method as described in claim 1, characterized in that, The DDR memory chip testing method also includes: If the first device identification information does not exist in the first preset device identification information set, the step of running the first memory chip test application through the first operating system to test the DDR memory chip will not be executed. or, When the first device identification information does not exist in the first preset device identification information set, the second operating system is invoked to run the first storage chip test application to test the DDR storage chip.
3. The DDR memory chip testing method as described in claim 1 or 2, characterized in that, The DDR memory chip testing method also includes: Obtain the second device identification information of the DDR memory chip testing device; Detect whether the second device identification information exists in the second preset device identification information set; When the second device identification information exists in the second preset device identification information set, the step of running the first memory chip test application through the first operating system to test the DDR memory chip is executed.
4. The DDR memory chip testing method as described in claim 3, characterized in that, The DDR memory chip testing method also includes: If the second device identification information does not exist in the second preset device identification information set, the step of running the first memory chip test application through the first operating system to test the DDR memory chip will not be executed. or, When the second device identification information does not exist in the second preset device identification information set, the second operating system is invoked to run the first storage chip test application to test the DDR storage chip.
5. The DDR memory chip testing method as described in claim 1 or 2, characterized in that, The step of running the first memory chip test application through the first operating system to test the DDR memory chip includes: Receive a first test instruction, which carries a first test mode and a first test case; Determine the first configuration parameter corresponding to the first test mode; Configure the first operating system according to the first configuration parameters; The first test case is run by the first operating system based on the first storage chip to obtain the first test result.
6. A DDR memory chip testing device, characterized in that, The DDR memory chip testing device is equipped with a first memory chip testing application and a first operating system; The DDR memory chip testing device includes: an acquisition module, a detection module, and a testing module. The acquisition module is used to acquire first device identification information of the device under test when a communication connection is established between the DDR memory chip testing device and the device under test; the device under test includes a second operating system and a DDR memory chip. The detection module is used to detect whether the first device identification information exists in the first preset device identification information set; The testing module is used to test the DDR memory chip by running the first memory chip test application through the first operating system when the first device identification information exists in the first preset device identification information set.
7. The DDR memory chip testing apparatus as described in claim 6, characterized in that, The DDR memory chip testing device is also specifically used for: If the first device identification information does not exist in the first preset device identification information set, the step of running the first memory chip test application through the first operating system to test the DDR memory chip will not be executed. or, When the first device identification information does not exist in the first preset device identification information set, the second operating system is invoked to run the first storage chip test application to test the DDR storage chip.
8. The DDR memory chip testing apparatus as described in claim 6 or 7, characterized in that, The DDR memory chip testing device is also specifically used for: Obtain the second device identification information of the DDR memory chip testing device; Detect whether the second device identification information exists in the second preset device identification information set; When the second device identification information exists in the second preset device identification information set, the step of running the first memory chip test application through the first operating system to test the DDR memory chip is executed.
9. A computer device, characterized in that, include: The device includes a memory, a processor, and executable program code stored in the memory and executable on the processor, wherein the processor executes the executable program code to perform the steps of the DDR memory chip testing method as described in any one of claims 1-5.
10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a DDR memory chip test program, the DDR memory chip test program including execution instructions for performing the steps of the DDR memory chip test method as described in any one of claims 1-5.