A UPS front-end module and its control method

Abstract

This invention proposes a UPS front-end module and its control method, comprising: a positive bus loop, a negative bus loop, a sampling module, a first control circuit, and a second control circuit. The first control circuit is used to obtain the corresponding output of the voltage outer loop based on the first bus voltage and the second bus voltage, and to obtain the corresponding output of the current inner loop based on the corresponding output of the voltage outer loop, the input voltage, the first inductor current, and the second inductor current, so as to control the positive bus loop and the negative bus loop. The second control circuit is used to calculate the duty cycle control quantity based on the third inductor current of the second control circuit, the first bus voltage, and the second bus voltage, and to generate a drive signal, so as to control the positive bus loop and the negative bus loop. This invention simplifies the UPS structure and enables both AC power and battery power supply to the bus through a single module, improving circuit stability.

Description

Technical Field

[0001] This invention relates to the field of power control, and more particularly to a UPS front-end module and its control method. Background Technology

[0002] UPS, or Uninterruptible Power Supply, is a type of uninterruptible power supply containing energy storage devices. It is primarily used to provide uninterrupted power to equipment with high power stability requirements. When the mains input is normal, the UPS stabilizes the mains voltage and supplies it to the load; in this state, the UPS functions as an AC voltage regulator while simultaneously charging its internal battery. When the mains power is interrupted (power outage), the UPS immediately switches from the battery's DC power to AC power through an inverter, ensuring the load continues to operate normally and protecting its hardware and software from damage. Therefore, ensuring the reliability of UPS performance is a crucial issue requiring further research.

[0003] Current UPS structures include a front-end PFC circuit, a back-end inverter circuit, and a separate battery charging and discharging circuit. These three components are independent of each other and have a complex structure. As a result, it is difficult to adjust and control the parameters of existing UPS structures, and it is impossible to achieve power supply to the bus from both mains power and batteries through the same module, leading to poor circuit stability. Summary of the Invention

[0004] To address the aforementioned issues, this invention proposes a UPS front-end module and its control method, which simplifies the UPS structure and enables both mains power and battery power supply to the busbar through a single module, thereby improving circuit stability.

[0005] To achieve the above objectives, embodiments of the present invention provide a UPS front-end module and its control method, comprising: a positive bus loop, a negative bus loop, a sampling module, a first control circuit, and a second control circuit; the positive bus loop is electrically connected to the negative bus loop and the sampling module, and the negative bus loop is electrically connected to the sampling module; the first control circuit is electrically connected to the sampling module; the second control circuit is electrically connected to the sampling module; the sampling module is used to collect the input voltage, the first inductor current of the positive bus loop, the second inductor current of the negative bus loop, and the first inductor current of the positive bus loop. The first control circuit is used to obtain the corresponding output of the voltage outer loop based on the first bus voltage and the second bus voltage, and to obtain the corresponding output of the current inner loop based on the corresponding output of the voltage outer loop, the input voltage, the first inductor current and the second inductor current, so as to control the positive bus loop and the negative bus loop; the second control circuit is used to calculate the duty cycle control quantity based on the third inductor current of the second control circuit, the first bus voltage and the second bus voltage and generate a drive signal, so as to control the positive bus loop and the negative bus loop.

[0006] This invention proposes a UPS front-end module that integrates a positive bus loop, a negative bus loop, and dual control circuits, simplifying the UPS front-end module structure. By coordinating the positive and negative bus loops with the sampling module and dual control circuits, the number of external components is reduced, lowering hardware complexity. The sampling module collects multi-dimensional parameters in real time, providing accurate data for dual closed-loop control and improving control precision. The first control circuit dynamically adjusts the bus voltage and inductor current through cascaded control of the voltage outer loop and current inner loop, ensuring stable output. The second control circuit introduces duty cycle control to further optimize the balance of positive and negative bus voltages. Therefore, this not only simplifies the UPS structure but also improves the system's response speed to load changes through dual-channel collaborative control, reducing voltage fluctuations and current surges. Powering the bus from both mains and battery is achieved through a single module, improving overall circuit stability and reliability.

[0007] Furthermore, the positive bus loop includes: an AC voltage source, an EMC circuit, a half-wave rectifier circuit, a first BUS inductor, a first BUS switching transistor, a first BUS diode, a first filter capacitor, a first resistor, a DC voltage source, an SCR thyristor, and subsequent circuitry; the AC voltage source is electrically connected to the EMC circuit; the EMC circuit is electrically connected to the half-wave rectifier circuit; the output of the EMC circuit is also electrically connected to the sampling module; the half-wave rectifier circuit is electrically connected to one end of the first BUS inductor, the half-wave rectifier circuit is electrically connected to one end of the SCR thyristor, and the other end of the SCR thyristor is electrically connected to the positive terminal of the DC voltage source; the other end of the first BUS inductor is electrically connected to one end of the first BUS diode; the first... The other end of a BUS inductor is electrically connected to one end of a first BUS switching transistor; the other end of a first BUS diode is electrically connected to one end of a first filter capacitor; the other end of a first BUS diode is electrically connected to one end of a first resistor; the other end of a first BUS diode is electrically connected to the subsequent circuit; an AC voltage source is used to provide single-phase AC power; an EMC circuit is used to defend against external interference; a half-wave rectifier circuit is used to separate the positive and negative half-cycles of the single-phase AC power; the first BUS inductor is set as a boost inductor; the first BUS switching transistor is used to control the current path; the first BUS diode is used to maintain the positive bus loop freewheeling current and prevent reverse current; the first filter capacitor is used for output filtering; and the first resistor is used for protection circuitry.

[0008] In the above scheme, the positive bus loop integrates an EMC circuit and a half-wave rectifier circuit, effectively solving the impact of external interference on UPS stability. The EMC circuit filters and suppresses electromagnetic interference, ensuring the module's anti-interference capability in complex power grid environments. The half-wave rectifier circuit separates the positive half-cycle of AC power from battery power supply, simplifying subsequent control logic. In addition, by sharing the rectification path, the use of components such as diodes is reduced, lowering hardware costs. At the same time, the combination of half-wave rectification with the BUS inductor and switching transistor enables precise regulation of the positive bus voltage. Combined with real-time feedback from the sampling module, the control circuit can quickly respond to changes in input voltage, avoiding output instability caused by voltage fluctuations. Thus, the bus is powered by both AC power and battery through a single module, improving the overall stability and reliability of the circuit.

[0009] Furthermore, the negative bus loop includes: an AC voltage source, an EMC circuit, a half-wave rectifier circuit, a second bus inductor, a second bus switch, a second bus diode, a second filter capacitor, a second resistor, a DC voltage source, an SCR thyristor, and subsequent circuitry; the AC voltage source is electrically connected to the EMC circuit; the EMC circuit is electrically connected to the half-wave rectifier circuit; the output of the EMC circuit is also electrically connected to the sampling module; the half-wave rectifier circuit is electrically connected to one end of the second bus inductor, and the half-wave rectifier circuit is electrically connected to the negative terminal of the DC voltage source; the other end of the second bus inductor is electrically connected to one end of the second bus diode; the other end of the second bus inductor is electrically connected to one end of the second bus switch. Connections: The other end of the second BUS switch is electrically connected to the other end of the first BUS switch; the other end of the second BUS diode is electrically connected to one end of the second filter capacitor; the other end of the second filter capacitor is electrically connected to the other end of the first filter capacitor; the other end of the second BUS diode is electrically connected to one end of the second resistor; the other end of the second resistor is electrically connected to the other end of the first resistor; the other end of the second BUS diode is electrically connected to the subsequent circuit; the second BUS inductor is set as a boost inductor; the second BUS switch is used to control the current path; the second BUS diode is used to maintain the positive bus loop freewheeling current and prevent reverse current; the second filter capacitor is used for output filtering; the second resistor is used for protection circuit.

[0010] In the above scheme, the negative bus loop and the positive bus loop are designed in the same way, which realizes the consistency of the control algorithm, simplifies the circuit structure and circuit control logic, and the connection between the half-wave rectifier circuit and the negative terminal of the DC voltage source effectively utilizes the energy of the negative half-cycle of the AC power and improves the power conversion efficiency. The symmetrical structure also solves the problem of voltage imbalance between the positive and negative buses. By dynamically adjusting the duty cycle, it ensures that the voltage difference between the positive and negative buses is within the allowable range, avoiding uneven stress on the devices or distortion of the output waveform caused by voltage imbalance. Thus, the mains power and battery power supply to the bus can be realized through the same set of modules, which improves the overall stability and reliability of the circuit.

[0011] Furthermore, the sampling module includes: a mains voltage sampling module, a first BUS inductor current sampling module, a second BUS inductor current sampling module, a first BUS output voltage sampling module, and a second BUS output voltage sampling module; the mains voltage sampling module is electrically connected to the output terminal of the EMC circuit; the first BUS inductor current sampling module is electrically connected to the first BUS inductor; the second BUS inductor current sampling module is electrically connected to the second BUS inductor; the first BUS output voltage sampling module is electrically connected to the positive bus loop; the second BUS output voltage sampling module is electrically connected to the negative bus loop; the mains voltage sampling module is used to acquire the input voltage; the first BUS inductor current sampling module is used to acquire the first inductor current of the positive bus loop; the second BUS inductor current sampling module is used to acquire the second inductor current of the negative bus loop; the first BUS output voltage sampling module is used to acquire the first bus voltage of the positive bus loop; and the second BUS output voltage sampling module is used to acquire the second bus voltage of the negative bus loop.

[0012] In the above scheme, the multi-dimensional parameter acquisition of the sampling module provides comprehensive status information for the control circuit. The independent sampling channel enables precise acquisition of key parameters, avoiding signal crosstalk. Real-time monitoring of bus voltage and inductor current data allows the subsequent control circuit to quickly identify load surges or input anomalies and maintain output stability by dynamically adjusting the duty cycle. Furthermore, the accurate sampling data supports predictive maintenance. Therefore, this approach not only simplifies the UPS structure but also utilizes only one module to power the bus from both mains and batteries, improving the overall stability and reliability of the circuit.

[0013] Furthermore, the first control circuit includes: a plurality of first ADC acquisition modules, an effective square divider, a positive bus loop controller, a negative bus loop controller, a first voltage loop controller, and a first current loop controller; the plurality of first ADC acquisition modules are used to acquire voltage signals or acquire current signals; the effective square divider is used to preprocess the input voltage; the positive bus loop controller is used to input the first bus voltage to the voltage loop controller to obtain the first output corresponding to the voltage outer loop; the positive bus loop controller is used to generate a first current loop reference value based on the first output corresponding to the voltage outer loop, the first bus voltage, and the input voltage, and calculate the first inductor current and... The first error value of the first current loop reference value is sent to the current loop controller to obtain the second output corresponding to the inner current loop, so as to control the positive bus loop; the negative bus loop controller is used to input the second bus voltage to the voltage loop controller to obtain the third output corresponding to the outer voltage loop; the negative bus loop controller is used to generate the second current loop reference value according to the third output corresponding to the outer voltage loop, the second bus voltage and the input voltage, calculate the second error value between the second inductor current and the second current loop reference value, and send the second error value to the current loop controller to obtain the fourth output corresponding to the inner current loop, so as to control the negative bus loop.

[0014] In the above scheme, the dual-loop control architecture of the first control circuit achieves high-precision dynamic adjustment. The outer voltage loop generates a reference signal for the current loop by comparing the bus voltage with the reference value; the inner current loop directly controls the inductor current to ensure that it tracks the reference value. This cascaded control structure effectively suppresses the influence of input voltage fluctuations and load changes on the output. The effective square divider preprocesses the input voltage, eliminates the interference of AC voltage amplitude fluctuations on the control algorithm, and improves control stability.

[0015] Furthermore, the second control circuit includes: a second ADC acquisition module, a second voltage loop controller, a second current loop controller, and a midpoint potential balance control circuit; the second ADC acquisition module is used to acquire the third inductor current, the first bus voltage, and the second bus voltage of the second control circuit; the second voltage loop controller is used to generate a reference current based on the first bus voltage and the second bus voltage; the second current loop controller is used to calculate the duty cycle control quantity based on the reference current and the third inductor current; the midpoint potential balance control circuit is used to generate a drive signal by superimposing the duty cycle control quantity with the fifth output of the midpoint potential balance control circuit, so as to control the positive bus loop and the negative bus loop.

[0016] In the above scheme, the second control circuit solves the common bus voltage imbalance problem in three-level topologies through midpoint potential balance control. The midpoint potential balance control circuit monitors the voltage difference between the positive and negative buses in real time and adjusts the on-time of the switching transistor by superimposing the duty cycle control quantity to force the bus voltage balance. Hardware-level control reduces the amount of software calculation and improves the response speed. At the same time, the accurate sampling of the inductor current by the second ADC acquisition module enables the current loop control to quickly suppress current overshoot or undershoot, reducing switching losses. This not only optimizes the static balance of the bus voltage, but also enhances the system's adaptability to load changes by dynamically adjusting the duty cycle control quantity, thereby improving the stability of the UPS front-end module.

[0017] This invention also provides a method for a UPS front-end module, comprising: obtaining a voltage outer loop output based on a first bus voltage and a second bus voltage; obtaining a current inner loop output based on the voltage outer loop output, the input voltage, the first inductor current, and the second inductor current; controlling the positive bus loop through the current inner loop output; and controlling the negative bus loop through the current inner loop output.

[0018] This invention proposes a UPS front-end module method. The first control circuit dynamically adjusts the bus voltage and inductor current through cascaded control of the voltage outer loop and the current inner loop to ensure stable output. The dual-loop control architecture of the first control circuit achieves high-precision dynamic adjustment. The voltage outer loop generates a reference signal for the current loop by comparing the bus voltage with a reference value. The current inner loop directly controls the inductor current to ensure that it tracks the reference value. This cascaded control structure effectively suppresses the impact of input voltage fluctuations and load changes on the output. The effective square divider preprocesses the input voltage, eliminating the interference of AC voltage amplitude fluctuations on the control algorithm and improving control stability.

[0019] Furthermore, based on the output and input voltage corresponding to the outer voltage loop, the first inductor current, and the second inductor current, the output corresponding to the inner current loop is obtained, including: generating a first current loop reference value based on the first output, the first bus voltage, and the input voltage corresponding to the outer voltage loop; calculating a first error value between the first inductor current and the first current loop reference value; obtaining a second output corresponding to the inner current loop based on the first error value; generating a second current loop reference value based on the third output, the second bus voltage, and the input voltage corresponding to the outer voltage loop; calculating a second error value between the second inductor current and the second current loop reference value; and obtaining a fourth output corresponding to the inner current loop based on the second error value.

[0020] This invention also provides a method for a UPS front-end module, comprising: calculating a duty cycle control quantity based on the third inductor current, the first bus voltage, and the second bus voltage of the second control circuit; generating a drive signal based on the duty cycle control quantity; and controlling the positive bus loop and the negative bus loop based on the drive signal.

[0021] This invention proposes a UPS front-end module method. The second control circuit introduces a duty cycle control quantity to further optimize the balance of positive and negative bus voltages. By superimposing the duty cycle control quantity to adjust the conduction time of the switching transistor, the bus voltage is forcibly balanced. Hardware-level control reduces the amount of software calculation and improves the response speed. Furthermore, by dynamically adjusting the duty cycle control quantity, the system's adaptability to load changes is enhanced, thereby improving the stability of the UPS front-end module.

[0022] Furthermore, the duty cycle control quantity is calculated based on the third inductor current, the first bus voltage, and the second bus voltage of the second control circuit, including: generating a reference current based on the first bus voltage and the second bus voltage; and calculating the duty cycle control quantity based on the reference current and the third inductor current. Attached Figure Description

[0023] Figure 1 A schematic diagram of the module structure of a UPS front-end module provided in a certain embodiment of the present invention. Figure 1 ;

[0024] Figure 2 A schematic diagram of the module structure of a UPS front-end module provided in a certain embodiment of the present invention. Figure 2 ;

[0025] Figure 3 A schematic diagram of the module structure of a UPS front-end module provided in a certain embodiment of the present invention. Figure 3 ;

[0026] Figure 4 A schematic diagram of the module structure of a UPS front-end module provided in a certain embodiment of the present invention. Figure 4 ;

[0027] Figure 5 A schematic diagram of the module structure of a UPS front-end module provided in a certain embodiment of the present invention. Figure 5 ;

[0028] Figure 6 A flowchart illustrating the steps of a UPS front-end module control method according to a certain embodiment of the present invention. Figure 1 ;

[0029] Figure 7 A flowchart illustrating the steps of a UPS front-end module control method according to a certain embodiment of the present invention. Figure 2 ;

[0030] Figure 8 A schematic diagram of control simulation results for a UPS front-end module control method provided in a certain embodiment of the present invention. Figure 1 ;

[0031] Figure 9 A schematic diagram of control simulation results for a UPS front-end module control method provided in a certain embodiment of the present invention. Figure 2 . Detailed Implementation

[0032] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0033] See Figure 1 , Figure 1 A schematic diagram of the module structure of a UPS front-end module provided in a certain embodiment of the present invention. Figure 1 .like Figure 1 As shown, this embodiment of the invention proposes a UPS front-end module, including: a positive bus loop 101, a negative bus loop 102, a sampling module 103, a first control circuit 104, and a second control circuit 105; the positive bus loop 101 is electrically connected to the negative bus loop 102 and the sampling module 103, and the negative bus loop 102 is electrically connected to the sampling module 103; the first control circuit 104 is electrically connected to the sampling module 103; the second control circuit 105 is electrically connected to the sampling module 103; the sampling module 103 is used to collect the input voltage, the first inductor current of the positive bus loop 101, the second inductor current of the negative bus loop 102, and the positive bus loop 103. The first bus voltage of positive bus loop 101 and the second bus voltage of negative bus loop 102; the first control circuit 104 is used to obtain the corresponding output of the voltage outer loop according to the first bus voltage and the second bus voltage, and to obtain the corresponding output of the current inner loop according to the corresponding output of the voltage outer loop, the input voltage, the first inductor current and the second inductor current, so as to control the positive bus loop 101 and the negative bus loop 102; the second control circuit 105 is used to calculate the duty cycle control quantity according to the third inductor current, the first bus voltage and the second bus voltage of the second control circuit 105 and generate a drive signal, so as to control the positive bus loop 101 and the negative bus loop 102.

[0034] One possible implementation is that the UPS front-end module includes: a positive bus loop 101, a negative bus loop 102, a sampling module 103, a first control circuit 104, and a second control circuit 105;

[0035] See Figure 2 , Figure 2 A schematic diagram of the module structure of a UPS front-end module provided in a certain embodiment of the present invention. Figure 2 ;like Figure 2As shown, the positive bus loop 101 includes: an AC voltage source AC, an EMC circuit, a half-wave rectifier circuit, a first BUS inductor, a first BUS switching transistor, a first BUS diode, a first filter capacitor, a first resistor, a DC voltage source DC, an SCR thyristor, and a subsequent stage circuit. Based on the components and circuits in the positive bus loop 101 of the UPS front-end module described above, their corresponding connections are as follows: the AC voltage source AC is electrically connected to the EMC circuit; the EMC circuit is electrically connected to the half-wave rectifier circuit; the output terminal of the EMC circuit is also electrically connected to the sampling module 103; the half-wave rectifier circuit is electrically connected to the first... One end of the first bus inductor is electrically connected to the half-wave rectifier circuit and one end of the SCR thyristor; the other end of the SCR thyristor is electrically connected to the positive terminal of the DC voltage source. The other end of the first bus inductor is electrically connected to one end of the first bus diode. The other end of the first bus inductor is electrically connected to one end of the first bus switch. The other end of the first bus diode is electrically connected to one end of the first filter capacitor. The other end of the first bus diode is electrically connected to one end of the first resistor. The other end of the first bus diode is electrically connected to the subsequent circuit. For the main circuit connections of the positive bus loop, see [link to relevant documentation]. Figure 2The blue line indicates the section. The functions of each component and circuit are described below: The AC voltage source provides 220V single-phase AC power; the EMC circuit protects against external interference (EMC refers to electromagnetic compatibility), ensuring stable operation of the UPS equipment and improving safety and anti-interference capabilities; the half-wave rectifier circuit separates the positive and negative half-cycles of the single-phase AC power, with the positive half-cycle serving as the input to the positive bus loop 101 and the negative half-cycle as the input to the negative bus loop 102. Furthermore, the half-wave rectifier uses thyristors and is controlled by a 100kHz PWM frequency. When a PWM wave is applied, the half-wave rectifier turns on to begin rectification; when the thyristor drive is 0, the half-wave rectifier turns off at the zero-crossing point; the first BUS inductor is set as a boost inductor, and in this embodiment, it is a positive BUS boost inductor. The positive and negative bus boost inductors have equal inductance. The first bus switch is used to control the current path and is usually set as an IGBT device. The first bus diode is used to maintain the freewheeling current of the positive bus loop 101 and prevent reverse current. In this embodiment, it is a positive bus freewheeling diode. The first filter capacitor is used for output filtering. In this embodiment, it is a positive filter capacitor. The first resistor is used for protection circuit. The DC voltage source provides a wide range of input DC current (196V-300V). The SCR thyristor is used to control the conduction and cutoff of the DC source. When a 100K frequency PWM drive is applied, the battery SCR is turned on. When the SCR drive is 0 and the AC voltage source is higher than the DC voltage source, the battery SCR is turned off. In the above scheme, the positive bus loop 101 integrates an EMC circuit and a half-wave rectifier circuit, effectively solving the impact of external interference on UPS stability. The EMC circuit filters and suppresses electromagnetic interference, ensuring the module's anti-interference capability in complex power grid environments. The half-wave rectifier circuit separates the positive half-cycle of AC power from battery power supply, simplifying subsequent control logic. In addition, by sharing the rectification path, the use of components such as diodes is reduced, lowering hardware costs. At the same time, the combination of half-wave rectification with BUS inductor and switching transistor enables precise adjustment of the positive bus voltage. Combined with the real-time feedback of the sampling module 103, the control circuit can quickly respond to changes in input voltage, avoiding output instability caused by voltage fluctuations. Thus, the mains power and battery power supply to the bus are achieved through only one set of modules, improving the overall stability and reliability of the circuit.

[0036] The negative bus loop 102 is designed to be basically the same as the positive bus loop 101, including: AC voltage source AC, EMC circuit, half-wave rectifier circuit, second BUS inductor, second BUS switching transistor, second BUS diode, second filter capacitor, second resistor, DC voltage source DC, SCR thyristor and subsequent circuit. Among them, the AC voltage source AC, EMC circuit, half-wave rectifier circuit, DC voltage source DC, SCR thyristor and subsequent circuit in the positive bus loop 101 and the negative bus loop 102 are shared, that is, the positive bus loop 101 and the negative bus loop 102 share a set of AC voltage source AC, EMC circuit, half-wave rectifier circuit, DC voltage source DC, SCR thyristor and subsequent circuit. Based on the components and circuits in the negative bus loop 102 of the UPS front-end module described above, their corresponding connections are as follows: The AC voltage source (AC) is electrically connected to the EMC circuit; the EMC circuit is electrically connected to the half-wave rectifier circuit; the output terminal of the EMC circuit is also electrically connected to the sampling module 103; the half-wave rectifier circuit is electrically connected to one end of the second BUS inductor, and the half-wave rectifier circuit is electrically connected to the negative terminal of the DC voltage source (DC); the other end of the second BUS inductor is electrically connected to one end of the second BUS diode; the other end of the second BUS inductor is electrically connected to one end of the second BUS switch transistor; the other end of the second BUS switch transistor is electrically connected to the other end of the first BUS switch transistor; the other end of the second BUS diode is electrically connected to one end of the second filter capacitor; the other end of the second filter capacitor is electrically connected to the other end of the first filter capacitor; the other end of the second BUS diode is electrically connected to one end of the second resistor; the other end of the second resistor is electrically connected to the other end of the first resistor; the other end of the second BUS diode is electrically connected to the subsequent circuit. For the main circuit connections of the negative bus loop, please refer to [link to relevant documentation]. Figure 2 The section marked with red in the middle. The functions of each component and circuit are described below: The second BUS inductor is set as a boost inductor, and in this embodiment, it is a negative BUS boost inductor; the second BUS switching transistor is used to control the current path, and is usually set as an IGBT device; the second BUS diode is used to maintain the freewheeling current in the positive bus loop 101 and prevent reverse current, and in this embodiment, it is a negative BUS freewheeling diode; the second filter capacitor is used for output filtering, and in this embodiment, it is a negative filter capacitor; the second resistor is used for protection circuitry. In the above scheme, the negative bus loop 102 and the positive bus loop 101 are designed in the same way, which realizes the consistency of the control algorithm, simplifies the circuit structure and circuit control logic, and the connection between the half-wave rectifier circuit and the negative terminal of the DC voltage source effectively utilizes the energy of the negative half-cycle of the AC power and improves the power conversion efficiency. The symmetrical structure also solves the problem of voltage imbalance between the positive and negative buses. By dynamically adjusting the duty cycle, it ensures that the voltage difference between the positive and negative buses is within the allowable range, avoiding uneven stress on the devices or distortion of the output waveform caused by voltage imbalance. Thus, the mains power and battery power supply to the bus can be realized through the same set of modules, which improves the overall stability and reliability of the circuit.

[0037] The sampling module 103 includes: a mains voltage sampling module, a first BUS inductor current sampling module, a second BUS inductor current sampling module, a first BUS output voltage sampling module, and a second BUS output voltage sampling module. Based on the components and circuits in the sampling module 103 of the UPS front-end module described above, their corresponding connection relationships are as follows: the mains voltage sampling module is electrically connected to the output terminal of the EMC circuit; the first BUS inductor current sampling module is electrically connected to the first BUS inductor; the second BUS inductor current sampling module is electrically connected to the second BUS inductor; the first BUS output voltage sampling module is electrically connected to the positive bus loop 101; and the second BUS output voltage sampling module is electrically connected to the negative bus loop 102. The connection relationships of each module are as follows: Figure 1 No specific limitations are specified. The functions of each component and circuit are described as follows: The mains voltage sampling module is used to collect the input voltage and can obtain information such as the phase, amplitude, frequency, effective value, and peak value of the input voltage. The acquisition of this information depends on the phase-locked loop (PLL). Currently, there are various schemes applied to single-phase AC PLLs, such as the delay method, all-pass filter, differential method, and second-order generalized integral (SOGI). Considering the simplicity of the code and the complexity of the implementation, this embodiment of the invention adopts a PLL based on the delay method; The first BUS inductor current sampling module is used to collect the first inductor current of the positive bus loop 101 for current loop control and fault alarm; The second BUS inductor current sampling module is used to collect the second inductor current of the negative bus loop 102 for current loop control and fault alarm; The first BUS output voltage sampling module is used to collect the first bus voltage of the positive bus loop 101 for voltage loop control and fault alarm; The second BUS output voltage sampling module is used to collect the second bus voltage of the negative bus loop 102 for voltage loop control and fault alarm. In the above scheme, the multi-dimensional parameter acquisition of the sampling module 103 provides comprehensive status information for the control circuit. The independent sampling channel enables precise acquisition of key parameters, avoiding signal crosstalk. Real-time monitoring of bus voltage and inductor current data allows the subsequent control circuit to quickly identify load surges or input anomalies and maintain output stability by dynamically adjusting the duty cycle. Furthermore, the accurate sampling data supports predictive maintenance. Therefore, this scheme not only simplifies the UPS structure but also uses only one module to power the bus from both mains and batteries, improving the overall stability and reliability of the circuit.

[0038] The first control circuit 104 includes: several first ADC acquisition modules, an effective square divider, a positive bus loop controller 101, a negative bus loop controller 102, a first voltage loop controller, and a first current loop controller. The functions of each component and circuit in the first control circuit 104 of the UPS front-end module described above are as follows: the several first ADC acquisition modules are used to acquire voltage signals or current signals; the effective square divider is used to preprocess the input voltage; the positive bus loop controller 101 is used to input the first bus voltage to the voltage loop controller to obtain the first output corresponding to the outer voltage loop; the positive bus loop controller 101 is used to generate a first current loop reference value based on the first output corresponding to the outer voltage loop, the first bus voltage, and the input voltage, calculate the first error value between the first inductor current and the first current loop reference value, and then... An error value is sent to the current loop controller to obtain the second output corresponding to the inner current loop, which is used to control the positive bus loop 101. The negative bus loop 102 controller is used to input the second bus voltage to the voltage loop controller to obtain the third output corresponding to the outer voltage loop. The negative bus loop 102 controller is used to generate a second current loop reference value based on the third output corresponding to the outer voltage loop, the second bus voltage, and the input voltage, calculate the second error value between the second inductor current and the second current loop reference value, and send the second error value to the current loop controller to obtain the fourth output corresponding to the inner current loop, which is used to control the negative bus loop 102. In this embodiment, the two controlled objects of the first control circuit 104 are the positive bus loop 101 and the negative bus loop 102, which are controlled independently and in the same way. For more details, see Figure 3 , Figure 3 A schematic diagram of the module structure of a UPS front-end module provided in a certain embodiment of the present invention. Figure 3 ;like Figure 3 As shown, the ADC acquisition module acquires the input voltage in real time. Positive BUS bus output voltage Negative BUS bus output voltage Positive boost inductor current and negative boost inductor current Input voltage ADC acquisition module Later obtained Input voltage After being divided by the square root of the effective value, we get Positive BUS bus output voltage ADC acquisition module Later obtained Negative bus output voltage ADC acquisition module Later obtained Positive boost inductor current ADC acquisition module This then serves as negative feedback for the current loop; negative boost inductor current. ADC acquisition module This then serves as negative feedback for the current loop; subsequently, the positive bus output voltage... As the feedback input of the voltage loop 101 of the positive bus loop, it passes through the voltage loop PI controller. The output of the positive bus loop 101 voltage loop is obtained; then the negative bus output voltage is obtained. As the feedback input of the voltage loop 102 of the negative bus loop, it passes through the voltage loop PI controller. The output of the negative bus loop 102 voltage loop is obtained; then, the output of the positive bus loop 101 voltage loop is obtained. Output Input voltage ADC acquisition module Later obtained The output of the effective value square divider and current reference value coefficient Together they constitute the current loop reference value of the positive bus loop 101; the output of the voltage loop of the negative bus loop 102, Output Input voltage ADC acquisition module Later obtained The output of the effective value square divider and current reference value coefficient Together, they constitute the current loop reference value of the negative bus loop 102; then the current loop reference value of the positive bus loop 101 is combined with the aforementioned... Subtracting the outputs, we obtain the input error of the positive bus loop 101 current loop. The current loop reference value of the negative bus loop 102 is related to the above. Subtracting the outputs, we obtain the input error of the negative bus loop 102 current loop. Furthermore, the input error of the positive bus loop 101 current loop... After current loop PI controller The output of the positive bus loop 101 current loop is obtained; the input error of the negative bus loop 102 current loop is obtained. After current loop PI controller The output of the negative bus loop 102 current loop is obtained; finally, the output of the positive bus loop 101 current loop is superimposed with the feedforward to obtain the duty cycle of the positive bus loop 101, and the output of the negative bus loop 102 current loop is superimposed with the feedforward to obtain the duty cycle of the negative bus loop 102; the feedforward of the positive bus loop 101 is equal to... The feedforward quantity of the negative bus loop 102 is equal to Meanwhile, the duty cycle of the positive bus loop 101 is adjusted by a calibration factor. and delay The final duty cycle of the positive bus loop 101 is obtained. To control the positive bus loop 101; the duty cycle of the negative bus loop 102 is calibrated by a coefficient. and delay The final negative bus loop duty cycle 102 is obtained. The first control circuit 104, along with the negative bus loop 102, controls the input voltage. In this scheme, the dual-loop control architecture of the first control circuit 104 achieves high-precision dynamic adjustment. The outer voltage loop generates a reference signal for the current loop by comparing the bus voltage with a reference value; the inner current loop directly controls the inductor current to ensure it tracks the reference value. This cascaded control structure effectively suppresses the impact of input voltage fluctuations and load changes on the output. The effective square divider preprocesses the input voltage, eliminating the interference of AC voltage amplitude fluctuations on the control algorithm and improving control stability.

[0039] The second control circuit 105 includes: a second ADC acquisition module, a second voltage loop controller, a second current loop controller, and a midpoint potential balance control circuit. The functions of each component and circuit in the second control circuit 105 of the UPS front-end module described above are as follows: The second ADC acquisition module is used to acquire the third inductor current, the first bus voltage, and the second bus voltage of the second control circuit 105; the second voltage loop controller is used to generate a reference current based on the first bus voltage and the second bus voltage; the second current loop controller is used to calculate the duty cycle control quantity based on the reference current and the third inductor current; the midpoint potential balance control circuit is used to generate a drive signal by superimposing the duty cycle control quantity with the fifth output of the midpoint potential balance control circuit, to control the positive bus loop 101 and the negative bus loop 102. For more details, see... Figure 4 , Figure 4 A schematic diagram of the module structure of a UPS front-end module provided in a certain embodiment of the present invention. Figure 4 ;like Figure 4 As shown, the ADC acquisition module acquires the inductor current of the three-level Boost circuit. Positive BUS voltage and negative BUS voltage ; Through positive BUS voltage and negative BUS voltage Summation yields Through positive BUS voltage and negative BUS voltage Find the difference ; Subtraction with voltage reference value is used as a voltage loop controller. The input, wherein the voltage reference value is the desired set voltage. One example is: the positive bus output voltage is 360V, the negative bus output voltage is 360V, then the voltage reference value V... ref Set to 720V; Voltage loop controller The output is used as the reference for the current loop. The given current loop and inductor current Performing subtraction as a current controller The input; then the current controller Superimposed output voltage feedforward The duty cycle control quantity d is obtained; the voltage feedforward quantity is obtained. pass Multiplied by a fixed coefficient The final duty cycle control quantity d is superimposed (added or subtracted) on the output of the midpoint potential balance control loop. The driving signals for the positive and negative bus boost transistors are used to control the positive bus loop 101 and the negative bus loop 102; the input of the midpoint potential balance control loop is... The controller of the midpoint potential balance control loop is... It is worth mentioning that, in the embodiments of the present invention, see... Figure 5 , Figure 5 A schematic diagram of the module structure of a UPS front-end module provided in a certain embodiment of the present invention. Figure 5 The second control circuit 105 can also be configured as follows: Figure 5 The circuit structure shown applies the derived loop control parameters of a two-level Boost converter to a three-level Boost dual-closed-loop control. In this scheme, the second control circuit 105 solves the common bus voltage imbalance problem in three-level topologies through midpoint potential balance control. The midpoint potential balance control circuit monitors the voltage difference between the positive and negative buses in real time and adjusts the on-time of the switching transistors by superimposing duty cycle control quantities to force bus voltage balance. Hardware-level control reduces software calculations and improves response speed. Simultaneously, the precise sampling of inductor current by the second ADC acquisition module enables the current loop control to quickly suppress current overshoot or undershoot, reducing switching losses. This not only optimizes the static balance of the bus voltage but also enhances the system's adaptability to load fluctuations by dynamically adjusting the duty cycle control quantities, improving the stability of the UPS front-end module. It is worth noting that the first control circuit 104 and the second control circuit 105 are independent of each other and can switch the corresponding control circuit through a state machine based on the mains power monitoring results to achieve subsequent control.

[0040] This invention proposes a UPS front-end module that integrates a positive bus loop 101, a negative bus loop 102, and dual control circuits, simplifying the UPS front-end module structure. The positive and negative bus loops 102 work collaboratively with the sampling module 103 and the dual control circuits, reducing the number of external components and lowering hardware complexity. The sampling module 103 collects multi-dimensional parameters in real time, providing accurate data for dual closed-loop control and improving control precision. The first control circuit 104 dynamically adjusts the bus voltage and inductor current through cascaded control of the voltage outer loop and current inner loop, ensuring stable output. The second control circuit 105 introduces duty cycle control to further optimize the balance of positive and negative bus voltages. Therefore, this not only simplifies the UPS structure but also improves the system's response speed to load changes through dual-channel collaborative control, reduces voltage fluctuations and current surges, and enables both mains power and battery power supply to the bus through a single module, improving overall circuit stability and reliability.

[0041] To further explain the control logic of a UPS front-end module proposed in this embodiment of the invention, please refer to the specific principle of the first control circuit 104. Figure 6 , Figure 6 A flowchart illustrating the steps of a UPS front-end module control method according to a certain embodiment of the present invention. Figure 1 ;like Figure 6 As shown, this embodiment of the invention proposes a UPS front-end module control method, including: steps 101 to 104, each step is as follows: Step S11, obtain the voltage outer loop corresponding output based on the first bus voltage and the second bus voltage;

[0042] Step S12: Based on the output and input voltage corresponding to the outer voltage loop, the first inductor current, and the second inductor current, obtain the output corresponding to the inner current loop. This process includes: generating a first current loop reference value based on the first output, first bus voltage, and input voltage corresponding to the outer voltage loop; calculating a first error value between the first inductor current and the first current loop reference value; obtaining a second output corresponding to the inner current loop based on the first error value; generating a second current loop reference value based on the third output, second bus voltage, and input voltage corresponding to the outer voltage loop; calculating a second error value between the second inductor current and the second current loop reference value; and obtaining a fourth output corresponding to the inner current loop based on the second error value.

[0043] Step S13: Control the positive bus loop 101 through the corresponding output of the inner current loop;

[0044] Step S14: Control the negative bus loop 102 through the corresponding output of the inner current loop.

[0045] One specific possible implementation method, such as Figure 2 As shown, the first control circuit 104 is applied in the UPS front-end module and is characterized by a PFC dual-loop control method. This method includes two controlled objects: the positive bus loop 101 and the negative bus loop 102. In this embodiment, the positive bus PFC controller and the negative bus PFC controller are used to explain the positive bus loop 101 and the negative bus loop 102 respectively. They are controlled independently, but with the same control method. The PFC dual-loop control architecture is designed as an outer loop BUS voltage loop (i.e., voltage outer loop), an inner loop inductor current loop (i.e., current inner loop), and a duty cycle feedforward compensation loop structure. The current inner loop is a fast loop, and the current inner loop and feedforward compensation are calculated in the ADC fast interrupt function. The voltage outer loop is a slow loop, and the voltage outer loop is calculated in the 1kHz interrupt function. Since the positive bus PFC controller and the negative bus PFC controller have the same control method, the positive bus PFC controller is used as an example for explanation. The ADC acquisition module acquires the input voltage in real time. Positive BUS bus output voltage and positive boost inductor current Input voltage ADC acquisition module Later obtained ,in, , Here, 3.3 represents the gain of the voltage sampling module, and 3.3 indicates that the chip's ADC can acquire a maximum voltage of 3.3V; then, the input voltage... After being divided by the square root of the effective value, we get To simplify the calculation, let Positive BUS bus output voltage ADC acquisition module Later obtained ,in, , Gain of the positive BUS voltage sampling module; current of the positive boost inductor. ADC acquisition module This then serves as negative feedback for the inner current loop, where... , This represents the gain of the positive boost inductor sampling module. Positive BUS bus output voltage. As the feedback input of the outer loop voltage of the positive bus PFC controller, it passes through the voltage loop PI controller. The output of the outer loop voltage of the positive bus PFC controller is obtained, where, , For the gain of PI, The zeros that need to be solved for in the transfer function. Then, the output of the positive bus PFC controller voltage loop, Output Input voltage ADC acquisition module Later obtained The output of the effective value square divider and current reference value coefficient Together, they constitute the current loop reference value of the positive bus loop 101; the current inner loop reference value of the positive bus PFC controller and the... Subtracting the outputs, we obtain the input error of the positive bus PFC controller's inner current loop. The input error of the current loop of the positive bus PFC controller. After current loop PI controller The output of the positive bus PFC controller current loop is obtained, where, The output of the positive bus PFC controller current loop is superimposed with the feedforward quantity to obtain the duty cycle of the positive bus PFC controller; the feedforward quantity of the positive bus PFC controller is equal to... The duty cycle of the positive bus PFC controller has been calibrated. and delay The final positive bus PFC controller duty cycle is obtained. This is used to control the positive bus loop 101; finally, the open-loop transfer function from the duty cycle to the inductor current of the Boost circuit is constructed, and its specific expression is as follows:

[0046] ;

[0047] in, For the inductance of the boost inductor, This is the capacitance value of the filter capacitor. This is the rated load value. To maintain a stable work occupancy rate, ; include and ;

[0048] according to Figure 3 The transfer function of the positive bus loop 101 shown in the block diagram is:

[0049] ;

[0050] Since the positive bus loop 101 and the negative bus loop 102 have the same control method, the transfer function of the negative bus loop 102 is the same as the transfer function of the positive bus loop 101. The expression methods are the same, only the parameter representations are different.

[0051] For details on the principle of the second control circuit 105, please refer to [link / reference needed]. Figure 7 , Figure 7 A flowchart illustrating the steps of a UPS front-end module control method according to a certain embodiment of the present invention. Figure 2 ;like Figure 7As shown in the figure, this embodiment of the invention proposes a UPS front-end module control method, including steps 201 to 203, the specific steps of which are as follows:

[0052] Step S21: Calculate the duty cycle control quantity based on the third inductor current, the first bus voltage, and the second bus voltage of the second control circuit 105; wherein, calculating the duty cycle control quantity based on the third inductor current, the first bus voltage, and the second bus voltage of the second control circuit 105 includes: generating a reference current based on the first bus voltage and the second bus voltage; and calculating the duty cycle control quantity based on the reference current and the third inductor current.

[0053] Step S22: Generate a drive signal based on the duty cycle control quantity;

[0054] Step S23: Control the positive bus loop 101 and the negative bus loop 102 based on the drive signal.

[0055] One possible implementation is to apply the second control circuit 105 in the UPS front-end module, characterized by a three-level Boost dual closed-loop control method, such as... Figure 4 As shown, the ADC acquisition module acquires the inductor current of the three-level Boost circuit. Positive BUS voltage and negative BUS voltage First, through positive BUS voltage and negative BUS voltage Summation yields and through positive BUS voltage and negative BUS voltage Find the difference ; and voltage reference quantity V ref Performing subtraction operations as a voltage loop controller The input, then the voltage loop controller The output is used as the reference for the current loop. The given current loop and inductor current Performing subtraction as a current controller Input; current controller Superimposed output voltage feedforward The duty cycle control quantity d and the voltage feedforward quantity are obtained. pass Multiplied by a fixed coefficient We obtain the result here. ; ; The DC source voltage; the output of the midpoint potential balance control loop is the superposition (addition or subtraction) of the duty cycle control quantity d. The driving signals for the positive and negative bus boost transistors are used to control the positive bus loop 101 and the negative bus loop 102; the input of the midpoint potential balance control loop is... The controller of the midpoint potential balance control loop is... In the embodiments of the present invention, see... Figure 5 , Figure 5 A schematic diagram of the module structure of a UPS front-end module provided in a certain embodiment of the present invention. Figure 5 The second control circuit 105 can also be configured as follows: Figure 5 The circuit structure shown applies the derived loop control parameters of a two-level Boost circuit to a three-level Boost dual-closed-loop control. Specifically, this means that... Figure 5 In the middle, V in (s) is the reference voltage input, which is related to the bus voltage V. o (s) Subtraction is used as the input to the voltage loop controller. The output is used as the given I of the current loop. ref (s), I ref (s) is subtracted from the inductor current to form a current loop controller. Input, current loop controller Output superimposed feedforward quantity k(1-D)V o (s) acts on the controlled object. Here, let k=1, which can cancel out (1-D)V. o (s), the control parameters obtained from this loop can be directly used for three-level control, requiring only minor parameter adjustments. The control object after superimposed feedforward effect is simplified as follows:

[0056] G s =1 / (L s s C+L / R s+r (s C+1 / R)+(1-D)^2);

[0057] Open-loop transfer function G of the current loop si Specifically:

[0058] G si =(k pi +k ii / s) (R C s+1) / ((R C s+1) (L s+r)+(1-k) (1-D)^2 R);

[0059] Among them, G i (s)=(k pi +k ii / s), k pi and k ii The current coefficient;

[0060] Voltage loop open-loop transfer function G su Specifically:

[0061] G su =(k pu +k iu / s) G si / (1+G si ) R / (s C R+1) (1-D);

[0062] Among them, G u (s)=(k pu +k iu / s), k pu and k iu Voltage coefficient;

[0063] See Figure 8 and Figure 9 , Figure 8 A schematic diagram of control simulation results for a UPS front-end module control method provided in a certain embodiment of the present invention. Figure 1 ; Figure 9 A schematic diagram of control simulation results for a UPS front-end module control method provided in a certain embodiment of the present invention. Figure 2 To further verify the feasibility of applying two-level Boost parameters to a three-level Boost platform, a simulation was built as follows: Figure 8 and Figure 9 As shown. Comparison of simulation results. Figure 8 and Figure 9 It can be seen that, under the same hardware parameters and control methods, the two-level control and the three-level control have the same basic trend. The two-level control has a larger overshoot and a faster response. Therefore, the slow response of the three-level control can be optimized by fine-tuning the parameters.

[0064] The above description is only a preferred embodiment of the present invention. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the technical principles of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.

[0065] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this application. Furthermore, the described specific features, structures, materials, or characteristics may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of those different embodiments or examples.

[0066] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this application, "a plurality of" means two or more, unless otherwise explicitly specified.

Claims

1. A pre-UPS module, characterized by, The application relates to a positive bus loop, a negative bus loop, a sampling module, a first control circuit and a second control circuit. The positive bus loop comprises an EMC circuit and a first BUS inductor; the negative bus loop comprises the EMC circuit and a second BUS inductor; the sampling module comprises an input voltage sampling module, a first inductor current sampling module and a second inductor current sampling module; and the second control circuit comprises a second ADC acquisition module, a second voltage loop controller, a second current loop controller and a midpoint potential balance control circuit. The positive bus loop is electrically connected with the negative bus loop and the sampling module, wherein the input voltage sampling module is electrically connected with the output end of the EMC circuit; the first inductor current sampling module is electrically connected with the first BUS inductor; the negative bus loop is electrically connected with the sampling module, wherein the second inductor current sampling module is electrically connected with the second BUS inductor; the first control circuit is electrically connected with the sampling module; and the second control circuit is electrically connected with the sampling module. The sampling module is used for acquiring input voltage, first inductor current of the positive bus loop, second inductor current of the negative bus loop, first bus voltage of the positive bus loop and second bus voltage of the negative bus loop, and comprises the input voltage sampling module, the first inductor current sampling module and the second inductor current sampling module. The first control circuit is used for obtaining voltage outer loop corresponding output according to the first bus voltage and the second bus voltage, obtaining current inner loop corresponding output according to the voltage outer loop corresponding output, the input voltage, the first inductor current and the second inductor current, and controlling the positive bus loop and the negative bus loop. The second control circuit is used for calculating duty control quantity and generating a driving signal according to the third inductor current of the second control circuit, the first bus voltage and the second bus voltage, so as to control the positive bus loop and the negative bus loop, and comprises the second ADC acquisition module, the second voltage loop controller, the second current loop controller and the midpoint potential balance control circuit. The positive bus loop comprises an AC voltage source, a half-wave rectification circuit, a first BUS switch tube, a first BUS diode, a first filter capacitor, a first resistor, a DC voltage source, an SCR thyristor and a post-stage circuit.

2. A pre-UPS module as claimed in claim 1, characterized in that ​ The alternating voltage source is electrically connected with the EMC circuit; the EMC circuit is electrically connected with the half-wave rectifier circuit; the half-wave rectifier circuit is electrically connected with one end of the first BUS inductor, and the half-wave rectifier circuit is electrically connected with one end of the SCR thyristor; the other end of the SCR thyristor is electrically connected with the positive electrode of the direct current voltage source; the negative electrode of the direct current voltage source is electrically connected with the negative bus loop; the other end of the first BUS inductor is electrically connected with one end of the first BUS diode; the other end of the first BUS inductor is electrically connected with one end of the first BUS switch tube; the other end of the first BUS switch tube is electrically connected with the negative bus loop; the other end of the first BUS diode is electrically connected with one end of the first filter capacitor; the other end of the first filter capacitor is electrically connected with the negative bus loop; the other end of the first BUS diode is electrically connected with one end of the first resistor; the other end of the first resistor is electrically connected with the negative bus loop; the other end of the first BUS diode is electrically connected with the subsequent circuit. The alternating voltage source is used to provide single-phase alternating current; the EMC circuit is used to prevent external interference; the half-wave rectifier circuit is used to separate the positive half cycle and the negative half cycle of the single-phase alternating current; the first BUS inductor is set as a boost inductor; the first BUS switch tube is used to control the current path; the first BUS diode is used to maintain the positive bus loop current and prevent reverse current; the first filter capacitor is used for output filtering; and the first resistor is used for circuit protection.

3. A UPS front-end module as described in claim 2, characterized in that, The negative bus loop comprises an alternating voltage source, a half-wave rectifier circuit, a second BUS switch tube, a second BUS diode, a second filter capacitor, a second resistor, a direct current voltage source, an SCR thyristor and a subsequent circuit. The alternating voltage source is electrically connected with the EMC circuit; the EMC circuit is electrically connected with the half-wave rectifier circuit; the half-wave rectifier circuit is electrically connected with one end of the second BUS inductor; the half-wave rectifier circuit is electrically connected with the negative electrode of the direct current voltage source; the other end of the second BUS inductor is electrically connected with one end of the second BUS diode; the other end of the second BUS inductor is electrically connected with one end of the second BUS switch tube; the other end of the second BUS switch tube is electrically connected with the other end of the first BUS switch tube; the other end of the second BUS diode is electrically connected with one end of the second filter capacitor; the other end of the second filter capacitor is electrically connected with the other end of the first filter capacitor; the other end of the second BUS diode is electrically connected with one end of the second resistor; the other end of the second resistor is electrically connected with the other end of the first resistor; and the other end of the second BUS diode is electrically connected with the subsequent circuit. The second BUS inductor is configured as a boost inductor; the second BUS switch tube is configured to control a current path; the second BUS diode is configured to maintain positive bus loop current continuation and prevent reverse current; the second filter capacitor is configured to output filtering; and the second resistor is configured to protect the circuit.

4. A UPS front-end module as described in claim 3, characterized in that, The sampling module comprises a first BUS output voltage sampling module and a second BUS output voltage sampling module. The first BUS output voltage sampling module is electrically connected to the positive bus loop, and the second BUS output voltage sampling module is electrically connected to the negative bus loop. The first BUS output voltage sampling module is configured to collect a first bus voltage of the positive bus loop, and the second BUS output voltage sampling module is configured to collect a second bus voltage of the negative bus loop.

5. The pre-UPS module of claim 1, wherein the pre-UPS module is configured to perform the following functions: The first control circuit comprises a plurality of first ADC acquisition modules, an effective square divider, a positive bus loop controller, a negative bus loop controller, a first voltage loop controller, and a first current loop controller. ​ The plurality of first ADC acquisition modules are configured to collect voltage signals or collect current signals. The effective square divider is configured to preprocess the input voltage. The positive bus loop controller is configured to input the first bus voltage into the voltage loop controller to obtain a first output corresponding to the voltage outer loop. The positive bus loop controller is configured to generate a first current loop reference value according to the first output corresponding to the voltage outer loop, the first bus voltage, and the input voltage, calculate a first error value of the first inductor current and the first current loop reference value, and send the first error value to the current loop controller to obtain a second output corresponding to the current inner loop, so as to control the positive bus loop. The negative bus loop controller is configured to input the second bus voltage into the voltage loop controller to obtain a third output corresponding to the voltage outer loop. The negative bus loop controller is configured to generate a second current loop reference value according to the third output corresponding to the voltage outer loop, the second bus voltage, and the input voltage, calculate a second error value of the second inductor current and the second current loop reference value, and send the second error value to the current loop controller to obtain a fourth output corresponding to the current inner loop, so as to control the negative bus loop.

6. A method of controlling a pre-UPS module, characterized by, The application is applied to the UPS pre-stage module as claimed in any one of claims 1 to 5, comprising: obtaining an output corresponding to a voltage outer loop based on a first bus voltage and a second bus voltage; obtaining an output corresponding to a current inner loop based on the output corresponding to the voltage outer loop, an input voltage, a first inductor current, and a second inductor current; controlling a positive bus loop through the output corresponding to the current inner loop; controlling a negative bus loop through the output corresponding to the current inner loop.

7. The method of claim 6, wherein the step of determining the operating mode of the UPS pre-regulator module is performed by the microcontroller. Obtaining an output corresponding to a current inner loop based on the output corresponding to a voltage outer loop, an input voltage, a first inductor current, and a second inductor current, comprises: generating a first current loop reference value according to a first output corresponding to the voltage outer loop, the first bus voltage, and the input voltage; calculating a first error value of the first inductor current and the first current loop reference value; Based on the first error value, a second output corresponding to the current inner loop is obtained; According to the third output corresponding to the voltage outer loop, the second bus voltage and the input voltage, a second current loop reference value is generated; A second error value of the second inductor current and the second current loop reference value is calculated; Based on the second error value, a fourth output corresponding to the current inner loop is obtained.

8. A method of controlling a pre-UPS module, characterized by, The application is applied to the UPS pre-stage module as claimed in any one of claims 1 to 5, comprising: According to the third inductor current of the second control circuit, the first bus voltage and the second bus voltage, a duty control amount is calculated, comprising: generating a reference current according to the first bus voltage and the second bus voltage; calculating a duty control amount according to the reference current and the third inductor current; Based on the duty control amount, a driving signal is generated; Based on the driving signal, the positive bus loop and the negative bus loop are controlled.

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